]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/gpu/drm/nouveau/core/engine/disp/nv94.c
drm/nv50/disp: create skeleton display/channel object classes
[mirror_ubuntu-artful-kernel.git] / drivers / gpu / drm / nouveau / core / engine / disp / nv94.c
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1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
25#include <engine/software.h>
26#include <engine/disp.h>
27
28#include "nv50.h"
29
30static struct nouveau_oclass
31nv94_disp_sclass[] = {
32 { 0x887d, &nv50_disp_mast_ofuncs }, /* master */
33 { 0x887c, &nv50_disp_dmac_ofuncs }, /* sync */
34 { 0x887e, &nv50_disp_dmac_ofuncs }, /* overlay */
35 { 0x887b, &nv50_disp_pioc_ofuncs }, /* overlay (pio) */
36 { 0x887a, &nv50_disp_pioc_ofuncs }, /* cursor (pio) */
37 {}
38};
39
40static struct nouveau_oclass
41nv94_disp_base_oclass[] = {
42 { 0x8870, &nv50_disp_base_ofuncs },
43};
44
45static int
46nv94_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
47 struct nouveau_oclass *oclass, void *data, u32 size,
48 struct nouveau_object **pobject)
49{
50 struct nv50_disp_priv *priv;
51 int ret;
52
53 ret = nouveau_disp_create(parent, engine, oclass, "PDISP",
54 "display", &priv);
55 *pobject = nv_object(priv);
56 if (ret)
57 return ret;
58
59 nv_engine(priv)->sclass = nv94_disp_base_oclass;
60 nv_engine(priv)->cclass = &nv50_disp_cclass;
61 nv_subdev(priv)->intr = nv50_disp_intr;
62 priv->sclass = nv94_disp_sclass;
63 priv->head.nr = 2;
64 priv->dac.nr = 3;
65 priv->sor.nr = 4;
66
67 INIT_LIST_HEAD(&priv->base.vblank.list);
68 spin_lock_init(&priv->base.vblank.lock);
69 return 0;
70}
71
72struct nouveau_oclass
73nv94_disp_oclass = {
74 .handle = NV_ENGINE(DISP, 0x88),
75 .ofuncs = &(struct nouveau_ofuncs) {
76 .ctor = nv94_disp_ctor,
77 .dtor = _nouveau_disp_dtor,
78 .init = _nouveau_disp_init,
79 .fini = _nouveau_disp_fini,
80 },
81};