]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/gpu/drm/nouveau/core/engine/graph/nvc1.c
Merge tag 'mvebu-fixes-3.16-3' of git://git.infradead.org/linux-mvebu into fixes
[mirror_ubuntu-artful-kernel.git] / drivers / gpu / drm / nouveau / core / engine / graph / nvc1.c
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1/*
2 * Copyright 2013 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs <bskeggs@redhat.com>
23 */
24
25#include "nvc0.h"
c33b1e8c 26#include "ctxnvc0.h"
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27
28/*******************************************************************************
29 * Graphics object classes
30 ******************************************************************************/
31
32static struct nouveau_oclass
33nvc1_graph_sclass[] = {
34 { 0x902d, &nouveau_object_ofuncs },
35 { 0x9039, &nouveau_object_ofuncs },
36 { 0x9097, &nouveau_object_ofuncs },
37 { 0x90c0, &nouveau_object_ofuncs },
38 { 0x9197, &nouveau_object_ofuncs },
39 {}
40};
41
42/*******************************************************************************
c33b1e8c 43 * PGRAPH register lists
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44 ******************************************************************************/
45
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46const struct nvc0_graph_init
47nvc1_graph_init_gpc_unk_0[] = {
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48 { 0x418604, 1, 0x04, 0x00000000 },
49 { 0x418680, 1, 0x04, 0x00000000 },
50 { 0x418714, 1, 0x04, 0x00000000 },
51 { 0x418384, 1, 0x04, 0x00000000 },
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52 {}
53};
54
55const struct nvc0_graph_init
56nvc1_graph_init_setup_1[] = {
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57 { 0x4188c8, 2, 0x04, 0x00000000 },
58 { 0x4188d0, 1, 0x04, 0x00010000 },
59 { 0x4188d4, 1, 0x04, 0x00000001 },
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60 {}
61};
62
63static const struct nvc0_graph_init
64nvc1_graph_init_gpc_unk_1[] = {
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65 { 0x418d00, 1, 0x04, 0x00000000 },
66 { 0x418f08, 1, 0x04, 0x00000000 },
67 { 0x418e00, 1, 0x04, 0x00000003 },
68 { 0x418e08, 1, 0x04, 0x00000000 },
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69 {}
70};
71
c33b1e8c 72static const struct nvc0_graph_init
7e194533 73nvc1_graph_init_pe_0[] = {
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74 { 0x41980c, 1, 0x04, 0x00000010 },
75 { 0x419810, 1, 0x04, 0x00000000 },
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76 { 0x419814, 1, 0x04, 0x00000004 },
77 { 0x419844, 1, 0x04, 0x00000000 },
78 { 0x41984c, 1, 0x04, 0x00005bc5 },
79 { 0x419850, 4, 0x04, 0x00000000 },
80 { 0x419880, 1, 0x04, 0x00000002 },
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81 {}
82};
83
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84static const struct nvc0_graph_pack
85nvc1_graph_pack_mmio[] = {
86 { nvc0_graph_init_main_0 },
87 { nvc0_graph_init_fe_0 },
88 { nvc0_graph_init_pri_0 },
89 { nvc0_graph_init_rstr2d_0 },
90 { nvc0_graph_init_pd_0 },
91 { nvc4_graph_init_ds_0 },
92 { nvc0_graph_init_scc_0 },
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93 { nvc0_graph_init_prop_0 },
94 { nvc1_graph_init_gpc_unk_0 },
95 { nvc0_graph_init_setup_0 },
96 { nvc0_graph_init_crstr_0 },
97 { nvc1_graph_init_setup_1 },
98 { nvc0_graph_init_zcull_0 },
99 { nvc0_graph_init_gpm_0 },
100 { nvc1_graph_init_gpc_unk_1 },
101 { nvc0_graph_init_gcc_0 },
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102 { nvc0_graph_init_tpccs_0 },
103 { nvc4_graph_init_tex_0 },
104 { nvc1_graph_init_pe_0 },
105 { nvc0_graph_init_l1c_0 },
106 { nvc0_graph_init_wwdx_0 },
107 { nvc0_graph_init_tpccs_1 },
108 { nvc0_graph_init_mpc_0 },
109 { nvc4_graph_init_sm_0 },
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110 { nvc0_graph_init_be_0 },
111 { nvc0_graph_init_fe_1 },
112 {}
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113};
114
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115/*******************************************************************************
116 * PGRAPH engine/subdev functions
117 ******************************************************************************/
118
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119struct nouveau_oclass *
120nvc1_graph_oclass = &(struct nvc0_graph_oclass) {
121 .base.handle = NV_ENGINE(GR, 0xc1),
122 .base.ofuncs = &(struct nouveau_ofuncs) {
123 .ctor = nvc0_graph_ctor,
124 .dtor = nvc0_graph_dtor,
125 .init = nvc0_graph_init,
126 .fini = _nouveau_graph_fini,
127 },
128 .cclass = &nvc1_grctx_oclass,
129 .sclass = nvc1_graph_sclass,
c33b1e8c 130 .mmio = nvc1_graph_pack_mmio,
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131 .fecs.ucode = &nvc0_graph_fecs_ucode,
132 .gpccs.ucode = &nvc0_graph_gpccs_ucode,
133}.base;