]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/gpu/drm/nouveau/core/engine/graph/nvc1.c
drm/gk110/gr: minor adjustment to some random initval
[mirror_ubuntu-artful-kernel.git] / drivers / gpu / drm / nouveau / core / engine / graph / nvc1.c
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1/*
2 * Copyright 2013 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs <bskeggs@redhat.com>
23 */
24
25#include "nvc0.h"
26
27/*******************************************************************************
28 * Graphics object classes
29 ******************************************************************************/
30
31static struct nouveau_oclass
32nvc1_graph_sclass[] = {
33 { 0x902d, &nouveau_object_ofuncs },
34 { 0x9039, &nouveau_object_ofuncs },
35 { 0x9097, &nouveau_object_ofuncs },
36 { 0x90c0, &nouveau_object_ofuncs },
37 { 0x9197, &nouveau_object_ofuncs },
38 {}
39};
40
41/*******************************************************************************
42 * PGRAPH engine/subdev functions
43 ******************************************************************************/
44
45static struct nvc0_graph_init
46nvc1_graph_init_gpc[] = {
47 { 0x4184a0, 1, 0x04, 0x00000000 },
48 { 0x418604, 1, 0x04, 0x00000000 },
49 { 0x418680, 1, 0x04, 0x00000000 },
50 { 0x418714, 1, 0x04, 0x00000000 },
51 { 0x418384, 1, 0x04, 0x00000000 },
52 { 0x418814, 3, 0x04, 0x00000000 },
53 { 0x418b04, 1, 0x04, 0x00000000 },
54 { 0x4188c8, 2, 0x04, 0x00000000 },
55 { 0x4188d0, 1, 0x04, 0x00010000 },
56 { 0x4188d4, 1, 0x04, 0x00000001 },
57 { 0x418910, 1, 0x04, 0x00010001 },
58 { 0x418914, 1, 0x04, 0x00000301 },
59 { 0x418918, 1, 0x04, 0x00800000 },
60 { 0x418980, 1, 0x04, 0x77777770 },
61 { 0x418984, 3, 0x04, 0x77777777 },
62 { 0x418c04, 1, 0x04, 0x00000000 },
63 { 0x418c88, 1, 0x04, 0x00000000 },
64 { 0x418d00, 1, 0x04, 0x00000000 },
65 { 0x418f08, 1, 0x04, 0x00000000 },
66 { 0x418e00, 1, 0x04, 0x00000003 },
67 { 0x418e08, 1, 0x04, 0x00000000 },
68 { 0x41900c, 1, 0x04, 0x00000000 },
69 { 0x419018, 1, 0x04, 0x00000000 },
70 {}
71};
72
73static struct nvc0_graph_init
74nvc1_graph_init_tpc[] = {
75 { 0x419d08, 2, 0x04, 0x00000000 },
76 { 0x419d10, 1, 0x04, 0x00000014 },
77 { 0x419ab0, 1, 0x04, 0x00000000 },
78 { 0x419ac8, 1, 0x04, 0x00000000 },
79 { 0x419ab8, 1, 0x04, 0x000000e7 },
80 { 0x419abc, 2, 0x04, 0x00000000 },
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81 { 0x41980c, 1, 0x04, 0x00000010 },
82 { 0x419810, 1, 0x04, 0x00000000 },
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83 { 0x419814, 1, 0x04, 0x00000004 },
84 { 0x419844, 1, 0x04, 0x00000000 },
85 { 0x41984c, 1, 0x04, 0x00005bc5 },
86 { 0x419850, 4, 0x04, 0x00000000 },
87 { 0x419880, 1, 0x04, 0x00000002 },
88 { 0x419c98, 1, 0x04, 0x00000000 },
89 { 0x419ca8, 1, 0x04, 0x80000000 },
90 { 0x419cb4, 1, 0x04, 0x00000000 },
91 { 0x419cb8, 1, 0x04, 0x00008bf4 },
92 { 0x419cbc, 1, 0x04, 0x28137606 },
93 { 0x419cc0, 2, 0x04, 0x00000000 },
94 { 0x419bd4, 1, 0x04, 0x00800000 },
95 { 0x419bdc, 1, 0x04, 0x00000000 },
96 { 0x419d2c, 1, 0x04, 0x00000000 },
97 { 0x419c0c, 1, 0x04, 0x00000000 },
98 { 0x419e00, 1, 0x04, 0x00000000 },
99 { 0x419ea0, 1, 0x04, 0x00000000 },
100 { 0x419ea4, 1, 0x04, 0x00000100 },
101 { 0x419ea8, 1, 0x04, 0x00001100 },
102 { 0x419eac, 1, 0x04, 0x11100702 },
103 { 0x419eb0, 1, 0x04, 0x00000003 },
104 { 0x419eb4, 4, 0x04, 0x00000000 },
105 { 0x419ec8, 1, 0x04, 0x0e063818 },
106 { 0x419ecc, 1, 0x04, 0x0e060e06 },
107 { 0x419ed0, 1, 0x04, 0x00003818 },
108 { 0x419ed4, 1, 0x04, 0x011104f1 },
109 { 0x419edc, 1, 0x04, 0x00000000 },
110 { 0x419f00, 1, 0x04, 0x00000000 },
111 { 0x419f2c, 1, 0x04, 0x00000000 },
112 {}
113};
114
115struct nvc0_graph_init *
116nvc1_graph_init_mmio[] = {
117 nvc0_graph_init_regs,
118 nvc0_graph_init_unk40xx,
119 nvc0_graph_init_unk44xx,
120 nvc0_graph_init_unk78xx,
121 nvc0_graph_init_unk60xx,
eeb0558e 122 nvc4_graph_init_unk58xx,
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123 nvc0_graph_init_unk80xx,
124 nvc1_graph_init_gpc,
125 nvc1_graph_init_tpc,
126 nvc0_graph_init_unk88xx,
26410c67 127 nvc0_graph_tpc_0,
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128 NULL
129};
130
131struct nouveau_oclass *
132nvc1_graph_oclass = &(struct nvc0_graph_oclass) {
133 .base.handle = NV_ENGINE(GR, 0xc1),
134 .base.ofuncs = &(struct nouveau_ofuncs) {
135 .ctor = nvc0_graph_ctor,
136 .dtor = nvc0_graph_dtor,
137 .init = nvc0_graph_init,
138 .fini = _nouveau_graph_fini,
139 },
140 .cclass = &nvc1_grctx_oclass,
141 .sclass = nvc1_graph_sclass,
142 .mmio = nvc1_graph_init_mmio,
143 .fecs.ucode = &nvc0_graph_fecs_ucode,
144 .gpccs.ucode = &nvc0_graph_gpccs_ucode,
145}.base;