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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
b9ec1424 BS |
2 | #ifndef __NVKM_I2C_H__ |
3 | #define __NVKM_I2C_H__ | |
4196faa8 | 4 | #include <core/subdev.h> |
b9ec1424 | 5 | #include <core/event.h> |
4196faa8 BS |
6 | |
7 | #include <subdev/bios.h> | |
8 | #include <subdev/bios/i2c.h> | |
6ee73861 | 9 | |
79ca2770 BS |
10 | struct nvkm_i2c_ntfy_req { |
11 | #define NVKM_I2C_PLUG 0x01 | |
12 | #define NVKM_I2C_UNPLUG 0x02 | |
13 | #define NVKM_I2C_IRQ 0x04 | |
14 | #define NVKM_I2C_DONE 0x08 | |
15 | #define NVKM_I2C_ANY 0x0f | |
16 | u8 mask; | |
17 | u8 port; | |
18 | }; | |
19 | ||
20 | struct nvkm_i2c_ntfy_rep { | |
21 | u8 mask; | |
3668a339 BS |
22 | }; |
23 | ||
2aa5eac5 BS |
24 | struct nvkm_i2c_bus_probe { |
25 | struct i2c_board_info dev; | |
26 | u8 udelay; /* set to 0 to use the standard delay */ | |
27 | }; | |
7dcd060c | 28 | |
2aa5eac5 BS |
29 | struct nvkm_i2c_bus { |
30 | const struct nvkm_i2c_bus_func *func; | |
31 | struct nvkm_i2c_pad *pad; | |
32 | #define NVKM_I2C_BUS_CCB(n) /* 'n' is ccb index */ (n) | |
33 | #define NVKM_I2C_BUS_EXT(n) /* 'n' is dcb external encoder type */ ((n) + 0x100) | |
34 | #define NVKM_I2C_BUS_PRI /* ccb primary comm. port */ -1 | |
35 | #define NVKM_I2C_BUS_SEC /* ccb secondary comm. port */ -2 | |
36 | int id; | |
7dcd060c | 37 | |
2aa5eac5 BS |
38 | struct mutex mutex; |
39 | struct list_head head; | |
40 | struct i2c_adapter i2c; | |
7dcd060c BS |
41 | }; |
42 | ||
2aa5eac5 BS |
43 | int nvkm_i2c_bus_acquire(struct nvkm_i2c_bus *); |
44 | void nvkm_i2c_bus_release(struct nvkm_i2c_bus *); | |
45 | int nvkm_i2c_bus_probe(struct nvkm_i2c_bus *, const char *, | |
46 | struct nvkm_i2c_bus_probe *, | |
47 | bool (*)(struct nvkm_i2c_bus *, | |
48 | struct i2c_board_info *, void *), void *); | |
7dcd060c | 49 | |
2aa5eac5 BS |
50 | struct nvkm_i2c_aux { |
51 | const struct nvkm_i2c_aux_func *func; | |
52 | struct nvkm_i2c_pad *pad; | |
53 | #define NVKM_I2C_AUX_CCB(n) /* 'n' is ccb index */ (n) | |
54 | #define NVKM_I2C_AUX_EXT(n) /* 'n' is dcb external encoder type */ ((n) + 0x100) | |
55 | int id; | |
6ee73861 | 56 | |
2aa5eac5 BS |
57 | struct mutex mutex; |
58 | struct list_head head; | |
59 | struct i2c_adapter i2c; | |
60 | ||
61 | u32 intr; | |
9e2b734f MP |
62 | }; |
63 | ||
2aa5eac5 BS |
64 | void nvkm_i2c_aux_monitor(struct nvkm_i2c_aux *, bool monitor); |
65 | int nvkm_i2c_aux_acquire(struct nvkm_i2c_aux *); | |
66 | void nvkm_i2c_aux_release(struct nvkm_i2c_aux *); | |
67 | int nvkm_i2c_aux_xfer(struct nvkm_i2c_aux *, bool retry, u8 type, | |
1af5c410 | 68 | u32 addr, u8 *data, u8 *size); |
2aa5eac5 BS |
69 | int nvkm_i2c_aux_lnk_ctl(struct nvkm_i2c_aux *, int link_nr, int link_bw, |
70 | bool enhanced_framing); | |
71 | ||
b9ec1424 | 72 | struct nvkm_i2c { |
49bd8da5 | 73 | const struct nvkm_i2c_func *func; |
5b920d92 | 74 | struct nvkm_subdev subdev; |
4196faa8 | 75 | |
2aa5eac5 BS |
76 | struct list_head pad; |
77 | struct list_head bus; | |
78 | struct list_head aux; | |
49bd8da5 BS |
79 | |
80 | struct nvkm_event event; | |
4196faa8 BS |
81 | }; |
82 | ||
2aa5eac5 BS |
83 | struct nvkm_i2c_bus *nvkm_i2c_bus_find(struct nvkm_i2c *, int); |
84 | struct nvkm_i2c_aux *nvkm_i2c_aux_find(struct nvkm_i2c *, int); | |
85 | ||
49bd8da5 BS |
86 | int nv04_i2c_new(struct nvkm_device *, int, struct nvkm_i2c **); |
87 | int nv4e_i2c_new(struct nvkm_device *, int, struct nvkm_i2c **); | |
88 | int nv50_i2c_new(struct nvkm_device *, int, struct nvkm_i2c **); | |
89 | int g94_i2c_new(struct nvkm_device *, int, struct nvkm_i2c **); | |
90 | int gf117_i2c_new(struct nvkm_device *, int, struct nvkm_i2c **); | |
91 | int gf119_i2c_new(struct nvkm_device *, int, struct nvkm_i2c **); | |
92 | int gk104_i2c_new(struct nvkm_device *, int, struct nvkm_i2c **); | |
db1eb528 | 93 | int gm200_i2c_new(struct nvkm_device *, int, struct nvkm_i2c **); |
6ee73861 | 94 | |
7dcd060c | 95 | static inline int |
2aa5eac5 | 96 | nvkm_rdi2cr(struct i2c_adapter *adap, u8 addr, u8 reg) |
7dcd060c BS |
97 | { |
98 | u8 val; | |
99 | struct i2c_msg msgs[] = { | |
100 | { .addr = addr, .flags = 0, .len = 1, .buf = ® }, | |
101 | { .addr = addr, .flags = I2C_M_RD, .len = 1, .buf = &val }, | |
102 | }; | |
103 | ||
2aa5eac5 | 104 | int ret = i2c_transfer(adap, msgs, ARRAY_SIZE(msgs)); |
7dcd060c BS |
105 | if (ret != 2) |
106 | return -EIO; | |
107 | ||
108 | return val; | |
109 | } | |
110 | ||
b71c0892 KH |
111 | static inline int |
112 | nv_rd16i2cr(struct i2c_adapter *adap, u8 addr, u8 reg) | |
113 | { | |
114 | u8 val[2]; | |
115 | struct i2c_msg msgs[] = { | |
116 | { .addr = addr, .flags = 0, .len = 1, .buf = ® }, | |
117 | { .addr = addr, .flags = I2C_M_RD, .len = 2, .buf = val }, | |
118 | }; | |
119 | ||
120 | int ret = i2c_transfer(adap, msgs, ARRAY_SIZE(msgs)); | |
121 | if (ret != 2) | |
122 | return -EIO; | |
123 | ||
124 | return val[0] << 8 | val[1]; | |
125 | } | |
126 | ||
7dcd060c | 127 | static inline int |
2aa5eac5 | 128 | nvkm_wri2cr(struct i2c_adapter *adap, u8 addr, u8 reg, u8 val) |
7dcd060c BS |
129 | { |
130 | u8 buf[2] = { reg, val }; | |
131 | struct i2c_msg msgs[] = { | |
132 | { .addr = addr, .flags = 0, .len = 2, .buf = buf }, | |
133 | }; | |
134 | ||
2aa5eac5 | 135 | int ret = i2c_transfer(adap, msgs, ARRAY_SIZE(msgs)); |
7dcd060c BS |
136 | if (ret != 1) |
137 | return -EIO; | |
138 | ||
139 | return 0; | |
140 | } | |
141 | ||
b71c0892 KH |
142 | static inline int |
143 | nv_wr16i2cr(struct i2c_adapter *adap, u8 addr, u8 reg, u16 val) | |
144 | { | |
145 | u8 buf[3] = { reg, val >> 8, val & 0xff}; | |
146 | struct i2c_msg msgs[] = { | |
147 | { .addr = addr, .flags = 0, .len = 3, .buf = buf }, | |
148 | }; | |
149 | ||
150 | int ret = i2c_transfer(adap, msgs, ARRAY_SIZE(msgs)); | |
151 | if (ret != 1) | |
152 | return -EIO; | |
153 | ||
154 | return 0; | |
155 | } | |
156 | ||
7dcd060c | 157 | static inline bool |
2aa5eac5 BS |
158 | nvkm_probe_i2c(struct i2c_adapter *adap, u8 addr) |
159 | { | |
160 | return nvkm_rdi2cr(adap, addr, 0) >= 0; | |
161 | } | |
162 | ||
163 | static inline int | |
164 | nvkm_rdaux(struct nvkm_i2c_aux *aux, u32 addr, u8 *data, u8 size) | |
7dcd060c | 165 | { |
1af5c410 | 166 | const u8 xfer = size; |
2aa5eac5 BS |
167 | int ret = nvkm_i2c_aux_acquire(aux); |
168 | if (ret == 0) { | |
1af5c410 BS |
169 | ret = nvkm_i2c_aux_xfer(aux, true, 9, addr, data, &size); |
170 | WARN_ON(!ret && size != xfer); | |
2aa5eac5 BS |
171 | nvkm_i2c_aux_release(aux); |
172 | } | |
173 | return ret; | |
7dcd060c BS |
174 | } |
175 | ||
2aa5eac5 BS |
176 | static inline int |
177 | nvkm_wraux(struct nvkm_i2c_aux *aux, u32 addr, u8 *data, u8 size) | |
178 | { | |
179 | int ret = nvkm_i2c_aux_acquire(aux); | |
180 | if (ret == 0) { | |
1af5c410 | 181 | ret = nvkm_i2c_aux_xfer(aux, true, 8, addr, data, &size); |
2aa5eac5 BS |
182 | nvkm_i2c_aux_release(aux); |
183 | } | |
184 | return ret; | |
185 | } | |
4196faa8 | 186 | #endif |