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1 | #ifndef __NOUVEAU_COMPAT_H__ |
2 | #define __NOUVEAU_COMPAT_H__ | |
3 | ||
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4 | int nvdrm_gart_init(struct drm_device *, u64 *, u64 *); |
5 | ||
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6 | u8 _nv_rd08(struct drm_device *, u32); |
7 | void _nv_wr08(struct drm_device *, u32, u8); | |
8 | u32 _nv_rd32(struct drm_device *, u32); | |
9 | void _nv_wr32(struct drm_device *, u32, u32); | |
10 | u32 _nv_mask(struct drm_device *, u32, u32, u32); | |
11 | ||
cd42439d BS |
12 | bool _nv_bios(struct drm_device *, u8 **, u32 *); |
13 | ||
e0996aea BS |
14 | struct dcb_gpio_func; |
15 | void nouveau_gpio_reset(struct drm_device *); | |
16 | int nouveau_gpio_find(struct drm_device *, int, u8, u8, struct dcb_gpio_func *); | |
17 | bool nouveau_gpio_func_valid(struct drm_device *, u8 tag); | |
18 | int nouveau_gpio_func_set(struct drm_device *, u8 tag, int state); | |
19 | int nouveau_gpio_func_get(struct drm_device *, u8 tag); | |
20 | int nouveau_gpio_irq(struct drm_device *, int idx, u8 tag, u8 line, bool on); | |
21 | int nouveau_gpio_isr_add(struct drm_device *, int idx, u8 tag, u8 line, | |
22 | void (*)(void *, int state), void *data); | |
23 | void nouveau_gpio_isr_del(struct drm_device *, int idx, u8 tag, u8 line, | |
24 | void (*)(void *, int state), void *data); | |
4196faa8 BS |
25 | |
26 | struct nouveau_i2c_port *nouveau_i2c_find(struct drm_device *, u8); | |
27 | bool nouveau_probe_i2c_addr(struct nouveau_i2c_port *, int addr); | |
28 | struct i2c_adapter *nouveau_i2c_adapter(struct nouveau_i2c_port *); | |
29 | int nouveau_i2c_identify(struct drm_device *dev, const char *what, | |
30 | struct i2c_board_info *info, | |
31 | bool (*match)(struct nouveau_i2c_port *, | |
32 | struct i2c_board_info *), int index); | |
33 | ||
34 | int auxch_rd(struct drm_device *, struct nouveau_i2c_port *, u32, u8 *, u8); | |
35 | int auxch_wr(struct drm_device *, struct nouveau_i2c_port *, u32, u8 *, u8); | |
36 | ||
70790f4f BS |
37 | struct nvbios_pll; |
38 | struct nouveau_pll_vals; | |
39 | ||
40 | u32 get_pll_register(struct drm_device *dev, u32 type); | |
41 | int get_pll_limits(struct drm_device *, u32, struct nvbios_pll *); | |
42 | int setPLL(struct drm_device *, u32 reg, u32 clk); | |
43 | ||
44 | int nouveau_calc_pll_mnp(struct drm_device *, struct nvbios_pll *, | |
45 | int, struct nouveau_pll_vals *); | |
46 | int nva3_calc_pll(struct drm_device *dev, struct nvbios_pll *info, u32 freq, | |
47 | int *N, int *fN, int *M, int *P); | |
48 | int nouveau_hw_setpll(struct drm_device *, u32, struct nouveau_pll_vals *); | |
4196faa8 | 49 | |
cb75d97e BS |
50 | struct dcb_output; |
51 | void nouveau_bios_run_init_table(struct drm_device *, u16, struct dcb_output *, int); | |
52 | void nouveau_bios_init_exec(struct drm_device *, u16); | |
53 | ||
7d9115de BS |
54 | void nv_intr(struct drm_device *); |
55 | ||
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56 | bool nouveau_wait_eq(struct drm_device *, uint64_t timeout, |
57 | uint32_t reg, uint32_t mask, uint32_t val); | |
58 | bool nouveau_wait_ne(struct drm_device *, uint64_t timeout, | |
59 | uint32_t reg, uint32_t mask, uint32_t val); | |
60 | bool nouveau_wait_cb(struct drm_device *, u64 timeout, | |
61 | bool (*cond)(void *), void *); | |
62 | ||
63 | u64 nv_timer_read(struct drm_device *); | |
64 | ||
861d2107 BS |
65 | int nvfb_tile_nr(struct drm_device *); |
66 | void nvfb_tile_init(struct drm_device *, int, u32, u32, u32, u32); | |
67 | void nvfb_tile_fini(struct drm_device *, int); | |
68 | void nvfb_tile_prog(struct drm_device *, int); | |
69 | ||
70 | struct nouveau_fb_tile *nvfb_tile(struct drm_device *, int); | |
71 | ||
72 | struct nouveau_mem; | |
73 | int nvfb_vram_get(struct drm_device *dev, u64 size, u32 align, u32 ncmin, | |
74 | u32 memtype, struct nouveau_mem **pmem); | |
75 | void nvfb_vram_put(struct drm_device *dev, struct nouveau_mem **pmem); | |
76 | bool nvfb_flags_valid(struct drm_device *dev, u32); | |
77 | ||
78 | u64 nvfb_vram_sys_base(struct drm_device *); | |
79 | u64 nvfb_vram_size(struct drm_device *); | |
80 | int nvfb_vram_type(struct drm_device *); | |
81 | int nvfb_vram_rank_B(struct drm_device *); | |
82 | ||
83 | void nv50_fb_vm_trap(struct drm_device *, int); | |
84 | ||
3863c9bc BS |
85 | struct nouveau_gpuobj *nvimem_ramro(struct drm_device *); |
86 | struct nouveau_gpuobj *nvimem_ramfc(struct drm_device *); | |
87 | ||
88 | int _nouveau_gpuobj_new(struct drm_device *dev, struct nouveau_gpuobj *par, | |
89 | int size, int align, u32 flags, | |
90 | struct nouveau_gpuobj **pboj); | |
91 | ||
92 | u32 nv_ri32(struct drm_device *, u32); | |
93 | void nv_wi32(struct drm_device *, u32, u32); | |
94 | u32 nvimem_reserved(struct drm_device *); | |
95 | ||
96 | void nvimem_flush(struct drm_device *); | |
97 | ||
98 | void _nv50_vm_flush_engine(struct drm_device *dev, int engine); | |
99 | ||
100 | int _nouveau_vm_new(struct drm_device *, u64 offset, u64 length, | |
101 | u64 mm_offset, struct nouveau_vm **); | |
102 | ||
103 | struct nouveau_vma; | |
104 | int nouveau_gpuobj_map_bar(struct nouveau_gpuobj *, u32, struct nouveau_vma *); | |
105 | ||
106 | int | |
107 | nvbar_map(struct drm_device *dev, struct nouveau_mem *mem, u32 flags, | |
108 | struct nouveau_vma *vma); | |
109 | void | |
110 | nvbar_unmap(struct drm_device *dev, struct nouveau_vma *vma); | |
111 | ||
112 | struct nouveau_vm * | |
113 | nv04vm_ref(struct drm_device *dev); | |
114 | ||
115 | struct nouveau_gpuobj * | |
116 | nv04vm_refdma(struct drm_device *dev); | |
117 | ||
118 | void | |
119 | nvvm_engref(struct nouveau_vm *, int, int); | |
120 | ||
121 | int | |
122 | nvvm_spg_shift(struct nouveau_vm *); | |
123 | ||
124 | int | |
125 | nvvm_lpg_shift(struct nouveau_vm *); | |
126 | ||
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127 | u32 |
128 | nv50_display_active_crtcs(struct drm_device *dev); | |
129 | ||
130 | u64 nvgpuobj_addr(struct nouveau_object *object); | |
131 | ||
132 | struct drm_device * | |
133 | nouveau_drv(void *drm); | |
134 | ||
135 | struct nouveau_channel * | |
136 | nvdrm_channel(struct drm_device *dev); | |
137 | ||
138 | struct mutex * | |
139 | nvchan_mutex(struct nouveau_channel *chan); | |
140 | ||
586c55f6 | 141 | #endif |