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6ee73861 BS |
1 | /* |
2 | * Copyright (C) 2008 Maarten Maathuis. | |
3 | * All Rights Reserved. | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining | |
6 | * a copy of this software and associated documentation files (the | |
7 | * "Software"), to deal in the Software without restriction, including | |
8 | * without limitation the rights to use, copy, modify, merge, publish, | |
9 | * distribute, sublicense, and/or sell copies of the Software, and to | |
10 | * permit persons to whom the Software is furnished to do so, subject to | |
11 | * the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice (including the | |
14 | * next paragraph) shall be included in all copies or substantial | |
15 | * portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
18 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
19 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. | |
20 | * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE | |
21 | * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION | |
22 | * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION | |
23 | * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. | |
24 | * | |
25 | */ | |
26 | ||
760285e7 DH |
27 | #include <drm/drmP.h> |
28 | #include <drm/drm_crtc_helper.h> | |
b580c9e2 | 29 | #include <drm/ttm/ttm_execbuf_util.h> |
77145f1c | 30 | |
6ee73861 | 31 | #include "nouveau_fbcon.h" |
1a646342 | 32 | #include "dispnv04/hw.h" |
332b242f FJ |
33 | #include "nouveau_crtc.h" |
34 | #include "nouveau_dma.h" | |
77145f1c | 35 | #include "nouveau_gem.h" |
de691855 | 36 | #include "nouveau_connector.h" |
45c4e0aa | 37 | #include "nv50_display.h" |
6ee73861 | 38 | |
ebb945a9 BS |
39 | #include "nouveau_fence.h" |
40 | ||
e0996aea | 41 | #include <subdev/bios/gpio.h> |
77145f1c BS |
42 | #include <subdev/gpio.h> |
43 | #include <engine/disp.h> | |
e0996aea | 44 | |
1d7c71a3 BS |
45 | #include <core/class.h> |
46 | ||
6ee73861 BS |
47 | static void |
48 | nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb) | |
49 | { | |
50 | struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb); | |
6ee73861 | 51 | |
bc9025bd LB |
52 | if (fb->nvbo) |
53 | drm_gem_object_unreference_unlocked(fb->nvbo->gem); | |
6ee73861 BS |
54 | |
55 | drm_framebuffer_cleanup(drm_fb); | |
56 | kfree(fb); | |
57 | } | |
58 | ||
59 | static int | |
60 | nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb, | |
61 | struct drm_file *file_priv, | |
62 | unsigned int *handle) | |
63 | { | |
64 | struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb); | |
65 | ||
66 | return drm_gem_handle_create(file_priv, fb->nvbo->gem, handle); | |
67 | } | |
68 | ||
69 | static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = { | |
70 | .destroy = nouveau_user_framebuffer_destroy, | |
71 | .create_handle = nouveau_user_framebuffer_create_handle, | |
72 | }; | |
73 | ||
38651674 | 74 | int |
45c4e0aa BS |
75 | nouveau_framebuffer_init(struct drm_device *dev, |
76 | struct nouveau_framebuffer *nv_fb, | |
308e5bcb | 77 | struct drm_mode_fb_cmd2 *mode_cmd, |
45c4e0aa | 78 | struct nouveau_bo *nvbo) |
6ee73861 | 79 | { |
77145f1c | 80 | struct nouveau_drm *drm = nouveau_drm(dev); |
45c4e0aa | 81 | struct drm_framebuffer *fb = &nv_fb->base; |
6ee73861 BS |
82 | int ret; |
83 | ||
45c4e0aa BS |
84 | drm_helper_mode_fill_fb_struct(fb, mode_cmd); |
85 | nv_fb->nvbo = nvbo; | |
86 | ||
77145f1c | 87 | if (nv_device(drm->device)->card_type >= NV_50) { |
45c4e0aa BS |
88 | u32 tile_flags = nouveau_bo_tile_layout(nvbo); |
89 | if (tile_flags == 0x7a00 || | |
90 | tile_flags == 0xfe00) | |
91 | nv_fb->r_dma = NvEvoFB32; | |
92 | else | |
93 | if (tile_flags == 0x7000) | |
94 | nv_fb->r_dma = NvEvoFB16; | |
95 | else | |
96 | nv_fb->r_dma = NvEvoVRAM_LP; | |
97 | ||
98 | switch (fb->depth) { | |
4f6029da BS |
99 | case 8: nv_fb->r_format = 0x1e00; break; |
100 | case 15: nv_fb->r_format = 0xe900; break; | |
101 | case 16: nv_fb->r_format = 0xe800; break; | |
45c4e0aa | 102 | case 24: |
4f6029da BS |
103 | case 32: nv_fb->r_format = 0xcf00; break; |
104 | case 30: nv_fb->r_format = 0xd100; break; | |
45c4e0aa | 105 | default: |
77145f1c | 106 | NV_ERROR(drm, "unknown depth %d\n", fb->depth); |
45c4e0aa BS |
107 | return -EINVAL; |
108 | } | |
109 | ||
77145f1c | 110 | if (nv_device(drm->device)->chipset == 0x50) |
45c4e0aa BS |
111 | nv_fb->r_format |= (tile_flags << 8); |
112 | ||
2fad3d5e | 113 | if (!tile_flags) { |
77145f1c | 114 | if (nv_device(drm->device)->card_type < NV_D0) |
01f2c773 | 115 | nv_fb->r_pitch = 0x00100000 | fb->pitches[0]; |
2fad3d5e | 116 | else |
01f2c773 | 117 | nv_fb->r_pitch = 0x01000000 | fb->pitches[0]; |
2fad3d5e | 118 | } else { |
45c4e0aa | 119 | u32 mode = nvbo->tile_mode; |
77145f1c | 120 | if (nv_device(drm->device)->card_type >= NV_C0) |
45c4e0aa | 121 | mode >>= 4; |
01f2c773 | 122 | nv_fb->r_pitch = ((fb->pitches[0] / 4) << 4) | mode; |
45c4e0aa BS |
123 | } |
124 | } | |
125 | ||
c7d73f6a DV |
126 | ret = drm_framebuffer_init(dev, fb, &nouveau_framebuffer_funcs); |
127 | if (ret) { | |
128 | return ret; | |
129 | } | |
130 | ||
38651674 | 131 | return 0; |
6ee73861 BS |
132 | } |
133 | ||
134 | static struct drm_framebuffer * | |
135 | nouveau_user_framebuffer_create(struct drm_device *dev, | |
136 | struct drm_file *file_priv, | |
308e5bcb | 137 | struct drm_mode_fb_cmd2 *mode_cmd) |
6ee73861 | 138 | { |
38651674 | 139 | struct nouveau_framebuffer *nouveau_fb; |
6ee73861 | 140 | struct drm_gem_object *gem; |
38651674 | 141 | int ret; |
6ee73861 | 142 | |
308e5bcb | 143 | gem = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]); |
6ee73861 | 144 | if (!gem) |
cce13ff7 | 145 | return ERR_PTR(-ENOENT); |
6ee73861 | 146 | |
38651674 DA |
147 | nouveau_fb = kzalloc(sizeof(struct nouveau_framebuffer), GFP_KERNEL); |
148 | if (!nouveau_fb) | |
cce13ff7 | 149 | return ERR_PTR(-ENOMEM); |
38651674 DA |
150 | |
151 | ret = nouveau_framebuffer_init(dev, nouveau_fb, mode_cmd, nouveau_gem_object(gem)); | |
152 | if (ret) { | |
6ee73861 | 153 | drm_gem_object_unreference(gem); |
cce13ff7 | 154 | return ERR_PTR(ret); |
6ee73861 BS |
155 | } |
156 | ||
38651674 | 157 | return &nouveau_fb->base; |
6ee73861 BS |
158 | } |
159 | ||
27d5030a | 160 | static const struct drm_mode_config_funcs nouveau_mode_config_funcs = { |
6ee73861 | 161 | .fb_create = nouveau_user_framebuffer_create, |
eb1f8e4f | 162 | .output_poll_changed = nouveau_fbcon_output_poll_changed, |
6ee73861 BS |
163 | }; |
164 | ||
b29caa58 | 165 | |
4a67d391 | 166 | struct nouveau_drm_prop_enum_list { |
de691855 | 167 | u8 gen_mask; |
b29caa58 BS |
168 | int type; |
169 | char *name; | |
170 | }; | |
171 | ||
4a67d391 | 172 | static struct nouveau_drm_prop_enum_list underscan[] = { |
92854622 BS |
173 | { 6, UNDERSCAN_AUTO, "auto" }, |
174 | { 6, UNDERSCAN_OFF, "off" }, | |
175 | { 6, UNDERSCAN_ON, "on" }, | |
de691855 | 176 | {} |
b29caa58 BS |
177 | }; |
178 | ||
4a67d391 | 179 | static struct nouveau_drm_prop_enum_list dither_mode[] = { |
de691855 BS |
180 | { 7, DITHERING_MODE_AUTO, "auto" }, |
181 | { 7, DITHERING_MODE_OFF, "off" }, | |
182 | { 1, DITHERING_MODE_ON, "on" }, | |
183 | { 6, DITHERING_MODE_STATIC2X2, "static 2x2" }, | |
184 | { 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" }, | |
185 | { 4, DITHERING_MODE_TEMPORAL, "temporal" }, | |
186 | {} | |
187 | }; | |
188 | ||
4a67d391 | 189 | static struct nouveau_drm_prop_enum_list dither_depth[] = { |
de691855 BS |
190 | { 6, DITHERING_DEPTH_AUTO, "auto" }, |
191 | { 6, DITHERING_DEPTH_6BPC, "6 bpc" }, | |
192 | { 6, DITHERING_DEPTH_8BPC, "8 bpc" }, | |
193 | {} | |
194 | }; | |
195 | ||
196 | #define PROP_ENUM(p,gen,n,list) do { \ | |
4a67d391 | 197 | struct nouveau_drm_prop_enum_list *l = (list); \ |
de691855 BS |
198 | int c = 0; \ |
199 | while (l->gen_mask) { \ | |
200 | if (l->gen_mask & (1 << (gen))) \ | |
201 | c++; \ | |
202 | l++; \ | |
203 | } \ | |
204 | if (c) { \ | |
205 | p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c); \ | |
206 | l = (list); \ | |
207 | c = 0; \ | |
208 | while (p && l->gen_mask) { \ | |
209 | if (l->gen_mask & (1 << (gen))) { \ | |
210 | drm_property_add_enum(p, c, l->type, l->name); \ | |
211 | c++; \ | |
212 | } \ | |
213 | l++; \ | |
214 | } \ | |
215 | } \ | |
216 | } while(0) | |
217 | ||
f62b27db BS |
218 | int |
219 | nouveau_display_init(struct drm_device *dev) | |
220 | { | |
77145f1c BS |
221 | struct nouveau_drm *drm = nouveau_drm(dev); |
222 | struct nouveau_display *disp = nouveau_display(dev); | |
223 | struct nouveau_gpio *gpio = nouveau_gpio(drm->device); | |
52c4d767 | 224 | struct drm_connector *connector; |
f62b27db BS |
225 | int ret; |
226 | ||
227 | ret = disp->init(dev); | |
52c4d767 BS |
228 | if (ret) |
229 | return ret; | |
230 | ||
7df898b1 | 231 | /* enable polling for external displays */ |
52c4d767 BS |
232 | drm_kms_helper_poll_enable(dev); |
233 | ||
234 | /* enable hotplug interrupts */ | |
235 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
236 | struct nouveau_connector *conn = nouveau_connector(connector); | |
4f47643d BS |
237 | if (gpio && conn->hpd.func != DCB_GPIO_UNUSED) { |
238 | nouveau_event_get(gpio->events, conn->hpd.line, | |
239 | &conn->hpd_func); | |
240 | } | |
f62b27db BS |
241 | } |
242 | ||
243 | return ret; | |
244 | } | |
245 | ||
246 | void | |
247 | nouveau_display_fini(struct drm_device *dev) | |
248 | { | |
77145f1c BS |
249 | struct nouveau_drm *drm = nouveau_drm(dev); |
250 | struct nouveau_display *disp = nouveau_display(dev); | |
251 | struct nouveau_gpio *gpio = nouveau_gpio(drm->device); | |
52c4d767 BS |
252 | struct drm_connector *connector; |
253 | ||
254 | /* disable hotplug interrupts */ | |
255 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
256 | struct nouveau_connector *conn = nouveau_connector(connector); | |
4f47643d BS |
257 | if (gpio && conn->hpd.func != DCB_GPIO_UNUSED) { |
258 | nouveau_event_put(gpio->events, conn->hpd.line, | |
259 | &conn->hpd_func); | |
260 | } | |
52c4d767 | 261 | } |
f62b27db BS |
262 | |
263 | drm_kms_helper_poll_disable(dev); | |
264 | disp->fini(dev); | |
265 | } | |
266 | ||
27d5030a BS |
267 | int |
268 | nouveau_display_create(struct drm_device *dev) | |
269 | { | |
77145f1c | 270 | struct nouveau_drm *drm = nouveau_drm(dev); |
77145f1c | 271 | struct nouveau_display *disp; |
e412e95a | 272 | u32 pclass = dev->pdev->class >> 8; |
de691855 | 273 | int ret, gen; |
27d5030a | 274 | |
77145f1c BS |
275 | disp = drm->display = kzalloc(sizeof(*disp), GFP_KERNEL); |
276 | if (!disp) | |
277 | return -ENOMEM; | |
278 | ||
27d5030a BS |
279 | drm_mode_config_init(dev); |
280 | drm_mode_create_scaling_mode_property(dev); | |
4ceca5f8 | 281 | drm_mode_create_dvi_i_properties(dev); |
de691855 | 282 | |
77145f1c | 283 | if (nv_device(drm->device)->card_type < NV_50) |
de691855 BS |
284 | gen = 0; |
285 | else | |
77145f1c | 286 | if (nv_device(drm->device)->card_type < NV_D0) |
de691855 BS |
287 | gen = 1; |
288 | else | |
289 | gen = 2; | |
290 | ||
291 | PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode); | |
292 | PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth); | |
293 | PROP_ENUM(disp->underscan_property, gen, "underscan", underscan); | |
b29caa58 BS |
294 | |
295 | disp->underscan_hborder_property = | |
d9bc3c02 | 296 | drm_property_create_range(dev, 0, "underscan hborder", 0, 128); |
b29caa58 BS |
297 | |
298 | disp->underscan_vborder_property = | |
d9bc3c02 | 299 | drm_property_create_range(dev, 0, "underscan vborder", 0, 128); |
b29caa58 | 300 | |
f9887d09 | 301 | if (gen >= 1) { |
03e9a040 | 302 | /* -90..+90 */ |
df26bc9c | 303 | disp->vibrant_hue_property = |
03e9a040 | 304 | drm_property_create_range(dev, 0, "vibrant hue", 0, 180); |
df26bc9c | 305 | |
03e9a040 | 306 | /* -100..+100 */ |
df26bc9c | 307 | disp->color_vibrance_property = |
03e9a040 | 308 | drm_property_create_range(dev, 0, "color vibrance", 0, 200); |
df26bc9c CB |
309 | } |
310 | ||
e6ecefaa | 311 | dev->mode_config.funcs = &nouveau_mode_config_funcs; |
27d5030a BS |
312 | dev->mode_config.fb_base = pci_resource_start(dev->pdev, 1); |
313 | ||
314 | dev->mode_config.min_width = 0; | |
315 | dev->mode_config.min_height = 0; | |
77145f1c | 316 | if (nv_device(drm->device)->card_type < NV_10) { |
27d5030a BS |
317 | dev->mode_config.max_width = 2048; |
318 | dev->mode_config.max_height = 2048; | |
319 | } else | |
77145f1c | 320 | if (nv_device(drm->device)->card_type < NV_50) { |
27d5030a BS |
321 | dev->mode_config.max_width = 4096; |
322 | dev->mode_config.max_height = 4096; | |
323 | } else { | |
324 | dev->mode_config.max_width = 8192; | |
325 | dev->mode_config.max_height = 8192; | |
326 | } | |
327 | ||
f1377998 DA |
328 | dev->mode_config.preferred_depth = 24; |
329 | dev->mode_config.prefer_shadow = 1; | |
330 | ||
f62b27db BS |
331 | drm_kms_helper_poll_init(dev); |
332 | drm_kms_helper_poll_disable(dev); | |
333 | ||
e412e95a BS |
334 | if (nouveau_modeset == 1 || |
335 | (nouveau_modeset < 0 && pclass == PCI_CLASS_DISPLAY_VGA)) { | |
d2898713 BS |
336 | if (drm->vbios.dcb.entries) { |
337 | if (nv_device(drm->device)->card_type < NV_50) | |
338 | ret = nv04_display_create(dev); | |
339 | else | |
340 | ret = nv50_display_create(dev); | |
341 | } else { | |
342 | ret = 0; | |
343 | } | |
344 | ||
f62b27db | 345 | if (ret) |
9430738d BS |
346 | goto disp_create_err; |
347 | ||
348 | if (dev->mode_config.num_crtc) { | |
349 | ret = drm_vblank_init(dev, dev->mode_config.num_crtc); | |
350 | if (ret) | |
351 | goto vblank_err; | |
352 | } | |
353 | ||
354 | nouveau_backlight_init(dev); | |
f62b27db BS |
355 | } |
356 | ||
5ace2c9d MS |
357 | return 0; |
358 | ||
359 | vblank_err: | |
77145f1c | 360 | disp->dtor(dev); |
5ace2c9d MS |
361 | disp_create_err: |
362 | drm_kms_helper_poll_fini(dev); | |
363 | drm_mode_config_cleanup(dev); | |
2a44e499 | 364 | return ret; |
27d5030a BS |
365 | } |
366 | ||
367 | void | |
368 | nouveau_display_destroy(struct drm_device *dev) | |
369 | { | |
77145f1c | 370 | struct nouveau_display *disp = nouveau_display(dev); |
27d5030a | 371 | |
77145f1c | 372 | nouveau_backlight_exit(dev); |
f62b27db BS |
373 | drm_vblank_cleanup(dev); |
374 | ||
d6bf2f37 BS |
375 | drm_kms_helper_poll_fini(dev); |
376 | drm_mode_config_cleanup(dev); | |
377 | ||
9430738d BS |
378 | if (disp->dtor) |
379 | disp->dtor(dev); | |
f62b27db | 380 | |
77145f1c BS |
381 | nouveau_drm(dev)->display = NULL; |
382 | kfree(disp); | |
383 | } | |
384 | ||
385 | int | |
386 | nouveau_display_suspend(struct drm_device *dev) | |
387 | { | |
388 | struct nouveau_drm *drm = nouveau_drm(dev); | |
389 | struct drm_crtc *crtc; | |
390 | ||
391 | nouveau_display_fini(dev); | |
392 | ||
393 | NV_INFO(drm, "unpinning framebuffer(s)...\n"); | |
394 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
395 | struct nouveau_framebuffer *nouveau_fb; | |
396 | ||
397 | nouveau_fb = nouveau_framebuffer(crtc->fb); | |
398 | if (!nouveau_fb || !nouveau_fb->nvbo) | |
399 | continue; | |
400 | ||
401 | nouveau_bo_unpin(nouveau_fb->nvbo); | |
402 | } | |
403 | ||
404 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
405 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
406 | ||
407 | nouveau_bo_unmap(nv_crtc->cursor.nvbo); | |
408 | nouveau_bo_unpin(nv_crtc->cursor.nvbo); | |
409 | } | |
410 | ||
411 | return 0; | |
412 | } | |
413 | ||
414 | void | |
415 | nouveau_display_resume(struct drm_device *dev) | |
416 | { | |
417 | struct nouveau_drm *drm = nouveau_drm(dev); | |
418 | struct drm_crtc *crtc; | |
419 | int ret; | |
420 | ||
421 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
422 | struct nouveau_framebuffer *nouveau_fb; | |
423 | ||
424 | nouveau_fb = nouveau_framebuffer(crtc->fb); | |
425 | if (!nouveau_fb || !nouveau_fb->nvbo) | |
426 | continue; | |
427 | ||
428 | nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM); | |
429 | } | |
430 | ||
431 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
432 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
433 | ||
434 | ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM); | |
435 | if (!ret) | |
436 | ret = nouveau_bo_map(nv_crtc->cursor.nvbo); | |
437 | if (ret) | |
438 | NV_ERROR(drm, "Could not pin/map cursor.\n"); | |
439 | } | |
440 | ||
441 | nouveau_fbcon_set_suspend(dev, 0); | |
442 | nouveau_fbcon_zfill_all(dev); | |
443 | ||
444 | nouveau_display_init(dev); | |
445 | ||
446 | /* Force CLUT to get re-loaded during modeset */ | |
447 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
448 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
449 | ||
450 | nv_crtc->lut.depth = 0; | |
451 | } | |
452 | ||
453 | drm_helper_resume_force_mode(dev); | |
454 | ||
455 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
456 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
457 | u32 offset = nv_crtc->cursor.nvbo->bo.offset; | |
458 | ||
459 | nv_crtc->cursor.set_offset(nv_crtc, offset); | |
460 | nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x, | |
461 | nv_crtc->cursor_saved_y); | |
462 | } | |
27d5030a BS |
463 | } |
464 | ||
332b242f FJ |
465 | static int |
466 | nouveau_page_flip_emit(struct nouveau_channel *chan, | |
467 | struct nouveau_bo *old_bo, | |
468 | struct nouveau_bo *new_bo, | |
469 | struct nouveau_page_flip_state *s, | |
470 | struct nouveau_fence **pfence) | |
471 | { | |
f589be88 | 472 | struct nouveau_fence_chan *fctx = chan->fence; |
77145f1c BS |
473 | struct nouveau_drm *drm = chan->drm; |
474 | struct drm_device *dev = drm->dev; | |
332b242f FJ |
475 | unsigned long flags; |
476 | int ret; | |
477 | ||
478 | /* Queue it to the pending list */ | |
479 | spin_lock_irqsave(&dev->event_lock, flags); | |
f589be88 | 480 | list_add_tail(&s->head, &fctx->flip); |
332b242f FJ |
481 | spin_unlock_irqrestore(&dev->event_lock, flags); |
482 | ||
483 | /* Synchronize with the old framebuffer */ | |
484 | ret = nouveau_fence_sync(old_bo->bo.sync_obj, chan); | |
485 | if (ret) | |
486 | goto fail; | |
487 | ||
488 | /* Emit the pageflip */ | |
d5316e25 | 489 | ret = RING_SPACE(chan, 3); |
332b242f FJ |
490 | if (ret) |
491 | goto fail; | |
492 | ||
77145f1c | 493 | if (nv_device(drm->device)->card_type < NV_C0) { |
6d597027 | 494 | BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1); |
d5316e25 BS |
495 | OUT_RING (chan, 0x00000000); |
496 | OUT_RING (chan, 0x00000000); | |
497 | } else { | |
6d597027 | 498 | BEGIN_NVC0(chan, 0, NV10_SUBCHAN_REF_CNT, 1); |
5e120f6e | 499 | OUT_RING (chan, 0); |
6d597027 | 500 | BEGIN_IMC0(chan, 0, NVSW_SUBCHAN_PAGE_FLIP, 0x0000); |
d5316e25 | 501 | } |
bd2f2037 | 502 | FIRE_RING (chan); |
332b242f | 503 | |
264ce192 | 504 | ret = nouveau_fence_new(chan, false, pfence); |
332b242f FJ |
505 | if (ret) |
506 | goto fail; | |
507 | ||
508 | return 0; | |
509 | fail: | |
510 | spin_lock_irqsave(&dev->event_lock, flags); | |
511 | list_del(&s->head); | |
512 | spin_unlock_irqrestore(&dev->event_lock, flags); | |
513 | return ret; | |
514 | } | |
515 | ||
516 | int | |
517 | nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb, | |
518 | struct drm_pending_vblank_event *event) | |
519 | { | |
520 | struct drm_device *dev = crtc->dev; | |
77145f1c | 521 | struct nouveau_drm *drm = nouveau_drm(dev); |
332b242f FJ |
522 | struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->fb)->nvbo; |
523 | struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo; | |
524 | struct nouveau_page_flip_state *s; | |
d375e7d5 | 525 | struct nouveau_channel *chan = NULL; |
332b242f | 526 | struct nouveau_fence *fence; |
b580c9e2 ML |
527 | struct list_head res; |
528 | struct ttm_validate_buffer res_val[2]; | |
529 | struct ww_acquire_ctx ticket; | |
332b242f FJ |
530 | int ret; |
531 | ||
77145f1c | 532 | if (!drm->channel) |
332b242f FJ |
533 | return -ENODEV; |
534 | ||
535 | s = kzalloc(sizeof(*s), GFP_KERNEL); | |
536 | if (!s) | |
537 | return -ENOMEM; | |
538 | ||
332b242f | 539 | /* Choose the channel the flip will be handled in */ |
b580c9e2 | 540 | spin_lock(&old_bo->bo.bdev->fence_lock); |
d375e7d5 BS |
541 | fence = new_bo->bo.sync_obj; |
542 | if (fence) | |
ebb945a9 | 543 | chan = fence->channel; |
332b242f | 544 | if (!chan) |
77145f1c | 545 | chan = drm->channel; |
b580c9e2 ML |
546 | spin_unlock(&old_bo->bo.bdev->fence_lock); |
547 | ||
77145f1c | 548 | mutex_lock(&chan->cli->mutex); |
332b242f | 549 | |
b580c9e2 ML |
550 | if (new_bo != old_bo) { |
551 | ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM); | |
552 | if (likely(!ret)) { | |
553 | res_val[0].bo = &old_bo->bo; | |
554 | res_val[1].bo = &new_bo->bo; | |
555 | INIT_LIST_HEAD(&res); | |
556 | list_add_tail(&res_val[0].head, &res); | |
557 | list_add_tail(&res_val[1].head, &res); | |
558 | ret = ttm_eu_reserve_buffers(&ticket, &res); | |
559 | if (ret) | |
560 | nouveau_bo_unpin(new_bo); | |
561 | } | |
562 | } else | |
563 | ret = ttm_bo_reserve(&new_bo->bo, false, false, false, 0); | |
564 | ||
565 | if (ret) { | |
566 | mutex_unlock(&chan->cli->mutex); | |
567 | goto fail_free; | |
568 | } | |
569 | ||
570 | /* Initialize a page flip struct */ | |
571 | *s = (struct nouveau_page_flip_state) | |
572 | { { }, event, nouveau_crtc(crtc)->index, | |
573 | fb->bits_per_pixel, fb->pitches[0], crtc->x, crtc->y, | |
574 | new_bo->bo.offset }; | |
575 | ||
332b242f | 576 | /* Emit a page flip */ |
77145f1c | 577 | if (nv_device(drm->device)->card_type >= NV_50) { |
e225f446 | 578 | ret = nv50_display_flip_next(crtc, fb, chan, 0); |
d7117e0d | 579 | if (ret) { |
77145f1c | 580 | mutex_unlock(&chan->cli->mutex); |
d7117e0d BS |
581 | goto fail_unreserve; |
582 | } | |
583 | } | |
584 | ||
332b242f | 585 | ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence); |
77145f1c | 586 | mutex_unlock(&chan->cli->mutex); |
332b242f FJ |
587 | if (ret) |
588 | goto fail_unreserve; | |
589 | ||
590 | /* Update the crtc struct and cleanup */ | |
591 | crtc->fb = fb; | |
592 | ||
b580c9e2 ML |
593 | if (old_bo != new_bo) { |
594 | ttm_eu_fence_buffer_objects(&ticket, &res, fence); | |
595 | nouveau_bo_unpin(old_bo); | |
596 | } else { | |
597 | nouveau_bo_fence(new_bo, fence); | |
598 | ttm_bo_unreserve(&new_bo->bo); | |
599 | } | |
332b242f FJ |
600 | nouveau_fence_unref(&fence); |
601 | return 0; | |
602 | ||
603 | fail_unreserve: | |
b580c9e2 ML |
604 | if (old_bo != new_bo) { |
605 | ttm_eu_backoff_reservation(&ticket, &res); | |
606 | nouveau_bo_unpin(new_bo); | |
607 | } else | |
608 | ttm_bo_unreserve(&new_bo->bo); | |
332b242f FJ |
609 | fail_free: |
610 | kfree(s); | |
611 | return ret; | |
612 | } | |
613 | ||
614 | int | |
615 | nouveau_finish_page_flip(struct nouveau_channel *chan, | |
616 | struct nouveau_page_flip_state *ps) | |
617 | { | |
f589be88 | 618 | struct nouveau_fence_chan *fctx = chan->fence; |
77145f1c BS |
619 | struct nouveau_drm *drm = chan->drm; |
620 | struct drm_device *dev = drm->dev; | |
332b242f FJ |
621 | struct nouveau_page_flip_state *s; |
622 | unsigned long flags; | |
623 | ||
624 | spin_lock_irqsave(&dev->event_lock, flags); | |
625 | ||
f589be88 | 626 | if (list_empty(&fctx->flip)) { |
77145f1c | 627 | NV_ERROR(drm, "unexpected pageflip\n"); |
332b242f FJ |
628 | spin_unlock_irqrestore(&dev->event_lock, flags); |
629 | return -EINVAL; | |
630 | } | |
631 | ||
f589be88 | 632 | s = list_first_entry(&fctx->flip, struct nouveau_page_flip_state, head); |
95d38d14 RC |
633 | if (s->event) |
634 | drm_send_vblank_event(dev, -1, s->event); | |
332b242f FJ |
635 | |
636 | list_del(&s->head); | |
d7117e0d BS |
637 | if (ps) |
638 | *ps = *s; | |
332b242f FJ |
639 | kfree(s); |
640 | ||
641 | spin_unlock_irqrestore(&dev->event_lock, flags); | |
642 | return 0; | |
643 | } | |
33dbc27f | 644 | |
f589be88 BS |
645 | int |
646 | nouveau_flip_complete(void *data) | |
647 | { | |
648 | struct nouveau_channel *chan = data; | |
77145f1c | 649 | struct nouveau_drm *drm = chan->drm; |
f589be88 BS |
650 | struct nouveau_page_flip_state state; |
651 | ||
652 | if (!nouveau_finish_page_flip(chan, &state)) { | |
77145f1c BS |
653 | if (nv_device(drm->device)->card_type < NV_50) { |
654 | nv_set_crtc_base(drm->dev, state.crtc, state.offset + | |
f589be88 BS |
655 | state.y * state.pitch + |
656 | state.x * state.bpp / 8); | |
657 | } | |
658 | } | |
659 | ||
660 | return 0; | |
661 | } | |
662 | ||
33dbc27f BS |
663 | int |
664 | nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev, | |
665 | struct drm_mode_create_dumb *args) | |
666 | { | |
667 | struct nouveau_bo *bo; | |
668 | int ret; | |
669 | ||
670 | args->pitch = roundup(args->width * (args->bpp / 8), 256); | |
671 | args->size = args->pitch * args->height; | |
672 | args->size = roundup(args->size, PAGE_SIZE); | |
673 | ||
610bd7da | 674 | ret = nouveau_gem_new(dev, args->size, 0, NOUVEAU_GEM_DOMAIN_VRAM, 0, 0, &bo); |
33dbc27f BS |
675 | if (ret) |
676 | return ret; | |
677 | ||
678 | ret = drm_gem_handle_create(file_priv, bo->gem, &args->handle); | |
679 | drm_gem_object_unreference_unlocked(bo->gem); | |
680 | return ret; | |
681 | } | |
682 | ||
683 | int | |
684 | nouveau_display_dumb_destroy(struct drm_file *file_priv, struct drm_device *dev, | |
685 | uint32_t handle) | |
686 | { | |
687 | return drm_gem_handle_delete(file_priv, handle); | |
688 | } | |
689 | ||
690 | int | |
691 | nouveau_display_dumb_map_offset(struct drm_file *file_priv, | |
692 | struct drm_device *dev, | |
693 | uint32_t handle, uint64_t *poffset) | |
694 | { | |
695 | struct drm_gem_object *gem; | |
696 | ||
697 | gem = drm_gem_object_lookup(dev, file_priv, handle); | |
698 | if (gem) { | |
699 | struct nouveau_bo *bo = gem->driver_private; | |
700 | *poffset = bo->bo.addr_space_offset; | |
701 | drm_gem_object_unreference_unlocked(gem); | |
702 | return 0; | |
703 | } | |
704 | ||
705 | return -ENOENT; | |
706 | } |