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drm/nouveau/disp: port vblank handling to event interface
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CommitLineData
6ee73861
BS
1/*
2 * Copyright (C) 2008 Maarten Maathuis.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 *
25 */
26
760285e7
DH
27#include <drm/drmP.h>
28#include <drm/drm_crtc_helper.h>
77145f1c 29
6ee73861 30#include "nouveau_fbcon.h"
042206c0 31#include "nouveau_hw.h"
332b242f
FJ
32#include "nouveau_crtc.h"
33#include "nouveau_dma.h"
77145f1c 34#include "nouveau_gem.h"
de691855 35#include "nouveau_connector.h"
45c4e0aa 36#include "nv50_display.h"
6ee73861 37
ebb945a9
BS
38#include "nouveau_fence.h"
39
e0996aea 40#include <subdev/bios/gpio.h>
77145f1c
BS
41#include <subdev/gpio.h>
42#include <engine/disp.h>
e0996aea 43
1d7c71a3
BS
44#include <core/class.h>
45
6ee73861
BS
46static void
47nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb)
48{
49 struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
6ee73861 50
bc9025bd
LB
51 if (fb->nvbo)
52 drm_gem_object_unreference_unlocked(fb->nvbo->gem);
6ee73861
BS
53
54 drm_framebuffer_cleanup(drm_fb);
55 kfree(fb);
56}
57
58static int
59nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb,
60 struct drm_file *file_priv,
61 unsigned int *handle)
62{
63 struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
64
65 return drm_gem_handle_create(file_priv, fb->nvbo->gem, handle);
66}
67
68static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = {
69 .destroy = nouveau_user_framebuffer_destroy,
70 .create_handle = nouveau_user_framebuffer_create_handle,
71};
72
38651674 73int
45c4e0aa
BS
74nouveau_framebuffer_init(struct drm_device *dev,
75 struct nouveau_framebuffer *nv_fb,
308e5bcb 76 struct drm_mode_fb_cmd2 *mode_cmd,
45c4e0aa 77 struct nouveau_bo *nvbo)
6ee73861 78{
77145f1c 79 struct nouveau_drm *drm = nouveau_drm(dev);
45c4e0aa 80 struct drm_framebuffer *fb = &nv_fb->base;
6ee73861
BS
81 int ret;
82
45c4e0aa 83 ret = drm_framebuffer_init(dev, fb, &nouveau_framebuffer_funcs);
6ee73861 84 if (ret) {
38651674 85 return ret;
6ee73861
BS
86 }
87
45c4e0aa
BS
88 drm_helper_mode_fill_fb_struct(fb, mode_cmd);
89 nv_fb->nvbo = nvbo;
90
77145f1c 91 if (nv_device(drm->device)->card_type >= NV_50) {
45c4e0aa
BS
92 u32 tile_flags = nouveau_bo_tile_layout(nvbo);
93 if (tile_flags == 0x7a00 ||
94 tile_flags == 0xfe00)
95 nv_fb->r_dma = NvEvoFB32;
96 else
97 if (tile_flags == 0x7000)
98 nv_fb->r_dma = NvEvoFB16;
99 else
100 nv_fb->r_dma = NvEvoVRAM_LP;
101
102 switch (fb->depth) {
4f6029da
BS
103 case 8: nv_fb->r_format = 0x1e00; break;
104 case 15: nv_fb->r_format = 0xe900; break;
105 case 16: nv_fb->r_format = 0xe800; break;
45c4e0aa 106 case 24:
4f6029da
BS
107 case 32: nv_fb->r_format = 0xcf00; break;
108 case 30: nv_fb->r_format = 0xd100; break;
45c4e0aa 109 default:
77145f1c 110 NV_ERROR(drm, "unknown depth %d\n", fb->depth);
45c4e0aa
BS
111 return -EINVAL;
112 }
113
77145f1c 114 if (nv_device(drm->device)->chipset == 0x50)
45c4e0aa
BS
115 nv_fb->r_format |= (tile_flags << 8);
116
2fad3d5e 117 if (!tile_flags) {
77145f1c 118 if (nv_device(drm->device)->card_type < NV_D0)
01f2c773 119 nv_fb->r_pitch = 0x00100000 | fb->pitches[0];
2fad3d5e 120 else
01f2c773 121 nv_fb->r_pitch = 0x01000000 | fb->pitches[0];
2fad3d5e 122 } else {
45c4e0aa 123 u32 mode = nvbo->tile_mode;
77145f1c 124 if (nv_device(drm->device)->card_type >= NV_C0)
45c4e0aa 125 mode >>= 4;
01f2c773 126 nv_fb->r_pitch = ((fb->pitches[0] / 4) << 4) | mode;
45c4e0aa
BS
127 }
128 }
129
38651674 130 return 0;
6ee73861
BS
131}
132
133static struct drm_framebuffer *
134nouveau_user_framebuffer_create(struct drm_device *dev,
135 struct drm_file *file_priv,
308e5bcb 136 struct drm_mode_fb_cmd2 *mode_cmd)
6ee73861 137{
38651674 138 struct nouveau_framebuffer *nouveau_fb;
6ee73861 139 struct drm_gem_object *gem;
38651674 140 int ret;
6ee73861 141
308e5bcb 142 gem = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]);
6ee73861 143 if (!gem)
cce13ff7 144 return ERR_PTR(-ENOENT);
6ee73861 145
38651674
DA
146 nouveau_fb = kzalloc(sizeof(struct nouveau_framebuffer), GFP_KERNEL);
147 if (!nouveau_fb)
cce13ff7 148 return ERR_PTR(-ENOMEM);
38651674
DA
149
150 ret = nouveau_framebuffer_init(dev, nouveau_fb, mode_cmd, nouveau_gem_object(gem));
151 if (ret) {
6ee73861 152 drm_gem_object_unreference(gem);
cce13ff7 153 return ERR_PTR(ret);
6ee73861
BS
154 }
155
38651674 156 return &nouveau_fb->base;
6ee73861
BS
157}
158
27d5030a 159static const struct drm_mode_config_funcs nouveau_mode_config_funcs = {
6ee73861 160 .fb_create = nouveau_user_framebuffer_create,
eb1f8e4f 161 .output_poll_changed = nouveau_fbcon_output_poll_changed,
6ee73861
BS
162};
163
b29caa58 164
4a67d391 165struct nouveau_drm_prop_enum_list {
de691855 166 u8 gen_mask;
b29caa58
BS
167 int type;
168 char *name;
169};
170
4a67d391 171static struct nouveau_drm_prop_enum_list underscan[] = {
92854622
BS
172 { 6, UNDERSCAN_AUTO, "auto" },
173 { 6, UNDERSCAN_OFF, "off" },
174 { 6, UNDERSCAN_ON, "on" },
de691855 175 {}
b29caa58
BS
176};
177
4a67d391 178static struct nouveau_drm_prop_enum_list dither_mode[] = {
de691855
BS
179 { 7, DITHERING_MODE_AUTO, "auto" },
180 { 7, DITHERING_MODE_OFF, "off" },
181 { 1, DITHERING_MODE_ON, "on" },
182 { 6, DITHERING_MODE_STATIC2X2, "static 2x2" },
183 { 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" },
184 { 4, DITHERING_MODE_TEMPORAL, "temporal" },
185 {}
186};
187
4a67d391 188static struct nouveau_drm_prop_enum_list dither_depth[] = {
de691855
BS
189 { 6, DITHERING_DEPTH_AUTO, "auto" },
190 { 6, DITHERING_DEPTH_6BPC, "6 bpc" },
191 { 6, DITHERING_DEPTH_8BPC, "8 bpc" },
192 {}
193};
194
195#define PROP_ENUM(p,gen,n,list) do { \
4a67d391 196 struct nouveau_drm_prop_enum_list *l = (list); \
de691855
BS
197 int c = 0; \
198 while (l->gen_mask) { \
199 if (l->gen_mask & (1 << (gen))) \
200 c++; \
201 l++; \
202 } \
203 if (c) { \
204 p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c); \
205 l = (list); \
206 c = 0; \
207 while (p && l->gen_mask) { \
208 if (l->gen_mask & (1 << (gen))) { \
209 drm_property_add_enum(p, c, l->type, l->name); \
210 c++; \
211 } \
212 l++; \
213 } \
214 } \
215} while(0)
216
f62b27db
BS
217int
218nouveau_display_init(struct drm_device *dev)
219{
77145f1c
BS
220 struct nouveau_drm *drm = nouveau_drm(dev);
221 struct nouveau_display *disp = nouveau_display(dev);
222 struct nouveau_gpio *gpio = nouveau_gpio(drm->device);
52c4d767 223 struct drm_connector *connector;
f62b27db
BS
224 int ret;
225
226 ret = disp->init(dev);
52c4d767
BS
227 if (ret)
228 return ret;
229
7df898b1 230 /* enable polling for external displays */
52c4d767
BS
231 drm_kms_helper_poll_enable(dev);
232
233 /* enable hotplug interrupts */
234 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
235 struct nouveau_connector *conn = nouveau_connector(connector);
77145f1c
BS
236 if (gpio)
237 gpio->irq(gpio, 0, conn->hpd, 0xff, true);
f62b27db
BS
238 }
239
240 return ret;
241}
242
243void
244nouveau_display_fini(struct drm_device *dev)
245{
77145f1c
BS
246 struct nouveau_drm *drm = nouveau_drm(dev);
247 struct nouveau_display *disp = nouveau_display(dev);
248 struct nouveau_gpio *gpio = nouveau_gpio(drm->device);
52c4d767
BS
249 struct drm_connector *connector;
250
251 /* disable hotplug interrupts */
252 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
253 struct nouveau_connector *conn = nouveau_connector(connector);
77145f1c
BS
254 if (gpio)
255 gpio->irq(gpio, 0, conn->hpd, 0xff, false);
52c4d767 256 }
f62b27db
BS
257
258 drm_kms_helper_poll_disable(dev);
259 disp->fini(dev);
260}
261
27d5030a
BS
262int
263nouveau_display_create(struct drm_device *dev)
264{
77145f1c 265 struct nouveau_drm *drm = nouveau_drm(dev);
77145f1c 266 struct nouveau_display *disp;
e412e95a 267 u32 pclass = dev->pdev->class >> 8;
de691855 268 int ret, gen;
27d5030a 269
77145f1c
BS
270 disp = drm->display = kzalloc(sizeof(*disp), GFP_KERNEL);
271 if (!disp)
272 return -ENOMEM;
273
27d5030a
BS
274 drm_mode_config_init(dev);
275 drm_mode_create_scaling_mode_property(dev);
4ceca5f8 276 drm_mode_create_dvi_i_properties(dev);
de691855 277
77145f1c 278 if (nv_device(drm->device)->card_type < NV_50)
de691855
BS
279 gen = 0;
280 else
77145f1c 281 if (nv_device(drm->device)->card_type < NV_D0)
de691855
BS
282 gen = 1;
283 else
284 gen = 2;
285
286 PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode);
287 PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth);
288 PROP_ENUM(disp->underscan_property, gen, "underscan", underscan);
b29caa58
BS
289
290 disp->underscan_hborder_property =
d9bc3c02 291 drm_property_create_range(dev, 0, "underscan hborder", 0, 128);
b29caa58
BS
292
293 disp->underscan_vborder_property =
d9bc3c02 294 drm_property_create_range(dev, 0, "underscan vborder", 0, 128);
b29caa58 295
f9887d09 296 if (gen >= 1) {
03e9a040 297 /* -90..+90 */
df26bc9c 298 disp->vibrant_hue_property =
03e9a040 299 drm_property_create_range(dev, 0, "vibrant hue", 0, 180);
df26bc9c 300
03e9a040 301 /* -100..+100 */
df26bc9c 302 disp->color_vibrance_property =
03e9a040 303 drm_property_create_range(dev, 0, "color vibrance", 0, 200);
df26bc9c
CB
304 }
305
e6ecefaa 306 dev->mode_config.funcs = &nouveau_mode_config_funcs;
27d5030a
BS
307 dev->mode_config.fb_base = pci_resource_start(dev->pdev, 1);
308
309 dev->mode_config.min_width = 0;
310 dev->mode_config.min_height = 0;
77145f1c 311 if (nv_device(drm->device)->card_type < NV_10) {
27d5030a
BS
312 dev->mode_config.max_width = 2048;
313 dev->mode_config.max_height = 2048;
314 } else
77145f1c 315 if (nv_device(drm->device)->card_type < NV_50) {
27d5030a
BS
316 dev->mode_config.max_width = 4096;
317 dev->mode_config.max_height = 4096;
318 } else {
319 dev->mode_config.max_width = 8192;
320 dev->mode_config.max_height = 8192;
321 }
322
f1377998
DA
323 dev->mode_config.preferred_depth = 24;
324 dev->mode_config.prefer_shadow = 1;
325
f62b27db
BS
326 drm_kms_helper_poll_init(dev);
327 drm_kms_helper_poll_disable(dev);
328
e412e95a
BS
329 if (nouveau_modeset == 1 ||
330 (nouveau_modeset < 0 && pclass == PCI_CLASS_DISPLAY_VGA)) {
9430738d
BS
331 if (nv_device(drm->device)->card_type < NV_50)
332 ret = nv04_display_create(dev);
9430738d 333 else
e225f446 334 ret = nv50_display_create(dev);
f62b27db 335 if (ret)
9430738d
BS
336 goto disp_create_err;
337
338 if (dev->mode_config.num_crtc) {
339 ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
340 if (ret)
341 goto vblank_err;
342 }
343
344 nouveau_backlight_init(dev);
f62b27db
BS
345 }
346
5ace2c9d
MS
347 return 0;
348
349vblank_err:
77145f1c 350 disp->dtor(dev);
5ace2c9d
MS
351disp_create_err:
352 drm_kms_helper_poll_fini(dev);
353 drm_mode_config_cleanup(dev);
2a44e499 354 return ret;
27d5030a
BS
355}
356
357void
358nouveau_display_destroy(struct drm_device *dev)
359{
77145f1c 360 struct nouveau_display *disp = nouveau_display(dev);
27d5030a 361
77145f1c 362 nouveau_backlight_exit(dev);
f62b27db
BS
363 drm_vblank_cleanup(dev);
364
d6bf2f37
BS
365 drm_kms_helper_poll_fini(dev);
366 drm_mode_config_cleanup(dev);
367
9430738d
BS
368 if (disp->dtor)
369 disp->dtor(dev);
f62b27db 370
77145f1c
BS
371 nouveau_drm(dev)->display = NULL;
372 kfree(disp);
373}
374
375int
376nouveau_display_suspend(struct drm_device *dev)
377{
378 struct nouveau_drm *drm = nouveau_drm(dev);
379 struct drm_crtc *crtc;
380
381 nouveau_display_fini(dev);
382
383 NV_INFO(drm, "unpinning framebuffer(s)...\n");
384 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
385 struct nouveau_framebuffer *nouveau_fb;
386
387 nouveau_fb = nouveau_framebuffer(crtc->fb);
388 if (!nouveau_fb || !nouveau_fb->nvbo)
389 continue;
390
391 nouveau_bo_unpin(nouveau_fb->nvbo);
392 }
393
394 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
395 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
396
397 nouveau_bo_unmap(nv_crtc->cursor.nvbo);
398 nouveau_bo_unpin(nv_crtc->cursor.nvbo);
399 }
400
401 return 0;
402}
403
404void
405nouveau_display_resume(struct drm_device *dev)
406{
407 struct nouveau_drm *drm = nouveau_drm(dev);
408 struct drm_crtc *crtc;
409 int ret;
410
411 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
412 struct nouveau_framebuffer *nouveau_fb;
413
414 nouveau_fb = nouveau_framebuffer(crtc->fb);
415 if (!nouveau_fb || !nouveau_fb->nvbo)
416 continue;
417
418 nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
419 }
420
421 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
422 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
423
424 ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
425 if (!ret)
426 ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
427 if (ret)
428 NV_ERROR(drm, "Could not pin/map cursor.\n");
429 }
430
431 nouveau_fbcon_set_suspend(dev, 0);
432 nouveau_fbcon_zfill_all(dev);
433
434 nouveau_display_init(dev);
435
436 /* Force CLUT to get re-loaded during modeset */
437 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
438 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
439
440 nv_crtc->lut.depth = 0;
441 }
442
443 drm_helper_resume_force_mode(dev);
444
445 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
446 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
447 u32 offset = nv_crtc->cursor.nvbo->bo.offset;
448
449 nv_crtc->cursor.set_offset(nv_crtc, offset);
450 nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
451 nv_crtc->cursor_saved_y);
452 }
27d5030a
BS
453}
454
332b242f
FJ
455static int
456nouveau_page_flip_reserve(struct nouveau_bo *old_bo,
457 struct nouveau_bo *new_bo)
458{
459 int ret;
460
461 ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM);
462 if (ret)
463 return ret;
464
465 ret = ttm_bo_reserve(&new_bo->bo, false, false, false, 0);
466 if (ret)
467 goto fail;
468
2c14575f
MS
469 if (likely(old_bo != new_bo)) {
470 ret = ttm_bo_reserve(&old_bo->bo, false, false, false, 0);
471 if (ret)
472 goto fail_unreserve;
473 }
332b242f
FJ
474
475 return 0;
476
477fail_unreserve:
478 ttm_bo_unreserve(&new_bo->bo);
479fail:
480 nouveau_bo_unpin(new_bo);
481 return ret;
482}
483
484static void
485nouveau_page_flip_unreserve(struct nouveau_bo *old_bo,
486 struct nouveau_bo *new_bo,
487 struct nouveau_fence *fence)
488{
489 nouveau_bo_fence(new_bo, fence);
490 ttm_bo_unreserve(&new_bo->bo);
491
2c14575f
MS
492 if (likely(old_bo != new_bo)) {
493 nouveau_bo_fence(old_bo, fence);
494 ttm_bo_unreserve(&old_bo->bo);
495 }
332b242f
FJ
496
497 nouveau_bo_unpin(old_bo);
498}
499
500static int
501nouveau_page_flip_emit(struct nouveau_channel *chan,
502 struct nouveau_bo *old_bo,
503 struct nouveau_bo *new_bo,
504 struct nouveau_page_flip_state *s,
505 struct nouveau_fence **pfence)
506{
f589be88 507 struct nouveau_fence_chan *fctx = chan->fence;
77145f1c
BS
508 struct nouveau_drm *drm = chan->drm;
509 struct drm_device *dev = drm->dev;
332b242f
FJ
510 unsigned long flags;
511 int ret;
512
513 /* Queue it to the pending list */
514 spin_lock_irqsave(&dev->event_lock, flags);
f589be88 515 list_add_tail(&s->head, &fctx->flip);
332b242f
FJ
516 spin_unlock_irqrestore(&dev->event_lock, flags);
517
518 /* Synchronize with the old framebuffer */
519 ret = nouveau_fence_sync(old_bo->bo.sync_obj, chan);
520 if (ret)
521 goto fail;
522
523 /* Emit the pageflip */
d5316e25 524 ret = RING_SPACE(chan, 3);
332b242f
FJ
525 if (ret)
526 goto fail;
527
77145f1c 528 if (nv_device(drm->device)->card_type < NV_C0) {
6d597027 529 BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1);
d5316e25
BS
530 OUT_RING (chan, 0x00000000);
531 OUT_RING (chan, 0x00000000);
532 } else {
6d597027 533 BEGIN_NVC0(chan, 0, NV10_SUBCHAN_REF_CNT, 1);
5e120f6e 534 OUT_RING (chan, 0);
6d597027 535 BEGIN_IMC0(chan, 0, NVSW_SUBCHAN_PAGE_FLIP, 0x0000);
d5316e25 536 }
bd2f2037 537 FIRE_RING (chan);
332b242f 538
d375e7d5 539 ret = nouveau_fence_new(chan, pfence);
332b242f
FJ
540 if (ret)
541 goto fail;
542
543 return 0;
544fail:
545 spin_lock_irqsave(&dev->event_lock, flags);
546 list_del(&s->head);
547 spin_unlock_irqrestore(&dev->event_lock, flags);
548 return ret;
549}
550
551int
552nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
553 struct drm_pending_vblank_event *event)
554{
555 struct drm_device *dev = crtc->dev;
77145f1c 556 struct nouveau_drm *drm = nouveau_drm(dev);
332b242f
FJ
557 struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->fb)->nvbo;
558 struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo;
559 struct nouveau_page_flip_state *s;
d375e7d5 560 struct nouveau_channel *chan = NULL;
332b242f
FJ
561 struct nouveau_fence *fence;
562 int ret;
563
77145f1c 564 if (!drm->channel)
332b242f
FJ
565 return -ENODEV;
566
567 s = kzalloc(sizeof(*s), GFP_KERNEL);
568 if (!s)
569 return -ENOMEM;
570
571 /* Don't let the buffers go away while we flip */
572 ret = nouveau_page_flip_reserve(old_bo, new_bo);
573 if (ret)
574 goto fail_free;
575
576 /* Initialize a page flip struct */
577 *s = (struct nouveau_page_flip_state)
2503c6fa 578 { { }, event, nouveau_crtc(crtc)->index,
01f2c773 579 fb->bits_per_pixel, fb->pitches[0], crtc->x, crtc->y,
332b242f
FJ
580 new_bo->bo.offset };
581
582 /* Choose the channel the flip will be handled in */
d375e7d5
BS
583 fence = new_bo->bo.sync_obj;
584 if (fence)
ebb945a9 585 chan = fence->channel;
332b242f 586 if (!chan)
77145f1c
BS
587 chan = drm->channel;
588 mutex_lock(&chan->cli->mutex);
332b242f
FJ
589
590 /* Emit a page flip */
77145f1c 591 if (nv_device(drm->device)->card_type >= NV_50) {
e225f446 592 ret = nv50_display_flip_next(crtc, fb, chan, 0);
d7117e0d 593 if (ret) {
77145f1c 594 mutex_unlock(&chan->cli->mutex);
d7117e0d
BS
595 goto fail_unreserve;
596 }
597 }
598
332b242f 599 ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence);
77145f1c 600 mutex_unlock(&chan->cli->mutex);
332b242f
FJ
601 if (ret)
602 goto fail_unreserve;
603
604 /* Update the crtc struct and cleanup */
605 crtc->fb = fb;
606
607 nouveau_page_flip_unreserve(old_bo, new_bo, fence);
608 nouveau_fence_unref(&fence);
609 return 0;
610
611fail_unreserve:
612 nouveau_page_flip_unreserve(old_bo, new_bo, NULL);
613fail_free:
614 kfree(s);
615 return ret;
616}
617
618int
619nouveau_finish_page_flip(struct nouveau_channel *chan,
620 struct nouveau_page_flip_state *ps)
621{
f589be88 622 struct nouveau_fence_chan *fctx = chan->fence;
77145f1c
BS
623 struct nouveau_drm *drm = chan->drm;
624 struct drm_device *dev = drm->dev;
332b242f
FJ
625 struct nouveau_page_flip_state *s;
626 unsigned long flags;
627
628 spin_lock_irqsave(&dev->event_lock, flags);
629
f589be88 630 if (list_empty(&fctx->flip)) {
77145f1c 631 NV_ERROR(drm, "unexpected pageflip\n");
332b242f
FJ
632 spin_unlock_irqrestore(&dev->event_lock, flags);
633 return -EINVAL;
634 }
635
f589be88 636 s = list_first_entry(&fctx->flip, struct nouveau_page_flip_state, head);
332b242f
FJ
637 if (s->event) {
638 struct drm_pending_vblank_event *e = s->event;
639 struct timeval now;
640
641 do_gettimeofday(&now);
642 e->event.sequence = 0;
643 e->event.tv_sec = now.tv_sec;
644 e->event.tv_usec = now.tv_usec;
645 list_add_tail(&e->base.link, &e->base.file_priv->event_list);
646 wake_up_interruptible(&e->base.file_priv->event_wait);
647 }
648
649 list_del(&s->head);
d7117e0d
BS
650 if (ps)
651 *ps = *s;
332b242f
FJ
652 kfree(s);
653
654 spin_unlock_irqrestore(&dev->event_lock, flags);
655 return 0;
656}
33dbc27f 657
f589be88
BS
658int
659nouveau_flip_complete(void *data)
660{
661 struct nouveau_channel *chan = data;
77145f1c 662 struct nouveau_drm *drm = chan->drm;
f589be88
BS
663 struct nouveau_page_flip_state state;
664
665 if (!nouveau_finish_page_flip(chan, &state)) {
77145f1c
BS
666 if (nv_device(drm->device)->card_type < NV_50) {
667 nv_set_crtc_base(drm->dev, state.crtc, state.offset +
f589be88
BS
668 state.y * state.pitch +
669 state.x * state.bpp / 8);
670 }
671 }
672
673 return 0;
674}
675
33dbc27f
BS
676int
677nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev,
678 struct drm_mode_create_dumb *args)
679{
680 struct nouveau_bo *bo;
681 int ret;
682
683 args->pitch = roundup(args->width * (args->bpp / 8), 256);
684 args->size = args->pitch * args->height;
685 args->size = roundup(args->size, PAGE_SIZE);
686
610bd7da 687 ret = nouveau_gem_new(dev, args->size, 0, NOUVEAU_GEM_DOMAIN_VRAM, 0, 0, &bo);
33dbc27f
BS
688 if (ret)
689 return ret;
690
691 ret = drm_gem_handle_create(file_priv, bo->gem, &args->handle);
692 drm_gem_object_unreference_unlocked(bo->gem);
693 return ret;
694}
695
696int
697nouveau_display_dumb_destroy(struct drm_file *file_priv, struct drm_device *dev,
698 uint32_t handle)
699{
700 return drm_gem_handle_delete(file_priv, handle);
701}
702
703int
704nouveau_display_dumb_map_offset(struct drm_file *file_priv,
705 struct drm_device *dev,
706 uint32_t handle, uint64_t *poffset)
707{
708 struct drm_gem_object *gem;
709
710 gem = drm_gem_object_lookup(dev, file_priv, handle);
711 if (gem) {
712 struct nouveau_bo *bo = gem->driver_private;
713 *poffset = bo->bo.addr_space_offset;
714 drm_gem_object_unreference_unlocked(gem);
715 return 0;
716 }
717
718 return -ENOENT;
719}