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6ee73861 BS |
1 | /* |
2 | * Copyright (C) 2008 Maarten Maathuis. | |
3 | * All Rights Reserved. | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining | |
6 | * a copy of this software and associated documentation files (the | |
7 | * "Software"), to deal in the Software without restriction, including | |
8 | * without limitation the rights to use, copy, modify, merge, publish, | |
9 | * distribute, sublicense, and/or sell copies of the Software, and to | |
10 | * permit persons to whom the Software is furnished to do so, subject to | |
11 | * the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice (including the | |
14 | * next paragraph) shall be included in all copies or substantial | |
15 | * portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
18 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
19 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. | |
20 | * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE | |
21 | * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION | |
22 | * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION | |
23 | * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. | |
24 | * | |
25 | */ | |
26 | ||
760285e7 DH |
27 | #include <drm/drmP.h> |
28 | #include <drm/drm_crtc_helper.h> | |
77145f1c | 29 | |
6ee73861 | 30 | #include "nouveau_fbcon.h" |
042206c0 | 31 | #include "nouveau_hw.h" |
332b242f FJ |
32 | #include "nouveau_crtc.h" |
33 | #include "nouveau_dma.h" | |
77145f1c | 34 | #include "nouveau_gem.h" |
de691855 | 35 | #include "nouveau_connector.h" |
45c4e0aa | 36 | #include "nv50_display.h" |
6ee73861 | 37 | |
ebb945a9 BS |
38 | #include "nouveau_fence.h" |
39 | ||
e0996aea | 40 | #include <subdev/bios/gpio.h> |
77145f1c BS |
41 | #include <subdev/gpio.h> |
42 | #include <engine/disp.h> | |
e0996aea | 43 | |
6ee73861 BS |
44 | static void |
45 | nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb) | |
46 | { | |
47 | struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb); | |
6ee73861 | 48 | |
bc9025bd LB |
49 | if (fb->nvbo) |
50 | drm_gem_object_unreference_unlocked(fb->nvbo->gem); | |
6ee73861 BS |
51 | |
52 | drm_framebuffer_cleanup(drm_fb); | |
53 | kfree(fb); | |
54 | } | |
55 | ||
56 | static int | |
57 | nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb, | |
58 | struct drm_file *file_priv, | |
59 | unsigned int *handle) | |
60 | { | |
61 | struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb); | |
62 | ||
63 | return drm_gem_handle_create(file_priv, fb->nvbo->gem, handle); | |
64 | } | |
65 | ||
66 | static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = { | |
67 | .destroy = nouveau_user_framebuffer_destroy, | |
68 | .create_handle = nouveau_user_framebuffer_create_handle, | |
69 | }; | |
70 | ||
38651674 | 71 | int |
45c4e0aa BS |
72 | nouveau_framebuffer_init(struct drm_device *dev, |
73 | struct nouveau_framebuffer *nv_fb, | |
308e5bcb | 74 | struct drm_mode_fb_cmd2 *mode_cmd, |
45c4e0aa | 75 | struct nouveau_bo *nvbo) |
6ee73861 | 76 | { |
77145f1c | 77 | struct nouveau_drm *drm = nouveau_drm(dev); |
45c4e0aa | 78 | struct drm_framebuffer *fb = &nv_fb->base; |
6ee73861 BS |
79 | int ret; |
80 | ||
45c4e0aa | 81 | ret = drm_framebuffer_init(dev, fb, &nouveau_framebuffer_funcs); |
6ee73861 | 82 | if (ret) { |
38651674 | 83 | return ret; |
6ee73861 BS |
84 | } |
85 | ||
45c4e0aa BS |
86 | drm_helper_mode_fill_fb_struct(fb, mode_cmd); |
87 | nv_fb->nvbo = nvbo; | |
88 | ||
77145f1c | 89 | if (nv_device(drm->device)->card_type >= NV_50) { |
45c4e0aa BS |
90 | u32 tile_flags = nouveau_bo_tile_layout(nvbo); |
91 | if (tile_flags == 0x7a00 || | |
92 | tile_flags == 0xfe00) | |
93 | nv_fb->r_dma = NvEvoFB32; | |
94 | else | |
95 | if (tile_flags == 0x7000) | |
96 | nv_fb->r_dma = NvEvoFB16; | |
97 | else | |
98 | nv_fb->r_dma = NvEvoVRAM_LP; | |
99 | ||
100 | switch (fb->depth) { | |
4f6029da BS |
101 | case 8: nv_fb->r_format = 0x1e00; break; |
102 | case 15: nv_fb->r_format = 0xe900; break; | |
103 | case 16: nv_fb->r_format = 0xe800; break; | |
45c4e0aa | 104 | case 24: |
4f6029da BS |
105 | case 32: nv_fb->r_format = 0xcf00; break; |
106 | case 30: nv_fb->r_format = 0xd100; break; | |
45c4e0aa | 107 | default: |
77145f1c | 108 | NV_ERROR(drm, "unknown depth %d\n", fb->depth); |
45c4e0aa BS |
109 | return -EINVAL; |
110 | } | |
111 | ||
77145f1c | 112 | if (nv_device(drm->device)->chipset == 0x50) |
45c4e0aa BS |
113 | nv_fb->r_format |= (tile_flags << 8); |
114 | ||
2fad3d5e | 115 | if (!tile_flags) { |
77145f1c | 116 | if (nv_device(drm->device)->card_type < NV_D0) |
01f2c773 | 117 | nv_fb->r_pitch = 0x00100000 | fb->pitches[0]; |
2fad3d5e | 118 | else |
01f2c773 | 119 | nv_fb->r_pitch = 0x01000000 | fb->pitches[0]; |
2fad3d5e | 120 | } else { |
45c4e0aa | 121 | u32 mode = nvbo->tile_mode; |
77145f1c | 122 | if (nv_device(drm->device)->card_type >= NV_C0) |
45c4e0aa | 123 | mode >>= 4; |
01f2c773 | 124 | nv_fb->r_pitch = ((fb->pitches[0] / 4) << 4) | mode; |
45c4e0aa BS |
125 | } |
126 | } | |
127 | ||
38651674 | 128 | return 0; |
6ee73861 BS |
129 | } |
130 | ||
131 | static struct drm_framebuffer * | |
132 | nouveau_user_framebuffer_create(struct drm_device *dev, | |
133 | struct drm_file *file_priv, | |
308e5bcb | 134 | struct drm_mode_fb_cmd2 *mode_cmd) |
6ee73861 | 135 | { |
38651674 | 136 | struct nouveau_framebuffer *nouveau_fb; |
6ee73861 | 137 | struct drm_gem_object *gem; |
38651674 | 138 | int ret; |
6ee73861 | 139 | |
308e5bcb | 140 | gem = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]); |
6ee73861 | 141 | if (!gem) |
cce13ff7 | 142 | return ERR_PTR(-ENOENT); |
6ee73861 | 143 | |
38651674 DA |
144 | nouveau_fb = kzalloc(sizeof(struct nouveau_framebuffer), GFP_KERNEL); |
145 | if (!nouveau_fb) | |
cce13ff7 | 146 | return ERR_PTR(-ENOMEM); |
38651674 DA |
147 | |
148 | ret = nouveau_framebuffer_init(dev, nouveau_fb, mode_cmd, nouveau_gem_object(gem)); | |
149 | if (ret) { | |
6ee73861 | 150 | drm_gem_object_unreference(gem); |
cce13ff7 | 151 | return ERR_PTR(ret); |
6ee73861 BS |
152 | } |
153 | ||
38651674 | 154 | return &nouveau_fb->base; |
6ee73861 BS |
155 | } |
156 | ||
27d5030a | 157 | static const struct drm_mode_config_funcs nouveau_mode_config_funcs = { |
6ee73861 | 158 | .fb_create = nouveau_user_framebuffer_create, |
eb1f8e4f | 159 | .output_poll_changed = nouveau_fbcon_output_poll_changed, |
6ee73861 BS |
160 | }; |
161 | ||
b29caa58 | 162 | |
4a67d391 | 163 | struct nouveau_drm_prop_enum_list { |
de691855 | 164 | u8 gen_mask; |
b29caa58 BS |
165 | int type; |
166 | char *name; | |
167 | }; | |
168 | ||
4a67d391 | 169 | static struct nouveau_drm_prop_enum_list underscan[] = { |
92854622 BS |
170 | { 6, UNDERSCAN_AUTO, "auto" }, |
171 | { 6, UNDERSCAN_OFF, "off" }, | |
172 | { 6, UNDERSCAN_ON, "on" }, | |
de691855 | 173 | {} |
b29caa58 BS |
174 | }; |
175 | ||
4a67d391 | 176 | static struct nouveau_drm_prop_enum_list dither_mode[] = { |
de691855 BS |
177 | { 7, DITHERING_MODE_AUTO, "auto" }, |
178 | { 7, DITHERING_MODE_OFF, "off" }, | |
179 | { 1, DITHERING_MODE_ON, "on" }, | |
180 | { 6, DITHERING_MODE_STATIC2X2, "static 2x2" }, | |
181 | { 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" }, | |
182 | { 4, DITHERING_MODE_TEMPORAL, "temporal" }, | |
183 | {} | |
184 | }; | |
185 | ||
4a67d391 | 186 | static struct nouveau_drm_prop_enum_list dither_depth[] = { |
de691855 BS |
187 | { 6, DITHERING_DEPTH_AUTO, "auto" }, |
188 | { 6, DITHERING_DEPTH_6BPC, "6 bpc" }, | |
189 | { 6, DITHERING_DEPTH_8BPC, "8 bpc" }, | |
190 | {} | |
191 | }; | |
192 | ||
193 | #define PROP_ENUM(p,gen,n,list) do { \ | |
4a67d391 | 194 | struct nouveau_drm_prop_enum_list *l = (list); \ |
de691855 BS |
195 | int c = 0; \ |
196 | while (l->gen_mask) { \ | |
197 | if (l->gen_mask & (1 << (gen))) \ | |
198 | c++; \ | |
199 | l++; \ | |
200 | } \ | |
201 | if (c) { \ | |
202 | p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c); \ | |
203 | l = (list); \ | |
204 | c = 0; \ | |
205 | while (p && l->gen_mask) { \ | |
206 | if (l->gen_mask & (1 << (gen))) { \ | |
207 | drm_property_add_enum(p, c, l->type, l->name); \ | |
208 | c++; \ | |
209 | } \ | |
210 | l++; \ | |
211 | } \ | |
212 | } \ | |
213 | } while(0) | |
214 | ||
f62b27db BS |
215 | int |
216 | nouveau_display_init(struct drm_device *dev) | |
217 | { | |
77145f1c BS |
218 | struct nouveau_drm *drm = nouveau_drm(dev); |
219 | struct nouveau_display *disp = nouveau_display(dev); | |
220 | struct nouveau_gpio *gpio = nouveau_gpio(drm->device); | |
52c4d767 | 221 | struct drm_connector *connector; |
f62b27db BS |
222 | int ret; |
223 | ||
224 | ret = disp->init(dev); | |
52c4d767 BS |
225 | if (ret) |
226 | return ret; | |
227 | ||
7df898b1 | 228 | /* enable polling for external displays */ |
52c4d767 BS |
229 | drm_kms_helper_poll_enable(dev); |
230 | ||
231 | /* enable hotplug interrupts */ | |
232 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
233 | struct nouveau_connector *conn = nouveau_connector(connector); | |
77145f1c BS |
234 | if (gpio) |
235 | gpio->irq(gpio, 0, conn->hpd, 0xff, true); | |
f62b27db BS |
236 | } |
237 | ||
238 | return ret; | |
239 | } | |
240 | ||
241 | void | |
242 | nouveau_display_fini(struct drm_device *dev) | |
243 | { | |
77145f1c BS |
244 | struct nouveau_drm *drm = nouveau_drm(dev); |
245 | struct nouveau_display *disp = nouveau_display(dev); | |
246 | struct nouveau_gpio *gpio = nouveau_gpio(drm->device); | |
52c4d767 BS |
247 | struct drm_connector *connector; |
248 | ||
249 | /* disable hotplug interrupts */ | |
250 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
251 | struct nouveau_connector *conn = nouveau_connector(connector); | |
77145f1c BS |
252 | if (gpio) |
253 | gpio->irq(gpio, 0, conn->hpd, 0xff, false); | |
52c4d767 | 254 | } |
f62b27db BS |
255 | |
256 | drm_kms_helper_poll_disable(dev); | |
257 | disp->fini(dev); | |
258 | } | |
259 | ||
ebb945a9 BS |
260 | static void |
261 | nouveau_display_vblank_notify(void *data, int crtc) | |
262 | { | |
263 | drm_handle_vblank(data, crtc); | |
264 | } | |
265 | ||
266 | static void | |
267 | nouveau_display_vblank_get(void *data, int crtc) | |
268 | { | |
269 | drm_vblank_get(data, crtc); | |
270 | } | |
271 | ||
272 | static void | |
273 | nouveau_display_vblank_put(void *data, int crtc) | |
274 | { | |
275 | drm_vblank_put(data, crtc); | |
276 | } | |
277 | ||
27d5030a BS |
278 | int |
279 | nouveau_display_create(struct drm_device *dev) | |
280 | { | |
77145f1c BS |
281 | struct nouveau_drm *drm = nouveau_drm(dev); |
282 | struct nouveau_disp *pdisp = nouveau_disp(drm->device); | |
283 | struct nouveau_display *disp; | |
e412e95a | 284 | u32 pclass = dev->pdev->class >> 8; |
de691855 | 285 | int ret, gen; |
27d5030a | 286 | |
77145f1c BS |
287 | disp = drm->display = kzalloc(sizeof(*disp), GFP_KERNEL); |
288 | if (!disp) | |
289 | return -ENOMEM; | |
290 | ||
291 | pdisp->vblank.data = dev; | |
292 | pdisp->vblank.notify = nouveau_display_vblank_notify; | |
293 | pdisp->vblank.get = nouveau_display_vblank_get; | |
294 | pdisp->vblank.put = nouveau_display_vblank_put; | |
295 | ||
27d5030a BS |
296 | drm_mode_config_init(dev); |
297 | drm_mode_create_scaling_mode_property(dev); | |
4ceca5f8 | 298 | drm_mode_create_dvi_i_properties(dev); |
de691855 | 299 | |
77145f1c | 300 | if (nv_device(drm->device)->card_type < NV_50) |
de691855 BS |
301 | gen = 0; |
302 | else | |
77145f1c | 303 | if (nv_device(drm->device)->card_type < NV_D0) |
de691855 BS |
304 | gen = 1; |
305 | else | |
306 | gen = 2; | |
307 | ||
308 | PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode); | |
309 | PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth); | |
310 | PROP_ENUM(disp->underscan_property, gen, "underscan", underscan); | |
b29caa58 BS |
311 | |
312 | disp->underscan_hborder_property = | |
d9bc3c02 | 313 | drm_property_create_range(dev, 0, "underscan hborder", 0, 128); |
b29caa58 BS |
314 | |
315 | disp->underscan_vborder_property = | |
d9bc3c02 | 316 | drm_property_create_range(dev, 0, "underscan vborder", 0, 128); |
b29caa58 | 317 | |
f9887d09 | 318 | if (gen >= 1) { |
03e9a040 | 319 | /* -90..+90 */ |
df26bc9c | 320 | disp->vibrant_hue_property = |
03e9a040 | 321 | drm_property_create_range(dev, 0, "vibrant hue", 0, 180); |
df26bc9c | 322 | |
03e9a040 | 323 | /* -100..+100 */ |
df26bc9c | 324 | disp->color_vibrance_property = |
03e9a040 | 325 | drm_property_create_range(dev, 0, "color vibrance", 0, 200); |
df26bc9c CB |
326 | } |
327 | ||
e6ecefaa | 328 | dev->mode_config.funcs = &nouveau_mode_config_funcs; |
27d5030a BS |
329 | dev->mode_config.fb_base = pci_resource_start(dev->pdev, 1); |
330 | ||
331 | dev->mode_config.min_width = 0; | |
332 | dev->mode_config.min_height = 0; | |
77145f1c | 333 | if (nv_device(drm->device)->card_type < NV_10) { |
27d5030a BS |
334 | dev->mode_config.max_width = 2048; |
335 | dev->mode_config.max_height = 2048; | |
336 | } else | |
77145f1c | 337 | if (nv_device(drm->device)->card_type < NV_50) { |
27d5030a BS |
338 | dev->mode_config.max_width = 4096; |
339 | dev->mode_config.max_height = 4096; | |
340 | } else { | |
341 | dev->mode_config.max_width = 8192; | |
342 | dev->mode_config.max_height = 8192; | |
343 | } | |
344 | ||
f1377998 DA |
345 | dev->mode_config.preferred_depth = 24; |
346 | dev->mode_config.prefer_shadow = 1; | |
347 | ||
f62b27db BS |
348 | drm_kms_helper_poll_init(dev); |
349 | drm_kms_helper_poll_disable(dev); | |
350 | ||
e412e95a BS |
351 | if (nouveau_modeset == 1 || |
352 | (nouveau_modeset < 0 && pclass == PCI_CLASS_DISPLAY_VGA)) { | |
9430738d BS |
353 | if (nv_device(drm->device)->card_type < NV_50) |
354 | ret = nv04_display_create(dev); | |
9430738d | 355 | else |
e225f446 | 356 | ret = nv50_display_create(dev); |
f62b27db | 357 | if (ret) |
9430738d BS |
358 | goto disp_create_err; |
359 | ||
360 | if (dev->mode_config.num_crtc) { | |
361 | ret = drm_vblank_init(dev, dev->mode_config.num_crtc); | |
362 | if (ret) | |
363 | goto vblank_err; | |
364 | } | |
365 | ||
366 | nouveau_backlight_init(dev); | |
f62b27db BS |
367 | } |
368 | ||
5ace2c9d MS |
369 | return 0; |
370 | ||
371 | vblank_err: | |
77145f1c | 372 | disp->dtor(dev); |
5ace2c9d MS |
373 | disp_create_err: |
374 | drm_kms_helper_poll_fini(dev); | |
375 | drm_mode_config_cleanup(dev); | |
2a44e499 | 376 | return ret; |
27d5030a BS |
377 | } |
378 | ||
379 | void | |
380 | nouveau_display_destroy(struct drm_device *dev) | |
381 | { | |
77145f1c | 382 | struct nouveau_display *disp = nouveau_display(dev); |
27d5030a | 383 | |
77145f1c | 384 | nouveau_backlight_exit(dev); |
f62b27db BS |
385 | drm_vblank_cleanup(dev); |
386 | ||
d6bf2f37 BS |
387 | drm_kms_helper_poll_fini(dev); |
388 | drm_mode_config_cleanup(dev); | |
389 | ||
9430738d BS |
390 | if (disp->dtor) |
391 | disp->dtor(dev); | |
f62b27db | 392 | |
77145f1c BS |
393 | nouveau_drm(dev)->display = NULL; |
394 | kfree(disp); | |
395 | } | |
396 | ||
397 | int | |
398 | nouveau_display_suspend(struct drm_device *dev) | |
399 | { | |
400 | struct nouveau_drm *drm = nouveau_drm(dev); | |
401 | struct drm_crtc *crtc; | |
402 | ||
403 | nouveau_display_fini(dev); | |
404 | ||
405 | NV_INFO(drm, "unpinning framebuffer(s)...\n"); | |
406 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
407 | struct nouveau_framebuffer *nouveau_fb; | |
408 | ||
409 | nouveau_fb = nouveau_framebuffer(crtc->fb); | |
410 | if (!nouveau_fb || !nouveau_fb->nvbo) | |
411 | continue; | |
412 | ||
413 | nouveau_bo_unpin(nouveau_fb->nvbo); | |
414 | } | |
415 | ||
416 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
417 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
418 | ||
419 | nouveau_bo_unmap(nv_crtc->cursor.nvbo); | |
420 | nouveau_bo_unpin(nv_crtc->cursor.nvbo); | |
421 | } | |
422 | ||
423 | return 0; | |
424 | } | |
425 | ||
426 | void | |
427 | nouveau_display_resume(struct drm_device *dev) | |
428 | { | |
429 | struct nouveau_drm *drm = nouveau_drm(dev); | |
430 | struct drm_crtc *crtc; | |
431 | int ret; | |
432 | ||
433 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
434 | struct nouveau_framebuffer *nouveau_fb; | |
435 | ||
436 | nouveau_fb = nouveau_framebuffer(crtc->fb); | |
437 | if (!nouveau_fb || !nouveau_fb->nvbo) | |
438 | continue; | |
439 | ||
440 | nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM); | |
441 | } | |
442 | ||
443 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
444 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
445 | ||
446 | ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM); | |
447 | if (!ret) | |
448 | ret = nouveau_bo_map(nv_crtc->cursor.nvbo); | |
449 | if (ret) | |
450 | NV_ERROR(drm, "Could not pin/map cursor.\n"); | |
451 | } | |
452 | ||
453 | nouveau_fbcon_set_suspend(dev, 0); | |
454 | nouveau_fbcon_zfill_all(dev); | |
455 | ||
456 | nouveau_display_init(dev); | |
457 | ||
458 | /* Force CLUT to get re-loaded during modeset */ | |
459 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
460 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
461 | ||
462 | nv_crtc->lut.depth = 0; | |
463 | } | |
464 | ||
465 | drm_helper_resume_force_mode(dev); | |
466 | ||
467 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
468 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
469 | u32 offset = nv_crtc->cursor.nvbo->bo.offset; | |
470 | ||
471 | nv_crtc->cursor.set_offset(nv_crtc, offset); | |
472 | nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x, | |
473 | nv_crtc->cursor_saved_y); | |
474 | } | |
27d5030a BS |
475 | } |
476 | ||
042206c0 FJ |
477 | int |
478 | nouveau_vblank_enable(struct drm_device *dev, int crtc) | |
479 | { | |
77145f1c | 480 | struct nouveau_device *device = nouveau_dev(dev); |
042206c0 | 481 | |
77145f1c BS |
482 | if (device->card_type >= NV_D0) |
483 | nv_mask(device, 0x6100c0 + (crtc * 0x800), 1, 1); | |
ebb945a9 | 484 | else |
77145f1c BS |
485 | if (device->card_type >= NV_50) |
486 | nv_mask(device, NV50_PDISPLAY_INTR_EN_1, 0, | |
042206c0 FJ |
487 | NV50_PDISPLAY_INTR_EN_1_VBLANK_CRTC_(crtc)); |
488 | else | |
489 | NVWriteCRTC(dev, crtc, NV_PCRTC_INTR_EN_0, | |
490 | NV_PCRTC_INTR_0_VBLANK); | |
491 | ||
492 | return 0; | |
493 | } | |
494 | ||
495 | void | |
496 | nouveau_vblank_disable(struct drm_device *dev, int crtc) | |
497 | { | |
77145f1c | 498 | struct nouveau_device *device = nouveau_dev(dev); |
042206c0 | 499 | |
77145f1c BS |
500 | if (device->card_type >= NV_D0) |
501 | nv_mask(device, 0x6100c0 + (crtc * 0x800), 1, 0); | |
ebb945a9 | 502 | else |
77145f1c BS |
503 | if (device->card_type >= NV_50) |
504 | nv_mask(device, NV50_PDISPLAY_INTR_EN_1, | |
042206c0 FJ |
505 | NV50_PDISPLAY_INTR_EN_1_VBLANK_CRTC_(crtc), 0); |
506 | else | |
507 | NVWriteCRTC(dev, crtc, NV_PCRTC_INTR_EN_0, 0); | |
508 | } | |
332b242f FJ |
509 | |
510 | static int | |
511 | nouveau_page_flip_reserve(struct nouveau_bo *old_bo, | |
512 | struct nouveau_bo *new_bo) | |
513 | { | |
514 | int ret; | |
515 | ||
516 | ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM); | |
517 | if (ret) | |
518 | return ret; | |
519 | ||
520 | ret = ttm_bo_reserve(&new_bo->bo, false, false, false, 0); | |
521 | if (ret) | |
522 | goto fail; | |
523 | ||
2c14575f MS |
524 | if (likely(old_bo != new_bo)) { |
525 | ret = ttm_bo_reserve(&old_bo->bo, false, false, false, 0); | |
526 | if (ret) | |
527 | goto fail_unreserve; | |
528 | } | |
332b242f FJ |
529 | |
530 | return 0; | |
531 | ||
532 | fail_unreserve: | |
533 | ttm_bo_unreserve(&new_bo->bo); | |
534 | fail: | |
535 | nouveau_bo_unpin(new_bo); | |
536 | return ret; | |
537 | } | |
538 | ||
539 | static void | |
540 | nouveau_page_flip_unreserve(struct nouveau_bo *old_bo, | |
541 | struct nouveau_bo *new_bo, | |
542 | struct nouveau_fence *fence) | |
543 | { | |
544 | nouveau_bo_fence(new_bo, fence); | |
545 | ttm_bo_unreserve(&new_bo->bo); | |
546 | ||
2c14575f MS |
547 | if (likely(old_bo != new_bo)) { |
548 | nouveau_bo_fence(old_bo, fence); | |
549 | ttm_bo_unreserve(&old_bo->bo); | |
550 | } | |
332b242f FJ |
551 | |
552 | nouveau_bo_unpin(old_bo); | |
553 | } | |
554 | ||
555 | static int | |
556 | nouveau_page_flip_emit(struct nouveau_channel *chan, | |
557 | struct nouveau_bo *old_bo, | |
558 | struct nouveau_bo *new_bo, | |
559 | struct nouveau_page_flip_state *s, | |
560 | struct nouveau_fence **pfence) | |
561 | { | |
f589be88 | 562 | struct nouveau_fence_chan *fctx = chan->fence; |
77145f1c BS |
563 | struct nouveau_drm *drm = chan->drm; |
564 | struct drm_device *dev = drm->dev; | |
332b242f FJ |
565 | unsigned long flags; |
566 | int ret; | |
567 | ||
568 | /* Queue it to the pending list */ | |
569 | spin_lock_irqsave(&dev->event_lock, flags); | |
f589be88 | 570 | list_add_tail(&s->head, &fctx->flip); |
332b242f FJ |
571 | spin_unlock_irqrestore(&dev->event_lock, flags); |
572 | ||
573 | /* Synchronize with the old framebuffer */ | |
574 | ret = nouveau_fence_sync(old_bo->bo.sync_obj, chan); | |
575 | if (ret) | |
576 | goto fail; | |
577 | ||
578 | /* Emit the pageflip */ | |
d5316e25 | 579 | ret = RING_SPACE(chan, 3); |
332b242f FJ |
580 | if (ret) |
581 | goto fail; | |
582 | ||
77145f1c | 583 | if (nv_device(drm->device)->card_type < NV_C0) { |
6d597027 | 584 | BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1); |
d5316e25 BS |
585 | OUT_RING (chan, 0x00000000); |
586 | OUT_RING (chan, 0x00000000); | |
587 | } else { | |
6d597027 | 588 | BEGIN_NVC0(chan, 0, NV10_SUBCHAN_REF_CNT, 1); |
5e120f6e | 589 | OUT_RING (chan, 0); |
6d597027 | 590 | BEGIN_IMC0(chan, 0, NVSW_SUBCHAN_PAGE_FLIP, 0x0000); |
d5316e25 | 591 | } |
bd2f2037 | 592 | FIRE_RING (chan); |
332b242f | 593 | |
d375e7d5 | 594 | ret = nouveau_fence_new(chan, pfence); |
332b242f FJ |
595 | if (ret) |
596 | goto fail; | |
597 | ||
598 | return 0; | |
599 | fail: | |
600 | spin_lock_irqsave(&dev->event_lock, flags); | |
601 | list_del(&s->head); | |
602 | spin_unlock_irqrestore(&dev->event_lock, flags); | |
603 | return ret; | |
604 | } | |
605 | ||
606 | int | |
607 | nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb, | |
608 | struct drm_pending_vblank_event *event) | |
609 | { | |
610 | struct drm_device *dev = crtc->dev; | |
77145f1c | 611 | struct nouveau_drm *drm = nouveau_drm(dev); |
332b242f FJ |
612 | struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->fb)->nvbo; |
613 | struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo; | |
614 | struct nouveau_page_flip_state *s; | |
d375e7d5 | 615 | struct nouveau_channel *chan = NULL; |
332b242f FJ |
616 | struct nouveau_fence *fence; |
617 | int ret; | |
618 | ||
77145f1c | 619 | if (!drm->channel) |
332b242f FJ |
620 | return -ENODEV; |
621 | ||
622 | s = kzalloc(sizeof(*s), GFP_KERNEL); | |
623 | if (!s) | |
624 | return -ENOMEM; | |
625 | ||
626 | /* Don't let the buffers go away while we flip */ | |
627 | ret = nouveau_page_flip_reserve(old_bo, new_bo); | |
628 | if (ret) | |
629 | goto fail_free; | |
630 | ||
631 | /* Initialize a page flip struct */ | |
632 | *s = (struct nouveau_page_flip_state) | |
2503c6fa | 633 | { { }, event, nouveau_crtc(crtc)->index, |
01f2c773 | 634 | fb->bits_per_pixel, fb->pitches[0], crtc->x, crtc->y, |
332b242f FJ |
635 | new_bo->bo.offset }; |
636 | ||
637 | /* Choose the channel the flip will be handled in */ | |
d375e7d5 BS |
638 | fence = new_bo->bo.sync_obj; |
639 | if (fence) | |
ebb945a9 | 640 | chan = fence->channel; |
332b242f | 641 | if (!chan) |
77145f1c BS |
642 | chan = drm->channel; |
643 | mutex_lock(&chan->cli->mutex); | |
332b242f FJ |
644 | |
645 | /* Emit a page flip */ | |
77145f1c | 646 | if (nv_device(drm->device)->card_type >= NV_50) { |
e225f446 | 647 | ret = nv50_display_flip_next(crtc, fb, chan, 0); |
d7117e0d | 648 | if (ret) { |
77145f1c | 649 | mutex_unlock(&chan->cli->mutex); |
d7117e0d BS |
650 | goto fail_unreserve; |
651 | } | |
652 | } | |
653 | ||
332b242f | 654 | ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence); |
77145f1c | 655 | mutex_unlock(&chan->cli->mutex); |
332b242f FJ |
656 | if (ret) |
657 | goto fail_unreserve; | |
658 | ||
659 | /* Update the crtc struct and cleanup */ | |
660 | crtc->fb = fb; | |
661 | ||
662 | nouveau_page_flip_unreserve(old_bo, new_bo, fence); | |
663 | nouveau_fence_unref(&fence); | |
664 | return 0; | |
665 | ||
666 | fail_unreserve: | |
667 | nouveau_page_flip_unreserve(old_bo, new_bo, NULL); | |
668 | fail_free: | |
669 | kfree(s); | |
670 | return ret; | |
671 | } | |
672 | ||
673 | int | |
674 | nouveau_finish_page_flip(struct nouveau_channel *chan, | |
675 | struct nouveau_page_flip_state *ps) | |
676 | { | |
f589be88 | 677 | struct nouveau_fence_chan *fctx = chan->fence; |
77145f1c BS |
678 | struct nouveau_drm *drm = chan->drm; |
679 | struct drm_device *dev = drm->dev; | |
332b242f FJ |
680 | struct nouveau_page_flip_state *s; |
681 | unsigned long flags; | |
682 | ||
683 | spin_lock_irqsave(&dev->event_lock, flags); | |
684 | ||
f589be88 | 685 | if (list_empty(&fctx->flip)) { |
77145f1c | 686 | NV_ERROR(drm, "unexpected pageflip\n"); |
332b242f FJ |
687 | spin_unlock_irqrestore(&dev->event_lock, flags); |
688 | return -EINVAL; | |
689 | } | |
690 | ||
f589be88 | 691 | s = list_first_entry(&fctx->flip, struct nouveau_page_flip_state, head); |
332b242f FJ |
692 | if (s->event) { |
693 | struct drm_pending_vblank_event *e = s->event; | |
694 | struct timeval now; | |
695 | ||
696 | do_gettimeofday(&now); | |
697 | e->event.sequence = 0; | |
698 | e->event.tv_sec = now.tv_sec; | |
699 | e->event.tv_usec = now.tv_usec; | |
700 | list_add_tail(&e->base.link, &e->base.file_priv->event_list); | |
701 | wake_up_interruptible(&e->base.file_priv->event_wait); | |
702 | } | |
703 | ||
704 | list_del(&s->head); | |
d7117e0d BS |
705 | if (ps) |
706 | *ps = *s; | |
332b242f FJ |
707 | kfree(s); |
708 | ||
709 | spin_unlock_irqrestore(&dev->event_lock, flags); | |
710 | return 0; | |
711 | } | |
33dbc27f | 712 | |
f589be88 BS |
713 | int |
714 | nouveau_flip_complete(void *data) | |
715 | { | |
716 | struct nouveau_channel *chan = data; | |
77145f1c | 717 | struct nouveau_drm *drm = chan->drm; |
f589be88 BS |
718 | struct nouveau_page_flip_state state; |
719 | ||
720 | if (!nouveau_finish_page_flip(chan, &state)) { | |
77145f1c BS |
721 | if (nv_device(drm->device)->card_type < NV_50) { |
722 | nv_set_crtc_base(drm->dev, state.crtc, state.offset + | |
f589be88 BS |
723 | state.y * state.pitch + |
724 | state.x * state.bpp / 8); | |
725 | } | |
726 | } | |
727 | ||
728 | return 0; | |
729 | } | |
730 | ||
33dbc27f BS |
731 | int |
732 | nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev, | |
733 | struct drm_mode_create_dumb *args) | |
734 | { | |
735 | struct nouveau_bo *bo; | |
736 | int ret; | |
737 | ||
738 | args->pitch = roundup(args->width * (args->bpp / 8), 256); | |
739 | args->size = args->pitch * args->height; | |
740 | args->size = roundup(args->size, PAGE_SIZE); | |
741 | ||
610bd7da | 742 | ret = nouveau_gem_new(dev, args->size, 0, NOUVEAU_GEM_DOMAIN_VRAM, 0, 0, &bo); |
33dbc27f BS |
743 | if (ret) |
744 | return ret; | |
745 | ||
746 | ret = drm_gem_handle_create(file_priv, bo->gem, &args->handle); | |
747 | drm_gem_object_unreference_unlocked(bo->gem); | |
748 | return ret; | |
749 | } | |
750 | ||
751 | int | |
752 | nouveau_display_dumb_destroy(struct drm_file *file_priv, struct drm_device *dev, | |
753 | uint32_t handle) | |
754 | { | |
755 | return drm_gem_handle_delete(file_priv, handle); | |
756 | } | |
757 | ||
758 | int | |
759 | nouveau_display_dumb_map_offset(struct drm_file *file_priv, | |
760 | struct drm_device *dev, | |
761 | uint32_t handle, uint64_t *poffset) | |
762 | { | |
763 | struct drm_gem_object *gem; | |
764 | ||
765 | gem = drm_gem_object_lookup(dev, file_priv, handle); | |
766 | if (gem) { | |
767 | struct nouveau_bo *bo = gem->driver_private; | |
768 | *poffset = bo->bo.addr_space_offset; | |
769 | drm_gem_object_unreference_unlocked(gem); | |
770 | return 0; | |
771 | } | |
772 | ||
773 | return -ENOENT; | |
774 | } |