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drm/nouveau/core: move handle-based object apis to handle.c
[mirror_ubuntu-artful-kernel.git] / drivers / gpu / drm / nouveau / nouveau_display.c
CommitLineData
6ee73861
BS
1/*
2 * Copyright (C) 2008 Maarten Maathuis.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 *
25 */
26
760285e7
DH
27#include <drm/drmP.h>
28#include <drm/drm_crtc_helper.h>
77145f1c 29
6ee73861 30#include "nouveau_fbcon.h"
1a646342 31#include "dispnv04/hw.h"
332b242f
FJ
32#include "nouveau_crtc.h"
33#include "nouveau_dma.h"
77145f1c 34#include "nouveau_gem.h"
de691855 35#include "nouveau_connector.h"
45c4e0aa 36#include "nv50_display.h"
6ee73861 37
ebb945a9
BS
38#include "nouveau_fence.h"
39
77145f1c 40#include <engine/disp.h>
e0996aea 41
1d7c71a3
BS
42#include <core/class.h>
43
51cb4b39 44static int
8e8832e8 45nouveau_display_vblank_handler(void *data, u32 type, int head)
51cb4b39 46{
b12f0ae9
BS
47 struct nouveau_crtc *nv_crtc = data;
48 drm_handle_vblank(nv_crtc->base.dev, nv_crtc->index);
51cb4b39
BS
49 return NVKM_EVENT_KEEP;
50}
51
52int
53nouveau_display_vblank_enable(struct drm_device *dev, int head)
54{
b12f0ae9
BS
55 struct drm_crtc *crtc;
56 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
57 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
58 if (nv_crtc->index == head) {
59 nouveau_event_get(nv_crtc->vblank);
60 return 0;
61 }
51cb4b39 62 }
b12f0ae9 63 return -EINVAL;
51cb4b39
BS
64}
65
66void
67nouveau_display_vblank_disable(struct drm_device *dev, int head)
68{
b12f0ae9
BS
69 struct drm_crtc *crtc;
70 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
71 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
72 if (nv_crtc->index == head) {
73 nouveau_event_put(nv_crtc->vblank);
74 return;
75 }
76 }
51cb4b39
BS
77}
78
d83ef853
BS
79static inline int
80calc(int blanks, int blanke, int total, int line)
81{
82 if (blanke >= blanks) {
83 if (line >= blanks)
84 line -= total;
85 } else {
86 if (line >= blanks)
87 line -= total;
88 line -= blanke + 1;
89 }
90 return line;
91}
92
93int
94nouveau_display_scanoutpos_head(struct drm_crtc *crtc, int *vpos, int *hpos,
95 ktime_t *stime, ktime_t *etime)
96{
97 const u32 mthd = NV04_DISP_SCANOUTPOS + nouveau_crtc(crtc)->index;
98 struct nouveau_display *disp = nouveau_display(crtc->dev);
99 struct nv04_display_scanoutpos args;
100 int ret, retry = 1;
101
102 do {
103 ret = nv_exec(disp->core, mthd, &args, sizeof(args));
104 if (ret != 0)
105 return 0;
106
107 if (args.vline) {
108 ret |= DRM_SCANOUTPOS_ACCURATE;
109 ret |= DRM_SCANOUTPOS_VALID;
110 break;
111 }
112
113 if (retry) ndelay(crtc->linedur_ns);
114 } while (retry--);
115
6c3252bc 116 *hpos = args.hline;
d83ef853
BS
117 *vpos = calc(args.vblanks, args.vblanke, args.vtotal, args.vline);
118 if (stime) *stime = ns_to_ktime(args.time[0]);
119 if (etime) *etime = ns_to_ktime(args.time[1]);
120
121 if (*vpos < 0)
122 ret |= DRM_SCANOUTPOS_INVBL;
123 return ret;
124}
125
126int
127nouveau_display_scanoutpos(struct drm_device *dev, int head, unsigned int flags,
128 int *vpos, int *hpos, ktime_t *stime, ktime_t *etime)
129{
130 struct drm_crtc *crtc;
131
132 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
133 if (nouveau_crtc(crtc)->index == head) {
134 return nouveau_display_scanoutpos_head(crtc, vpos, hpos,
135 stime, etime);
136 }
137 }
138
139 return 0;
140}
141
142int
143nouveau_display_vblstamp(struct drm_device *dev, int head, int *max_error,
144 struct timeval *time, unsigned flags)
145{
146 struct drm_crtc *crtc;
147
148 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
149 if (nouveau_crtc(crtc)->index == head) {
150 return drm_calc_vbltimestamp_from_scanoutpos(dev,
151 head, max_error, time, flags, crtc,
152 &crtc->hwmode);
153 }
154 }
155
156 return -EINVAL;
157}
158
51cb4b39
BS
159static void
160nouveau_display_vblank_fini(struct drm_device *dev)
161{
b12f0ae9 162 struct drm_crtc *crtc;
51cb4b39 163
1139ffb9
BS
164 drm_vblank_cleanup(dev);
165
b12f0ae9
BS
166 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
167 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
168 nouveau_event_ref(NULL, &nv_crtc->vblank);
51cb4b39 169 }
51cb4b39
BS
170}
171
172static int
173nouveau_display_vblank_init(struct drm_device *dev)
174{
51cb4b39
BS
175 struct nouveau_drm *drm = nouveau_drm(dev);
176 struct nouveau_disp *pdisp = nouveau_disp(drm->device);
b12f0ae9
BS
177 struct drm_crtc *crtc;
178 int ret;
51cb4b39 179
b12f0ae9
BS
180 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
181 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
182 ret = nouveau_event_new(pdisp->vblank, 1, nv_crtc->index,
51cb4b39 183 nouveau_display_vblank_handler,
b12f0ae9 184 nv_crtc, &nv_crtc->vblank);
51cb4b39
BS
185 if (ret) {
186 nouveau_display_vblank_fini(dev);
187 return ret;
188 }
189 }
190
191 ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
192 if (ret) {
193 nouveau_display_vblank_fini(dev);
194 return ret;
195 }
196
197 return 0;
198}
199
6ee73861
BS
200static void
201nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb)
202{
203 struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
ab0af559
BS
204 struct nouveau_display *disp = nouveau_display(drm_fb->dev);
205
206 if (disp->fb_dtor)
207 disp->fb_dtor(drm_fb);
6ee73861 208
bc9025bd 209 if (fb->nvbo)
55fb74ad 210 drm_gem_object_unreference_unlocked(&fb->nvbo->gem);
6ee73861
BS
211
212 drm_framebuffer_cleanup(drm_fb);
213 kfree(fb);
214}
215
216static int
217nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb,
218 struct drm_file *file_priv,
219 unsigned int *handle)
220{
221 struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
222
55fb74ad 223 return drm_gem_handle_create(file_priv, &fb->nvbo->gem, handle);
6ee73861
BS
224}
225
226static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = {
227 .destroy = nouveau_user_framebuffer_destroy,
228 .create_handle = nouveau_user_framebuffer_create_handle,
229};
230
38651674 231int
45c4e0aa
BS
232nouveau_framebuffer_init(struct drm_device *dev,
233 struct nouveau_framebuffer *nv_fb,
308e5bcb 234 struct drm_mode_fb_cmd2 *mode_cmd,
45c4e0aa 235 struct nouveau_bo *nvbo)
6ee73861 236{
ab0af559 237 struct nouveau_display *disp = nouveau_display(dev);
45c4e0aa 238 struct drm_framebuffer *fb = &nv_fb->base;
6ee73861
BS
239 int ret;
240
45c4e0aa
BS
241 drm_helper_mode_fill_fb_struct(fb, mode_cmd);
242 nv_fb->nvbo = nvbo;
243
c7d73f6a 244 ret = drm_framebuffer_init(dev, fb, &nouveau_framebuffer_funcs);
ab0af559 245 if (ret)
c7d73f6a 246 return ret;
ab0af559
BS
247
248 if (disp->fb_ctor) {
249 ret = disp->fb_ctor(fb);
250 if (ret)
251 disp->fb_dtor(fb);
c7d73f6a
DV
252 }
253
ab0af559 254 return ret;
6ee73861
BS
255}
256
257static struct drm_framebuffer *
258nouveau_user_framebuffer_create(struct drm_device *dev,
259 struct drm_file *file_priv,
308e5bcb 260 struct drm_mode_fb_cmd2 *mode_cmd)
6ee73861 261{
38651674 262 struct nouveau_framebuffer *nouveau_fb;
6ee73861 263 struct drm_gem_object *gem;
fdfb8332 264 int ret = -ENOMEM;
6ee73861 265
308e5bcb 266 gem = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]);
6ee73861 267 if (!gem)
cce13ff7 268 return ERR_PTR(-ENOENT);
6ee73861 269
38651674
DA
270 nouveau_fb = kzalloc(sizeof(struct nouveau_framebuffer), GFP_KERNEL);
271 if (!nouveau_fb)
fdfb8332 272 goto err_unref;
38651674
DA
273
274 ret = nouveau_framebuffer_init(dev, nouveau_fb, mode_cmd, nouveau_gem_object(gem));
fdfb8332
ML
275 if (ret)
276 goto err;
6ee73861 277
38651674 278 return &nouveau_fb->base;
fdfb8332
ML
279
280err:
281 kfree(nouveau_fb);
282err_unref:
283 drm_gem_object_unreference(gem);
284 return ERR_PTR(ret);
6ee73861
BS
285}
286
27d5030a 287static const struct drm_mode_config_funcs nouveau_mode_config_funcs = {
6ee73861 288 .fb_create = nouveau_user_framebuffer_create,
eb1f8e4f 289 .output_poll_changed = nouveau_fbcon_output_poll_changed,
6ee73861
BS
290};
291
b29caa58 292
4a67d391 293struct nouveau_drm_prop_enum_list {
de691855 294 u8 gen_mask;
b29caa58
BS
295 int type;
296 char *name;
297};
298
4a67d391 299static struct nouveau_drm_prop_enum_list underscan[] = {
92854622
BS
300 { 6, UNDERSCAN_AUTO, "auto" },
301 { 6, UNDERSCAN_OFF, "off" },
302 { 6, UNDERSCAN_ON, "on" },
de691855 303 {}
b29caa58
BS
304};
305
4a67d391 306static struct nouveau_drm_prop_enum_list dither_mode[] = {
de691855
BS
307 { 7, DITHERING_MODE_AUTO, "auto" },
308 { 7, DITHERING_MODE_OFF, "off" },
309 { 1, DITHERING_MODE_ON, "on" },
310 { 6, DITHERING_MODE_STATIC2X2, "static 2x2" },
311 { 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" },
312 { 4, DITHERING_MODE_TEMPORAL, "temporal" },
313 {}
314};
315
4a67d391 316static struct nouveau_drm_prop_enum_list dither_depth[] = {
de691855
BS
317 { 6, DITHERING_DEPTH_AUTO, "auto" },
318 { 6, DITHERING_DEPTH_6BPC, "6 bpc" },
319 { 6, DITHERING_DEPTH_8BPC, "8 bpc" },
320 {}
321};
322
323#define PROP_ENUM(p,gen,n,list) do { \
4a67d391 324 struct nouveau_drm_prop_enum_list *l = (list); \
de691855
BS
325 int c = 0; \
326 while (l->gen_mask) { \
327 if (l->gen_mask & (1 << (gen))) \
328 c++; \
329 l++; \
330 } \
331 if (c) { \
332 p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c); \
333 l = (list); \
334 c = 0; \
335 while (p && l->gen_mask) { \
336 if (l->gen_mask & (1 << (gen))) { \
337 drm_property_add_enum(p, c, l->type, l->name); \
338 c++; \
339 } \
340 l++; \
341 } \
342 } \
343} while(0)
344
f62b27db
BS
345int
346nouveau_display_init(struct drm_device *dev)
347{
77145f1c 348 struct nouveau_display *disp = nouveau_display(dev);
52c4d767 349 struct drm_connector *connector;
f62b27db
BS
350 int ret;
351
352 ret = disp->init(dev);
52c4d767
BS
353 if (ret)
354 return ret;
355
7df898b1 356 /* enable polling for external displays */
52c4d767
BS
357 drm_kms_helper_poll_enable(dev);
358
359 /* enable hotplug interrupts */
360 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
361 struct nouveau_connector *conn = nouveau_connector(connector);
456b0579 362 if (conn->hpd) nouveau_event_get(conn->hpd);
f62b27db
BS
363 }
364
365 return ret;
366}
367
368void
369nouveau_display_fini(struct drm_device *dev)
370{
77145f1c 371 struct nouveau_display *disp = nouveau_display(dev);
52c4d767 372 struct drm_connector *connector;
9cba5efa
MK
373 int head;
374
375 /* Make sure that drm and hw vblank irqs get properly disabled. */
376 for (head = 0; head < dev->mode_config.num_crtc; head++)
377 drm_vblank_off(dev, head);
52c4d767
BS
378
379 /* disable hotplug interrupts */
380 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
381 struct nouveau_connector *conn = nouveau_connector(connector);
456b0579 382 if (conn->hpd) nouveau_event_put(conn->hpd);
52c4d767 383 }
f62b27db
BS
384
385 drm_kms_helper_poll_disable(dev);
386 disp->fini(dev);
387}
388
27d5030a
BS
389int
390nouveau_display_create(struct drm_device *dev)
391{
77145f1c 392 struct nouveau_drm *drm = nouveau_drm(dev);
420b9469 393 struct nouveau_device *device = nouveau_dev(dev);
77145f1c 394 struct nouveau_display *disp;
de691855 395 int ret, gen;
27d5030a 396
77145f1c
BS
397 disp = drm->display = kzalloc(sizeof(*disp), GFP_KERNEL);
398 if (!disp)
399 return -ENOMEM;
400
27d5030a
BS
401 drm_mode_config_init(dev);
402 drm_mode_create_scaling_mode_property(dev);
4ceca5f8 403 drm_mode_create_dvi_i_properties(dev);
de691855 404
77145f1c 405 if (nv_device(drm->device)->card_type < NV_50)
de691855
BS
406 gen = 0;
407 else
77145f1c 408 if (nv_device(drm->device)->card_type < NV_D0)
de691855
BS
409 gen = 1;
410 else
411 gen = 2;
412
413 PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode);
414 PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth);
415 PROP_ENUM(disp->underscan_property, gen, "underscan", underscan);
b29caa58
BS
416
417 disp->underscan_hborder_property =
d9bc3c02 418 drm_property_create_range(dev, 0, "underscan hborder", 0, 128);
b29caa58
BS
419
420 disp->underscan_vborder_property =
d9bc3c02 421 drm_property_create_range(dev, 0, "underscan vborder", 0, 128);
b29caa58 422
f9887d09 423 if (gen >= 1) {
03e9a040 424 /* -90..+90 */
df26bc9c 425 disp->vibrant_hue_property =
03e9a040 426 drm_property_create_range(dev, 0, "vibrant hue", 0, 180);
df26bc9c 427
03e9a040 428 /* -100..+100 */
df26bc9c 429 disp->color_vibrance_property =
03e9a040 430 drm_property_create_range(dev, 0, "color vibrance", 0, 200);
df26bc9c
CB
431 }
432
e6ecefaa 433 dev->mode_config.funcs = &nouveau_mode_config_funcs;
420b9469 434 dev->mode_config.fb_base = nv_device_resource_start(device, 1);
27d5030a
BS
435
436 dev->mode_config.min_width = 0;
437 dev->mode_config.min_height = 0;
77145f1c 438 if (nv_device(drm->device)->card_type < NV_10) {
27d5030a
BS
439 dev->mode_config.max_width = 2048;
440 dev->mode_config.max_height = 2048;
441 } else
77145f1c 442 if (nv_device(drm->device)->card_type < NV_50) {
27d5030a
BS
443 dev->mode_config.max_width = 4096;
444 dev->mode_config.max_height = 4096;
445 } else {
446 dev->mode_config.max_width = 8192;
447 dev->mode_config.max_height = 8192;
448 }
449
f1377998
DA
450 dev->mode_config.preferred_depth = 24;
451 dev->mode_config.prefer_shadow = 1;
452
b9d9dcda
BS
453 if (nv_device(drm->device)->chipset < 0x11)
454 dev->mode_config.async_page_flip = false;
455 else
456 dev->mode_config.async_page_flip = true;
457
f62b27db
BS
458 drm_kms_helper_poll_init(dev);
459 drm_kms_helper_poll_disable(dev);
460
fc162088 461 if (drm->vbios.dcb.entries) {
2332b311 462 static const u16 oclass[] = {
0b681687 463 GM107_DISP_CLASS,
2332b311
BS
464 NVF0_DISP_CLASS,
465 NVE0_DISP_CLASS,
466 NVD0_DISP_CLASS,
467 NVA3_DISP_CLASS,
468 NV94_DISP_CLASS,
469 NVA0_DISP_CLASS,
470 NV84_DISP_CLASS,
471 NV50_DISP_CLASS,
472 NV04_DISP_CLASS,
473 };
474 int i;
475
476 for (i = 0, ret = -ENODEV; ret && i < ARRAY_SIZE(oclass); i++) {
477 ret = nouveau_object_new(nv_object(drm), NVDRM_DEVICE,
478 NVDRM_DISPLAY, oclass[i],
479 NULL, 0, &disp->core);
480 }
481
482 if (ret == 0) {
483 if (nv_mclass(disp->core) < NV50_DISP_CLASS)
484 ret = nv04_display_create(dev);
485 else
486 ret = nv50_display_create(dev);
487 }
fc162088
BS
488 } else {
489 ret = 0;
490 }
9430738d 491
fc162088
BS
492 if (ret)
493 goto disp_create_err;
9430738d 494
fc162088 495 if (dev->mode_config.num_crtc) {
51cb4b39 496 ret = nouveau_display_vblank_init(dev);
fc162088
BS
497 if (ret)
498 goto vblank_err;
f62b27db
BS
499 }
500
fc162088 501 nouveau_backlight_init(dev);
5ace2c9d
MS
502 return 0;
503
504vblank_err:
77145f1c 505 disp->dtor(dev);
5ace2c9d
MS
506disp_create_err:
507 drm_kms_helper_poll_fini(dev);
508 drm_mode_config_cleanup(dev);
2a44e499 509 return ret;
27d5030a
BS
510}
511
512void
513nouveau_display_destroy(struct drm_device *dev)
514{
77145f1c 515 struct nouveau_display *disp = nouveau_display(dev);
2332b311 516 struct nouveau_drm *drm = nouveau_drm(dev);
27d5030a 517
77145f1c 518 nouveau_backlight_exit(dev);
51cb4b39 519 nouveau_display_vblank_fini(dev);
f62b27db 520
d6bf2f37
BS
521 drm_kms_helper_poll_fini(dev);
522 drm_mode_config_cleanup(dev);
523
9430738d
BS
524 if (disp->dtor)
525 disp->dtor(dev);
f62b27db 526
2332b311
BS
527 nouveau_object_del(nv_object(drm), NVDRM_DEVICE, NVDRM_DISPLAY);
528
77145f1c
BS
529 nouveau_drm(dev)->display = NULL;
530 kfree(disp);
531}
532
533int
534nouveau_display_suspend(struct drm_device *dev)
535{
536 struct nouveau_drm *drm = nouveau_drm(dev);
537 struct drm_crtc *crtc;
538
539 nouveau_display_fini(dev);
540
c52f4fa6 541 NV_INFO(drm, "unpinning framebuffer(s)...\n");
77145f1c
BS
542 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
543 struct nouveau_framebuffer *nouveau_fb;
544
f4510a27 545 nouveau_fb = nouveau_framebuffer(crtc->primary->fb);
77145f1c
BS
546 if (!nouveau_fb || !nouveau_fb->nvbo)
547 continue;
548
549 nouveau_bo_unpin(nouveau_fb->nvbo);
550 }
551
552 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
553 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
554
555 nouveau_bo_unmap(nv_crtc->cursor.nvbo);
556 nouveau_bo_unpin(nv_crtc->cursor.nvbo);
557 }
558
559 return 0;
560}
561
562void
5addcf0a 563nouveau_display_repin(struct drm_device *dev)
77145f1c
BS
564{
565 struct nouveau_drm *drm = nouveau_drm(dev);
566 struct drm_crtc *crtc;
567 int ret;
568
569 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
570 struct nouveau_framebuffer *nouveau_fb;
571
f4510a27 572 nouveau_fb = nouveau_framebuffer(crtc->primary->fb);
77145f1c
BS
573 if (!nouveau_fb || !nouveau_fb->nvbo)
574 continue;
575
576 nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
577 }
578
579 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
580 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
581
582 ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
583 if (!ret)
584 ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
585 if (ret)
586 NV_ERROR(drm, "Could not pin/map cursor.\n");
587 }
5addcf0a 588}
77145f1c 589
5addcf0a
DA
590void
591nouveau_display_resume(struct drm_device *dev)
592{
593 struct drm_crtc *crtc;
9cba5efa
MK
594 int head;
595
77145f1c
BS
596 nouveau_display_init(dev);
597
598 /* Force CLUT to get re-loaded during modeset */
599 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
600 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
601
602 nv_crtc->lut.depth = 0;
603 }
604
9cba5efa
MK
605 /* Make sure that drm and hw vblank irqs get resumed if needed. */
606 for (head = 0; head < dev->mode_config.num_crtc; head++)
607 drm_vblank_on(dev, head);
608
77145f1c
BS
609 drm_helper_resume_force_mode(dev);
610
611 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
612 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
613 u32 offset = nv_crtc->cursor.nvbo->bo.offset;
614
615 nv_crtc->cursor.set_offset(nv_crtc, offset);
616 nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
617 nv_crtc->cursor_saved_y);
618 }
27d5030a
BS
619}
620
332b242f
FJ
621static int
622nouveau_page_flip_emit(struct nouveau_channel *chan,
623 struct nouveau_bo *old_bo,
624 struct nouveau_bo *new_bo,
625 struct nouveau_page_flip_state *s,
626 struct nouveau_fence **pfence)
627{
f589be88 628 struct nouveau_fence_chan *fctx = chan->fence;
77145f1c
BS
629 struct nouveau_drm *drm = chan->drm;
630 struct drm_device *dev = drm->dev;
332b242f
FJ
631 unsigned long flags;
632 int ret;
633
634 /* Queue it to the pending list */
635 spin_lock_irqsave(&dev->event_lock, flags);
f589be88 636 list_add_tail(&s->head, &fctx->flip);
332b242f
FJ
637 spin_unlock_irqrestore(&dev->event_lock, flags);
638
639 /* Synchronize with the old framebuffer */
640 ret = nouveau_fence_sync(old_bo->bo.sync_obj, chan);
641 if (ret)
642 goto fail;
643
644 /* Emit the pageflip */
1e303c03 645 ret = RING_SPACE(chan, 2);
332b242f
FJ
646 if (ret)
647 goto fail;
648
1e303c03 649 if (nv_device(drm->device)->card_type < NV_C0)
6d597027 650 BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1);
1e303c03
BS
651 else
652 BEGIN_NVC0(chan, FermiSw, NV_SW_PAGE_FLIP, 1);
653 OUT_RING (chan, 0x00000000);
bd2f2037 654 FIRE_RING (chan);
332b242f 655
264ce192 656 ret = nouveau_fence_new(chan, false, pfence);
332b242f
FJ
657 if (ret)
658 goto fail;
659
660 return 0;
661fail:
662 spin_lock_irqsave(&dev->event_lock, flags);
663 list_del(&s->head);
664 spin_unlock_irqrestore(&dev->event_lock, flags);
665 return ret;
666}
667
668int
669nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
b9d9dcda 670 struct drm_pending_vblank_event *event, u32 flags)
332b242f 671{
b9d9dcda 672 const int swap_interval = (flags & DRM_MODE_PAGE_FLIP_ASYNC) ? 0 : 1;
332b242f 673 struct drm_device *dev = crtc->dev;
77145f1c 674 struct nouveau_drm *drm = nouveau_drm(dev);
f4510a27 675 struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->primary->fb)->nvbo;
332b242f
FJ
676 struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo;
677 struct nouveau_page_flip_state *s;
eae389f9 678 struct nouveau_channel *chan = drm->channel;
332b242f
FJ
679 struct nouveau_fence *fence;
680 int ret;
681
77145f1c 682 if (!drm->channel)
332b242f
FJ
683 return -ENODEV;
684
685 s = kzalloc(sizeof(*s), GFP_KERNEL);
686 if (!s)
687 return -ENOMEM;
688
d5c1e84b
ML
689 if (new_bo != old_bo) {
690 ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM);
691 if (ret)
692 goto fail_free;
693 }
694
695 mutex_lock(&chan->cli->mutex);
696
eae389f9
BS
697 /* synchronise rendering channel with the kernel's channel */
698 spin_lock(&new_bo->bo.bdev->fence_lock);
699 fence = nouveau_fence_ref(new_bo->bo.sync_obj);
700 spin_unlock(&new_bo->bo.bdev->fence_lock);
701 ret = nouveau_fence_sync(fence, chan);
2fd04c81 702 nouveau_fence_unref(&fence);
eae389f9 703 if (ret)
09c3de13 704 goto fail_unpin;
b580c9e2 705
07ad6ca0 706 ret = ttm_bo_reserve(&old_bo->bo, true, false, false, NULL);
060810d7
BS
707 if (ret)
708 goto fail_unpin;
b580c9e2
ML
709
710 /* Initialize a page flip struct */
711 *s = (struct nouveau_page_flip_state)
712 { { }, event, nouveau_crtc(crtc)->index,
713 fb->bits_per_pixel, fb->pitches[0], crtc->x, crtc->y,
714 new_bo->bo.offset };
715
ba124a41
MK
716 /* Keep vblanks on during flip, for the target crtc of this flip */
717 drm_vblank_get(dev, nouveau_crtc(crtc)->index);
718
332b242f 719 /* Emit a page flip */
77145f1c 720 if (nv_device(drm->device)->card_type >= NV_50) {
b9d9dcda 721 ret = nv50_display_flip_next(crtc, fb, chan, swap_interval);
060810d7 722 if (ret)
d7117e0d 723 goto fail_unreserve;
78ae0ad4
BS
724 } else {
725 struct nv04_display *dispnv04 = nv04_display(dev);
b9d9dcda
BS
726 int head = nouveau_crtc(crtc)->index;
727
728 if (swap_interval) {
729 ret = RING_SPACE(chan, 8);
730 if (ret)
731 goto fail_unreserve;
732
733 BEGIN_NV04(chan, NvSubImageBlit, 0x012c, 1);
734 OUT_RING (chan, 0);
735 BEGIN_NV04(chan, NvSubImageBlit, 0x0134, 1);
736 OUT_RING (chan, head);
737 BEGIN_NV04(chan, NvSubImageBlit, 0x0100, 1);
738 OUT_RING (chan, 0);
739 BEGIN_NV04(chan, NvSubImageBlit, 0x0130, 1);
740 OUT_RING (chan, 0);
741 }
742
743 nouveau_bo_ref(new_bo, &dispnv04->image[head]);
d7117e0d
BS
744 }
745
332b242f 746 ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence);
332b242f
FJ
747 if (ret)
748 goto fail_unreserve;
806cbc50 749 mutex_unlock(&chan->cli->mutex);
332b242f
FJ
750
751 /* Update the crtc struct and cleanup */
f4510a27 752 crtc->primary->fb = fb;
332b242f 753
07ad6ca0
BS
754 nouveau_bo_fence(old_bo, fence);
755 ttm_bo_unreserve(&old_bo->bo);
060810d7 756 if (old_bo != new_bo)
b580c9e2 757 nouveau_bo_unpin(old_bo);
332b242f
FJ
758 nouveau_fence_unref(&fence);
759 return 0;
760
761fail_unreserve:
ba124a41 762 drm_vblank_put(dev, nouveau_crtc(crtc)->index);
07ad6ca0 763 ttm_bo_unreserve(&old_bo->bo);
060810d7
BS
764fail_unpin:
765 mutex_unlock(&chan->cli->mutex);
766 if (old_bo != new_bo)
b580c9e2 767 nouveau_bo_unpin(new_bo);
332b242f
FJ
768fail_free:
769 kfree(s);
770 return ret;
771}
772
773int
774nouveau_finish_page_flip(struct nouveau_channel *chan,
775 struct nouveau_page_flip_state *ps)
776{
f589be88 777 struct nouveau_fence_chan *fctx = chan->fence;
77145f1c
BS
778 struct nouveau_drm *drm = chan->drm;
779 struct drm_device *dev = drm->dev;
332b242f
FJ
780 struct nouveau_page_flip_state *s;
781 unsigned long flags;
af4870e4 782 int crtcid = -1;
332b242f
FJ
783
784 spin_lock_irqsave(&dev->event_lock, flags);
785
f589be88 786 if (list_empty(&fctx->flip)) {
77145f1c 787 NV_ERROR(drm, "unexpected pageflip\n");
332b242f
FJ
788 spin_unlock_irqrestore(&dev->event_lock, flags);
789 return -EINVAL;
790 }
791
f589be88 792 s = list_first_entry(&fctx->flip, struct nouveau_page_flip_state, head);
af4870e4
MK
793 if (s->event) {
794 /* Vblank timestamps/counts are only correct on >= NV-50 */
795 if (nv_device(drm->device)->card_type >= NV_50)
796 crtcid = s->crtc;
797
798 drm_send_vblank_event(dev, crtcid, s->event);
799 }
332b242f 800
ba124a41
MK
801 /* Give up ownership of vblank for page-flipped crtc */
802 drm_vblank_put(dev, s->crtc);
803
332b242f 804 list_del(&s->head);
d7117e0d
BS
805 if (ps)
806 *ps = *s;
332b242f
FJ
807 kfree(s);
808
809 spin_unlock_irqrestore(&dev->event_lock, flags);
810 return 0;
811}
33dbc27f 812
f589be88
BS
813int
814nouveau_flip_complete(void *data)
815{
816 struct nouveau_channel *chan = data;
77145f1c 817 struct nouveau_drm *drm = chan->drm;
f589be88
BS
818 struct nouveau_page_flip_state state;
819
820 if (!nouveau_finish_page_flip(chan, &state)) {
77145f1c
BS
821 if (nv_device(drm->device)->card_type < NV_50) {
822 nv_set_crtc_base(drm->dev, state.crtc, state.offset +
f589be88
BS
823 state.y * state.pitch +
824 state.x * state.bpp / 8);
825 }
826 }
827
828 return 0;
829}
830
33dbc27f
BS
831int
832nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev,
833 struct drm_mode_create_dumb *args)
834{
835 struct nouveau_bo *bo;
836 int ret;
837
838 args->pitch = roundup(args->width * (args->bpp / 8), 256);
839 args->size = args->pitch * args->height;
840 args->size = roundup(args->size, PAGE_SIZE);
841
610bd7da 842 ret = nouveau_gem_new(dev, args->size, 0, NOUVEAU_GEM_DOMAIN_VRAM, 0, 0, &bo);
33dbc27f
BS
843 if (ret)
844 return ret;
845
55fb74ad
DH
846 ret = drm_gem_handle_create(file_priv, &bo->gem, &args->handle);
847 drm_gem_object_unreference_unlocked(&bo->gem);
33dbc27f
BS
848 return ret;
849}
850
33dbc27f
BS
851int
852nouveau_display_dumb_map_offset(struct drm_file *file_priv,
853 struct drm_device *dev,
854 uint32_t handle, uint64_t *poffset)
855{
856 struct drm_gem_object *gem;
857
858 gem = drm_gem_object_lookup(dev, file_priv, handle);
859 if (gem) {
55fb74ad 860 struct nouveau_bo *bo = nouveau_gem_object(gem);
72525b3f 861 *poffset = drm_vma_node_offset_addr(&bo->bo.vma_node);
33dbc27f
BS
862 drm_gem_object_unreference_unlocked(gem);
863 return 0;
864 }
865
866 return -ENOENT;
867}