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6ee73861 BS |
1 | /* |
2 | * Copyright (C) 2008 Maarten Maathuis. | |
3 | * All Rights Reserved. | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining | |
6 | * a copy of this software and associated documentation files (the | |
7 | * "Software"), to deal in the Software without restriction, including | |
8 | * without limitation the rights to use, copy, modify, merge, publish, | |
9 | * distribute, sublicense, and/or sell copies of the Software, and to | |
10 | * permit persons to whom the Software is furnished to do so, subject to | |
11 | * the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice (including the | |
14 | * next paragraph) shall be included in all copies or substantial | |
15 | * portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
18 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
19 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. | |
20 | * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE | |
21 | * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION | |
22 | * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION | |
23 | * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. | |
24 | * | |
25 | */ | |
26 | ||
760285e7 | 27 | #include <drm/drmP.h> |
b167db0e BS |
28 | #include <drm/drm_atomic.h> |
29 | #include <drm/drm_atomic_helper.h> | |
760285e7 | 30 | #include <drm/drm_crtc_helper.h> |
77145f1c | 31 | |
fdb751ef BS |
32 | #include <nvif/class.h> |
33 | ||
6ee73861 | 34 | #include "nouveau_fbcon.h" |
1a646342 | 35 | #include "dispnv04/hw.h" |
332b242f FJ |
36 | #include "nouveau_crtc.h" |
37 | #include "nouveau_dma.h" | |
77145f1c | 38 | #include "nouveau_gem.h" |
de691855 | 39 | #include "nouveau_connector.h" |
45c4e0aa | 40 | #include "nv50_display.h" |
6ee73861 | 41 | |
ebb945a9 BS |
42 | #include "nouveau_fence.h" |
43 | ||
7568b106 | 44 | #include <nvif/cl0046.h> |
79ca2770 | 45 | #include <nvif/event.h> |
1d7c71a3 | 46 | |
51cb4b39 | 47 | static int |
80bc340b | 48 | nouveau_display_vblank_handler(struct nvif_notify *notify) |
51cb4b39 | 49 | { |
79ca2770 BS |
50 | struct nouveau_crtc *nv_crtc = |
51 | container_of(notify, typeof(*nv_crtc), vblank); | |
d297b020 | 52 | drm_crtc_handle_vblank(&nv_crtc->base); |
80bc340b | 53 | return NVIF_NOTIFY_KEEP; |
51cb4b39 BS |
54 | } |
55 | ||
56 | int | |
88e72717 | 57 | nouveau_display_vblank_enable(struct drm_device *dev, unsigned int pipe) |
51cb4b39 | 58 | { |
b12f0ae9 BS |
59 | struct drm_crtc *crtc; |
60 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
61 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
88e72717 | 62 | if (nv_crtc->index == pipe) { |
80bc340b | 63 | nvif_notify_get(&nv_crtc->vblank); |
b12f0ae9 BS |
64 | return 0; |
65 | } | |
51cb4b39 | 66 | } |
b12f0ae9 | 67 | return -EINVAL; |
51cb4b39 BS |
68 | } |
69 | ||
70 | void | |
88e72717 | 71 | nouveau_display_vblank_disable(struct drm_device *dev, unsigned int pipe) |
51cb4b39 | 72 | { |
b12f0ae9 BS |
73 | struct drm_crtc *crtc; |
74 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
75 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
88e72717 | 76 | if (nv_crtc->index == pipe) { |
80bc340b | 77 | nvif_notify_put(&nv_crtc->vblank); |
b12f0ae9 BS |
78 | return; |
79 | } | |
80 | } | |
51cb4b39 BS |
81 | } |
82 | ||
d83ef853 BS |
83 | static inline int |
84 | calc(int blanks, int blanke, int total, int line) | |
85 | { | |
86 | if (blanke >= blanks) { | |
87 | if (line >= blanks) | |
88 | line -= total; | |
89 | } else { | |
90 | if (line >= blanks) | |
91 | line -= total; | |
92 | line -= blanke + 1; | |
93 | } | |
94 | return line; | |
95 | } | |
96 | ||
e08a1d97 | 97 | static int |
d83ef853 BS |
98 | nouveau_display_scanoutpos_head(struct drm_crtc *crtc, int *vpos, int *hpos, |
99 | ktime_t *stime, ktime_t *etime) | |
100 | { | |
4952b4d3 BS |
101 | struct { |
102 | struct nv04_disp_mthd_v0 base; | |
103 | struct nv04_disp_scanoutpos_v0 scan; | |
104 | } args = { | |
105 | .base.method = NV04_DISP_SCANOUTPOS, | |
106 | .base.head = nouveau_crtc(crtc)->index, | |
107 | }; | |
d83ef853 | 108 | struct nouveau_display *disp = nouveau_display(crtc->dev); |
eba1f35d | 109 | struct drm_vblank_crtc *vblank = &crtc->dev->vblank[drm_crtc_index(crtc)]; |
d83ef853 BS |
110 | int ret, retry = 1; |
111 | ||
112 | do { | |
4952b4d3 | 113 | ret = nvif_mthd(&disp->disp, 0, &args, sizeof(args)); |
d83ef853 BS |
114 | if (ret != 0) |
115 | return 0; | |
116 | ||
4952b4d3 | 117 | if (args.scan.vline) { |
d83ef853 BS |
118 | ret |= DRM_SCANOUTPOS_ACCURATE; |
119 | ret |= DRM_SCANOUTPOS_VALID; | |
120 | break; | |
121 | } | |
122 | ||
eba1f35d | 123 | if (retry) ndelay(vblank->linedur_ns); |
d83ef853 BS |
124 | } while (retry--); |
125 | ||
4952b4d3 BS |
126 | *hpos = args.scan.hline; |
127 | *vpos = calc(args.scan.vblanks, args.scan.vblanke, | |
128 | args.scan.vtotal, args.scan.vline); | |
129 | if (stime) *stime = ns_to_ktime(args.scan.time[0]); | |
130 | if (etime) *etime = ns_to_ktime(args.scan.time[1]); | |
d83ef853 BS |
131 | |
132 | if (*vpos < 0) | |
3d3cbd84 | 133 | ret |= DRM_SCANOUTPOS_IN_VBLANK; |
d83ef853 BS |
134 | return ret; |
135 | } | |
136 | ||
137 | int | |
88e72717 TR |
138 | nouveau_display_scanoutpos(struct drm_device *dev, unsigned int pipe, |
139 | unsigned int flags, int *vpos, int *hpos, | |
140 | ktime_t *stime, ktime_t *etime, | |
3bb403bf | 141 | const struct drm_display_mode *mode) |
d83ef853 BS |
142 | { |
143 | struct drm_crtc *crtc; | |
144 | ||
145 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
88e72717 | 146 | if (nouveau_crtc(crtc)->index == pipe) { |
d83ef853 BS |
147 | return nouveau_display_scanoutpos_head(crtc, vpos, hpos, |
148 | stime, etime); | |
149 | } | |
150 | } | |
151 | ||
152 | return 0; | |
153 | } | |
154 | ||
155 | int | |
88e72717 TR |
156 | nouveau_display_vblstamp(struct drm_device *dev, unsigned int pipe, |
157 | int *max_error, struct timeval *time, unsigned flags) | |
d83ef853 BS |
158 | { |
159 | struct drm_crtc *crtc; | |
160 | ||
161 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
88e72717 | 162 | if (nouveau_crtc(crtc)->index == pipe) { |
986edb91 BS |
163 | struct drm_display_mode *mode; |
164 | if (dev->mode_config.funcs->atomic_commit) | |
165 | mode = &crtc->state->adjusted_mode; | |
166 | else | |
167 | mode = &crtc->hwmode; | |
d83ef853 | 168 | return drm_calc_vbltimestamp_from_scanoutpos(dev, |
986edb91 | 169 | pipe, max_error, time, flags, mode); |
d83ef853 BS |
170 | } |
171 | } | |
172 | ||
173 | return -EINVAL; | |
174 | } | |
175 | ||
51cb4b39 BS |
176 | static void |
177 | nouveau_display_vblank_fini(struct drm_device *dev) | |
178 | { | |
b12f0ae9 | 179 | struct drm_crtc *crtc; |
51cb4b39 | 180 | |
1139ffb9 BS |
181 | drm_vblank_cleanup(dev); |
182 | ||
b12f0ae9 BS |
183 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { |
184 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
80bc340b | 185 | nvif_notify_fini(&nv_crtc->vblank); |
51cb4b39 | 186 | } |
51cb4b39 BS |
187 | } |
188 | ||
189 | static int | |
190 | nouveau_display_vblank_init(struct drm_device *dev) | |
191 | { | |
80bc340b | 192 | struct nouveau_display *disp = nouveau_display(dev); |
b12f0ae9 BS |
193 | struct drm_crtc *crtc; |
194 | int ret; | |
51cb4b39 | 195 | |
b12f0ae9 BS |
196 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { |
197 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
a01ca78c | 198 | ret = nvif_notify_init(&disp->disp, |
79ca2770 | 199 | nouveau_display_vblank_handler, false, |
80bc340b | 200 | NV04_DISP_NTFY_VBLANK, |
79ca2770 BS |
201 | &(struct nvif_notify_head_req_v0) { |
202 | .head = nv_crtc->index, | |
203 | }, | |
204 | sizeof(struct nvif_notify_head_req_v0), | |
205 | sizeof(struct nvif_notify_head_rep_v0), | |
206 | &nv_crtc->vblank); | |
51cb4b39 BS |
207 | if (ret) { |
208 | nouveau_display_vblank_fini(dev); | |
209 | return ret; | |
210 | } | |
211 | } | |
212 | ||
213 | ret = drm_vblank_init(dev, dev->mode_config.num_crtc); | |
214 | if (ret) { | |
215 | nouveau_display_vblank_fini(dev); | |
216 | return ret; | |
217 | } | |
218 | ||
219 | return 0; | |
220 | } | |
221 | ||
6ee73861 BS |
222 | static void |
223 | nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb) | |
224 | { | |
225 | struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb); | |
ab0af559 BS |
226 | struct nouveau_display *disp = nouveau_display(drm_fb->dev); |
227 | ||
228 | if (disp->fb_dtor) | |
229 | disp->fb_dtor(drm_fb); | |
6ee73861 | 230 | |
bc9025bd | 231 | if (fb->nvbo) |
55fb74ad | 232 | drm_gem_object_unreference_unlocked(&fb->nvbo->gem); |
6ee73861 BS |
233 | |
234 | drm_framebuffer_cleanup(drm_fb); | |
235 | kfree(fb); | |
236 | } | |
237 | ||
238 | static int | |
239 | nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb, | |
240 | struct drm_file *file_priv, | |
241 | unsigned int *handle) | |
242 | { | |
243 | struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb); | |
244 | ||
55fb74ad | 245 | return drm_gem_handle_create(file_priv, &fb->nvbo->gem, handle); |
6ee73861 BS |
246 | } |
247 | ||
248 | static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = { | |
249 | .destroy = nouveau_user_framebuffer_destroy, | |
250 | .create_handle = nouveau_user_framebuffer_create_handle, | |
251 | }; | |
252 | ||
38651674 | 253 | int |
1608a0fb BS |
254 | nouveau_framebuffer_new(struct drm_device *dev, |
255 | const struct drm_mode_fb_cmd2 *mode_cmd, | |
256 | struct nouveau_bo *nvbo, | |
257 | struct nouveau_framebuffer **pfb) | |
6ee73861 | 258 | { |
ab0af559 | 259 | struct nouveau_display *disp = nouveau_display(dev); |
1608a0fb | 260 | struct nouveau_framebuffer *fb; |
6ee73861 BS |
261 | int ret; |
262 | ||
1608a0fb BS |
263 | if (!(fb = kzalloc(sizeof(*fb), GFP_KERNEL))) |
264 | return -ENOMEM; | |
45c4e0aa | 265 | |
1608a0fb BS |
266 | drm_helper_mode_fill_fb_struct(&fb->base, mode_cmd); |
267 | fb->nvbo = nvbo; | |
ab0af559 | 268 | |
1608a0fb BS |
269 | ret = drm_framebuffer_init(dev, &fb->base, &nouveau_framebuffer_funcs); |
270 | if (ret == 0) { | |
271 | if (!disp->fb_ctor || !(ret = disp->fb_ctor(&fb->base))) { | |
272 | *pfb = fb; | |
273 | return 0; | |
274 | } | |
275 | disp->fb_dtor(&fb->base); | |
276 | drm_framebuffer_cleanup(&fb->base); | |
c7d73f6a DV |
277 | } |
278 | ||
1608a0fb | 279 | kfree(fb); |
ab0af559 | 280 | return ret; |
6ee73861 BS |
281 | } |
282 | ||
839ca903 | 283 | struct drm_framebuffer * |
6ee73861 BS |
284 | nouveau_user_framebuffer_create(struct drm_device *dev, |
285 | struct drm_file *file_priv, | |
1eb83451 | 286 | const struct drm_mode_fb_cmd2 *mode_cmd) |
6ee73861 | 287 | { |
1608a0fb BS |
288 | struct nouveau_framebuffer *fb; |
289 | struct nouveau_bo *nvbo; | |
6ee73861 | 290 | struct drm_gem_object *gem; |
1608a0fb | 291 | int ret; |
6ee73861 | 292 | |
a8ad0bd8 | 293 | gem = drm_gem_object_lookup(file_priv, mode_cmd->handles[0]); |
6ee73861 | 294 | if (!gem) |
cce13ff7 | 295 | return ERR_PTR(-ENOENT); |
1608a0fb | 296 | nvbo = nouveau_gem_object(gem); |
6ee73861 | 297 | |
1608a0fb BS |
298 | ret = nouveau_framebuffer_new(dev, mode_cmd, nvbo, &fb); |
299 | if (ret == 0) | |
300 | return &fb->base; | |
fdfb8332 | 301 | |
e889c244 | 302 | drm_gem_object_unreference_unlocked(gem); |
fdfb8332 | 303 | return ERR_PTR(ret); |
6ee73861 BS |
304 | } |
305 | ||
27d5030a | 306 | static const struct drm_mode_config_funcs nouveau_mode_config_funcs = { |
6ee73861 | 307 | .fb_create = nouveau_user_framebuffer_create, |
eb1f8e4f | 308 | .output_poll_changed = nouveau_fbcon_output_poll_changed, |
6ee73861 BS |
309 | }; |
310 | ||
b29caa58 | 311 | |
4a67d391 | 312 | struct nouveau_drm_prop_enum_list { |
de691855 | 313 | u8 gen_mask; |
b29caa58 BS |
314 | int type; |
315 | char *name; | |
316 | }; | |
317 | ||
4a67d391 | 318 | static struct nouveau_drm_prop_enum_list underscan[] = { |
92854622 BS |
319 | { 6, UNDERSCAN_AUTO, "auto" }, |
320 | { 6, UNDERSCAN_OFF, "off" }, | |
321 | { 6, UNDERSCAN_ON, "on" }, | |
de691855 | 322 | {} |
b29caa58 BS |
323 | }; |
324 | ||
4a67d391 | 325 | static struct nouveau_drm_prop_enum_list dither_mode[] = { |
de691855 BS |
326 | { 7, DITHERING_MODE_AUTO, "auto" }, |
327 | { 7, DITHERING_MODE_OFF, "off" }, | |
328 | { 1, DITHERING_MODE_ON, "on" }, | |
329 | { 6, DITHERING_MODE_STATIC2X2, "static 2x2" }, | |
330 | { 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" }, | |
331 | { 4, DITHERING_MODE_TEMPORAL, "temporal" }, | |
332 | {} | |
333 | }; | |
334 | ||
4a67d391 | 335 | static struct nouveau_drm_prop_enum_list dither_depth[] = { |
de691855 BS |
336 | { 6, DITHERING_DEPTH_AUTO, "auto" }, |
337 | { 6, DITHERING_DEPTH_6BPC, "6 bpc" }, | |
338 | { 6, DITHERING_DEPTH_8BPC, "8 bpc" }, | |
339 | {} | |
340 | }; | |
341 | ||
342 | #define PROP_ENUM(p,gen,n,list) do { \ | |
4a67d391 | 343 | struct nouveau_drm_prop_enum_list *l = (list); \ |
de691855 BS |
344 | int c = 0; \ |
345 | while (l->gen_mask) { \ | |
346 | if (l->gen_mask & (1 << (gen))) \ | |
347 | c++; \ | |
348 | l++; \ | |
349 | } \ | |
350 | if (c) { \ | |
351 | p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c); \ | |
352 | l = (list); \ | |
353 | c = 0; \ | |
354 | while (p && l->gen_mask) { \ | |
355 | if (l->gen_mask & (1 << (gen))) { \ | |
356 | drm_property_add_enum(p, c, l->type, l->name); \ | |
357 | c++; \ | |
358 | } \ | |
359 | l++; \ | |
360 | } \ | |
361 | } \ | |
362 | } while(0) | |
363 | ||
f62b27db BS |
364 | int |
365 | nouveau_display_init(struct drm_device *dev) | |
366 | { | |
77145f1c | 367 | struct nouveau_display *disp = nouveau_display(dev); |
898a2b32 | 368 | struct nouveau_drm *drm = nouveau_drm(dev); |
52c4d767 | 369 | struct drm_connector *connector; |
f62b27db BS |
370 | int ret; |
371 | ||
372 | ret = disp->init(dev); | |
52c4d767 BS |
373 | if (ret) |
374 | return ret; | |
375 | ||
7df898b1 | 376 | /* enable polling for external displays */ |
52c4d767 BS |
377 | drm_kms_helper_poll_enable(dev); |
378 | ||
379 | /* enable hotplug interrupts */ | |
380 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
381 | struct nouveau_connector *conn = nouveau_connector(connector); | |
80bc340b | 382 | nvif_notify_get(&conn->hpd); |
f62b27db BS |
383 | } |
384 | ||
898a2b32 BS |
385 | /* enable flip completion events */ |
386 | nvif_notify_get(&drm->flip); | |
f62b27db BS |
387 | return ret; |
388 | } | |
389 | ||
390 | void | |
3b4c0abb | 391 | nouveau_display_fini(struct drm_device *dev, bool suspend) |
f62b27db | 392 | { |
77145f1c | 393 | struct nouveau_display *disp = nouveau_display(dev); |
898a2b32 | 394 | struct nouveau_drm *drm = nouveau_drm(dev); |
52c4d767 | 395 | struct drm_connector *connector; |
9cba5efa MK |
396 | int head; |
397 | ||
3b4c0abb BS |
398 | if (!suspend) |
399 | drm_crtc_force_disable_all(dev); | |
400 | ||
9cba5efa MK |
401 | /* Make sure that drm and hw vblank irqs get properly disabled. */ |
402 | for (head = 0; head < dev->mode_config.num_crtc; head++) | |
403 | drm_vblank_off(dev, head); | |
52c4d767 | 404 | |
898a2b32 BS |
405 | /* disable flip completion events */ |
406 | nvif_notify_put(&drm->flip); | |
407 | ||
52c4d767 BS |
408 | /* disable hotplug interrupts */ |
409 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
410 | struct nouveau_connector *conn = nouveau_connector(connector); | |
80bc340b | 411 | nvif_notify_put(&conn->hpd); |
52c4d767 | 412 | } |
f62b27db BS |
413 | |
414 | drm_kms_helper_poll_disable(dev); | |
415 | disp->fini(dev); | |
416 | } | |
417 | ||
9c210f37 BS |
418 | static void |
419 | nouveau_display_create_properties(struct drm_device *dev) | |
27d5030a | 420 | { |
9c210f37 BS |
421 | struct nouveau_display *disp = nouveau_display(dev); |
422 | int gen; | |
de691855 | 423 | |
648d4dfd | 424 | if (disp->disp.oclass < NV50_DISP) |
de691855 BS |
425 | gen = 0; |
426 | else | |
648d4dfd | 427 | if (disp->disp.oclass < GF110_DISP) |
de691855 BS |
428 | gen = 1; |
429 | else | |
430 | gen = 2; | |
431 | ||
432 | PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode); | |
433 | PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth); | |
434 | PROP_ENUM(disp->underscan_property, gen, "underscan", underscan); | |
b29caa58 BS |
435 | |
436 | disp->underscan_hborder_property = | |
d9bc3c02 | 437 | drm_property_create_range(dev, 0, "underscan hborder", 0, 128); |
b29caa58 BS |
438 | |
439 | disp->underscan_vborder_property = | |
d9bc3c02 | 440 | drm_property_create_range(dev, 0, "underscan vborder", 0, 128); |
b29caa58 | 441 | |
9c210f37 BS |
442 | if (gen < 1) |
443 | return; | |
df26bc9c | 444 | |
9c210f37 BS |
445 | /* -90..+90 */ |
446 | disp->vibrant_hue_property = | |
447 | drm_property_create_range(dev, 0, "vibrant hue", 0, 180); | |
448 | ||
449 | /* -100..+100 */ | |
450 | disp->color_vibrance_property = | |
451 | drm_property_create_range(dev, 0, "color vibrance", 0, 200); | |
452 | } | |
453 | ||
454 | int | |
455 | nouveau_display_create(struct drm_device *dev) | |
456 | { | |
457 | struct nouveau_drm *drm = nouveau_drm(dev); | |
7e8820fe | 458 | struct nvkm_device *device = nvxx_device(&drm->device); |
9c210f37 BS |
459 | struct nouveau_display *disp; |
460 | int ret; | |
461 | ||
462 | disp = drm->display = kzalloc(sizeof(*disp), GFP_KERNEL); | |
463 | if (!disp) | |
464 | return -ENOMEM; | |
465 | ||
466 | drm_mode_config_init(dev); | |
467 | drm_mode_create_scaling_mode_property(dev); | |
468 | drm_mode_create_dvi_i_properties(dev); | |
df26bc9c | 469 | |
e6ecefaa | 470 | dev->mode_config.funcs = &nouveau_mode_config_funcs; |
7e8820fe | 471 | dev->mode_config.fb_base = device->func->resource_addr(device, 1); |
27d5030a BS |
472 | |
473 | dev->mode_config.min_width = 0; | |
474 | dev->mode_config.min_height = 0; | |
967e7bde | 475 | if (drm->device.info.family < NV_DEVICE_INFO_V0_CELSIUS) { |
27d5030a BS |
476 | dev->mode_config.max_width = 2048; |
477 | dev->mode_config.max_height = 2048; | |
478 | } else | |
967e7bde | 479 | if (drm->device.info.family < NV_DEVICE_INFO_V0_TESLA) { |
27d5030a BS |
480 | dev->mode_config.max_width = 4096; |
481 | dev->mode_config.max_height = 4096; | |
5102ec3e IM |
482 | } else |
483 | if (drm->device.info.family < NV_DEVICE_INFO_V0_FERMI) { | |
27d5030a BS |
484 | dev->mode_config.max_width = 8192; |
485 | dev->mode_config.max_height = 8192; | |
5102ec3e IM |
486 | } else { |
487 | dev->mode_config.max_width = 16384; | |
488 | dev->mode_config.max_height = 16384; | |
27d5030a BS |
489 | } |
490 | ||
f1377998 DA |
491 | dev->mode_config.preferred_depth = 24; |
492 | dev->mode_config.prefer_shadow = 1; | |
493 | ||
967e7bde | 494 | if (drm->device.info.chipset < 0x11) |
b9d9dcda BS |
495 | dev->mode_config.async_page_flip = false; |
496 | else | |
497 | dev->mode_config.async_page_flip = true; | |
498 | ||
f62b27db BS |
499 | drm_kms_helper_poll_init(dev); |
500 | drm_kms_helper_poll_disable(dev); | |
501 | ||
771fa0e4 | 502 | if (nouveau_modeset != 2 && drm->vbios.dcb.entries) { |
2332b311 | 503 | static const u16 oclass[] = { |
fd47877f | 504 | GP104_DISP, |
f9d5cbb3 | 505 | GP100_DISP, |
db1eb528 | 506 | GM200_DISP, |
648d4dfd BS |
507 | GM107_DISP, |
508 | GK110_DISP, | |
509 | GK104_DISP, | |
510 | GF110_DISP, | |
511 | GT214_DISP, | |
512 | GT206_DISP, | |
513 | GT200_DISP, | |
514 | G82_DISP, | |
515 | NV50_DISP, | |
516 | NV04_DISP, | |
2332b311 BS |
517 | }; |
518 | int i; | |
519 | ||
520 | for (i = 0, ret = -ENODEV; ret && i < ARRAY_SIZE(oclass); i++) { | |
fcf3f91c BS |
521 | ret = nvif_object_init(&drm->device.object, 0, |
522 | oclass[i], NULL, 0, &disp->disp); | |
2332b311 BS |
523 | } |
524 | ||
525 | if (ret == 0) { | |
9c210f37 | 526 | nouveau_display_create_properties(dev); |
648d4dfd | 527 | if (disp->disp.oclass < NV50_DISP) |
2332b311 BS |
528 | ret = nv04_display_create(dev); |
529 | else | |
530 | ret = nv50_display_create(dev); | |
531 | } | |
fc162088 BS |
532 | } else { |
533 | ret = 0; | |
534 | } | |
9430738d | 535 | |
fc162088 BS |
536 | if (ret) |
537 | goto disp_create_err; | |
9430738d | 538 | |
07193f70 BS |
539 | drm_mode_config_reset(dev); |
540 | ||
fc162088 | 541 | if (dev->mode_config.num_crtc) { |
51cb4b39 | 542 | ret = nouveau_display_vblank_init(dev); |
fc162088 BS |
543 | if (ret) |
544 | goto vblank_err; | |
f62b27db BS |
545 | } |
546 | ||
fc162088 | 547 | nouveau_backlight_init(dev); |
5ace2c9d MS |
548 | return 0; |
549 | ||
550 | vblank_err: | |
77145f1c | 551 | disp->dtor(dev); |
5ace2c9d MS |
552 | disp_create_err: |
553 | drm_kms_helper_poll_fini(dev); | |
554 | drm_mode_config_cleanup(dev); | |
2a44e499 | 555 | return ret; |
27d5030a BS |
556 | } |
557 | ||
558 | void | |
559 | nouveau_display_destroy(struct drm_device *dev) | |
560 | { | |
77145f1c | 561 | struct nouveau_display *disp = nouveau_display(dev); |
27d5030a | 562 | |
77145f1c | 563 | nouveau_backlight_exit(dev); |
51cb4b39 | 564 | nouveau_display_vblank_fini(dev); |
f62b27db | 565 | |
d6bf2f37 BS |
566 | drm_kms_helper_poll_fini(dev); |
567 | drm_mode_config_cleanup(dev); | |
568 | ||
9430738d BS |
569 | if (disp->dtor) |
570 | disp->dtor(dev); | |
f62b27db | 571 | |
0ad72863 | 572 | nvif_object_fini(&disp->disp); |
2332b311 | 573 | |
77145f1c BS |
574 | nouveau_drm(dev)->display = NULL; |
575 | kfree(disp); | |
576 | } | |
577 | ||
b167db0e BS |
578 | static int |
579 | nouveau_atomic_disable_connector(struct drm_atomic_state *state, | |
580 | struct drm_connector *connector) | |
581 | { | |
582 | struct drm_connector_state *connector_state; | |
583 | struct drm_crtc *crtc; | |
584 | struct drm_crtc_state *crtc_state; | |
585 | struct drm_plane_state *plane_state; | |
586 | struct drm_plane *plane; | |
587 | int ret; | |
588 | ||
589 | if (!(crtc = connector->state->crtc)) | |
590 | return 0; | |
591 | ||
592 | connector_state = drm_atomic_get_connector_state(state, connector); | |
593 | if (IS_ERR(connector_state)) | |
594 | return PTR_ERR(connector_state); | |
595 | ||
596 | ret = drm_atomic_set_crtc_for_connector(connector_state, NULL); | |
597 | if (ret) | |
598 | return ret; | |
599 | ||
600 | crtc_state = drm_atomic_get_crtc_state(state, crtc); | |
601 | if (IS_ERR(crtc_state)) | |
602 | return PTR_ERR(crtc_state); | |
603 | ||
604 | ret = drm_atomic_set_mode_for_crtc(crtc_state, NULL); | |
605 | if (ret) | |
606 | return ret; | |
607 | ||
608 | crtc_state->active = false; | |
609 | ||
610 | drm_for_each_plane_mask(plane, connector->dev, crtc_state->plane_mask) { | |
611 | plane_state = drm_atomic_get_plane_state(state, plane); | |
612 | if (IS_ERR(plane_state)) | |
613 | return PTR_ERR(plane_state); | |
614 | ||
615 | ret = drm_atomic_set_crtc_for_plane(plane_state, NULL); | |
616 | if (ret) | |
617 | return ret; | |
618 | ||
619 | drm_atomic_set_fb_for_plane(plane_state, NULL); | |
620 | } | |
621 | ||
622 | return 0; | |
623 | } | |
624 | ||
625 | static int | |
626 | nouveau_atomic_disable(struct drm_device *dev, | |
627 | struct drm_modeset_acquire_ctx *ctx) | |
628 | { | |
629 | struct drm_atomic_state *state; | |
630 | struct drm_connector *connector; | |
631 | int ret; | |
632 | ||
633 | state = drm_atomic_state_alloc(dev); | |
634 | if (!state) | |
635 | return -ENOMEM; | |
636 | ||
637 | state->acquire_ctx = ctx; | |
638 | ||
639 | drm_for_each_connector(connector, dev) { | |
640 | ret = nouveau_atomic_disable_connector(state, connector); | |
641 | if (ret) | |
642 | break; | |
643 | } | |
644 | ||
645 | if (ret == 0) | |
646 | ret = drm_atomic_commit(state); | |
647 | drm_atomic_state_put(state); | |
648 | return ret; | |
649 | } | |
650 | ||
651 | static struct drm_atomic_state * | |
652 | nouveau_atomic_suspend(struct drm_device *dev) | |
653 | { | |
654 | struct drm_modeset_acquire_ctx ctx; | |
655 | struct drm_atomic_state *state; | |
656 | int ret; | |
657 | ||
658 | drm_modeset_acquire_init(&ctx, 0); | |
659 | ||
660 | retry: | |
661 | ret = drm_modeset_lock_all_ctx(dev, &ctx); | |
662 | if (ret < 0) { | |
663 | state = ERR_PTR(ret); | |
664 | goto unlock; | |
665 | } | |
666 | ||
667 | state = drm_atomic_helper_duplicate_state(dev, &ctx); | |
668 | if (IS_ERR(state)) | |
669 | goto unlock; | |
670 | ||
671 | ret = nouveau_atomic_disable(dev, &ctx); | |
672 | if (ret < 0) { | |
673 | drm_atomic_state_put(state); | |
674 | state = ERR_PTR(ret); | |
675 | goto unlock; | |
676 | } | |
677 | ||
678 | unlock: | |
679 | if (PTR_ERR(state) == -EDEADLK) { | |
680 | drm_modeset_backoff(&ctx); | |
681 | goto retry; | |
682 | } | |
683 | ||
684 | drm_modeset_drop_locks(&ctx); | |
685 | drm_modeset_acquire_fini(&ctx); | |
686 | return state; | |
687 | } | |
688 | ||
77145f1c | 689 | int |
6fbb702e | 690 | nouveau_display_suspend(struct drm_device *dev, bool runtime) |
77145f1c | 691 | { |
b167db0e | 692 | struct nouveau_display *disp = nouveau_display(dev); |
77145f1c BS |
693 | struct drm_crtc *crtc; |
694 | ||
b167db0e BS |
695 | if (dev->mode_config.funcs->atomic_commit) { |
696 | if (!runtime) { | |
697 | disp->suspend = nouveau_atomic_suspend(dev); | |
698 | if (IS_ERR(disp->suspend)) { | |
699 | int ret = PTR_ERR(disp->suspend); | |
700 | disp->suspend = NULL; | |
701 | return ret; | |
702 | } | |
703 | } | |
704 | ||
705 | nouveau_display_fini(dev, true); | |
706 | return 0; | |
707 | } | |
708 | ||
3b4c0abb | 709 | nouveau_display_fini(dev, true); |
77145f1c | 710 | |
77145f1c BS |
711 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { |
712 | struct nouveau_framebuffer *nouveau_fb; | |
713 | ||
f4510a27 | 714 | nouveau_fb = nouveau_framebuffer(crtc->primary->fb); |
77145f1c BS |
715 | if (!nouveau_fb || !nouveau_fb->nvbo) |
716 | continue; | |
717 | ||
718 | nouveau_bo_unpin(nouveau_fb->nvbo); | |
719 | } | |
720 | ||
721 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
722 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
5a560252 | 723 | if (nv_crtc->cursor.nvbo) { |
4dc63933 ML |
724 | if (nv_crtc->cursor.set_offset) |
725 | nouveau_bo_unmap(nv_crtc->cursor.nvbo); | |
5a560252 BS |
726 | nouveau_bo_unpin(nv_crtc->cursor.nvbo); |
727 | } | |
77145f1c BS |
728 | } |
729 | ||
730 | return 0; | |
731 | } | |
732 | ||
733 | void | |
6fbb702e | 734 | nouveau_display_resume(struct drm_device *dev, bool runtime) |
77145f1c | 735 | { |
b167db0e | 736 | struct nouveau_display *disp = nouveau_display(dev); |
77145f1c BS |
737 | struct nouveau_drm *drm = nouveau_drm(dev); |
738 | struct drm_crtc *crtc; | |
6fbb702e | 739 | int ret, head; |
77145f1c | 740 | |
b167db0e BS |
741 | if (dev->mode_config.funcs->atomic_commit) { |
742 | nouveau_display_init(dev); | |
743 | if (disp->suspend) { | |
744 | drm_atomic_helper_resume(dev, disp->suspend); | |
745 | disp->suspend = NULL; | |
746 | } | |
747 | return; | |
748 | } | |
749 | ||
6fbb702e | 750 | /* re-pin fb/cursors */ |
77145f1c BS |
751 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { |
752 | struct nouveau_framebuffer *nouveau_fb; | |
753 | ||
f4510a27 | 754 | nouveau_fb = nouveau_framebuffer(crtc->primary->fb); |
77145f1c BS |
755 | if (!nouveau_fb || !nouveau_fb->nvbo) |
756 | continue; | |
757 | ||
547ad072 | 758 | ret = nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM, true); |
c9a6fd97 BS |
759 | if (ret) |
760 | NV_ERROR(drm, "Could not pin framebuffer\n"); | |
77145f1c BS |
761 | } |
762 | ||
763 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
764 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
5a560252 BS |
765 | if (!nv_crtc->cursor.nvbo) |
766 | continue; | |
77145f1c | 767 | |
547ad072 | 768 | ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM, true); |
4dc63933 | 769 | if (!ret && nv_crtc->cursor.set_offset) |
77145f1c BS |
770 | ret = nouveau_bo_map(nv_crtc->cursor.nvbo); |
771 | if (ret) | |
772 | NV_ERROR(drm, "Could not pin/map cursor.\n"); | |
773 | } | |
9cba5efa | 774 | |
77145f1c BS |
775 | nouveau_display_init(dev); |
776 | ||
777 | /* Force CLUT to get re-loaded during modeset */ | |
778 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
779 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
780 | ||
781 | nv_crtc->lut.depth = 0; | |
782 | } | |
783 | ||
6fbb702e BS |
784 | /* This should ensure we don't hit a locking problem when someone |
785 | * wakes us up via a connector. We should never go into suspend | |
786 | * while the display is on anyways. | |
787 | */ | |
788 | if (runtime) | |
789 | return; | |
790 | ||
77145f1c BS |
791 | drm_helper_resume_force_mode(dev); |
792 | ||
ff683df7 MK |
793 | /* Make sure that drm and hw vblank irqs get resumed if needed. */ |
794 | for (head = 0; head < dev->mode_config.num_crtc; head++) | |
795 | drm_vblank_on(dev, head); | |
796 | ||
77145f1c BS |
797 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { |
798 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
77145f1c | 799 | |
5a560252 | 800 | if (!nv_crtc->cursor.nvbo) |
036a12b6 | 801 | continue; |
4dc63933 ML |
802 | |
803 | if (nv_crtc->cursor.set_offset) | |
804 | nv_crtc->cursor.set_offset(nv_crtc, nv_crtc->cursor.nvbo->bo.offset); | |
77145f1c BS |
805 | nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x, |
806 | nv_crtc->cursor_saved_y); | |
807 | } | |
27d5030a BS |
808 | } |
809 | ||
332b242f FJ |
810 | static int |
811 | nouveau_page_flip_emit(struct nouveau_channel *chan, | |
812 | struct nouveau_bo *old_bo, | |
813 | struct nouveau_bo *new_bo, | |
814 | struct nouveau_page_flip_state *s, | |
815 | struct nouveau_fence **pfence) | |
816 | { | |
f589be88 | 817 | struct nouveau_fence_chan *fctx = chan->fence; |
77145f1c BS |
818 | struct nouveau_drm *drm = chan->drm; |
819 | struct drm_device *dev = drm->dev; | |
332b242f FJ |
820 | unsigned long flags; |
821 | int ret; | |
822 | ||
823 | /* Queue it to the pending list */ | |
824 | spin_lock_irqsave(&dev->event_lock, flags); | |
f589be88 | 825 | list_add_tail(&s->head, &fctx->flip); |
332b242f FJ |
826 | spin_unlock_irqrestore(&dev->event_lock, flags); |
827 | ||
828 | /* Synchronize with the old framebuffer */ | |
e3be4c23 | 829 | ret = nouveau_fence_sync(old_bo, chan, false, false); |
332b242f FJ |
830 | if (ret) |
831 | goto fail; | |
832 | ||
833 | /* Emit the pageflip */ | |
1e303c03 | 834 | ret = RING_SPACE(chan, 2); |
332b242f FJ |
835 | if (ret) |
836 | goto fail; | |
837 | ||
967e7bde | 838 | if (drm->device.info.family < NV_DEVICE_INFO_V0_FERMI) |
6d597027 | 839 | BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1); |
1e303c03 BS |
840 | else |
841 | BEGIN_NVC0(chan, FermiSw, NV_SW_PAGE_FLIP, 1); | |
842 | OUT_RING (chan, 0x00000000); | |
bd2f2037 | 843 | FIRE_RING (chan); |
332b242f | 844 | |
264ce192 | 845 | ret = nouveau_fence_new(chan, false, pfence); |
332b242f FJ |
846 | if (ret) |
847 | goto fail; | |
848 | ||
849 | return 0; | |
850 | fail: | |
851 | spin_lock_irqsave(&dev->event_lock, flags); | |
852 | list_del(&s->head); | |
853 | spin_unlock_irqrestore(&dev->event_lock, flags); | |
854 | return ret; | |
855 | } | |
856 | ||
857 | int | |
858 | nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb, | |
b9d9dcda | 859 | struct drm_pending_vblank_event *event, u32 flags) |
332b242f | 860 | { |
b9d9dcda | 861 | const int swap_interval = (flags & DRM_MODE_PAGE_FLIP_ASYNC) ? 0 : 1; |
332b242f | 862 | struct drm_device *dev = crtc->dev; |
77145f1c | 863 | struct nouveau_drm *drm = nouveau_drm(dev); |
f4510a27 | 864 | struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->primary->fb)->nvbo; |
332b242f FJ |
865 | struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo; |
866 | struct nouveau_page_flip_state *s; | |
0ad72863 BS |
867 | struct nouveau_channel *chan; |
868 | struct nouveau_cli *cli; | |
332b242f FJ |
869 | struct nouveau_fence *fence; |
870 | int ret; | |
871 | ||
0ad72863 BS |
872 | chan = drm->channel; |
873 | if (!chan) | |
332b242f | 874 | return -ENODEV; |
a01ca78c | 875 | cli = (void *)chan->user.client; |
332b242f FJ |
876 | |
877 | s = kzalloc(sizeof(*s), GFP_KERNEL); | |
878 | if (!s) | |
879 | return -ENOMEM; | |
880 | ||
d5c1e84b | 881 | if (new_bo != old_bo) { |
547ad072 | 882 | ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM, true); |
d5c1e84b ML |
883 | if (ret) |
884 | goto fail_free; | |
885 | } | |
886 | ||
0ad72863 | 887 | mutex_lock(&cli->mutex); |
dfd5e50e | 888 | ret = ttm_bo_reserve(&new_bo->bo, true, false, NULL); |
eae389f9 | 889 | if (ret) |
09c3de13 | 890 | goto fail_unpin; |
b580c9e2 | 891 | |
eae389f9 | 892 | /* synchronise rendering channel with the kernel's channel */ |
e3be4c23 | 893 | ret = nouveau_fence_sync(new_bo, chan, false, true); |
bdaf7ddf ML |
894 | if (ret) { |
895 | ttm_bo_unreserve(&new_bo->bo); | |
060810d7 | 896 | goto fail_unpin; |
bdaf7ddf | 897 | } |
b580c9e2 | 898 | |
bdaf7ddf ML |
899 | if (new_bo != old_bo) { |
900 | ttm_bo_unreserve(&new_bo->bo); | |
901 | ||
dfd5e50e | 902 | ret = ttm_bo_reserve(&old_bo->bo, true, false, NULL); |
bdaf7ddf ML |
903 | if (ret) |
904 | goto fail_unpin; | |
905 | } | |
b580c9e2 ML |
906 | |
907 | /* Initialize a page flip struct */ | |
908 | *s = (struct nouveau_page_flip_state) | |
dc4ff116 | 909 | { { }, event, crtc, fb->bits_per_pixel, fb->pitches[0], |
b580c9e2 ML |
910 | new_bo->bo.offset }; |
911 | ||
ba124a41 | 912 | /* Keep vblanks on during flip, for the target crtc of this flip */ |
dc4ff116 | 913 | drm_crtc_vblank_get(crtc); |
ba124a41 | 914 | |
332b242f | 915 | /* Emit a page flip */ |
967e7bde | 916 | if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) { |
b9d9dcda | 917 | ret = nv50_display_flip_next(crtc, fb, chan, swap_interval); |
060810d7 | 918 | if (ret) |
d7117e0d | 919 | goto fail_unreserve; |
78ae0ad4 BS |
920 | } else { |
921 | struct nv04_display *dispnv04 = nv04_display(dev); | |
b9d9dcda BS |
922 | int head = nouveau_crtc(crtc)->index; |
923 | ||
924 | if (swap_interval) { | |
925 | ret = RING_SPACE(chan, 8); | |
926 | if (ret) | |
927 | goto fail_unreserve; | |
928 | ||
929 | BEGIN_NV04(chan, NvSubImageBlit, 0x012c, 1); | |
930 | OUT_RING (chan, 0); | |
931 | BEGIN_NV04(chan, NvSubImageBlit, 0x0134, 1); | |
932 | OUT_RING (chan, head); | |
933 | BEGIN_NV04(chan, NvSubImageBlit, 0x0100, 1); | |
934 | OUT_RING (chan, 0); | |
935 | BEGIN_NV04(chan, NvSubImageBlit, 0x0130, 1); | |
936 | OUT_RING (chan, 0); | |
937 | } | |
938 | ||
939 | nouveau_bo_ref(new_bo, &dispnv04->image[head]); | |
d7117e0d BS |
940 | } |
941 | ||
332b242f | 942 | ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence); |
332b242f FJ |
943 | if (ret) |
944 | goto fail_unreserve; | |
0ad72863 | 945 | mutex_unlock(&cli->mutex); |
332b242f FJ |
946 | |
947 | /* Update the crtc struct and cleanup */ | |
f4510a27 | 948 | crtc->primary->fb = fb; |
332b242f | 949 | |
809e9447 | 950 | nouveau_bo_fence(old_bo, fence, false); |
07ad6ca0 | 951 | ttm_bo_unreserve(&old_bo->bo); |
060810d7 | 952 | if (old_bo != new_bo) |
b580c9e2 | 953 | nouveau_bo_unpin(old_bo); |
332b242f FJ |
954 | nouveau_fence_unref(&fence); |
955 | return 0; | |
956 | ||
957 | fail_unreserve: | |
dc4ff116 | 958 | drm_crtc_vblank_put(crtc); |
07ad6ca0 | 959 | ttm_bo_unreserve(&old_bo->bo); |
060810d7 | 960 | fail_unpin: |
0ad72863 | 961 | mutex_unlock(&cli->mutex); |
060810d7 | 962 | if (old_bo != new_bo) |
b580c9e2 | 963 | nouveau_bo_unpin(new_bo); |
332b242f FJ |
964 | fail_free: |
965 | kfree(s); | |
966 | return ret; | |
967 | } | |
968 | ||
969 | int | |
970 | nouveau_finish_page_flip(struct nouveau_channel *chan, | |
971 | struct nouveau_page_flip_state *ps) | |
972 | { | |
f589be88 | 973 | struct nouveau_fence_chan *fctx = chan->fence; |
77145f1c BS |
974 | struct nouveau_drm *drm = chan->drm; |
975 | struct drm_device *dev = drm->dev; | |
332b242f FJ |
976 | struct nouveau_page_flip_state *s; |
977 | unsigned long flags; | |
978 | ||
979 | spin_lock_irqsave(&dev->event_lock, flags); | |
980 | ||
f589be88 | 981 | if (list_empty(&fctx->flip)) { |
77145f1c | 982 | NV_ERROR(drm, "unexpected pageflip\n"); |
332b242f FJ |
983 | spin_unlock_irqrestore(&dev->event_lock, flags); |
984 | return -EINVAL; | |
985 | } | |
986 | ||
f589be88 | 987 | s = list_first_entry(&fctx->flip, struct nouveau_page_flip_state, head); |
af4870e4 | 988 | if (s->event) { |
bbc8764f | 989 | if (drm->device.info.family < NV_DEVICE_INFO_V0_TESLA) { |
dc4ff116 | 990 | drm_crtc_arm_vblank_event(s->crtc, s->event); |
bbc8764f | 991 | } else { |
dc4ff116 | 992 | drm_crtc_send_vblank_event(s->crtc, s->event); |
af4870e4 | 993 | |
bbc8764f | 994 | /* Give up ownership of vblank for page-flipped crtc */ |
dc4ff116 | 995 | drm_crtc_vblank_put(s->crtc); |
bbc8764f DV |
996 | } |
997 | } | |
998 | else { | |
999 | /* Give up ownership of vblank for page-flipped crtc */ | |
dc4ff116 | 1000 | drm_crtc_vblank_put(s->crtc); |
af4870e4 | 1001 | } |
ba124a41 | 1002 | |
332b242f | 1003 | list_del(&s->head); |
d7117e0d BS |
1004 | if (ps) |
1005 | *ps = *s; | |
332b242f FJ |
1006 | kfree(s); |
1007 | ||
1008 | spin_unlock_irqrestore(&dev->event_lock, flags); | |
1009 | return 0; | |
1010 | } | |
33dbc27f | 1011 | |
f589be88 | 1012 | int |
898a2b32 | 1013 | nouveau_flip_complete(struct nvif_notify *notify) |
f589be88 | 1014 | { |
898a2b32 BS |
1015 | struct nouveau_drm *drm = container_of(notify, typeof(*drm), flip); |
1016 | struct nouveau_channel *chan = drm->channel; | |
f589be88 BS |
1017 | struct nouveau_page_flip_state state; |
1018 | ||
1019 | if (!nouveau_finish_page_flip(chan, &state)) { | |
967e7bde | 1020 | if (drm->device.info.family < NV_DEVICE_INFO_V0_TESLA) { |
dc4ff116 GP |
1021 | nv_set_crtc_base(drm->dev, drm_crtc_index(state.crtc), |
1022 | state.offset + state.crtc->y * | |
1023 | state.pitch + state.crtc->x * | |
1024 | state.bpp / 8); | |
f589be88 BS |
1025 | } |
1026 | } | |
1027 | ||
898a2b32 | 1028 | return NVIF_NOTIFY_KEEP; |
f589be88 BS |
1029 | } |
1030 | ||
33dbc27f BS |
1031 | int |
1032 | nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev, | |
1033 | struct drm_mode_create_dumb *args) | |
1034 | { | |
1035 | struct nouveau_bo *bo; | |
eaecf032 | 1036 | uint32_t domain; |
33dbc27f BS |
1037 | int ret; |
1038 | ||
1039 | args->pitch = roundup(args->width * (args->bpp / 8), 256); | |
1040 | args->size = args->pitch * args->height; | |
1041 | args->size = roundup(args->size, PAGE_SIZE); | |
1042 | ||
eaecf032 AC |
1043 | /* Use VRAM if there is any ; otherwise fallback to system memory */ |
1044 | if (nouveau_drm(dev)->device.info.ram_size != 0) | |
1045 | domain = NOUVEAU_GEM_DOMAIN_VRAM; | |
1046 | else | |
1047 | domain = NOUVEAU_GEM_DOMAIN_GART; | |
1048 | ||
1049 | ret = nouveau_gem_new(dev, args->size, 0, domain, 0, 0, &bo); | |
33dbc27f BS |
1050 | if (ret) |
1051 | return ret; | |
1052 | ||
55fb74ad DH |
1053 | ret = drm_gem_handle_create(file_priv, &bo->gem, &args->handle); |
1054 | drm_gem_object_unreference_unlocked(&bo->gem); | |
33dbc27f BS |
1055 | return ret; |
1056 | } | |
1057 | ||
33dbc27f BS |
1058 | int |
1059 | nouveau_display_dumb_map_offset(struct drm_file *file_priv, | |
1060 | struct drm_device *dev, | |
1061 | uint32_t handle, uint64_t *poffset) | |
1062 | { | |
1063 | struct drm_gem_object *gem; | |
1064 | ||
a8ad0bd8 | 1065 | gem = drm_gem_object_lookup(file_priv, handle); |
33dbc27f | 1066 | if (gem) { |
55fb74ad | 1067 | struct nouveau_bo *bo = nouveau_gem_object(gem); |
72525b3f | 1068 | *poffset = drm_vma_node_offset_addr(&bo->bo.vma_node); |
33dbc27f BS |
1069 | drm_gem_object_unreference_unlocked(gem); |
1070 | return 0; | |
1071 | } | |
1072 | ||
1073 | return -ENOENT; | |
1074 | } |