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6ee73861 BS |
1 | /* |
2 | * Copyright (C) 2008 Maarten Maathuis. | |
3 | * All Rights Reserved. | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining | |
6 | * a copy of this software and associated documentation files (the | |
7 | * "Software"), to deal in the Software without restriction, including | |
8 | * without limitation the rights to use, copy, modify, merge, publish, | |
9 | * distribute, sublicense, and/or sell copies of the Software, and to | |
10 | * permit persons to whom the Software is furnished to do so, subject to | |
11 | * the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice (including the | |
14 | * next paragraph) shall be included in all copies or substantial | |
15 | * portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
18 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
19 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. | |
20 | * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE | |
21 | * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION | |
22 | * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION | |
23 | * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. | |
24 | * | |
25 | */ | |
26 | ||
760285e7 DH |
27 | #include <drm/drmP.h> |
28 | #include <drm/drm_crtc_helper.h> | |
77145f1c | 29 | |
fdb751ef BS |
30 | #include <nvif/class.h> |
31 | ||
6ee73861 | 32 | #include "nouveau_fbcon.h" |
1a646342 | 33 | #include "dispnv04/hw.h" |
332b242f FJ |
34 | #include "nouveau_crtc.h" |
35 | #include "nouveau_dma.h" | |
77145f1c | 36 | #include "nouveau_gem.h" |
de691855 | 37 | #include "nouveau_connector.h" |
45c4e0aa | 38 | #include "nv50_display.h" |
6ee73861 | 39 | |
ebb945a9 BS |
40 | #include "nouveau_fence.h" |
41 | ||
79ca2770 | 42 | #include <nvif/event.h> |
1d7c71a3 | 43 | |
51cb4b39 | 44 | static int |
80bc340b | 45 | nouveau_display_vblank_handler(struct nvif_notify *notify) |
51cb4b39 | 46 | { |
79ca2770 BS |
47 | struct nouveau_crtc *nv_crtc = |
48 | container_of(notify, typeof(*nv_crtc), vblank); | |
b12f0ae9 | 49 | drm_handle_vblank(nv_crtc->base.dev, nv_crtc->index); |
80bc340b | 50 | return NVIF_NOTIFY_KEEP; |
51cb4b39 BS |
51 | } |
52 | ||
53 | int | |
54 | nouveau_display_vblank_enable(struct drm_device *dev, int head) | |
55 | { | |
b12f0ae9 BS |
56 | struct drm_crtc *crtc; |
57 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
58 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
59 | if (nv_crtc->index == head) { | |
80bc340b | 60 | nvif_notify_get(&nv_crtc->vblank); |
b12f0ae9 BS |
61 | return 0; |
62 | } | |
51cb4b39 | 63 | } |
b12f0ae9 | 64 | return -EINVAL; |
51cb4b39 BS |
65 | } |
66 | ||
67 | void | |
68 | nouveau_display_vblank_disable(struct drm_device *dev, int head) | |
69 | { | |
b12f0ae9 BS |
70 | struct drm_crtc *crtc; |
71 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
72 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
73 | if (nv_crtc->index == head) { | |
80bc340b | 74 | nvif_notify_put(&nv_crtc->vblank); |
b12f0ae9 BS |
75 | return; |
76 | } | |
77 | } | |
51cb4b39 BS |
78 | } |
79 | ||
d83ef853 BS |
80 | static inline int |
81 | calc(int blanks, int blanke, int total, int line) | |
82 | { | |
83 | if (blanke >= blanks) { | |
84 | if (line >= blanks) | |
85 | line -= total; | |
86 | } else { | |
87 | if (line >= blanks) | |
88 | line -= total; | |
89 | line -= blanke + 1; | |
90 | } | |
91 | return line; | |
92 | } | |
93 | ||
94 | int | |
95 | nouveau_display_scanoutpos_head(struct drm_crtc *crtc, int *vpos, int *hpos, | |
96 | ktime_t *stime, ktime_t *etime) | |
97 | { | |
4952b4d3 BS |
98 | struct { |
99 | struct nv04_disp_mthd_v0 base; | |
100 | struct nv04_disp_scanoutpos_v0 scan; | |
101 | } args = { | |
102 | .base.method = NV04_DISP_SCANOUTPOS, | |
103 | .base.head = nouveau_crtc(crtc)->index, | |
104 | }; | |
d83ef853 | 105 | struct nouveau_display *disp = nouveau_display(crtc->dev); |
d83ef853 BS |
106 | int ret, retry = 1; |
107 | ||
108 | do { | |
4952b4d3 | 109 | ret = nvif_mthd(&disp->disp, 0, &args, sizeof(args)); |
d83ef853 BS |
110 | if (ret != 0) |
111 | return 0; | |
112 | ||
4952b4d3 | 113 | if (args.scan.vline) { |
d83ef853 BS |
114 | ret |= DRM_SCANOUTPOS_ACCURATE; |
115 | ret |= DRM_SCANOUTPOS_VALID; | |
116 | break; | |
117 | } | |
118 | ||
119 | if (retry) ndelay(crtc->linedur_ns); | |
120 | } while (retry--); | |
121 | ||
4952b4d3 BS |
122 | *hpos = args.scan.hline; |
123 | *vpos = calc(args.scan.vblanks, args.scan.vblanke, | |
124 | args.scan.vtotal, args.scan.vline); | |
125 | if (stime) *stime = ns_to_ktime(args.scan.time[0]); | |
126 | if (etime) *etime = ns_to_ktime(args.scan.time[1]); | |
d83ef853 BS |
127 | |
128 | if (*vpos < 0) | |
3d3cbd84 | 129 | ret |= DRM_SCANOUTPOS_IN_VBLANK; |
d83ef853 BS |
130 | return ret; |
131 | } | |
132 | ||
133 | int | |
134 | nouveau_display_scanoutpos(struct drm_device *dev, int head, unsigned int flags, | |
135 | int *vpos, int *hpos, ktime_t *stime, ktime_t *etime) | |
136 | { | |
137 | struct drm_crtc *crtc; | |
138 | ||
139 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
140 | if (nouveau_crtc(crtc)->index == head) { | |
141 | return nouveau_display_scanoutpos_head(crtc, vpos, hpos, | |
142 | stime, etime); | |
143 | } | |
144 | } | |
145 | ||
146 | return 0; | |
147 | } | |
148 | ||
149 | int | |
150 | nouveau_display_vblstamp(struct drm_device *dev, int head, int *max_error, | |
151 | struct timeval *time, unsigned flags) | |
152 | { | |
153 | struct drm_crtc *crtc; | |
154 | ||
155 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
156 | if (nouveau_crtc(crtc)->index == head) { | |
157 | return drm_calc_vbltimestamp_from_scanoutpos(dev, | |
158 | head, max_error, time, flags, crtc, | |
159 | &crtc->hwmode); | |
160 | } | |
161 | } | |
162 | ||
163 | return -EINVAL; | |
164 | } | |
165 | ||
51cb4b39 BS |
166 | static void |
167 | nouveau_display_vblank_fini(struct drm_device *dev) | |
168 | { | |
b12f0ae9 | 169 | struct drm_crtc *crtc; |
51cb4b39 | 170 | |
1139ffb9 BS |
171 | drm_vblank_cleanup(dev); |
172 | ||
b12f0ae9 BS |
173 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { |
174 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
80bc340b | 175 | nvif_notify_fini(&nv_crtc->vblank); |
51cb4b39 | 176 | } |
51cb4b39 BS |
177 | } |
178 | ||
179 | static int | |
180 | nouveau_display_vblank_init(struct drm_device *dev) | |
181 | { | |
80bc340b | 182 | struct nouveau_display *disp = nouveau_display(dev); |
b12f0ae9 BS |
183 | struct drm_crtc *crtc; |
184 | int ret; | |
51cb4b39 | 185 | |
b12f0ae9 BS |
186 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { |
187 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
80bc340b | 188 | ret = nvif_notify_init(&disp->disp, NULL, |
79ca2770 | 189 | nouveau_display_vblank_handler, false, |
80bc340b | 190 | NV04_DISP_NTFY_VBLANK, |
79ca2770 BS |
191 | &(struct nvif_notify_head_req_v0) { |
192 | .head = nv_crtc->index, | |
193 | }, | |
194 | sizeof(struct nvif_notify_head_req_v0), | |
195 | sizeof(struct nvif_notify_head_rep_v0), | |
196 | &nv_crtc->vblank); | |
51cb4b39 BS |
197 | if (ret) { |
198 | nouveau_display_vblank_fini(dev); | |
199 | return ret; | |
200 | } | |
201 | } | |
202 | ||
203 | ret = drm_vblank_init(dev, dev->mode_config.num_crtc); | |
204 | if (ret) { | |
205 | nouveau_display_vblank_fini(dev); | |
206 | return ret; | |
207 | } | |
208 | ||
209 | return 0; | |
210 | } | |
211 | ||
6ee73861 BS |
212 | static void |
213 | nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb) | |
214 | { | |
215 | struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb); | |
ab0af559 BS |
216 | struct nouveau_display *disp = nouveau_display(drm_fb->dev); |
217 | ||
218 | if (disp->fb_dtor) | |
219 | disp->fb_dtor(drm_fb); | |
6ee73861 | 220 | |
bc9025bd | 221 | if (fb->nvbo) |
55fb74ad | 222 | drm_gem_object_unreference_unlocked(&fb->nvbo->gem); |
6ee73861 BS |
223 | |
224 | drm_framebuffer_cleanup(drm_fb); | |
225 | kfree(fb); | |
226 | } | |
227 | ||
228 | static int | |
229 | nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb, | |
230 | struct drm_file *file_priv, | |
231 | unsigned int *handle) | |
232 | { | |
233 | struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb); | |
234 | ||
55fb74ad | 235 | return drm_gem_handle_create(file_priv, &fb->nvbo->gem, handle); |
6ee73861 BS |
236 | } |
237 | ||
238 | static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = { | |
239 | .destroy = nouveau_user_framebuffer_destroy, | |
240 | .create_handle = nouveau_user_framebuffer_create_handle, | |
241 | }; | |
242 | ||
38651674 | 243 | int |
45c4e0aa BS |
244 | nouveau_framebuffer_init(struct drm_device *dev, |
245 | struct nouveau_framebuffer *nv_fb, | |
308e5bcb | 246 | struct drm_mode_fb_cmd2 *mode_cmd, |
45c4e0aa | 247 | struct nouveau_bo *nvbo) |
6ee73861 | 248 | { |
ab0af559 | 249 | struct nouveau_display *disp = nouveau_display(dev); |
45c4e0aa | 250 | struct drm_framebuffer *fb = &nv_fb->base; |
6ee73861 BS |
251 | int ret; |
252 | ||
45c4e0aa BS |
253 | drm_helper_mode_fill_fb_struct(fb, mode_cmd); |
254 | nv_fb->nvbo = nvbo; | |
255 | ||
c7d73f6a | 256 | ret = drm_framebuffer_init(dev, fb, &nouveau_framebuffer_funcs); |
ab0af559 | 257 | if (ret) |
c7d73f6a | 258 | return ret; |
ab0af559 BS |
259 | |
260 | if (disp->fb_ctor) { | |
261 | ret = disp->fb_ctor(fb); | |
262 | if (ret) | |
263 | disp->fb_dtor(fb); | |
c7d73f6a DV |
264 | } |
265 | ||
ab0af559 | 266 | return ret; |
6ee73861 BS |
267 | } |
268 | ||
269 | static struct drm_framebuffer * | |
270 | nouveau_user_framebuffer_create(struct drm_device *dev, | |
271 | struct drm_file *file_priv, | |
308e5bcb | 272 | struct drm_mode_fb_cmd2 *mode_cmd) |
6ee73861 | 273 | { |
38651674 | 274 | struct nouveau_framebuffer *nouveau_fb; |
6ee73861 | 275 | struct drm_gem_object *gem; |
fdfb8332 | 276 | int ret = -ENOMEM; |
6ee73861 | 277 | |
308e5bcb | 278 | gem = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]); |
6ee73861 | 279 | if (!gem) |
cce13ff7 | 280 | return ERR_PTR(-ENOENT); |
6ee73861 | 281 | |
38651674 DA |
282 | nouveau_fb = kzalloc(sizeof(struct nouveau_framebuffer), GFP_KERNEL); |
283 | if (!nouveau_fb) | |
fdfb8332 | 284 | goto err_unref; |
38651674 DA |
285 | |
286 | ret = nouveau_framebuffer_init(dev, nouveau_fb, mode_cmd, nouveau_gem_object(gem)); | |
fdfb8332 ML |
287 | if (ret) |
288 | goto err; | |
6ee73861 | 289 | |
38651674 | 290 | return &nouveau_fb->base; |
fdfb8332 ML |
291 | |
292 | err: | |
293 | kfree(nouveau_fb); | |
294 | err_unref: | |
295 | drm_gem_object_unreference(gem); | |
296 | return ERR_PTR(ret); | |
6ee73861 BS |
297 | } |
298 | ||
27d5030a | 299 | static const struct drm_mode_config_funcs nouveau_mode_config_funcs = { |
6ee73861 | 300 | .fb_create = nouveau_user_framebuffer_create, |
eb1f8e4f | 301 | .output_poll_changed = nouveau_fbcon_output_poll_changed, |
6ee73861 BS |
302 | }; |
303 | ||
b29caa58 | 304 | |
4a67d391 | 305 | struct nouveau_drm_prop_enum_list { |
de691855 | 306 | u8 gen_mask; |
b29caa58 BS |
307 | int type; |
308 | char *name; | |
309 | }; | |
310 | ||
4a67d391 | 311 | static struct nouveau_drm_prop_enum_list underscan[] = { |
92854622 BS |
312 | { 6, UNDERSCAN_AUTO, "auto" }, |
313 | { 6, UNDERSCAN_OFF, "off" }, | |
314 | { 6, UNDERSCAN_ON, "on" }, | |
de691855 | 315 | {} |
b29caa58 BS |
316 | }; |
317 | ||
4a67d391 | 318 | static struct nouveau_drm_prop_enum_list dither_mode[] = { |
de691855 BS |
319 | { 7, DITHERING_MODE_AUTO, "auto" }, |
320 | { 7, DITHERING_MODE_OFF, "off" }, | |
321 | { 1, DITHERING_MODE_ON, "on" }, | |
322 | { 6, DITHERING_MODE_STATIC2X2, "static 2x2" }, | |
323 | { 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" }, | |
324 | { 4, DITHERING_MODE_TEMPORAL, "temporal" }, | |
325 | {} | |
326 | }; | |
327 | ||
4a67d391 | 328 | static struct nouveau_drm_prop_enum_list dither_depth[] = { |
de691855 BS |
329 | { 6, DITHERING_DEPTH_AUTO, "auto" }, |
330 | { 6, DITHERING_DEPTH_6BPC, "6 bpc" }, | |
331 | { 6, DITHERING_DEPTH_8BPC, "8 bpc" }, | |
332 | {} | |
333 | }; | |
334 | ||
335 | #define PROP_ENUM(p,gen,n,list) do { \ | |
4a67d391 | 336 | struct nouveau_drm_prop_enum_list *l = (list); \ |
de691855 BS |
337 | int c = 0; \ |
338 | while (l->gen_mask) { \ | |
339 | if (l->gen_mask & (1 << (gen))) \ | |
340 | c++; \ | |
341 | l++; \ | |
342 | } \ | |
343 | if (c) { \ | |
344 | p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c); \ | |
345 | l = (list); \ | |
346 | c = 0; \ | |
347 | while (p && l->gen_mask) { \ | |
348 | if (l->gen_mask & (1 << (gen))) { \ | |
349 | drm_property_add_enum(p, c, l->type, l->name); \ | |
350 | c++; \ | |
351 | } \ | |
352 | l++; \ | |
353 | } \ | |
354 | } \ | |
355 | } while(0) | |
356 | ||
f62b27db BS |
357 | int |
358 | nouveau_display_init(struct drm_device *dev) | |
359 | { | |
77145f1c | 360 | struct nouveau_display *disp = nouveau_display(dev); |
52c4d767 | 361 | struct drm_connector *connector; |
f62b27db BS |
362 | int ret; |
363 | ||
364 | ret = disp->init(dev); | |
52c4d767 BS |
365 | if (ret) |
366 | return ret; | |
367 | ||
7df898b1 | 368 | /* enable polling for external displays */ |
52c4d767 BS |
369 | drm_kms_helper_poll_enable(dev); |
370 | ||
371 | /* enable hotplug interrupts */ | |
372 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
373 | struct nouveau_connector *conn = nouveau_connector(connector); | |
80bc340b | 374 | nvif_notify_get(&conn->hpd); |
f62b27db BS |
375 | } |
376 | ||
377 | return ret; | |
378 | } | |
379 | ||
380 | void | |
381 | nouveau_display_fini(struct drm_device *dev) | |
382 | { | |
77145f1c | 383 | struct nouveau_display *disp = nouveau_display(dev); |
52c4d767 | 384 | struct drm_connector *connector; |
9cba5efa MK |
385 | int head; |
386 | ||
387 | /* Make sure that drm and hw vblank irqs get properly disabled. */ | |
388 | for (head = 0; head < dev->mode_config.num_crtc; head++) | |
389 | drm_vblank_off(dev, head); | |
52c4d767 BS |
390 | |
391 | /* disable hotplug interrupts */ | |
392 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
393 | struct nouveau_connector *conn = nouveau_connector(connector); | |
80bc340b | 394 | nvif_notify_put(&conn->hpd); |
52c4d767 | 395 | } |
f62b27db BS |
396 | |
397 | drm_kms_helper_poll_disable(dev); | |
398 | disp->fini(dev); | |
399 | } | |
400 | ||
9c210f37 BS |
401 | static void |
402 | nouveau_display_create_properties(struct drm_device *dev) | |
27d5030a | 403 | { |
9c210f37 BS |
404 | struct nouveau_display *disp = nouveau_display(dev); |
405 | int gen; | |
de691855 | 406 | |
648d4dfd | 407 | if (disp->disp.oclass < NV50_DISP) |
de691855 BS |
408 | gen = 0; |
409 | else | |
648d4dfd | 410 | if (disp->disp.oclass < GF110_DISP) |
de691855 BS |
411 | gen = 1; |
412 | else | |
413 | gen = 2; | |
414 | ||
415 | PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode); | |
416 | PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth); | |
417 | PROP_ENUM(disp->underscan_property, gen, "underscan", underscan); | |
b29caa58 BS |
418 | |
419 | disp->underscan_hborder_property = | |
d9bc3c02 | 420 | drm_property_create_range(dev, 0, "underscan hborder", 0, 128); |
b29caa58 BS |
421 | |
422 | disp->underscan_vborder_property = | |
d9bc3c02 | 423 | drm_property_create_range(dev, 0, "underscan vborder", 0, 128); |
b29caa58 | 424 | |
9c210f37 BS |
425 | if (gen < 1) |
426 | return; | |
df26bc9c | 427 | |
9c210f37 BS |
428 | /* -90..+90 */ |
429 | disp->vibrant_hue_property = | |
430 | drm_property_create_range(dev, 0, "vibrant hue", 0, 180); | |
431 | ||
432 | /* -100..+100 */ | |
433 | disp->color_vibrance_property = | |
434 | drm_property_create_range(dev, 0, "color vibrance", 0, 200); | |
435 | } | |
436 | ||
437 | int | |
438 | nouveau_display_create(struct drm_device *dev) | |
439 | { | |
440 | struct nouveau_drm *drm = nouveau_drm(dev); | |
9c210f37 BS |
441 | struct nouveau_display *disp; |
442 | int ret; | |
443 | ||
444 | disp = drm->display = kzalloc(sizeof(*disp), GFP_KERNEL); | |
445 | if (!disp) | |
446 | return -ENOMEM; | |
447 | ||
448 | drm_mode_config_init(dev); | |
449 | drm_mode_create_scaling_mode_property(dev); | |
450 | drm_mode_create_dvi_i_properties(dev); | |
df26bc9c | 451 | |
e6ecefaa | 452 | dev->mode_config.funcs = &nouveau_mode_config_funcs; |
967e7bde | 453 | dev->mode_config.fb_base = nv_device_resource_start(nvkm_device(&drm->device), 1); |
27d5030a BS |
454 | |
455 | dev->mode_config.min_width = 0; | |
456 | dev->mode_config.min_height = 0; | |
967e7bde | 457 | if (drm->device.info.family < NV_DEVICE_INFO_V0_CELSIUS) { |
27d5030a BS |
458 | dev->mode_config.max_width = 2048; |
459 | dev->mode_config.max_height = 2048; | |
460 | } else | |
967e7bde | 461 | if (drm->device.info.family < NV_DEVICE_INFO_V0_TESLA) { |
27d5030a BS |
462 | dev->mode_config.max_width = 4096; |
463 | dev->mode_config.max_height = 4096; | |
464 | } else { | |
465 | dev->mode_config.max_width = 8192; | |
466 | dev->mode_config.max_height = 8192; | |
467 | } | |
468 | ||
f1377998 DA |
469 | dev->mode_config.preferred_depth = 24; |
470 | dev->mode_config.prefer_shadow = 1; | |
471 | ||
967e7bde | 472 | if (drm->device.info.chipset < 0x11) |
b9d9dcda BS |
473 | dev->mode_config.async_page_flip = false; |
474 | else | |
475 | dev->mode_config.async_page_flip = true; | |
476 | ||
f62b27db BS |
477 | drm_kms_helper_poll_init(dev); |
478 | drm_kms_helper_poll_disable(dev); | |
479 | ||
771fa0e4 | 480 | if (nouveau_modeset != 2 && drm->vbios.dcb.entries) { |
2332b311 | 481 | static const u16 oclass[] = { |
dbbd6bcf | 482 | GM204_DISP, |
648d4dfd BS |
483 | GM107_DISP, |
484 | GK110_DISP, | |
485 | GK104_DISP, | |
486 | GF110_DISP, | |
487 | GT214_DISP, | |
488 | GT206_DISP, | |
489 | GT200_DISP, | |
490 | G82_DISP, | |
491 | NV50_DISP, | |
492 | NV04_DISP, | |
2332b311 BS |
493 | }; |
494 | int i; | |
495 | ||
496 | for (i = 0, ret = -ENODEV; ret && i < ARRAY_SIZE(oclass); i++) { | |
0ad72863 BS |
497 | ret = nvif_object_init(nvif_object(&drm->device), NULL, |
498 | NVDRM_DISPLAY, oclass[i], | |
499 | NULL, 0, &disp->disp); | |
2332b311 BS |
500 | } |
501 | ||
502 | if (ret == 0) { | |
9c210f37 | 503 | nouveau_display_create_properties(dev); |
648d4dfd | 504 | if (disp->disp.oclass < NV50_DISP) |
2332b311 BS |
505 | ret = nv04_display_create(dev); |
506 | else | |
507 | ret = nv50_display_create(dev); | |
508 | } | |
fc162088 BS |
509 | } else { |
510 | ret = 0; | |
511 | } | |
9430738d | 512 | |
fc162088 BS |
513 | if (ret) |
514 | goto disp_create_err; | |
9430738d | 515 | |
fc162088 | 516 | if (dev->mode_config.num_crtc) { |
51cb4b39 | 517 | ret = nouveau_display_vblank_init(dev); |
fc162088 BS |
518 | if (ret) |
519 | goto vblank_err; | |
f62b27db BS |
520 | } |
521 | ||
fc162088 | 522 | nouveau_backlight_init(dev); |
5ace2c9d MS |
523 | return 0; |
524 | ||
525 | vblank_err: | |
77145f1c | 526 | disp->dtor(dev); |
5ace2c9d MS |
527 | disp_create_err: |
528 | drm_kms_helper_poll_fini(dev); | |
529 | drm_mode_config_cleanup(dev); | |
2a44e499 | 530 | return ret; |
27d5030a BS |
531 | } |
532 | ||
533 | void | |
534 | nouveau_display_destroy(struct drm_device *dev) | |
535 | { | |
77145f1c | 536 | struct nouveau_display *disp = nouveau_display(dev); |
27d5030a | 537 | |
77145f1c | 538 | nouveau_backlight_exit(dev); |
51cb4b39 | 539 | nouveau_display_vblank_fini(dev); |
f62b27db | 540 | |
d6bf2f37 BS |
541 | drm_kms_helper_poll_fini(dev); |
542 | drm_mode_config_cleanup(dev); | |
543 | ||
9430738d BS |
544 | if (disp->dtor) |
545 | disp->dtor(dev); | |
f62b27db | 546 | |
0ad72863 | 547 | nvif_object_fini(&disp->disp); |
2332b311 | 548 | |
77145f1c BS |
549 | nouveau_drm(dev)->display = NULL; |
550 | kfree(disp); | |
551 | } | |
552 | ||
553 | int | |
6fbb702e | 554 | nouveau_display_suspend(struct drm_device *dev, bool runtime) |
77145f1c | 555 | { |
77145f1c BS |
556 | struct drm_crtc *crtc; |
557 | ||
558 | nouveau_display_fini(dev); | |
559 | ||
77145f1c BS |
560 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { |
561 | struct nouveau_framebuffer *nouveau_fb; | |
562 | ||
f4510a27 | 563 | nouveau_fb = nouveau_framebuffer(crtc->primary->fb); |
77145f1c BS |
564 | if (!nouveau_fb || !nouveau_fb->nvbo) |
565 | continue; | |
566 | ||
567 | nouveau_bo_unpin(nouveau_fb->nvbo); | |
568 | } | |
569 | ||
570 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
571 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
572 | ||
573 | nouveau_bo_unmap(nv_crtc->cursor.nvbo); | |
574 | nouveau_bo_unpin(nv_crtc->cursor.nvbo); | |
575 | } | |
576 | ||
577 | return 0; | |
578 | } | |
579 | ||
580 | void | |
6fbb702e | 581 | nouveau_display_resume(struct drm_device *dev, bool runtime) |
77145f1c BS |
582 | { |
583 | struct nouveau_drm *drm = nouveau_drm(dev); | |
584 | struct drm_crtc *crtc; | |
6fbb702e | 585 | int ret, head; |
77145f1c | 586 | |
6fbb702e | 587 | /* re-pin fb/cursors */ |
77145f1c BS |
588 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { |
589 | struct nouveau_framebuffer *nouveau_fb; | |
590 | ||
f4510a27 | 591 | nouveau_fb = nouveau_framebuffer(crtc->primary->fb); |
77145f1c BS |
592 | if (!nouveau_fb || !nouveau_fb->nvbo) |
593 | continue; | |
594 | ||
ad76b3f7 | 595 | ret = nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM, false); |
c9a6fd97 BS |
596 | if (ret) |
597 | NV_ERROR(drm, "Could not pin framebuffer\n"); | |
77145f1c BS |
598 | } |
599 | ||
600 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
601 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
602 | ||
ad76b3f7 | 603 | ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM, false); |
77145f1c BS |
604 | if (!ret) |
605 | ret = nouveau_bo_map(nv_crtc->cursor.nvbo); | |
606 | if (ret) | |
607 | NV_ERROR(drm, "Could not pin/map cursor.\n"); | |
608 | } | |
9cba5efa | 609 | |
77145f1c BS |
610 | nouveau_display_init(dev); |
611 | ||
612 | /* Force CLUT to get re-loaded during modeset */ | |
613 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
614 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
615 | ||
616 | nv_crtc->lut.depth = 0; | |
617 | } | |
618 | ||
9cba5efa MK |
619 | /* Make sure that drm and hw vblank irqs get resumed if needed. */ |
620 | for (head = 0; head < dev->mode_config.num_crtc; head++) | |
621 | drm_vblank_on(dev, head); | |
622 | ||
6fbb702e BS |
623 | /* This should ensure we don't hit a locking problem when someone |
624 | * wakes us up via a connector. We should never go into suspend | |
625 | * while the display is on anyways. | |
626 | */ | |
627 | if (runtime) | |
628 | return; | |
629 | ||
77145f1c BS |
630 | drm_helper_resume_force_mode(dev); |
631 | ||
632 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
633 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
634 | u32 offset = nv_crtc->cursor.nvbo->bo.offset; | |
635 | ||
036a12b6 BS |
636 | if (!nv_crtc->cursor.set_offset) |
637 | continue; | |
77145f1c BS |
638 | nv_crtc->cursor.set_offset(nv_crtc, offset); |
639 | nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x, | |
640 | nv_crtc->cursor_saved_y); | |
641 | } | |
27d5030a BS |
642 | } |
643 | ||
332b242f FJ |
644 | static int |
645 | nouveau_page_flip_emit(struct nouveau_channel *chan, | |
646 | struct nouveau_bo *old_bo, | |
647 | struct nouveau_bo *new_bo, | |
648 | struct nouveau_page_flip_state *s, | |
649 | struct nouveau_fence **pfence) | |
650 | { | |
f589be88 | 651 | struct nouveau_fence_chan *fctx = chan->fence; |
77145f1c BS |
652 | struct nouveau_drm *drm = chan->drm; |
653 | struct drm_device *dev = drm->dev; | |
332b242f FJ |
654 | unsigned long flags; |
655 | int ret; | |
656 | ||
657 | /* Queue it to the pending list */ | |
658 | spin_lock_irqsave(&dev->event_lock, flags); | |
f589be88 | 659 | list_add_tail(&s->head, &fctx->flip); |
332b242f FJ |
660 | spin_unlock_irqrestore(&dev->event_lock, flags); |
661 | ||
662 | /* Synchronize with the old framebuffer */ | |
e3be4c23 | 663 | ret = nouveau_fence_sync(old_bo, chan, false, false); |
332b242f FJ |
664 | if (ret) |
665 | goto fail; | |
666 | ||
667 | /* Emit the pageflip */ | |
1e303c03 | 668 | ret = RING_SPACE(chan, 2); |
332b242f FJ |
669 | if (ret) |
670 | goto fail; | |
671 | ||
967e7bde | 672 | if (drm->device.info.family < NV_DEVICE_INFO_V0_FERMI) |
6d597027 | 673 | BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1); |
1e303c03 BS |
674 | else |
675 | BEGIN_NVC0(chan, FermiSw, NV_SW_PAGE_FLIP, 1); | |
676 | OUT_RING (chan, 0x00000000); | |
bd2f2037 | 677 | FIRE_RING (chan); |
332b242f | 678 | |
264ce192 | 679 | ret = nouveau_fence_new(chan, false, pfence); |
332b242f FJ |
680 | if (ret) |
681 | goto fail; | |
682 | ||
683 | return 0; | |
684 | fail: | |
685 | spin_lock_irqsave(&dev->event_lock, flags); | |
686 | list_del(&s->head); | |
687 | spin_unlock_irqrestore(&dev->event_lock, flags); | |
688 | return ret; | |
689 | } | |
690 | ||
691 | int | |
692 | nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb, | |
b9d9dcda | 693 | struct drm_pending_vblank_event *event, u32 flags) |
332b242f | 694 | { |
b9d9dcda | 695 | const int swap_interval = (flags & DRM_MODE_PAGE_FLIP_ASYNC) ? 0 : 1; |
332b242f | 696 | struct drm_device *dev = crtc->dev; |
77145f1c | 697 | struct nouveau_drm *drm = nouveau_drm(dev); |
f4510a27 | 698 | struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->primary->fb)->nvbo; |
332b242f FJ |
699 | struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo; |
700 | struct nouveau_page_flip_state *s; | |
0ad72863 BS |
701 | struct nouveau_channel *chan; |
702 | struct nouveau_cli *cli; | |
332b242f FJ |
703 | struct nouveau_fence *fence; |
704 | int ret; | |
705 | ||
0ad72863 BS |
706 | chan = drm->channel; |
707 | if (!chan) | |
332b242f | 708 | return -ENODEV; |
0ad72863 | 709 | cli = (void *)nvif_client(&chan->device->base); |
332b242f FJ |
710 | |
711 | s = kzalloc(sizeof(*s), GFP_KERNEL); | |
712 | if (!s) | |
713 | return -ENOMEM; | |
714 | ||
d5c1e84b | 715 | if (new_bo != old_bo) { |
ad76b3f7 | 716 | ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM, false); |
d5c1e84b ML |
717 | if (ret) |
718 | goto fail_free; | |
719 | } | |
720 | ||
0ad72863 | 721 | mutex_lock(&cli->mutex); |
bdaf7ddf | 722 | ret = ttm_bo_reserve(&new_bo->bo, true, false, false, NULL); |
eae389f9 | 723 | if (ret) |
09c3de13 | 724 | goto fail_unpin; |
b580c9e2 | 725 | |
eae389f9 | 726 | /* synchronise rendering channel with the kernel's channel */ |
e3be4c23 | 727 | ret = nouveau_fence_sync(new_bo, chan, false, true); |
bdaf7ddf ML |
728 | if (ret) { |
729 | ttm_bo_unreserve(&new_bo->bo); | |
060810d7 | 730 | goto fail_unpin; |
bdaf7ddf | 731 | } |
b580c9e2 | 732 | |
bdaf7ddf ML |
733 | if (new_bo != old_bo) { |
734 | ttm_bo_unreserve(&new_bo->bo); | |
735 | ||
736 | ret = ttm_bo_reserve(&old_bo->bo, true, false, false, NULL); | |
737 | if (ret) | |
738 | goto fail_unpin; | |
739 | } | |
b580c9e2 ML |
740 | |
741 | /* Initialize a page flip struct */ | |
742 | *s = (struct nouveau_page_flip_state) | |
743 | { { }, event, nouveau_crtc(crtc)->index, | |
744 | fb->bits_per_pixel, fb->pitches[0], crtc->x, crtc->y, | |
745 | new_bo->bo.offset }; | |
746 | ||
ba124a41 MK |
747 | /* Keep vblanks on during flip, for the target crtc of this flip */ |
748 | drm_vblank_get(dev, nouveau_crtc(crtc)->index); | |
749 | ||
332b242f | 750 | /* Emit a page flip */ |
967e7bde | 751 | if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) { |
b9d9dcda | 752 | ret = nv50_display_flip_next(crtc, fb, chan, swap_interval); |
060810d7 | 753 | if (ret) |
d7117e0d | 754 | goto fail_unreserve; |
78ae0ad4 BS |
755 | } else { |
756 | struct nv04_display *dispnv04 = nv04_display(dev); | |
b9d9dcda BS |
757 | int head = nouveau_crtc(crtc)->index; |
758 | ||
759 | if (swap_interval) { | |
760 | ret = RING_SPACE(chan, 8); | |
761 | if (ret) | |
762 | goto fail_unreserve; | |
763 | ||
764 | BEGIN_NV04(chan, NvSubImageBlit, 0x012c, 1); | |
765 | OUT_RING (chan, 0); | |
766 | BEGIN_NV04(chan, NvSubImageBlit, 0x0134, 1); | |
767 | OUT_RING (chan, head); | |
768 | BEGIN_NV04(chan, NvSubImageBlit, 0x0100, 1); | |
769 | OUT_RING (chan, 0); | |
770 | BEGIN_NV04(chan, NvSubImageBlit, 0x0130, 1); | |
771 | OUT_RING (chan, 0); | |
772 | } | |
773 | ||
774 | nouveau_bo_ref(new_bo, &dispnv04->image[head]); | |
d7117e0d BS |
775 | } |
776 | ||
332b242f | 777 | ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence); |
332b242f FJ |
778 | if (ret) |
779 | goto fail_unreserve; | |
0ad72863 | 780 | mutex_unlock(&cli->mutex); |
332b242f FJ |
781 | |
782 | /* Update the crtc struct and cleanup */ | |
f4510a27 | 783 | crtc->primary->fb = fb; |
332b242f | 784 | |
809e9447 | 785 | nouveau_bo_fence(old_bo, fence, false); |
07ad6ca0 | 786 | ttm_bo_unreserve(&old_bo->bo); |
060810d7 | 787 | if (old_bo != new_bo) |
b580c9e2 | 788 | nouveau_bo_unpin(old_bo); |
332b242f FJ |
789 | nouveau_fence_unref(&fence); |
790 | return 0; | |
791 | ||
792 | fail_unreserve: | |
ba124a41 | 793 | drm_vblank_put(dev, nouveau_crtc(crtc)->index); |
07ad6ca0 | 794 | ttm_bo_unreserve(&old_bo->bo); |
060810d7 | 795 | fail_unpin: |
0ad72863 | 796 | mutex_unlock(&cli->mutex); |
060810d7 | 797 | if (old_bo != new_bo) |
b580c9e2 | 798 | nouveau_bo_unpin(new_bo); |
332b242f FJ |
799 | fail_free: |
800 | kfree(s); | |
801 | return ret; | |
802 | } | |
803 | ||
804 | int | |
805 | nouveau_finish_page_flip(struct nouveau_channel *chan, | |
806 | struct nouveau_page_flip_state *ps) | |
807 | { | |
f589be88 | 808 | struct nouveau_fence_chan *fctx = chan->fence; |
77145f1c BS |
809 | struct nouveau_drm *drm = chan->drm; |
810 | struct drm_device *dev = drm->dev; | |
332b242f FJ |
811 | struct nouveau_page_flip_state *s; |
812 | unsigned long flags; | |
af4870e4 | 813 | int crtcid = -1; |
332b242f FJ |
814 | |
815 | spin_lock_irqsave(&dev->event_lock, flags); | |
816 | ||
f589be88 | 817 | if (list_empty(&fctx->flip)) { |
77145f1c | 818 | NV_ERROR(drm, "unexpected pageflip\n"); |
332b242f FJ |
819 | spin_unlock_irqrestore(&dev->event_lock, flags); |
820 | return -EINVAL; | |
821 | } | |
822 | ||
f589be88 | 823 | s = list_first_entry(&fctx->flip, struct nouveau_page_flip_state, head); |
af4870e4 MK |
824 | if (s->event) { |
825 | /* Vblank timestamps/counts are only correct on >= NV-50 */ | |
967e7bde | 826 | if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) |
af4870e4 MK |
827 | crtcid = s->crtc; |
828 | ||
829 | drm_send_vblank_event(dev, crtcid, s->event); | |
830 | } | |
332b242f | 831 | |
ba124a41 MK |
832 | /* Give up ownership of vblank for page-flipped crtc */ |
833 | drm_vblank_put(dev, s->crtc); | |
834 | ||
332b242f | 835 | list_del(&s->head); |
d7117e0d BS |
836 | if (ps) |
837 | *ps = *s; | |
332b242f FJ |
838 | kfree(s); |
839 | ||
840 | spin_unlock_irqrestore(&dev->event_lock, flags); | |
841 | return 0; | |
842 | } | |
33dbc27f | 843 | |
f589be88 BS |
844 | int |
845 | nouveau_flip_complete(void *data) | |
846 | { | |
847 | struct nouveau_channel *chan = data; | |
77145f1c | 848 | struct nouveau_drm *drm = chan->drm; |
f589be88 BS |
849 | struct nouveau_page_flip_state state; |
850 | ||
851 | if (!nouveau_finish_page_flip(chan, &state)) { | |
967e7bde | 852 | if (drm->device.info.family < NV_DEVICE_INFO_V0_TESLA) { |
77145f1c | 853 | nv_set_crtc_base(drm->dev, state.crtc, state.offset + |
f589be88 BS |
854 | state.y * state.pitch + |
855 | state.x * state.bpp / 8); | |
856 | } | |
857 | } | |
858 | ||
859 | return 0; | |
860 | } | |
861 | ||
33dbc27f BS |
862 | int |
863 | nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev, | |
864 | struct drm_mode_create_dumb *args) | |
865 | { | |
866 | struct nouveau_bo *bo; | |
867 | int ret; | |
868 | ||
869 | args->pitch = roundup(args->width * (args->bpp / 8), 256); | |
870 | args->size = args->pitch * args->height; | |
871 | args->size = roundup(args->size, PAGE_SIZE); | |
872 | ||
610bd7da | 873 | ret = nouveau_gem_new(dev, args->size, 0, NOUVEAU_GEM_DOMAIN_VRAM, 0, 0, &bo); |
33dbc27f BS |
874 | if (ret) |
875 | return ret; | |
876 | ||
355a7018 | 877 | bo->gem.dumb = true; |
55fb74ad DH |
878 | ret = drm_gem_handle_create(file_priv, &bo->gem, &args->handle); |
879 | drm_gem_object_unreference_unlocked(&bo->gem); | |
33dbc27f BS |
880 | return ret; |
881 | } | |
882 | ||
33dbc27f BS |
883 | int |
884 | nouveau_display_dumb_map_offset(struct drm_file *file_priv, | |
885 | struct drm_device *dev, | |
886 | uint32_t handle, uint64_t *poffset) | |
887 | { | |
888 | struct drm_gem_object *gem; | |
889 | ||
890 | gem = drm_gem_object_lookup(dev, file_priv, handle); | |
891 | if (gem) { | |
55fb74ad | 892 | struct nouveau_bo *bo = nouveau_gem_object(gem); |
355a7018 TH |
893 | |
894 | /* | |
895 | * We don't allow dumb mmaps on objects created using another | |
896 | * interface. | |
897 | */ | |
898 | WARN_ONCE(!(gem->dumb || gem->import_attach), | |
899 | "Illegal dumb map of accelerated buffer.\n"); | |
900 | ||
72525b3f | 901 | *poffset = drm_vma_node_offset_addr(&bo->bo.vma_node); |
33dbc27f BS |
902 | drm_gem_object_unreference_unlocked(gem); |
903 | return 0; | |
904 | } | |
905 | ||
906 | return -ENOENT; | |
907 | } |