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6ee73861 BS |
1 | /* |
2 | * Copyright (C) 2008 Maarten Maathuis. | |
3 | * All Rights Reserved. | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining | |
6 | * a copy of this software and associated documentation files (the | |
7 | * "Software"), to deal in the Software without restriction, including | |
8 | * without limitation the rights to use, copy, modify, merge, publish, | |
9 | * distribute, sublicense, and/or sell copies of the Software, and to | |
10 | * permit persons to whom the Software is furnished to do so, subject to | |
11 | * the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice (including the | |
14 | * next paragraph) shall be included in all copies or substantial | |
15 | * portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
18 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
19 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. | |
20 | * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE | |
21 | * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION | |
22 | * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION | |
23 | * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. | |
24 | * | |
25 | */ | |
26 | ||
3a6536c5 | 27 | #include <acpi/video.h> |
760285e7 | 28 | #include <drm/drmP.h> |
b167db0e BS |
29 | #include <drm/drm_atomic.h> |
30 | #include <drm/drm_atomic_helper.h> | |
760285e7 | 31 | #include <drm/drm_crtc_helper.h> |
77145f1c | 32 | |
fdb751ef BS |
33 | #include <nvif/class.h> |
34 | ||
6ee73861 | 35 | #include "nouveau_fbcon.h" |
1a646342 | 36 | #include "dispnv04/hw.h" |
332b242f FJ |
37 | #include "nouveau_crtc.h" |
38 | #include "nouveau_dma.h" | |
77145f1c | 39 | #include "nouveau_gem.h" |
de691855 | 40 | #include "nouveau_connector.h" |
45c4e0aa | 41 | #include "nv50_display.h" |
6ee73861 | 42 | |
ebb945a9 BS |
43 | #include "nouveau_fence.h" |
44 | ||
7568b106 | 45 | #include <nvif/cl0046.h> |
79ca2770 | 46 | #include <nvif/event.h> |
1d7c71a3 | 47 | |
51cb4b39 | 48 | static int |
80bc340b | 49 | nouveau_display_vblank_handler(struct nvif_notify *notify) |
51cb4b39 | 50 | { |
79ca2770 BS |
51 | struct nouveau_crtc *nv_crtc = |
52 | container_of(notify, typeof(*nv_crtc), vblank); | |
d297b020 | 53 | drm_crtc_handle_vblank(&nv_crtc->base); |
80bc340b | 54 | return NVIF_NOTIFY_KEEP; |
51cb4b39 BS |
55 | } |
56 | ||
57 | int | |
88e72717 | 58 | nouveau_display_vblank_enable(struct drm_device *dev, unsigned int pipe) |
51cb4b39 | 59 | { |
b12f0ae9 | 60 | struct drm_crtc *crtc; |
ea441bd3 SG |
61 | struct nouveau_crtc *nv_crtc; |
62 | ||
63 | crtc = drm_crtc_from_index(dev, pipe); | |
64 | if (!crtc) | |
65 | return -EINVAL; | |
66 | ||
67 | nv_crtc = nouveau_crtc(crtc); | |
68 | nvif_notify_get(&nv_crtc->vblank); | |
69 | ||
70 | return 0; | |
51cb4b39 BS |
71 | } |
72 | ||
73 | void | |
88e72717 | 74 | nouveau_display_vblank_disable(struct drm_device *dev, unsigned int pipe) |
51cb4b39 | 75 | { |
b12f0ae9 | 76 | struct drm_crtc *crtc; |
ea441bd3 SG |
77 | struct nouveau_crtc *nv_crtc; |
78 | ||
79 | crtc = drm_crtc_from_index(dev, pipe); | |
80 | if (!crtc) | |
81 | return; | |
82 | ||
83 | nv_crtc = nouveau_crtc(crtc); | |
84 | nvif_notify_put(&nv_crtc->vblank); | |
51cb4b39 BS |
85 | } |
86 | ||
d83ef853 BS |
87 | static inline int |
88 | calc(int blanks, int blanke, int total, int line) | |
89 | { | |
90 | if (blanke >= blanks) { | |
91 | if (line >= blanks) | |
92 | line -= total; | |
93 | } else { | |
94 | if (line >= blanks) | |
95 | line -= total; | |
96 | line -= blanke + 1; | |
97 | } | |
98 | return line; | |
99 | } | |
100 | ||
e08a1d97 | 101 | static int |
d83ef853 BS |
102 | nouveau_display_scanoutpos_head(struct drm_crtc *crtc, int *vpos, int *hpos, |
103 | ktime_t *stime, ktime_t *etime) | |
104 | { | |
4952b4d3 BS |
105 | struct { |
106 | struct nv04_disp_mthd_v0 base; | |
107 | struct nv04_disp_scanoutpos_v0 scan; | |
108 | } args = { | |
109 | .base.method = NV04_DISP_SCANOUTPOS, | |
110 | .base.head = nouveau_crtc(crtc)->index, | |
111 | }; | |
d83ef853 | 112 | struct nouveau_display *disp = nouveau_display(crtc->dev); |
eba1f35d | 113 | struct drm_vblank_crtc *vblank = &crtc->dev->vblank[drm_crtc_index(crtc)]; |
d83ef853 BS |
114 | int ret, retry = 1; |
115 | ||
116 | do { | |
4952b4d3 | 117 | ret = nvif_mthd(&disp->disp, 0, &args, sizeof(args)); |
d83ef853 BS |
118 | if (ret != 0) |
119 | return 0; | |
120 | ||
4952b4d3 | 121 | if (args.scan.vline) { |
d83ef853 BS |
122 | ret |= DRM_SCANOUTPOS_ACCURATE; |
123 | ret |= DRM_SCANOUTPOS_VALID; | |
124 | break; | |
125 | } | |
126 | ||
eba1f35d | 127 | if (retry) ndelay(vblank->linedur_ns); |
d83ef853 BS |
128 | } while (retry--); |
129 | ||
4952b4d3 BS |
130 | *hpos = args.scan.hline; |
131 | *vpos = calc(args.scan.vblanks, args.scan.vblanke, | |
132 | args.scan.vtotal, args.scan.vline); | |
133 | if (stime) *stime = ns_to_ktime(args.scan.time[0]); | |
134 | if (etime) *etime = ns_to_ktime(args.scan.time[1]); | |
d83ef853 BS |
135 | |
136 | if (*vpos < 0) | |
3d3cbd84 | 137 | ret |= DRM_SCANOUTPOS_IN_VBLANK; |
d83ef853 BS |
138 | return ret; |
139 | } | |
140 | ||
141 | int | |
88e72717 TR |
142 | nouveau_display_scanoutpos(struct drm_device *dev, unsigned int pipe, |
143 | unsigned int flags, int *vpos, int *hpos, | |
144 | ktime_t *stime, ktime_t *etime, | |
3bb403bf | 145 | const struct drm_display_mode *mode) |
d83ef853 BS |
146 | { |
147 | struct drm_crtc *crtc; | |
148 | ||
149 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
88e72717 | 150 | if (nouveau_crtc(crtc)->index == pipe) { |
d83ef853 BS |
151 | return nouveau_display_scanoutpos_head(crtc, vpos, hpos, |
152 | stime, etime); | |
153 | } | |
154 | } | |
155 | ||
156 | return 0; | |
157 | } | |
158 | ||
159 | int | |
88e72717 TR |
160 | nouveau_display_vblstamp(struct drm_device *dev, unsigned int pipe, |
161 | int *max_error, struct timeval *time, unsigned flags) | |
d83ef853 BS |
162 | { |
163 | struct drm_crtc *crtc; | |
164 | ||
165 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
88e72717 | 166 | if (nouveau_crtc(crtc)->index == pipe) { |
986edb91 | 167 | struct drm_display_mode *mode; |
a743d758 | 168 | if (drm_drv_uses_atomic_modeset(dev)) |
986edb91 BS |
169 | mode = &crtc->state->adjusted_mode; |
170 | else | |
171 | mode = &crtc->hwmode; | |
d83ef853 | 172 | return drm_calc_vbltimestamp_from_scanoutpos(dev, |
986edb91 | 173 | pipe, max_error, time, flags, mode); |
d83ef853 BS |
174 | } |
175 | } | |
176 | ||
177 | return -EINVAL; | |
178 | } | |
179 | ||
51cb4b39 BS |
180 | static void |
181 | nouveau_display_vblank_fini(struct drm_device *dev) | |
182 | { | |
b12f0ae9 | 183 | struct drm_crtc *crtc; |
51cb4b39 | 184 | |
1139ffb9 BS |
185 | drm_vblank_cleanup(dev); |
186 | ||
b12f0ae9 BS |
187 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { |
188 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
80bc340b | 189 | nvif_notify_fini(&nv_crtc->vblank); |
51cb4b39 | 190 | } |
51cb4b39 BS |
191 | } |
192 | ||
193 | static int | |
194 | nouveau_display_vblank_init(struct drm_device *dev) | |
195 | { | |
80bc340b | 196 | struct nouveau_display *disp = nouveau_display(dev); |
b12f0ae9 BS |
197 | struct drm_crtc *crtc; |
198 | int ret; | |
51cb4b39 | 199 | |
b12f0ae9 BS |
200 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { |
201 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
a01ca78c | 202 | ret = nvif_notify_init(&disp->disp, |
79ca2770 | 203 | nouveau_display_vblank_handler, false, |
80bc340b | 204 | NV04_DISP_NTFY_VBLANK, |
79ca2770 BS |
205 | &(struct nvif_notify_head_req_v0) { |
206 | .head = nv_crtc->index, | |
207 | }, | |
208 | sizeof(struct nvif_notify_head_req_v0), | |
209 | sizeof(struct nvif_notify_head_rep_v0), | |
210 | &nv_crtc->vblank); | |
51cb4b39 BS |
211 | if (ret) { |
212 | nouveau_display_vblank_fini(dev); | |
213 | return ret; | |
214 | } | |
215 | } | |
216 | ||
217 | ret = drm_vblank_init(dev, dev->mode_config.num_crtc); | |
218 | if (ret) { | |
219 | nouveau_display_vblank_fini(dev); | |
220 | return ret; | |
221 | } | |
222 | ||
223 | return 0; | |
224 | } | |
225 | ||
6ee73861 BS |
226 | static void |
227 | nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb) | |
228 | { | |
229 | struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb); | |
6ee73861 | 230 | |
bc9025bd | 231 | if (fb->nvbo) |
55fb74ad | 232 | drm_gem_object_unreference_unlocked(&fb->nvbo->gem); |
6ee73861 BS |
233 | |
234 | drm_framebuffer_cleanup(drm_fb); | |
235 | kfree(fb); | |
236 | } | |
237 | ||
238 | static int | |
239 | nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb, | |
240 | struct drm_file *file_priv, | |
241 | unsigned int *handle) | |
242 | { | |
243 | struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb); | |
244 | ||
55fb74ad | 245 | return drm_gem_handle_create(file_priv, &fb->nvbo->gem, handle); |
6ee73861 BS |
246 | } |
247 | ||
248 | static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = { | |
249 | .destroy = nouveau_user_framebuffer_destroy, | |
250 | .create_handle = nouveau_user_framebuffer_create_handle, | |
251 | }; | |
252 | ||
38651674 | 253 | int |
1608a0fb BS |
254 | nouveau_framebuffer_new(struct drm_device *dev, |
255 | const struct drm_mode_fb_cmd2 *mode_cmd, | |
256 | struct nouveau_bo *nvbo, | |
257 | struct nouveau_framebuffer **pfb) | |
6ee73861 | 258 | { |
1608a0fb | 259 | struct nouveau_framebuffer *fb; |
6ee73861 BS |
260 | int ret; |
261 | ||
f00f0e21 | 262 | if (!(fb = *pfb = kzalloc(sizeof(*fb), GFP_KERNEL))) |
1608a0fb | 263 | return -ENOMEM; |
45c4e0aa | 264 | |
a3f913ca | 265 | drm_helper_mode_fill_fb_struct(dev, &fb->base, mode_cmd); |
1608a0fb | 266 | fb->nvbo = nvbo; |
ab0af559 | 267 | |
1608a0fb | 268 | ret = drm_framebuffer_init(dev, &fb->base, &nouveau_framebuffer_funcs); |
f00f0e21 BS |
269 | if (ret) |
270 | kfree(fb); | |
ab0af559 | 271 | return ret; |
6ee73861 BS |
272 | } |
273 | ||
839ca903 | 274 | struct drm_framebuffer * |
6ee73861 BS |
275 | nouveau_user_framebuffer_create(struct drm_device *dev, |
276 | struct drm_file *file_priv, | |
1eb83451 | 277 | const struct drm_mode_fb_cmd2 *mode_cmd) |
6ee73861 | 278 | { |
1608a0fb BS |
279 | struct nouveau_framebuffer *fb; |
280 | struct nouveau_bo *nvbo; | |
6ee73861 | 281 | struct drm_gem_object *gem; |
1608a0fb | 282 | int ret; |
6ee73861 | 283 | |
a8ad0bd8 | 284 | gem = drm_gem_object_lookup(file_priv, mode_cmd->handles[0]); |
6ee73861 | 285 | if (!gem) |
cce13ff7 | 286 | return ERR_PTR(-ENOENT); |
1608a0fb | 287 | nvbo = nouveau_gem_object(gem); |
6ee73861 | 288 | |
1608a0fb BS |
289 | ret = nouveau_framebuffer_new(dev, mode_cmd, nvbo, &fb); |
290 | if (ret == 0) | |
291 | return &fb->base; | |
fdfb8332 | 292 | |
e889c244 | 293 | drm_gem_object_unreference_unlocked(gem); |
fdfb8332 | 294 | return ERR_PTR(ret); |
6ee73861 BS |
295 | } |
296 | ||
27d5030a | 297 | static const struct drm_mode_config_funcs nouveau_mode_config_funcs = { |
6ee73861 | 298 | .fb_create = nouveau_user_framebuffer_create, |
eb1f8e4f | 299 | .output_poll_changed = nouveau_fbcon_output_poll_changed, |
6ee73861 BS |
300 | }; |
301 | ||
b29caa58 | 302 | |
4a67d391 | 303 | struct nouveau_drm_prop_enum_list { |
de691855 | 304 | u8 gen_mask; |
b29caa58 BS |
305 | int type; |
306 | char *name; | |
307 | }; | |
308 | ||
4a67d391 | 309 | static struct nouveau_drm_prop_enum_list underscan[] = { |
92854622 BS |
310 | { 6, UNDERSCAN_AUTO, "auto" }, |
311 | { 6, UNDERSCAN_OFF, "off" }, | |
312 | { 6, UNDERSCAN_ON, "on" }, | |
de691855 | 313 | {} |
b29caa58 BS |
314 | }; |
315 | ||
4a67d391 | 316 | static struct nouveau_drm_prop_enum_list dither_mode[] = { |
de691855 BS |
317 | { 7, DITHERING_MODE_AUTO, "auto" }, |
318 | { 7, DITHERING_MODE_OFF, "off" }, | |
319 | { 1, DITHERING_MODE_ON, "on" }, | |
320 | { 6, DITHERING_MODE_STATIC2X2, "static 2x2" }, | |
321 | { 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" }, | |
322 | { 4, DITHERING_MODE_TEMPORAL, "temporal" }, | |
323 | {} | |
324 | }; | |
325 | ||
4a67d391 | 326 | static struct nouveau_drm_prop_enum_list dither_depth[] = { |
de691855 BS |
327 | { 6, DITHERING_DEPTH_AUTO, "auto" }, |
328 | { 6, DITHERING_DEPTH_6BPC, "6 bpc" }, | |
329 | { 6, DITHERING_DEPTH_8BPC, "8 bpc" }, | |
330 | {} | |
331 | }; | |
332 | ||
333 | #define PROP_ENUM(p,gen,n,list) do { \ | |
4a67d391 | 334 | struct nouveau_drm_prop_enum_list *l = (list); \ |
de691855 BS |
335 | int c = 0; \ |
336 | while (l->gen_mask) { \ | |
337 | if (l->gen_mask & (1 << (gen))) \ | |
338 | c++; \ | |
339 | l++; \ | |
340 | } \ | |
341 | if (c) { \ | |
342 | p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c); \ | |
343 | l = (list); \ | |
344 | c = 0; \ | |
345 | while (p && l->gen_mask) { \ | |
346 | if (l->gen_mask & (1 << (gen))) { \ | |
347 | drm_property_add_enum(p, c, l->type, l->name); \ | |
348 | c++; \ | |
349 | } \ | |
350 | l++; \ | |
351 | } \ | |
352 | } \ | |
353 | } while(0) | |
354 | ||
3a6536c5 | 355 | static void |
81280d0e | 356 | nouveau_display_hpd_work(struct work_struct *work) |
3a6536c5 | 357 | { |
81280d0e | 358 | struct nouveau_drm *drm = container_of(work, typeof(*drm), hpd_work); |
3a6536c5 HG |
359 | |
360 | pm_runtime_get_sync(drm->dev->dev); | |
361 | ||
362 | drm_helper_hpd_irq_event(drm->dev); | |
363 | ||
364 | pm_runtime_mark_last_busy(drm->dev->dev); | |
365 | pm_runtime_put_sync(drm->dev->dev); | |
366 | } | |
367 | ||
81280d0e HG |
368 | #ifdef CONFIG_ACPI |
369 | ||
370 | /* | |
371 | * Hans de Goede: This define belongs in acpi/video.h, I've submitted a patch | |
372 | * to the acpi subsys to move it there from drivers/acpi/acpi_video.c . | |
373 | * This should be dropped once that is merged. | |
374 | */ | |
375 | #ifndef ACPI_VIDEO_NOTIFY_PROBE | |
376 | #define ACPI_VIDEO_NOTIFY_PROBE 0x81 | |
377 | #endif | |
378 | ||
3a6536c5 HG |
379 | static int |
380 | nouveau_display_acpi_ntfy(struct notifier_block *nb, unsigned long val, | |
381 | void *data) | |
382 | { | |
383 | struct nouveau_drm *drm = container_of(nb, typeof(*drm), acpi_nb); | |
384 | struct acpi_bus_event *info = data; | |
385 | ||
386 | if (!strcmp(info->device_class, ACPI_VIDEO_CLASS)) { | |
387 | if (info->type == ACPI_VIDEO_NOTIFY_PROBE) { | |
388 | /* | |
389 | * This may be the only indication we receive of a | |
390 | * connector hotplug on a runtime suspended GPU, | |
81280d0e | 391 | * schedule hpd_work to check. |
3a6536c5 | 392 | */ |
81280d0e | 393 | schedule_work(&drm->hpd_work); |
3a6536c5 HG |
394 | |
395 | /* acpi-video should not generate keypresses for this */ | |
396 | return NOTIFY_BAD; | |
397 | } | |
398 | } | |
399 | ||
400 | return NOTIFY_DONE; | |
401 | } | |
402 | #endif | |
403 | ||
f62b27db BS |
404 | int |
405 | nouveau_display_init(struct drm_device *dev) | |
406 | { | |
77145f1c | 407 | struct nouveau_display *disp = nouveau_display(dev); |
898a2b32 | 408 | struct nouveau_drm *drm = nouveau_drm(dev); |
52c4d767 | 409 | struct drm_connector *connector; |
f62b27db BS |
410 | int ret; |
411 | ||
412 | ret = disp->init(dev); | |
52c4d767 BS |
413 | if (ret) |
414 | return ret; | |
415 | ||
7df898b1 | 416 | /* enable polling for external displays */ |
cae9ff03 LP |
417 | if (!dev->mode_config.poll_enabled) |
418 | drm_kms_helper_poll_enable(dev); | |
52c4d767 BS |
419 | |
420 | /* enable hotplug interrupts */ | |
421 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
422 | struct nouveau_connector *conn = nouveau_connector(connector); | |
80bc340b | 423 | nvif_notify_get(&conn->hpd); |
f62b27db BS |
424 | } |
425 | ||
898a2b32 BS |
426 | /* enable flip completion events */ |
427 | nvif_notify_get(&drm->flip); | |
f62b27db BS |
428 | return ret; |
429 | } | |
430 | ||
431 | void | |
3b4c0abb | 432 | nouveau_display_fini(struct drm_device *dev, bool suspend) |
f62b27db | 433 | { |
77145f1c | 434 | struct nouveau_display *disp = nouveau_display(dev); |
898a2b32 | 435 | struct nouveau_drm *drm = nouveau_drm(dev); |
52c4d767 | 436 | struct drm_connector *connector; |
9bc6db0d | 437 | struct drm_crtc *crtc; |
9cba5efa | 438 | |
3b4c0abb BS |
439 | if (!suspend) |
440 | drm_crtc_force_disable_all(dev); | |
441 | ||
9cba5efa | 442 | /* Make sure that drm and hw vblank irqs get properly disabled. */ |
9bc6db0d DV |
443 | drm_for_each_crtc(crtc, dev) |
444 | drm_crtc_vblank_off(crtc); | |
52c4d767 | 445 | |
898a2b32 BS |
446 | /* disable flip completion events */ |
447 | nvif_notify_put(&drm->flip); | |
448 | ||
52c4d767 BS |
449 | /* disable hotplug interrupts */ |
450 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
451 | struct nouveau_connector *conn = nouveau_connector(connector); | |
80bc340b | 452 | nvif_notify_put(&conn->hpd); |
52c4d767 | 453 | } |
f62b27db BS |
454 | |
455 | drm_kms_helper_poll_disable(dev); | |
456 | disp->fini(dev); | |
457 | } | |
458 | ||
9c210f37 BS |
459 | static void |
460 | nouveau_display_create_properties(struct drm_device *dev) | |
27d5030a | 461 | { |
9c210f37 BS |
462 | struct nouveau_display *disp = nouveau_display(dev); |
463 | int gen; | |
de691855 | 464 | |
648d4dfd | 465 | if (disp->disp.oclass < NV50_DISP) |
de691855 BS |
466 | gen = 0; |
467 | else | |
648d4dfd | 468 | if (disp->disp.oclass < GF110_DISP) |
de691855 BS |
469 | gen = 1; |
470 | else | |
471 | gen = 2; | |
472 | ||
473 | PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode); | |
474 | PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth); | |
475 | PROP_ENUM(disp->underscan_property, gen, "underscan", underscan); | |
b29caa58 BS |
476 | |
477 | disp->underscan_hborder_property = | |
d9bc3c02 | 478 | drm_property_create_range(dev, 0, "underscan hborder", 0, 128); |
b29caa58 BS |
479 | |
480 | disp->underscan_vborder_property = | |
d9bc3c02 | 481 | drm_property_create_range(dev, 0, "underscan vborder", 0, 128); |
b29caa58 | 482 | |
9c210f37 BS |
483 | if (gen < 1) |
484 | return; | |
df26bc9c | 485 | |
9c210f37 BS |
486 | /* -90..+90 */ |
487 | disp->vibrant_hue_property = | |
488 | drm_property_create_range(dev, 0, "vibrant hue", 0, 180); | |
489 | ||
490 | /* -100..+100 */ | |
491 | disp->color_vibrance_property = | |
492 | drm_property_create_range(dev, 0, "color vibrance", 0, 200); | |
493 | } | |
494 | ||
495 | int | |
496 | nouveau_display_create(struct drm_device *dev) | |
497 | { | |
498 | struct nouveau_drm *drm = nouveau_drm(dev); | |
1167c6bc | 499 | struct nvkm_device *device = nvxx_device(&drm->client.device); |
9c210f37 BS |
500 | struct nouveau_display *disp; |
501 | int ret; | |
502 | ||
503 | disp = drm->display = kzalloc(sizeof(*disp), GFP_KERNEL); | |
504 | if (!disp) | |
505 | return -ENOMEM; | |
506 | ||
507 | drm_mode_config_init(dev); | |
508 | drm_mode_create_scaling_mode_property(dev); | |
509 | drm_mode_create_dvi_i_properties(dev); | |
df26bc9c | 510 | |
e6ecefaa | 511 | dev->mode_config.funcs = &nouveau_mode_config_funcs; |
7e8820fe | 512 | dev->mode_config.fb_base = device->func->resource_addr(device, 1); |
27d5030a BS |
513 | |
514 | dev->mode_config.min_width = 0; | |
515 | dev->mode_config.min_height = 0; | |
1167c6bc | 516 | if (drm->client.device.info.family < NV_DEVICE_INFO_V0_CELSIUS) { |
27d5030a BS |
517 | dev->mode_config.max_width = 2048; |
518 | dev->mode_config.max_height = 2048; | |
519 | } else | |
1167c6bc | 520 | if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA) { |
27d5030a BS |
521 | dev->mode_config.max_width = 4096; |
522 | dev->mode_config.max_height = 4096; | |
5102ec3e | 523 | } else |
1167c6bc | 524 | if (drm->client.device.info.family < NV_DEVICE_INFO_V0_FERMI) { |
27d5030a BS |
525 | dev->mode_config.max_width = 8192; |
526 | dev->mode_config.max_height = 8192; | |
5102ec3e IM |
527 | } else { |
528 | dev->mode_config.max_width = 16384; | |
529 | dev->mode_config.max_height = 16384; | |
27d5030a BS |
530 | } |
531 | ||
f1377998 DA |
532 | dev->mode_config.preferred_depth = 24; |
533 | dev->mode_config.prefer_shadow = 1; | |
534 | ||
1167c6bc | 535 | if (drm->client.device.info.chipset < 0x11) |
b9d9dcda BS |
536 | dev->mode_config.async_page_flip = false; |
537 | else | |
538 | dev->mode_config.async_page_flip = true; | |
539 | ||
f62b27db BS |
540 | drm_kms_helper_poll_init(dev); |
541 | drm_kms_helper_poll_disable(dev); | |
542 | ||
771fa0e4 | 543 | if (nouveau_modeset != 2 && drm->vbios.dcb.entries) { |
2332b311 | 544 | static const u16 oclass[] = { |
ed828666 | 545 | GP102_DISP, |
f9d5cbb3 | 546 | GP100_DISP, |
db1eb528 | 547 | GM200_DISP, |
648d4dfd BS |
548 | GM107_DISP, |
549 | GK110_DISP, | |
550 | GK104_DISP, | |
551 | GF110_DISP, | |
552 | GT214_DISP, | |
553 | GT206_DISP, | |
554 | GT200_DISP, | |
555 | G82_DISP, | |
556 | NV50_DISP, | |
557 | NV04_DISP, | |
2332b311 BS |
558 | }; |
559 | int i; | |
560 | ||
561 | for (i = 0, ret = -ENODEV; ret && i < ARRAY_SIZE(oclass); i++) { | |
1167c6bc | 562 | ret = nvif_object_init(&drm->client.device.object, 0, |
fcf3f91c | 563 | oclass[i], NULL, 0, &disp->disp); |
2332b311 BS |
564 | } |
565 | ||
566 | if (ret == 0) { | |
9c210f37 | 567 | nouveau_display_create_properties(dev); |
648d4dfd | 568 | if (disp->disp.oclass < NV50_DISP) |
2332b311 BS |
569 | ret = nv04_display_create(dev); |
570 | else | |
571 | ret = nv50_display_create(dev); | |
572 | } | |
fc162088 BS |
573 | } else { |
574 | ret = 0; | |
575 | } | |
9430738d | 576 | |
fc162088 BS |
577 | if (ret) |
578 | goto disp_create_err; | |
9430738d | 579 | |
07193f70 BS |
580 | drm_mode_config_reset(dev); |
581 | ||
fc162088 | 582 | if (dev->mode_config.num_crtc) { |
51cb4b39 | 583 | ret = nouveau_display_vblank_init(dev); |
fc162088 BS |
584 | if (ret) |
585 | goto vblank_err; | |
f62b27db BS |
586 | } |
587 | ||
fc162088 | 588 | nouveau_backlight_init(dev); |
81280d0e | 589 | INIT_WORK(&drm->hpd_work, nouveau_display_hpd_work); |
3a6536c5 | 590 | #ifdef CONFIG_ACPI |
3a6536c5 HG |
591 | drm->acpi_nb.notifier_call = nouveau_display_acpi_ntfy; |
592 | register_acpi_notifier(&drm->acpi_nb); | |
593 | #endif | |
594 | ||
5ace2c9d MS |
595 | return 0; |
596 | ||
597 | vblank_err: | |
77145f1c | 598 | disp->dtor(dev); |
5ace2c9d MS |
599 | disp_create_err: |
600 | drm_kms_helper_poll_fini(dev); | |
601 | drm_mode_config_cleanup(dev); | |
2a44e499 | 602 | return ret; |
27d5030a BS |
603 | } |
604 | ||
605 | void | |
606 | nouveau_display_destroy(struct drm_device *dev) | |
607 | { | |
77145f1c | 608 | struct nouveau_display *disp = nouveau_display(dev); |
27d5030a | 609 | |
3a6536c5 HG |
610 | #ifdef CONFIG_ACPI |
611 | unregister_acpi_notifier(&nouveau_drm(dev)->acpi_nb); | |
612 | #endif | |
77145f1c | 613 | nouveau_backlight_exit(dev); |
51cb4b39 | 614 | nouveau_display_vblank_fini(dev); |
f62b27db | 615 | |
d6bf2f37 BS |
616 | drm_kms_helper_poll_fini(dev); |
617 | drm_mode_config_cleanup(dev); | |
618 | ||
9430738d BS |
619 | if (disp->dtor) |
620 | disp->dtor(dev); | |
f62b27db | 621 | |
0ad72863 | 622 | nvif_object_fini(&disp->disp); |
2332b311 | 623 | |
77145f1c BS |
624 | nouveau_drm(dev)->display = NULL; |
625 | kfree(disp); | |
626 | } | |
627 | ||
628 | int | |
6fbb702e | 629 | nouveau_display_suspend(struct drm_device *dev, bool runtime) |
77145f1c | 630 | { |
b167db0e | 631 | struct nouveau_display *disp = nouveau_display(dev); |
77145f1c BS |
632 | struct drm_crtc *crtc; |
633 | ||
a743d758 | 634 | if (drm_drv_uses_atomic_modeset(dev)) { |
b167db0e | 635 | if (!runtime) { |
9b2104f4 | 636 | disp->suspend = drm_atomic_helper_suspend(dev); |
b167db0e BS |
637 | if (IS_ERR(disp->suspend)) { |
638 | int ret = PTR_ERR(disp->suspend); | |
639 | disp->suspend = NULL; | |
640 | return ret; | |
641 | } | |
642 | } | |
643 | ||
644 | nouveau_display_fini(dev, true); | |
645 | return 0; | |
646 | } | |
647 | ||
3b4c0abb | 648 | nouveau_display_fini(dev, true); |
77145f1c | 649 | |
77145f1c BS |
650 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { |
651 | struct nouveau_framebuffer *nouveau_fb; | |
652 | ||
f4510a27 | 653 | nouveau_fb = nouveau_framebuffer(crtc->primary->fb); |
77145f1c BS |
654 | if (!nouveau_fb || !nouveau_fb->nvbo) |
655 | continue; | |
656 | ||
657 | nouveau_bo_unpin(nouveau_fb->nvbo); | |
658 | } | |
659 | ||
660 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
661 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
5a560252 | 662 | if (nv_crtc->cursor.nvbo) { |
4dc63933 ML |
663 | if (nv_crtc->cursor.set_offset) |
664 | nouveau_bo_unmap(nv_crtc->cursor.nvbo); | |
5a560252 BS |
665 | nouveau_bo_unpin(nv_crtc->cursor.nvbo); |
666 | } | |
77145f1c BS |
667 | } |
668 | ||
669 | return 0; | |
670 | } | |
671 | ||
672 | void | |
6fbb702e | 673 | nouveau_display_resume(struct drm_device *dev, bool runtime) |
77145f1c | 674 | { |
b167db0e | 675 | struct nouveau_display *disp = nouveau_display(dev); |
77145f1c BS |
676 | struct nouveau_drm *drm = nouveau_drm(dev); |
677 | struct drm_crtc *crtc; | |
9bc6db0d | 678 | int ret; |
77145f1c | 679 | |
a743d758 | 680 | if (drm_drv_uses_atomic_modeset(dev)) { |
b167db0e BS |
681 | nouveau_display_init(dev); |
682 | if (disp->suspend) { | |
683 | drm_atomic_helper_resume(dev, disp->suspend); | |
684 | disp->suspend = NULL; | |
685 | } | |
686 | return; | |
687 | } | |
688 | ||
6fbb702e | 689 | /* re-pin fb/cursors */ |
77145f1c BS |
690 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { |
691 | struct nouveau_framebuffer *nouveau_fb; | |
692 | ||
f4510a27 | 693 | nouveau_fb = nouveau_framebuffer(crtc->primary->fb); |
77145f1c BS |
694 | if (!nouveau_fb || !nouveau_fb->nvbo) |
695 | continue; | |
696 | ||
547ad072 | 697 | ret = nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM, true); |
c9a6fd97 BS |
698 | if (ret) |
699 | NV_ERROR(drm, "Could not pin framebuffer\n"); | |
77145f1c BS |
700 | } |
701 | ||
702 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
703 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
5a560252 BS |
704 | if (!nv_crtc->cursor.nvbo) |
705 | continue; | |
77145f1c | 706 | |
547ad072 | 707 | ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM, true); |
4dc63933 | 708 | if (!ret && nv_crtc->cursor.set_offset) |
77145f1c BS |
709 | ret = nouveau_bo_map(nv_crtc->cursor.nvbo); |
710 | if (ret) | |
711 | NV_ERROR(drm, "Could not pin/map cursor.\n"); | |
712 | } | |
9cba5efa | 713 | |
77145f1c BS |
714 | nouveau_display_init(dev); |
715 | ||
716 | /* Force CLUT to get re-loaded during modeset */ | |
717 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
718 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
719 | ||
720 | nv_crtc->lut.depth = 0; | |
721 | } | |
722 | ||
6fbb702e BS |
723 | /* This should ensure we don't hit a locking problem when someone |
724 | * wakes us up via a connector. We should never go into suspend | |
725 | * while the display is on anyways. | |
726 | */ | |
727 | if (runtime) | |
728 | return; | |
729 | ||
77145f1c BS |
730 | drm_helper_resume_force_mode(dev); |
731 | ||
732 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
733 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
77145f1c | 734 | |
5a560252 | 735 | if (!nv_crtc->cursor.nvbo) |
036a12b6 | 736 | continue; |
4dc63933 ML |
737 | |
738 | if (nv_crtc->cursor.set_offset) | |
739 | nv_crtc->cursor.set_offset(nv_crtc, nv_crtc->cursor.nvbo->bo.offset); | |
77145f1c BS |
740 | nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x, |
741 | nv_crtc->cursor_saved_y); | |
742 | } | |
27d5030a BS |
743 | } |
744 | ||
332b242f FJ |
745 | static int |
746 | nouveau_page_flip_emit(struct nouveau_channel *chan, | |
747 | struct nouveau_bo *old_bo, | |
748 | struct nouveau_bo *new_bo, | |
749 | struct nouveau_page_flip_state *s, | |
750 | struct nouveau_fence **pfence) | |
751 | { | |
f589be88 | 752 | struct nouveau_fence_chan *fctx = chan->fence; |
77145f1c BS |
753 | struct nouveau_drm *drm = chan->drm; |
754 | struct drm_device *dev = drm->dev; | |
332b242f FJ |
755 | unsigned long flags; |
756 | int ret; | |
757 | ||
758 | /* Queue it to the pending list */ | |
759 | spin_lock_irqsave(&dev->event_lock, flags); | |
f589be88 | 760 | list_add_tail(&s->head, &fctx->flip); |
332b242f FJ |
761 | spin_unlock_irqrestore(&dev->event_lock, flags); |
762 | ||
763 | /* Synchronize with the old framebuffer */ | |
e3be4c23 | 764 | ret = nouveau_fence_sync(old_bo, chan, false, false); |
332b242f FJ |
765 | if (ret) |
766 | goto fail; | |
767 | ||
768 | /* Emit the pageflip */ | |
1e303c03 | 769 | ret = RING_SPACE(chan, 2); |
332b242f FJ |
770 | if (ret) |
771 | goto fail; | |
772 | ||
e1ef6b42 | 773 | BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1); |
1e303c03 | 774 | OUT_RING (chan, 0x00000000); |
bd2f2037 | 775 | FIRE_RING (chan); |
332b242f | 776 | |
264ce192 | 777 | ret = nouveau_fence_new(chan, false, pfence); |
332b242f FJ |
778 | if (ret) |
779 | goto fail; | |
780 | ||
781 | return 0; | |
782 | fail: | |
783 | spin_lock_irqsave(&dev->event_lock, flags); | |
784 | list_del(&s->head); | |
785 | spin_unlock_irqrestore(&dev->event_lock, flags); | |
786 | return ret; | |
787 | } | |
788 | ||
789 | int | |
790 | nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb, | |
b9d9dcda | 791 | struct drm_pending_vblank_event *event, u32 flags) |
332b242f | 792 | { |
b9d9dcda | 793 | const int swap_interval = (flags & DRM_MODE_PAGE_FLIP_ASYNC) ? 0 : 1; |
332b242f | 794 | struct drm_device *dev = crtc->dev; |
77145f1c | 795 | struct nouveau_drm *drm = nouveau_drm(dev); |
f4510a27 | 796 | struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->primary->fb)->nvbo; |
332b242f FJ |
797 | struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo; |
798 | struct nouveau_page_flip_state *s; | |
0ad72863 BS |
799 | struct nouveau_channel *chan; |
800 | struct nouveau_cli *cli; | |
332b242f | 801 | struct nouveau_fence *fence; |
e1ef6b42 BS |
802 | struct nv04_display *dispnv04 = nv04_display(dev); |
803 | int head = nouveau_crtc(crtc)->index; | |
332b242f FJ |
804 | int ret; |
805 | ||
0ad72863 BS |
806 | chan = drm->channel; |
807 | if (!chan) | |
332b242f | 808 | return -ENODEV; |
a01ca78c | 809 | cli = (void *)chan->user.client; |
332b242f FJ |
810 | |
811 | s = kzalloc(sizeof(*s), GFP_KERNEL); | |
812 | if (!s) | |
813 | return -ENOMEM; | |
814 | ||
d5c1e84b | 815 | if (new_bo != old_bo) { |
547ad072 | 816 | ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM, true); |
d5c1e84b ML |
817 | if (ret) |
818 | goto fail_free; | |
819 | } | |
820 | ||
0ad72863 | 821 | mutex_lock(&cli->mutex); |
dfd5e50e | 822 | ret = ttm_bo_reserve(&new_bo->bo, true, false, NULL); |
eae389f9 | 823 | if (ret) |
09c3de13 | 824 | goto fail_unpin; |
b580c9e2 | 825 | |
eae389f9 | 826 | /* synchronise rendering channel with the kernel's channel */ |
e3be4c23 | 827 | ret = nouveau_fence_sync(new_bo, chan, false, true); |
bdaf7ddf ML |
828 | if (ret) { |
829 | ttm_bo_unreserve(&new_bo->bo); | |
060810d7 | 830 | goto fail_unpin; |
bdaf7ddf | 831 | } |
b580c9e2 | 832 | |
bdaf7ddf ML |
833 | if (new_bo != old_bo) { |
834 | ttm_bo_unreserve(&new_bo->bo); | |
835 | ||
dfd5e50e | 836 | ret = ttm_bo_reserve(&old_bo->bo, true, false, NULL); |
bdaf7ddf ML |
837 | if (ret) |
838 | goto fail_unpin; | |
839 | } | |
b580c9e2 ML |
840 | |
841 | /* Initialize a page flip struct */ | |
842 | *s = (struct nouveau_page_flip_state) | |
272725c7 | 843 | { { }, event, crtc, fb->format->cpp[0] * 8, fb->pitches[0], |
b580c9e2 ML |
844 | new_bo->bo.offset }; |
845 | ||
ba124a41 | 846 | /* Keep vblanks on during flip, for the target crtc of this flip */ |
dc4ff116 | 847 | drm_crtc_vblank_get(crtc); |
ba124a41 | 848 | |
332b242f | 849 | /* Emit a page flip */ |
e1ef6b42 BS |
850 | if (swap_interval) { |
851 | ret = RING_SPACE(chan, 8); | |
060810d7 | 852 | if (ret) |
d7117e0d | 853 | goto fail_unreserve; |
b9d9dcda | 854 | |
e1ef6b42 BS |
855 | BEGIN_NV04(chan, NvSubImageBlit, 0x012c, 1); |
856 | OUT_RING (chan, 0); | |
857 | BEGIN_NV04(chan, NvSubImageBlit, 0x0134, 1); | |
858 | OUT_RING (chan, head); | |
859 | BEGIN_NV04(chan, NvSubImageBlit, 0x0100, 1); | |
860 | OUT_RING (chan, 0); | |
861 | BEGIN_NV04(chan, NvSubImageBlit, 0x0130, 1); | |
862 | OUT_RING (chan, 0); | |
d7117e0d BS |
863 | } |
864 | ||
e1ef6b42 BS |
865 | nouveau_bo_ref(new_bo, &dispnv04->image[head]); |
866 | ||
332b242f | 867 | ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence); |
332b242f FJ |
868 | if (ret) |
869 | goto fail_unreserve; | |
0ad72863 | 870 | mutex_unlock(&cli->mutex); |
332b242f FJ |
871 | |
872 | /* Update the crtc struct and cleanup */ | |
f4510a27 | 873 | crtc->primary->fb = fb; |
332b242f | 874 | |
809e9447 | 875 | nouveau_bo_fence(old_bo, fence, false); |
07ad6ca0 | 876 | ttm_bo_unreserve(&old_bo->bo); |
060810d7 | 877 | if (old_bo != new_bo) |
b580c9e2 | 878 | nouveau_bo_unpin(old_bo); |
332b242f FJ |
879 | nouveau_fence_unref(&fence); |
880 | return 0; | |
881 | ||
882 | fail_unreserve: | |
dc4ff116 | 883 | drm_crtc_vblank_put(crtc); |
07ad6ca0 | 884 | ttm_bo_unreserve(&old_bo->bo); |
060810d7 | 885 | fail_unpin: |
0ad72863 | 886 | mutex_unlock(&cli->mutex); |
060810d7 | 887 | if (old_bo != new_bo) |
b580c9e2 | 888 | nouveau_bo_unpin(new_bo); |
332b242f FJ |
889 | fail_free: |
890 | kfree(s); | |
891 | return ret; | |
892 | } | |
893 | ||
894 | int | |
895 | nouveau_finish_page_flip(struct nouveau_channel *chan, | |
896 | struct nouveau_page_flip_state *ps) | |
897 | { | |
f589be88 | 898 | struct nouveau_fence_chan *fctx = chan->fence; |
77145f1c BS |
899 | struct nouveau_drm *drm = chan->drm; |
900 | struct drm_device *dev = drm->dev; | |
332b242f FJ |
901 | struct nouveau_page_flip_state *s; |
902 | unsigned long flags; | |
903 | ||
904 | spin_lock_irqsave(&dev->event_lock, flags); | |
905 | ||
f589be88 | 906 | if (list_empty(&fctx->flip)) { |
77145f1c | 907 | NV_ERROR(drm, "unexpected pageflip\n"); |
332b242f FJ |
908 | spin_unlock_irqrestore(&dev->event_lock, flags); |
909 | return -EINVAL; | |
910 | } | |
911 | ||
f589be88 | 912 | s = list_first_entry(&fctx->flip, struct nouveau_page_flip_state, head); |
af4870e4 | 913 | if (s->event) { |
e1ef6b42 BS |
914 | drm_crtc_arm_vblank_event(s->crtc, s->event); |
915 | } else { | |
bbc8764f | 916 | /* Give up ownership of vblank for page-flipped crtc */ |
dc4ff116 | 917 | drm_crtc_vblank_put(s->crtc); |
af4870e4 | 918 | } |
ba124a41 | 919 | |
332b242f | 920 | list_del(&s->head); |
d7117e0d BS |
921 | if (ps) |
922 | *ps = *s; | |
332b242f FJ |
923 | kfree(s); |
924 | ||
925 | spin_unlock_irqrestore(&dev->event_lock, flags); | |
926 | return 0; | |
927 | } | |
33dbc27f | 928 | |
f589be88 | 929 | int |
898a2b32 | 930 | nouveau_flip_complete(struct nvif_notify *notify) |
f589be88 | 931 | { |
898a2b32 BS |
932 | struct nouveau_drm *drm = container_of(notify, typeof(*drm), flip); |
933 | struct nouveau_channel *chan = drm->channel; | |
f589be88 BS |
934 | struct nouveau_page_flip_state state; |
935 | ||
936 | if (!nouveau_finish_page_flip(chan, &state)) { | |
e1ef6b42 BS |
937 | nv_set_crtc_base(drm->dev, drm_crtc_index(state.crtc), |
938 | state.offset + state.crtc->y * | |
939 | state.pitch + state.crtc->x * | |
940 | state.bpp / 8); | |
f589be88 BS |
941 | } |
942 | ||
898a2b32 | 943 | return NVIF_NOTIFY_KEEP; |
f589be88 BS |
944 | } |
945 | ||
33dbc27f BS |
946 | int |
947 | nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev, | |
948 | struct drm_mode_create_dumb *args) | |
949 | { | |
fc1b0a02 | 950 | struct nouveau_cli *cli = nouveau_cli(file_priv); |
33dbc27f | 951 | struct nouveau_bo *bo; |
eaecf032 | 952 | uint32_t domain; |
33dbc27f BS |
953 | int ret; |
954 | ||
955 | args->pitch = roundup(args->width * (args->bpp / 8), 256); | |
956 | args->size = args->pitch * args->height; | |
957 | args->size = roundup(args->size, PAGE_SIZE); | |
958 | ||
eaecf032 | 959 | /* Use VRAM if there is any ; otherwise fallback to system memory */ |
1167c6bc | 960 | if (nouveau_drm(dev)->client.device.info.ram_size != 0) |
eaecf032 AC |
961 | domain = NOUVEAU_GEM_DOMAIN_VRAM; |
962 | else | |
963 | domain = NOUVEAU_GEM_DOMAIN_GART; | |
964 | ||
fc1b0a02 | 965 | ret = nouveau_gem_new(cli, args->size, 0, domain, 0, 0, &bo); |
33dbc27f BS |
966 | if (ret) |
967 | return ret; | |
968 | ||
55fb74ad DH |
969 | ret = drm_gem_handle_create(file_priv, &bo->gem, &args->handle); |
970 | drm_gem_object_unreference_unlocked(&bo->gem); | |
33dbc27f BS |
971 | return ret; |
972 | } | |
973 | ||
33dbc27f BS |
974 | int |
975 | nouveau_display_dumb_map_offset(struct drm_file *file_priv, | |
976 | struct drm_device *dev, | |
977 | uint32_t handle, uint64_t *poffset) | |
978 | { | |
979 | struct drm_gem_object *gem; | |
980 | ||
a8ad0bd8 | 981 | gem = drm_gem_object_lookup(file_priv, handle); |
33dbc27f | 982 | if (gem) { |
55fb74ad | 983 | struct nouveau_bo *bo = nouveau_gem_object(gem); |
72525b3f | 984 | *poffset = drm_vma_node_offset_addr(&bo->bo.vma_node); |
33dbc27f BS |
985 | drm_gem_object_unreference_unlocked(gem); |
986 | return 0; | |
987 | } | |
988 | ||
989 | return -ENOENT; | |
990 | } |