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drm/nouveau/kms: prepare to support legacy connector set_property with atomic
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6ee73861
BS
1/*
2 * Copyright (C) 2008 Maarten Maathuis.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 *
25 */
26
760285e7
DH
27#include <drm/drmP.h>
28#include <drm/drm_crtc_helper.h>
77145f1c 29
fdb751ef
BS
30#include <nvif/class.h>
31
6ee73861 32#include "nouveau_fbcon.h"
1a646342 33#include "dispnv04/hw.h"
332b242f
FJ
34#include "nouveau_crtc.h"
35#include "nouveau_dma.h"
77145f1c 36#include "nouveau_gem.h"
de691855 37#include "nouveau_connector.h"
45c4e0aa 38#include "nv50_display.h"
6ee73861 39
ebb945a9
BS
40#include "nouveau_fence.h"
41
7568b106 42#include <nvif/cl0046.h>
79ca2770 43#include <nvif/event.h>
1d7c71a3 44
51cb4b39 45static int
80bc340b 46nouveau_display_vblank_handler(struct nvif_notify *notify)
51cb4b39 47{
79ca2770
BS
48 struct nouveau_crtc *nv_crtc =
49 container_of(notify, typeof(*nv_crtc), vblank);
d297b020 50 drm_crtc_handle_vblank(&nv_crtc->base);
80bc340b 51 return NVIF_NOTIFY_KEEP;
51cb4b39
BS
52}
53
54int
88e72717 55nouveau_display_vblank_enable(struct drm_device *dev, unsigned int pipe)
51cb4b39 56{
b12f0ae9
BS
57 struct drm_crtc *crtc;
58 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
59 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
88e72717 60 if (nv_crtc->index == pipe) {
80bc340b 61 nvif_notify_get(&nv_crtc->vblank);
b12f0ae9
BS
62 return 0;
63 }
51cb4b39 64 }
b12f0ae9 65 return -EINVAL;
51cb4b39
BS
66}
67
68void
88e72717 69nouveau_display_vblank_disable(struct drm_device *dev, unsigned int pipe)
51cb4b39 70{
b12f0ae9
BS
71 struct drm_crtc *crtc;
72 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
73 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
88e72717 74 if (nv_crtc->index == pipe) {
80bc340b 75 nvif_notify_put(&nv_crtc->vblank);
b12f0ae9
BS
76 return;
77 }
78 }
51cb4b39
BS
79}
80
d83ef853
BS
81static inline int
82calc(int blanks, int blanke, int total, int line)
83{
84 if (blanke >= blanks) {
85 if (line >= blanks)
86 line -= total;
87 } else {
88 if (line >= blanks)
89 line -= total;
90 line -= blanke + 1;
91 }
92 return line;
93}
94
e08a1d97 95static int
d83ef853
BS
96nouveau_display_scanoutpos_head(struct drm_crtc *crtc, int *vpos, int *hpos,
97 ktime_t *stime, ktime_t *etime)
98{
4952b4d3
BS
99 struct {
100 struct nv04_disp_mthd_v0 base;
101 struct nv04_disp_scanoutpos_v0 scan;
102 } args = {
103 .base.method = NV04_DISP_SCANOUTPOS,
104 .base.head = nouveau_crtc(crtc)->index,
105 };
d83ef853 106 struct nouveau_display *disp = nouveau_display(crtc->dev);
eba1f35d 107 struct drm_vblank_crtc *vblank = &crtc->dev->vblank[drm_crtc_index(crtc)];
d83ef853
BS
108 int ret, retry = 1;
109
110 do {
4952b4d3 111 ret = nvif_mthd(&disp->disp, 0, &args, sizeof(args));
d83ef853
BS
112 if (ret != 0)
113 return 0;
114
4952b4d3 115 if (args.scan.vline) {
d83ef853
BS
116 ret |= DRM_SCANOUTPOS_ACCURATE;
117 ret |= DRM_SCANOUTPOS_VALID;
118 break;
119 }
120
eba1f35d 121 if (retry) ndelay(vblank->linedur_ns);
d83ef853
BS
122 } while (retry--);
123
4952b4d3
BS
124 *hpos = args.scan.hline;
125 *vpos = calc(args.scan.vblanks, args.scan.vblanke,
126 args.scan.vtotal, args.scan.vline);
127 if (stime) *stime = ns_to_ktime(args.scan.time[0]);
128 if (etime) *etime = ns_to_ktime(args.scan.time[1]);
d83ef853
BS
129
130 if (*vpos < 0)
3d3cbd84 131 ret |= DRM_SCANOUTPOS_IN_VBLANK;
d83ef853
BS
132 return ret;
133}
134
135int
88e72717
TR
136nouveau_display_scanoutpos(struct drm_device *dev, unsigned int pipe,
137 unsigned int flags, int *vpos, int *hpos,
138 ktime_t *stime, ktime_t *etime,
3bb403bf 139 const struct drm_display_mode *mode)
d83ef853
BS
140{
141 struct drm_crtc *crtc;
142
143 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
88e72717 144 if (nouveau_crtc(crtc)->index == pipe) {
d83ef853
BS
145 return nouveau_display_scanoutpos_head(crtc, vpos, hpos,
146 stime, etime);
147 }
148 }
149
150 return 0;
151}
152
153int
88e72717
TR
154nouveau_display_vblstamp(struct drm_device *dev, unsigned int pipe,
155 int *max_error, struct timeval *time, unsigned flags)
d83ef853
BS
156{
157 struct drm_crtc *crtc;
158
159 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
88e72717 160 if (nouveau_crtc(crtc)->index == pipe) {
d83ef853 161 return drm_calc_vbltimestamp_from_scanoutpos(dev,
88e72717 162 pipe, max_error, time, flags,
d83ef853
BS
163 &crtc->hwmode);
164 }
165 }
166
167 return -EINVAL;
168}
169
51cb4b39
BS
170static void
171nouveau_display_vblank_fini(struct drm_device *dev)
172{
b12f0ae9 173 struct drm_crtc *crtc;
51cb4b39 174
1139ffb9
BS
175 drm_vblank_cleanup(dev);
176
b12f0ae9
BS
177 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
178 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
80bc340b 179 nvif_notify_fini(&nv_crtc->vblank);
51cb4b39 180 }
51cb4b39
BS
181}
182
183static int
184nouveau_display_vblank_init(struct drm_device *dev)
185{
80bc340b 186 struct nouveau_display *disp = nouveau_display(dev);
b12f0ae9
BS
187 struct drm_crtc *crtc;
188 int ret;
51cb4b39 189
b12f0ae9
BS
190 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
191 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
a01ca78c 192 ret = nvif_notify_init(&disp->disp,
79ca2770 193 nouveau_display_vblank_handler, false,
80bc340b 194 NV04_DISP_NTFY_VBLANK,
79ca2770
BS
195 &(struct nvif_notify_head_req_v0) {
196 .head = nv_crtc->index,
197 },
198 sizeof(struct nvif_notify_head_req_v0),
199 sizeof(struct nvif_notify_head_rep_v0),
200 &nv_crtc->vblank);
51cb4b39
BS
201 if (ret) {
202 nouveau_display_vblank_fini(dev);
203 return ret;
204 }
205 }
206
207 ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
208 if (ret) {
209 nouveau_display_vblank_fini(dev);
210 return ret;
211 }
212
213 return 0;
214}
215
6ee73861
BS
216static void
217nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb)
218{
219 struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
ab0af559
BS
220 struct nouveau_display *disp = nouveau_display(drm_fb->dev);
221
222 if (disp->fb_dtor)
223 disp->fb_dtor(drm_fb);
6ee73861 224
bc9025bd 225 if (fb->nvbo)
55fb74ad 226 drm_gem_object_unreference_unlocked(&fb->nvbo->gem);
6ee73861
BS
227
228 drm_framebuffer_cleanup(drm_fb);
229 kfree(fb);
230}
231
232static int
233nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb,
234 struct drm_file *file_priv,
235 unsigned int *handle)
236{
237 struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
238
55fb74ad 239 return drm_gem_handle_create(file_priv, &fb->nvbo->gem, handle);
6ee73861
BS
240}
241
242static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = {
243 .destroy = nouveau_user_framebuffer_destroy,
244 .create_handle = nouveau_user_framebuffer_create_handle,
245};
246
38651674 247int
1608a0fb
BS
248nouveau_framebuffer_new(struct drm_device *dev,
249 const struct drm_mode_fb_cmd2 *mode_cmd,
250 struct nouveau_bo *nvbo,
251 struct nouveau_framebuffer **pfb)
6ee73861 252{
ab0af559 253 struct nouveau_display *disp = nouveau_display(dev);
1608a0fb 254 struct nouveau_framebuffer *fb;
6ee73861
BS
255 int ret;
256
1608a0fb
BS
257 if (!(fb = kzalloc(sizeof(*fb), GFP_KERNEL)))
258 return -ENOMEM;
45c4e0aa 259
1608a0fb
BS
260 drm_helper_mode_fill_fb_struct(&fb->base, mode_cmd);
261 fb->nvbo = nvbo;
ab0af559 262
1608a0fb
BS
263 ret = drm_framebuffer_init(dev, &fb->base, &nouveau_framebuffer_funcs);
264 if (ret == 0) {
265 if (!disp->fb_ctor || !(ret = disp->fb_ctor(&fb->base))) {
266 *pfb = fb;
267 return 0;
268 }
269 disp->fb_dtor(&fb->base);
270 drm_framebuffer_cleanup(&fb->base);
c7d73f6a
DV
271 }
272
1608a0fb 273 kfree(fb);
ab0af559 274 return ret;
6ee73861
BS
275}
276
277static struct drm_framebuffer *
278nouveau_user_framebuffer_create(struct drm_device *dev,
279 struct drm_file *file_priv,
1eb83451 280 const struct drm_mode_fb_cmd2 *mode_cmd)
6ee73861 281{
1608a0fb
BS
282 struct nouveau_framebuffer *fb;
283 struct nouveau_bo *nvbo;
6ee73861 284 struct drm_gem_object *gem;
1608a0fb 285 int ret;
6ee73861 286
a8ad0bd8 287 gem = drm_gem_object_lookup(file_priv, mode_cmd->handles[0]);
6ee73861 288 if (!gem)
cce13ff7 289 return ERR_PTR(-ENOENT);
1608a0fb 290 nvbo = nouveau_gem_object(gem);
6ee73861 291
1608a0fb
BS
292 ret = nouveau_framebuffer_new(dev, mode_cmd, nvbo, &fb);
293 if (ret == 0)
294 return &fb->base;
fdfb8332 295
e889c244 296 drm_gem_object_unreference_unlocked(gem);
fdfb8332 297 return ERR_PTR(ret);
6ee73861
BS
298}
299
27d5030a 300static const struct drm_mode_config_funcs nouveau_mode_config_funcs = {
6ee73861 301 .fb_create = nouveau_user_framebuffer_create,
eb1f8e4f 302 .output_poll_changed = nouveau_fbcon_output_poll_changed,
6ee73861
BS
303};
304
b29caa58 305
4a67d391 306struct nouveau_drm_prop_enum_list {
de691855 307 u8 gen_mask;
b29caa58
BS
308 int type;
309 char *name;
310};
311
4a67d391 312static struct nouveau_drm_prop_enum_list underscan[] = {
92854622
BS
313 { 6, UNDERSCAN_AUTO, "auto" },
314 { 6, UNDERSCAN_OFF, "off" },
315 { 6, UNDERSCAN_ON, "on" },
de691855 316 {}
b29caa58
BS
317};
318
4a67d391 319static struct nouveau_drm_prop_enum_list dither_mode[] = {
de691855
BS
320 { 7, DITHERING_MODE_AUTO, "auto" },
321 { 7, DITHERING_MODE_OFF, "off" },
322 { 1, DITHERING_MODE_ON, "on" },
323 { 6, DITHERING_MODE_STATIC2X2, "static 2x2" },
324 { 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" },
325 { 4, DITHERING_MODE_TEMPORAL, "temporal" },
326 {}
327};
328
4a67d391 329static struct nouveau_drm_prop_enum_list dither_depth[] = {
de691855
BS
330 { 6, DITHERING_DEPTH_AUTO, "auto" },
331 { 6, DITHERING_DEPTH_6BPC, "6 bpc" },
332 { 6, DITHERING_DEPTH_8BPC, "8 bpc" },
333 {}
334};
335
336#define PROP_ENUM(p,gen,n,list) do { \
4a67d391 337 struct nouveau_drm_prop_enum_list *l = (list); \
de691855
BS
338 int c = 0; \
339 while (l->gen_mask) { \
340 if (l->gen_mask & (1 << (gen))) \
341 c++; \
342 l++; \
343 } \
344 if (c) { \
345 p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c); \
346 l = (list); \
347 c = 0; \
348 while (p && l->gen_mask) { \
349 if (l->gen_mask & (1 << (gen))) { \
350 drm_property_add_enum(p, c, l->type, l->name); \
351 c++; \
352 } \
353 l++; \
354 } \
355 } \
356} while(0)
357
f62b27db
BS
358int
359nouveau_display_init(struct drm_device *dev)
360{
77145f1c 361 struct nouveau_display *disp = nouveau_display(dev);
898a2b32 362 struct nouveau_drm *drm = nouveau_drm(dev);
52c4d767 363 struct drm_connector *connector;
f62b27db
BS
364 int ret;
365
366 ret = disp->init(dev);
52c4d767
BS
367 if (ret)
368 return ret;
369
7df898b1 370 /* enable polling for external displays */
52c4d767
BS
371 drm_kms_helper_poll_enable(dev);
372
373 /* enable hotplug interrupts */
374 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
375 struct nouveau_connector *conn = nouveau_connector(connector);
80bc340b 376 nvif_notify_get(&conn->hpd);
f62b27db
BS
377 }
378
898a2b32
BS
379 /* enable flip completion events */
380 nvif_notify_get(&drm->flip);
f62b27db
BS
381 return ret;
382}
383
384void
3b4c0abb 385nouveau_display_fini(struct drm_device *dev, bool suspend)
f62b27db 386{
77145f1c 387 struct nouveau_display *disp = nouveau_display(dev);
898a2b32 388 struct nouveau_drm *drm = nouveau_drm(dev);
52c4d767 389 struct drm_connector *connector;
9cba5efa
MK
390 int head;
391
3b4c0abb
BS
392 if (!suspend)
393 drm_crtc_force_disable_all(dev);
394
9cba5efa
MK
395 /* Make sure that drm and hw vblank irqs get properly disabled. */
396 for (head = 0; head < dev->mode_config.num_crtc; head++)
397 drm_vblank_off(dev, head);
52c4d767 398
898a2b32
BS
399 /* disable flip completion events */
400 nvif_notify_put(&drm->flip);
401
52c4d767
BS
402 /* disable hotplug interrupts */
403 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
404 struct nouveau_connector *conn = nouveau_connector(connector);
80bc340b 405 nvif_notify_put(&conn->hpd);
52c4d767 406 }
f62b27db
BS
407
408 drm_kms_helper_poll_disable(dev);
409 disp->fini(dev);
410}
411
9c210f37
BS
412static void
413nouveau_display_create_properties(struct drm_device *dev)
27d5030a 414{
9c210f37
BS
415 struct nouveau_display *disp = nouveau_display(dev);
416 int gen;
de691855 417
648d4dfd 418 if (disp->disp.oclass < NV50_DISP)
de691855
BS
419 gen = 0;
420 else
648d4dfd 421 if (disp->disp.oclass < GF110_DISP)
de691855
BS
422 gen = 1;
423 else
424 gen = 2;
425
426 PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode);
427 PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth);
428 PROP_ENUM(disp->underscan_property, gen, "underscan", underscan);
b29caa58
BS
429
430 disp->underscan_hborder_property =
d9bc3c02 431 drm_property_create_range(dev, 0, "underscan hborder", 0, 128);
b29caa58
BS
432
433 disp->underscan_vborder_property =
d9bc3c02 434 drm_property_create_range(dev, 0, "underscan vborder", 0, 128);
b29caa58 435
9c210f37
BS
436 if (gen < 1)
437 return;
df26bc9c 438
9c210f37
BS
439 /* -90..+90 */
440 disp->vibrant_hue_property =
441 drm_property_create_range(dev, 0, "vibrant hue", 0, 180);
442
443 /* -100..+100 */
444 disp->color_vibrance_property =
445 drm_property_create_range(dev, 0, "color vibrance", 0, 200);
446}
447
448int
449nouveau_display_create(struct drm_device *dev)
450{
451 struct nouveau_drm *drm = nouveau_drm(dev);
7e8820fe 452 struct nvkm_device *device = nvxx_device(&drm->device);
9c210f37
BS
453 struct nouveau_display *disp;
454 int ret;
455
456 disp = drm->display = kzalloc(sizeof(*disp), GFP_KERNEL);
457 if (!disp)
458 return -ENOMEM;
459
460 drm_mode_config_init(dev);
461 drm_mode_create_scaling_mode_property(dev);
462 drm_mode_create_dvi_i_properties(dev);
df26bc9c 463
e6ecefaa 464 dev->mode_config.funcs = &nouveau_mode_config_funcs;
7e8820fe 465 dev->mode_config.fb_base = device->func->resource_addr(device, 1);
27d5030a
BS
466
467 dev->mode_config.min_width = 0;
468 dev->mode_config.min_height = 0;
967e7bde 469 if (drm->device.info.family < NV_DEVICE_INFO_V0_CELSIUS) {
27d5030a
BS
470 dev->mode_config.max_width = 2048;
471 dev->mode_config.max_height = 2048;
472 } else
967e7bde 473 if (drm->device.info.family < NV_DEVICE_INFO_V0_TESLA) {
27d5030a
BS
474 dev->mode_config.max_width = 4096;
475 dev->mode_config.max_height = 4096;
5102ec3e
IM
476 } else
477 if (drm->device.info.family < NV_DEVICE_INFO_V0_FERMI) {
27d5030a
BS
478 dev->mode_config.max_width = 8192;
479 dev->mode_config.max_height = 8192;
5102ec3e
IM
480 } else {
481 dev->mode_config.max_width = 16384;
482 dev->mode_config.max_height = 16384;
27d5030a
BS
483 }
484
f1377998
DA
485 dev->mode_config.preferred_depth = 24;
486 dev->mode_config.prefer_shadow = 1;
487
967e7bde 488 if (drm->device.info.chipset < 0x11)
b9d9dcda
BS
489 dev->mode_config.async_page_flip = false;
490 else
491 dev->mode_config.async_page_flip = true;
492
f62b27db
BS
493 drm_kms_helper_poll_init(dev);
494 drm_kms_helper_poll_disable(dev);
495
771fa0e4 496 if (nouveau_modeset != 2 && drm->vbios.dcb.entries) {
2332b311 497 static const u16 oclass[] = {
fd47877f 498 GP104_DISP,
f9d5cbb3 499 GP100_DISP,
db1eb528 500 GM200_DISP,
648d4dfd
BS
501 GM107_DISP,
502 GK110_DISP,
503 GK104_DISP,
504 GF110_DISP,
505 GT214_DISP,
506 GT206_DISP,
507 GT200_DISP,
508 G82_DISP,
509 NV50_DISP,
510 NV04_DISP,
2332b311
BS
511 };
512 int i;
513
514 for (i = 0, ret = -ENODEV; ret && i < ARRAY_SIZE(oclass); i++) {
fcf3f91c
BS
515 ret = nvif_object_init(&drm->device.object, 0,
516 oclass[i], NULL, 0, &disp->disp);
2332b311
BS
517 }
518
519 if (ret == 0) {
9c210f37 520 nouveau_display_create_properties(dev);
648d4dfd 521 if (disp->disp.oclass < NV50_DISP)
2332b311
BS
522 ret = nv04_display_create(dev);
523 else
524 ret = nv50_display_create(dev);
525 }
fc162088
BS
526 } else {
527 ret = 0;
528 }
9430738d 529
fc162088
BS
530 if (ret)
531 goto disp_create_err;
9430738d 532
07193f70
BS
533 drm_mode_config_reset(dev);
534
fc162088 535 if (dev->mode_config.num_crtc) {
51cb4b39 536 ret = nouveau_display_vblank_init(dev);
fc162088
BS
537 if (ret)
538 goto vblank_err;
f62b27db
BS
539 }
540
fc162088 541 nouveau_backlight_init(dev);
5ace2c9d
MS
542 return 0;
543
544vblank_err:
77145f1c 545 disp->dtor(dev);
5ace2c9d
MS
546disp_create_err:
547 drm_kms_helper_poll_fini(dev);
548 drm_mode_config_cleanup(dev);
2a44e499 549 return ret;
27d5030a
BS
550}
551
552void
553nouveau_display_destroy(struct drm_device *dev)
554{
77145f1c 555 struct nouveau_display *disp = nouveau_display(dev);
27d5030a 556
77145f1c 557 nouveau_backlight_exit(dev);
51cb4b39 558 nouveau_display_vblank_fini(dev);
f62b27db 559
d6bf2f37
BS
560 drm_kms_helper_poll_fini(dev);
561 drm_mode_config_cleanup(dev);
562
9430738d
BS
563 if (disp->dtor)
564 disp->dtor(dev);
f62b27db 565
0ad72863 566 nvif_object_fini(&disp->disp);
2332b311 567
77145f1c
BS
568 nouveau_drm(dev)->display = NULL;
569 kfree(disp);
570}
571
572int
6fbb702e 573nouveau_display_suspend(struct drm_device *dev, bool runtime)
77145f1c 574{
77145f1c
BS
575 struct drm_crtc *crtc;
576
3b4c0abb 577 nouveau_display_fini(dev, true);
77145f1c 578
77145f1c
BS
579 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
580 struct nouveau_framebuffer *nouveau_fb;
581
f4510a27 582 nouveau_fb = nouveau_framebuffer(crtc->primary->fb);
77145f1c
BS
583 if (!nouveau_fb || !nouveau_fb->nvbo)
584 continue;
585
586 nouveau_bo_unpin(nouveau_fb->nvbo);
587 }
588
589 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
590 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
5a560252 591 if (nv_crtc->cursor.nvbo) {
4dc63933
ML
592 if (nv_crtc->cursor.set_offset)
593 nouveau_bo_unmap(nv_crtc->cursor.nvbo);
5a560252
BS
594 nouveau_bo_unpin(nv_crtc->cursor.nvbo);
595 }
77145f1c
BS
596 }
597
598 return 0;
599}
600
601void
6fbb702e 602nouveau_display_resume(struct drm_device *dev, bool runtime)
77145f1c
BS
603{
604 struct nouveau_drm *drm = nouveau_drm(dev);
605 struct drm_crtc *crtc;
6fbb702e 606 int ret, head;
77145f1c 607
6fbb702e 608 /* re-pin fb/cursors */
77145f1c
BS
609 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
610 struct nouveau_framebuffer *nouveau_fb;
611
f4510a27 612 nouveau_fb = nouveau_framebuffer(crtc->primary->fb);
77145f1c
BS
613 if (!nouveau_fb || !nouveau_fb->nvbo)
614 continue;
615
547ad072 616 ret = nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM, true);
c9a6fd97
BS
617 if (ret)
618 NV_ERROR(drm, "Could not pin framebuffer\n");
77145f1c
BS
619 }
620
621 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
622 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
5a560252
BS
623 if (!nv_crtc->cursor.nvbo)
624 continue;
77145f1c 625
547ad072 626 ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM, true);
4dc63933 627 if (!ret && nv_crtc->cursor.set_offset)
77145f1c
BS
628 ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
629 if (ret)
630 NV_ERROR(drm, "Could not pin/map cursor.\n");
631 }
9cba5efa 632
77145f1c
BS
633 nouveau_display_init(dev);
634
635 /* Force CLUT to get re-loaded during modeset */
636 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
637 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
638
639 nv_crtc->lut.depth = 0;
640 }
641
6fbb702e
BS
642 /* This should ensure we don't hit a locking problem when someone
643 * wakes us up via a connector. We should never go into suspend
644 * while the display is on anyways.
645 */
646 if (runtime)
647 return;
648
77145f1c
BS
649 drm_helper_resume_force_mode(dev);
650
ff683df7
MK
651 /* Make sure that drm and hw vblank irqs get resumed if needed. */
652 for (head = 0; head < dev->mode_config.num_crtc; head++)
653 drm_vblank_on(dev, head);
654
77145f1c
BS
655 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
656 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
77145f1c 657
5a560252 658 if (!nv_crtc->cursor.nvbo)
036a12b6 659 continue;
4dc63933
ML
660
661 if (nv_crtc->cursor.set_offset)
662 nv_crtc->cursor.set_offset(nv_crtc, nv_crtc->cursor.nvbo->bo.offset);
77145f1c
BS
663 nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
664 nv_crtc->cursor_saved_y);
665 }
27d5030a
BS
666}
667
332b242f
FJ
668static int
669nouveau_page_flip_emit(struct nouveau_channel *chan,
670 struct nouveau_bo *old_bo,
671 struct nouveau_bo *new_bo,
672 struct nouveau_page_flip_state *s,
673 struct nouveau_fence **pfence)
674{
f589be88 675 struct nouveau_fence_chan *fctx = chan->fence;
77145f1c
BS
676 struct nouveau_drm *drm = chan->drm;
677 struct drm_device *dev = drm->dev;
332b242f
FJ
678 unsigned long flags;
679 int ret;
680
681 /* Queue it to the pending list */
682 spin_lock_irqsave(&dev->event_lock, flags);
f589be88 683 list_add_tail(&s->head, &fctx->flip);
332b242f
FJ
684 spin_unlock_irqrestore(&dev->event_lock, flags);
685
686 /* Synchronize with the old framebuffer */
e3be4c23 687 ret = nouveau_fence_sync(old_bo, chan, false, false);
332b242f
FJ
688 if (ret)
689 goto fail;
690
691 /* Emit the pageflip */
1e303c03 692 ret = RING_SPACE(chan, 2);
332b242f
FJ
693 if (ret)
694 goto fail;
695
967e7bde 696 if (drm->device.info.family < NV_DEVICE_INFO_V0_FERMI)
6d597027 697 BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1);
1e303c03
BS
698 else
699 BEGIN_NVC0(chan, FermiSw, NV_SW_PAGE_FLIP, 1);
700 OUT_RING (chan, 0x00000000);
bd2f2037 701 FIRE_RING (chan);
332b242f 702
264ce192 703 ret = nouveau_fence_new(chan, false, pfence);
332b242f
FJ
704 if (ret)
705 goto fail;
706
707 return 0;
708fail:
709 spin_lock_irqsave(&dev->event_lock, flags);
710 list_del(&s->head);
711 spin_unlock_irqrestore(&dev->event_lock, flags);
712 return ret;
713}
714
715int
716nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
b9d9dcda 717 struct drm_pending_vblank_event *event, u32 flags)
332b242f 718{
b9d9dcda 719 const int swap_interval = (flags & DRM_MODE_PAGE_FLIP_ASYNC) ? 0 : 1;
332b242f 720 struct drm_device *dev = crtc->dev;
77145f1c 721 struct nouveau_drm *drm = nouveau_drm(dev);
f4510a27 722 struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->primary->fb)->nvbo;
332b242f
FJ
723 struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo;
724 struct nouveau_page_flip_state *s;
0ad72863
BS
725 struct nouveau_channel *chan;
726 struct nouveau_cli *cli;
332b242f
FJ
727 struct nouveau_fence *fence;
728 int ret;
729
0ad72863
BS
730 chan = drm->channel;
731 if (!chan)
332b242f 732 return -ENODEV;
a01ca78c 733 cli = (void *)chan->user.client;
332b242f
FJ
734
735 s = kzalloc(sizeof(*s), GFP_KERNEL);
736 if (!s)
737 return -ENOMEM;
738
d5c1e84b 739 if (new_bo != old_bo) {
547ad072 740 ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM, true);
d5c1e84b
ML
741 if (ret)
742 goto fail_free;
743 }
744
0ad72863 745 mutex_lock(&cli->mutex);
dfd5e50e 746 ret = ttm_bo_reserve(&new_bo->bo, true, false, NULL);
eae389f9 747 if (ret)
09c3de13 748 goto fail_unpin;
b580c9e2 749
eae389f9 750 /* synchronise rendering channel with the kernel's channel */
e3be4c23 751 ret = nouveau_fence_sync(new_bo, chan, false, true);
bdaf7ddf
ML
752 if (ret) {
753 ttm_bo_unreserve(&new_bo->bo);
060810d7 754 goto fail_unpin;
bdaf7ddf 755 }
b580c9e2 756
bdaf7ddf
ML
757 if (new_bo != old_bo) {
758 ttm_bo_unreserve(&new_bo->bo);
759
dfd5e50e 760 ret = ttm_bo_reserve(&old_bo->bo, true, false, NULL);
bdaf7ddf
ML
761 if (ret)
762 goto fail_unpin;
763 }
b580c9e2
ML
764
765 /* Initialize a page flip struct */
766 *s = (struct nouveau_page_flip_state)
dc4ff116 767 { { }, event, crtc, fb->bits_per_pixel, fb->pitches[0],
b580c9e2
ML
768 new_bo->bo.offset };
769
ba124a41 770 /* Keep vblanks on during flip, for the target crtc of this flip */
dc4ff116 771 drm_crtc_vblank_get(crtc);
ba124a41 772
332b242f 773 /* Emit a page flip */
967e7bde 774 if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
b9d9dcda 775 ret = nv50_display_flip_next(crtc, fb, chan, swap_interval);
060810d7 776 if (ret)
d7117e0d 777 goto fail_unreserve;
78ae0ad4
BS
778 } else {
779 struct nv04_display *dispnv04 = nv04_display(dev);
b9d9dcda
BS
780 int head = nouveau_crtc(crtc)->index;
781
782 if (swap_interval) {
783 ret = RING_SPACE(chan, 8);
784 if (ret)
785 goto fail_unreserve;
786
787 BEGIN_NV04(chan, NvSubImageBlit, 0x012c, 1);
788 OUT_RING (chan, 0);
789 BEGIN_NV04(chan, NvSubImageBlit, 0x0134, 1);
790 OUT_RING (chan, head);
791 BEGIN_NV04(chan, NvSubImageBlit, 0x0100, 1);
792 OUT_RING (chan, 0);
793 BEGIN_NV04(chan, NvSubImageBlit, 0x0130, 1);
794 OUT_RING (chan, 0);
795 }
796
797 nouveau_bo_ref(new_bo, &dispnv04->image[head]);
d7117e0d
BS
798 }
799
332b242f 800 ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence);
332b242f
FJ
801 if (ret)
802 goto fail_unreserve;
0ad72863 803 mutex_unlock(&cli->mutex);
332b242f
FJ
804
805 /* Update the crtc struct and cleanup */
f4510a27 806 crtc->primary->fb = fb;
332b242f 807
809e9447 808 nouveau_bo_fence(old_bo, fence, false);
07ad6ca0 809 ttm_bo_unreserve(&old_bo->bo);
060810d7 810 if (old_bo != new_bo)
b580c9e2 811 nouveau_bo_unpin(old_bo);
332b242f
FJ
812 nouveau_fence_unref(&fence);
813 return 0;
814
815fail_unreserve:
dc4ff116 816 drm_crtc_vblank_put(crtc);
07ad6ca0 817 ttm_bo_unreserve(&old_bo->bo);
060810d7 818fail_unpin:
0ad72863 819 mutex_unlock(&cli->mutex);
060810d7 820 if (old_bo != new_bo)
b580c9e2 821 nouveau_bo_unpin(new_bo);
332b242f
FJ
822fail_free:
823 kfree(s);
824 return ret;
825}
826
827int
828nouveau_finish_page_flip(struct nouveau_channel *chan,
829 struct nouveau_page_flip_state *ps)
830{
f589be88 831 struct nouveau_fence_chan *fctx = chan->fence;
77145f1c
BS
832 struct nouveau_drm *drm = chan->drm;
833 struct drm_device *dev = drm->dev;
332b242f
FJ
834 struct nouveau_page_flip_state *s;
835 unsigned long flags;
836
837 spin_lock_irqsave(&dev->event_lock, flags);
838
f589be88 839 if (list_empty(&fctx->flip)) {
77145f1c 840 NV_ERROR(drm, "unexpected pageflip\n");
332b242f
FJ
841 spin_unlock_irqrestore(&dev->event_lock, flags);
842 return -EINVAL;
843 }
844
f589be88 845 s = list_first_entry(&fctx->flip, struct nouveau_page_flip_state, head);
af4870e4 846 if (s->event) {
bbc8764f 847 if (drm->device.info.family < NV_DEVICE_INFO_V0_TESLA) {
dc4ff116 848 drm_crtc_arm_vblank_event(s->crtc, s->event);
bbc8764f 849 } else {
dc4ff116 850 drm_crtc_send_vblank_event(s->crtc, s->event);
af4870e4 851
bbc8764f 852 /* Give up ownership of vblank for page-flipped crtc */
dc4ff116 853 drm_crtc_vblank_put(s->crtc);
bbc8764f
DV
854 }
855 }
856 else {
857 /* Give up ownership of vblank for page-flipped crtc */
dc4ff116 858 drm_crtc_vblank_put(s->crtc);
af4870e4 859 }
ba124a41 860
332b242f 861 list_del(&s->head);
d7117e0d
BS
862 if (ps)
863 *ps = *s;
332b242f
FJ
864 kfree(s);
865
866 spin_unlock_irqrestore(&dev->event_lock, flags);
867 return 0;
868}
33dbc27f 869
f589be88 870int
898a2b32 871nouveau_flip_complete(struct nvif_notify *notify)
f589be88 872{
898a2b32
BS
873 struct nouveau_drm *drm = container_of(notify, typeof(*drm), flip);
874 struct nouveau_channel *chan = drm->channel;
f589be88
BS
875 struct nouveau_page_flip_state state;
876
877 if (!nouveau_finish_page_flip(chan, &state)) {
967e7bde 878 if (drm->device.info.family < NV_DEVICE_INFO_V0_TESLA) {
dc4ff116
GP
879 nv_set_crtc_base(drm->dev, drm_crtc_index(state.crtc),
880 state.offset + state.crtc->y *
881 state.pitch + state.crtc->x *
882 state.bpp / 8);
f589be88
BS
883 }
884 }
885
898a2b32 886 return NVIF_NOTIFY_KEEP;
f589be88
BS
887}
888
33dbc27f
BS
889int
890nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev,
891 struct drm_mode_create_dumb *args)
892{
893 struct nouveau_bo *bo;
eaecf032 894 uint32_t domain;
33dbc27f
BS
895 int ret;
896
897 args->pitch = roundup(args->width * (args->bpp / 8), 256);
898 args->size = args->pitch * args->height;
899 args->size = roundup(args->size, PAGE_SIZE);
900
eaecf032
AC
901 /* Use VRAM if there is any ; otherwise fallback to system memory */
902 if (nouveau_drm(dev)->device.info.ram_size != 0)
903 domain = NOUVEAU_GEM_DOMAIN_VRAM;
904 else
905 domain = NOUVEAU_GEM_DOMAIN_GART;
906
907 ret = nouveau_gem_new(dev, args->size, 0, domain, 0, 0, &bo);
33dbc27f
BS
908 if (ret)
909 return ret;
910
55fb74ad
DH
911 ret = drm_gem_handle_create(file_priv, &bo->gem, &args->handle);
912 drm_gem_object_unreference_unlocked(&bo->gem);
33dbc27f
BS
913 return ret;
914}
915
33dbc27f
BS
916int
917nouveau_display_dumb_map_offset(struct drm_file *file_priv,
918 struct drm_device *dev,
919 uint32_t handle, uint64_t *poffset)
920{
921 struct drm_gem_object *gem;
922
a8ad0bd8 923 gem = drm_gem_object_lookup(file_priv, handle);
33dbc27f 924 if (gem) {
55fb74ad 925 struct nouveau_bo *bo = nouveau_gem_object(gem);
72525b3f 926 *poffset = drm_vma_node_offset_addr(&bo->bo.vma_node);
33dbc27f
BS
927 drm_gem_object_unreference_unlocked(gem);
928 return 0;
929 }
930
931 return -ENOENT;
932}