[mirror_ubuntu-artful-kernel.git] / drivers / gpu / drm / nouveau / nouveau_display.c

/*
 * Copyright (C) 2008 Maarten Maathuis.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining
 * a copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sublicense, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial
 * portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
 */

#include "drmP.h"
#include "drm_crtc_helper.h"
#include "nouveau_drv.h"
#include "nouveau_fb.h"
#include "nouveau_fbcon.h"
#include "nouveau_hw.h"
#include "nouveau_crtc.h"
#include "nouveau_dma.h"
#include "nouveau_connector.h"
#include "nouveau_gpio.h"
#include "nv50_display.h"

static void
nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb)
{
	struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);

	if (fb->nvbo)
		drm_gem_object_unreference_unlocked(fb->nvbo->gem);

	drm_framebuffer_cleanup(drm_fb);
	kfree(fb);
}

static int
nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb,
				       struct drm_file *file_priv,
				       unsigned int *handle)
{
	struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);

	return drm_gem_handle_create(file_priv, fb->nvbo->gem, handle);
}

static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = {
	.destroy = nouveau_user_framebuffer_destroy,
	.create_handle = nouveau_user_framebuffer_create_handle,
};

int
nouveau_framebuffer_init(struct drm_device *dev,
			 struct nouveau_framebuffer *nv_fb,
			 struct drm_mode_fb_cmd2 *mode_cmd,
			 struct nouveau_bo *nvbo)
{
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct drm_framebuffer *fb = &nv_fb->base;
	int ret;

	ret = drm_framebuffer_init(dev, fb, &nouveau_framebuffer_funcs);
	if (ret) {
		return ret;
	}

	drm_helper_mode_fill_fb_struct(fb, mode_cmd);
	nv_fb->nvbo = nvbo;

	if (dev_priv->card_type >= NV_50) {
		u32 tile_flags = nouveau_bo_tile_layout(nvbo);
		if (tile_flags == 0x7a00 ||
		    tile_flags == 0xfe00)
			nv_fb->r_dma = NvEvoFB32;
		else
		if (tile_flags == 0x7000)
			nv_fb->r_dma = NvEvoFB16;
		else
			nv_fb->r_dma = NvEvoVRAM_LP;

		switch (fb->depth) {
		case  8: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_8; break;
		case 15: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_15; break;
		case 16: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_16; break;
		case 24:
		case 32: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_24; break;
		case 30: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_30; break;
		default:
			 NV_ERROR(dev, "unknown depth %d\n", fb->depth);
			 return -EINVAL;
		}

		if (dev_priv->chipset == 0x50)
			nv_fb->r_format |= (tile_flags << 8);

		if (!tile_flags) {
			if (dev_priv->card_type < NV_D0)
				nv_fb->r_pitch = 0x00100000 | fb->pitches[0];
			else
				nv_fb->r_pitch = 0x01000000 | fb->pitches[0];
		} else {
			u32 mode = nvbo->tile_mode;
			if (dev_priv->card_type >= NV_C0)
				mode >>= 4;
			nv_fb->r_pitch = ((fb->pitches[0] / 4) << 4) | mode;
		}
	}

	return 0;
}

static struct drm_framebuffer *
nouveau_user_framebuffer_create(struct drm_device *dev,
				struct drm_file *file_priv,
				struct drm_mode_fb_cmd2 *mode_cmd)
{
	struct nouveau_framebuffer *nouveau_fb;
	struct drm_gem_object *gem;
	int ret;

	gem = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]);
	if (!gem)
		return ERR_PTR(-ENOENT);

	nouveau_fb = kzalloc(sizeof(struct nouveau_framebuffer), GFP_KERNEL);
	if (!nouveau_fb)
		return ERR_PTR(-ENOMEM);

	ret = nouveau_framebuffer_init(dev, nouveau_fb, mode_cmd, nouveau_gem_object(gem));
	if (ret) {
		drm_gem_object_unreference(gem);
		return ERR_PTR(ret);
	}

	return &nouveau_fb->base;
}

static const struct drm_mode_config_funcs nouveau_mode_config_funcs = {
	.fb_create = nouveau_user_framebuffer_create,
	.output_poll_changed = nouveau_fbcon_output_poll_changed,
};


struct nouveau_drm_prop_enum_list {
	u8 gen_mask;
	int type;
	char *name;
};

static struct nouveau_drm_prop_enum_list underscan[] = {
	{ 6, UNDERSCAN_AUTO, "auto" },
	{ 6, UNDERSCAN_OFF, "off" },
	{ 6, UNDERSCAN_ON, "on" },
	{}
};

static struct nouveau_drm_prop_enum_list dither_mode[] = {
	{ 7, DITHERING_MODE_AUTO, "auto" },
	{ 7, DITHERING_MODE_OFF, "off" },
	{ 1, DITHERING_MODE_ON, "on" },
	{ 6, DITHERING_MODE_STATIC2X2, "static 2x2" },
	{ 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" },
	{ 4, DITHERING_MODE_TEMPORAL, "temporal" },
	{}
};

static struct nouveau_drm_prop_enum_list dither_depth[] = {
	{ 6, DITHERING_DEPTH_AUTO, "auto" },
	{ 6, DITHERING_DEPTH_6BPC, "6 bpc" },
	{ 6, DITHERING_DEPTH_8BPC, "8 bpc" },
	{}
};

#define PROP_ENUM(p,gen,n,list) do {                                           \
	struct nouveau_drm_prop_enum_list *l = (list);                         \
	int c = 0;                                                             \
	while (l->gen_mask) {                                                  \
		if (l->gen_mask & (1 << (gen)))                                \
			c++;                                                   \
		l++;                                                           \
	}                                                                      \
	if (c) {                                                               \
		p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c);        \
		l = (list);                                                    \
		c = 0;                                                         \
		while (p && l->gen_mask) {                                     \
			if (l->gen_mask & (1 << (gen))) {                      \
				drm_property_add_enum(p, c, l->type, l->name); \
				c++;                                           \
			}                                                      \
			l++;                                                   \
		}                                                              \
	}                                                                      \
} while(0)

int
nouveau_display_init(struct drm_device *dev)
{
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct nouveau_display_engine *disp = &dev_priv->engine.display;
	struct drm_connector *connector;
	int ret;

	ret = disp->init(dev);
	if (ret)
		return ret;

	/* power on internal panel if it's not already.  the init tables of
	 * some vbios default this to off for some reason, causing the
	 * panel to not work after resume
	 */
	if (nouveau_gpio_func_get(dev, DCB_GPIO_PANEL_POWER) == 0) {
		nouveau_gpio_func_set(dev, DCB_GPIO_PANEL_POWER, true);
		msleep(300);
	}

	/* enable polling for external displays */
	drm_kms_helper_poll_enable(dev);

	/* enable hotplug interrupts */
	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
		struct nouveau_connector *conn = nouveau_connector(connector);
		nouveau_gpio_irq(dev, 0, conn->hpd, 0xff, true);
	}

	return ret;
}

void
nouveau_display_fini(struct drm_device *dev)
{
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct nouveau_display_engine *disp = &dev_priv->engine.display;
	struct drm_connector *connector;

	/* disable hotplug interrupts */
	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
		struct nouveau_connector *conn = nouveau_connector(connector);
		nouveau_gpio_irq(dev, 0, conn->hpd, 0xff, false);
	}

	drm_kms_helper_poll_disable(dev);
	disp->fini(dev);
}

int
nouveau_display_create(struct drm_device *dev)
{
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct nouveau_display_engine *disp = &dev_priv->engine.display;
	int ret, gen;

	drm_mode_config_init(dev);
	drm_mode_create_scaling_mode_property(dev);
	drm_mode_create_dvi_i_properties(dev);

	if (dev_priv->card_type < NV_50)
		gen = 0;
	else
	if (dev_priv->card_type < NV_D0)
		gen = 1;
	else
		gen = 2;

	PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode);
	PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth);
	PROP_ENUM(disp->underscan_property, gen, "underscan", underscan);

	disp->underscan_hborder_property =
		drm_property_create_range(dev, 0, "underscan hborder", 0, 128);

	disp->underscan_vborder_property =
		drm_property_create_range(dev, 0, "underscan vborder", 0, 128);

	if (gen == 1) {
		disp->vibrant_hue_property =
			drm_property_create(dev, DRM_MODE_PROP_RANGE,
					    "vibrant hue", 2);
		disp->vibrant_hue_property->values[0] = 0;
		disp->vibrant_hue_property->values[1] = 180; /* -90..+90 */

		disp->color_vibrance_property =
			drm_property_create(dev, DRM_MODE_PROP_RANGE,
					    "color vibrance", 2);
		disp->color_vibrance_property->values[0] = 0;
		disp->color_vibrance_property->values[1] = 200; /* -100..+100 */
	}

	dev->mode_config.funcs = &nouveau_mode_config_funcs;
	dev->mode_config.fb_base = pci_resource_start(dev->pdev, 1);

	dev->mode_config.min_width = 0;
	dev->mode_config.min_height = 0;
	if (dev_priv->card_type < NV_10) {
		dev->mode_config.max_width = 2048;
		dev->mode_config.max_height = 2048;
	} else
	if (dev_priv->card_type < NV_50) {
		dev->mode_config.max_width = 4096;
		dev->mode_config.max_height = 4096;
	} else {
		dev->mode_config.max_width = 8192;
		dev->mode_config.max_height = 8192;
	}

	dev->mode_config.preferred_depth = 24;
	dev->mode_config.prefer_shadow = 1;

	drm_kms_helper_poll_init(dev);
	drm_kms_helper_poll_disable(dev);

	ret = disp->create(dev);
	if (ret)
		return ret;

	if (dev->mode_config.num_crtc) {
		ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
		if (ret)
			return ret;
	}

	return ret;
}

void
nouveau_display_destroy(struct drm_device *dev)
{
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct nouveau_display_engine *disp = &dev_priv->engine.display;

	drm_vblank_cleanup(dev);

	disp->destroy(dev);

	drm_kms_helper_poll_fini(dev);
	drm_mode_config_cleanup(dev);
}

int
nouveau_vblank_enable(struct drm_device *dev, int crtc)
{
	struct drm_nouveau_private *dev_priv = dev->dev_private;

	if (dev_priv->card_type >= NV_50)
		nv_mask(dev, NV50_PDISPLAY_INTR_EN_1, 0,
			NV50_PDISPLAY_INTR_EN_1_VBLANK_CRTC_(crtc));
	else
		NVWriteCRTC(dev, crtc, NV_PCRTC_INTR_EN_0,
			    NV_PCRTC_INTR_0_VBLANK);

	return 0;
}

void
nouveau_vblank_disable(struct drm_device *dev, int crtc)
{
	struct drm_nouveau_private *dev_priv = dev->dev_private;

	if (dev_priv->card_type >= NV_50)
		nv_mask(dev, NV50_PDISPLAY_INTR_EN_1,
			NV50_PDISPLAY_INTR_EN_1_VBLANK_CRTC_(crtc), 0);
	else
		NVWriteCRTC(dev, crtc, NV_PCRTC_INTR_EN_0, 0);
}

static int
nouveau_page_flip_reserve(struct nouveau_bo *old_bo,
			  struct nouveau_bo *new_bo)
{
	int ret;

	ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM);
	if (ret)
		return ret;

	ret = ttm_bo_reserve(&new_bo->bo, false, false, false, 0);
	if (ret)
		goto fail;

	ret = ttm_bo_reserve(&old_bo->bo, false, false, false, 0);
	if (ret)
		goto fail_unreserve;

	return 0;

fail_unreserve:
	ttm_bo_unreserve(&new_bo->bo);
fail:
	nouveau_bo_unpin(new_bo);
	return ret;
}

static void
nouveau_page_flip_unreserve(struct nouveau_bo *old_bo,
			    struct nouveau_bo *new_bo,
			    struct nouveau_fence *fence)
{
	nouveau_bo_fence(new_bo, fence);
	ttm_bo_unreserve(&new_bo->bo);

	nouveau_bo_fence(old_bo, fence);
	ttm_bo_unreserve(&old_bo->bo);

	nouveau_bo_unpin(old_bo);
}

static int
nouveau_page_flip_emit(struct nouveau_channel *chan,
		       struct nouveau_bo *old_bo,
		       struct nouveau_bo *new_bo,
		       struct nouveau_page_flip_state *s,
		       struct nouveau_fence **pfence)
{
	struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
	struct drm_device *dev = chan->dev;
	unsigned long flags;
	int ret;

	/* Queue it to the pending list */
	spin_lock_irqsave(&dev->event_lock, flags);
	list_add_tail(&s->head, &chan->nvsw.flip);
	spin_unlock_irqrestore(&dev->event_lock, flags);

	/* Synchronize with the old framebuffer */
	ret = nouveau_fence_sync(old_bo->bo.sync_obj, chan);
	if (ret)
		goto fail;

	/* Emit the pageflip */
	ret = RING_SPACE(chan, 3);
	if (ret)
		goto fail;

	if (dev_priv->card_type < NV_C0) {
		BEGIN_RING(chan, NvSubSw, NV_SW_PAGE_FLIP, 1);
		OUT_RING  (chan, 0x00000000);
		OUT_RING  (chan, 0x00000000);
	} else {
		BEGIN_NVC0(chan, 2, 0, NV10_SUBCHAN_REF_CNT, 1);
		OUT_RING  (chan, ++chan->fence.sequence);
		BEGIN_NVC0(chan, 8, 0, NVSW_SUBCHAN_PAGE_FLIP, 0x0000);
	}
	FIRE_RING (chan);

	ret = nouveau_fence_new(chan, pfence, true);
	if (ret)
		goto fail;

	return 0;
fail:
	spin_lock_irqsave(&dev->event_lock, flags);
	list_del(&s->head);
	spin_unlock_irqrestore(&dev->event_lock, flags);
	return ret;
}

int
nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
		       struct drm_pending_vblank_event *event)
{
	struct drm_device *dev = crtc->dev;
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->fb)->nvbo;
	struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo;
	struct nouveau_page_flip_state *s;
	struct nouveau_channel *chan;
	struct nouveau_fence *fence;
	int ret;

	if (!dev_priv->channel)
		return -ENODEV;

	s = kzalloc(sizeof(*s), GFP_KERNEL);
	if (!s)
		return -ENOMEM;

	/* Don't let the buffers go away while we flip */
	ret = nouveau_page_flip_reserve(old_bo, new_bo);
	if (ret)
		goto fail_free;

	/* Initialize a page flip struct */
	*s = (struct nouveau_page_flip_state)
		{ { }, event, nouveau_crtc(crtc)->index,
		  fb->bits_per_pixel, fb->pitches[0], crtc->x, crtc->y,
		  new_bo->bo.offset };

	/* Choose the channel the flip will be handled in */
	chan = nouveau_fence_channel(new_bo->bo.sync_obj);
	if (!chan)
		chan = nouveau_channel_get_unlocked(dev_priv->channel);
	mutex_lock(&chan->mutex);

	/* Emit a page flip */
	if (dev_priv->card_type >= NV_50) {
		if (dev_priv->card_type >= NV_D0)
			ret = nvd0_display_flip_next(crtc, fb, chan, 0);
		else
			ret = nv50_display_flip_next(crtc, fb, chan);
		if (ret) {
			nouveau_channel_put(&chan);
			goto fail_unreserve;
		}
	}

	ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence);
	nouveau_channel_put(&chan);
	if (ret)
		goto fail_unreserve;

	/* Update the crtc struct and cleanup */
	crtc->fb = fb;

	nouveau_page_flip_unreserve(old_bo, new_bo, fence);
	nouveau_fence_unref(&fence);
	return 0;

fail_unreserve:
	nouveau_page_flip_unreserve(old_bo, new_bo, NULL);
fail_free:
	kfree(s);
	return ret;
}

int
nouveau_finish_page_flip(struct nouveau_channel *chan,
			 struct nouveau_page_flip_state *ps)
{
	struct drm_device *dev = chan->dev;
	struct nouveau_page_flip_state *s;
	unsigned long flags;

	spin_lock_irqsave(&dev->event_lock, flags);

	if (list_empty(&chan->nvsw.flip)) {
		NV_ERROR(dev, "Unexpected pageflip in channel %d.\n", chan->id);
		spin_unlock_irqrestore(&dev->event_lock, flags);
		return -EINVAL;
	}

	s = list_first_entry(&chan->nvsw.flip,
			     struct nouveau_page_flip_state, head);
	if (s->event) {
		struct drm_pending_vblank_event *e = s->event;
		struct timeval now;

		do_gettimeofday(&now);
		e->event.sequence = 0;
		e->event.tv_sec = now.tv_sec;
		e->event.tv_usec = now.tv_usec;
		list_add_tail(&e->base.link, &e->base.file_priv->event_list);
		wake_up_interruptible(&e->base.file_priv->event_wait);
	}

	list_del(&s->head);
	if (ps)
		*ps = *s;
	kfree(s);

	spin_unlock_irqrestore(&dev->event_lock, flags);
	return 0;
}

int
nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev,
			    struct drm_mode_create_dumb *args)
{
	struct nouveau_bo *bo;
	int ret;

	args->pitch = roundup(args->width * (args->bpp / 8), 256);
	args->size = args->pitch * args->height;
	args->size = roundup(args->size, PAGE_SIZE);

	ret = nouveau_gem_new(dev, args->size, 0, TTM_PL_FLAG_VRAM, 0, 0, &bo);
	if (ret)
		return ret;

	ret = drm_gem_handle_create(file_priv, bo->gem, &args->handle);
	drm_gem_object_unreference_unlocked(bo->gem);
	return ret;
}

int
nouveau_display_dumb_destroy(struct drm_file *file_priv, struct drm_device *dev,
			     uint32_t handle)
{
	return drm_gem_handle_delete(file_priv, handle);
}

int
nouveau_display_dumb_map_offset(struct drm_file *file_priv,
				struct drm_device *dev,
				uint32_t handle, uint64_t *poffset)
{
	struct drm_gem_object *gem;

	gem = drm_gem_object_lookup(dev, file_priv, handle);
	if (gem) {
		struct nouveau_bo *bo = gem->driver_private;
		*poffset = bo->bo.addr_space_offset;
		drm_gem_object_unreference_unlocked(gem);
		return 0;
	}

	return -ENOENT;
}
Commit	Line	Data
6ee73861 BS	1	/*
	2	* Copyright (C) 2008 Maarten Maathuis.
	3	* All Rights Reserved.
	4	*
	5	* Permission is hereby granted, free of charge, to any person obtaining
	6	* a copy of this software and associated documentation files (the
	7	* "Software"), to deal in the Software without restriction, including
	8	* without limitation the rights to use, copy, modify, merge, publish,
	9	* distribute, sublicense, and/or sell copies of the Software, and to
	10	* permit persons to whom the Software is furnished to do so, subject to
	11	* the following conditions:
	12	*
	13	* The above copyright notice and this permission notice (including the
	14	* next paragraph) shall be included in all copies or substantial
	15	* portions of the Software.
	16	*
	17	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	18	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	19	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
	20	* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
	21	* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
	22	* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
	23	* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
	24	*
	25	*/
	26
	27	#include "drmP.h"
	28	#include "drm_crtc_helper.h"
	29	#include "nouveau_drv.h"
	30	#include "nouveau_fb.h"
	31	#include "nouveau_fbcon.h"
042206c0	32	#include "nouveau_hw.h"
332b242f FJ	33	#include "nouveau_crtc.h"
332b242f FJ	34	#include "nouveau_dma.h"
de691855	35	#include "nouveau_connector.h"
52c4d767	36	#include "nouveau_gpio.h"
45c4e0aa	37	#include "nv50_display.h"
6ee73861 BS	38
	39	static void
	40	nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb)
	41	{
	42	struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
6ee73861	43
bc9025bd LB	44	if (fb->nvbo)
bc9025bd LB	45	drm_gem_object_unreference_unlocked(fb->nvbo->gem);
6ee73861 BS	46
	47	drm_framebuffer_cleanup(drm_fb);
	48	kfree(fb);
	49	}
	50
	51	static int
	52	nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb,
	53	struct drm_file *file_priv,
	54	unsigned int *handle)
	55	{
	56	struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
	57
	58	return drm_gem_handle_create(file_priv, fb->nvbo->gem, handle);
	59	}
	60
	61	static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = {
	62	.destroy = nouveau_user_framebuffer_destroy,
	63	.create_handle = nouveau_user_framebuffer_create_handle,
	64	};
	65
38651674	66	int
45c4e0aa BS	67	nouveau_framebuffer_init(struct drm_device *dev,
45c4e0aa BS	68	struct nouveau_framebuffer *nv_fb,
308e5bcb	69	struct drm_mode_fb_cmd2 *mode_cmd,
45c4e0aa	70	struct nouveau_bo *nvbo)
6ee73861	71	{
45c4e0aa BS	72	struct drm_nouveau_private *dev_priv = dev->dev_private;
45c4e0aa BS	73	struct drm_framebuffer *fb = &nv_fb->base;
6ee73861 BS	74	int ret;
6ee73861 BS	75
45c4e0aa	76	ret = drm_framebuffer_init(dev, fb, &nouveau_framebuffer_funcs);
6ee73861	77	if (ret) {
38651674	78	return ret;
6ee73861 BS	79	}
6ee73861 BS	80
45c4e0aa BS	81	drm_helper_mode_fill_fb_struct(fb, mode_cmd);
	82	nv_fb->nvbo = nvbo;
	83
	84	if (dev_priv->card_type >= NV_50) {
	85	u32 tile_flags = nouveau_bo_tile_layout(nvbo);
	86	if (tile_flags == 0x7a00 \|\|
	87	tile_flags == 0xfe00)
	88	nv_fb->r_dma = NvEvoFB32;
	89	else
	90	if (tile_flags == 0x7000)
	91	nv_fb->r_dma = NvEvoFB16;
	92	else
	93	nv_fb->r_dma = NvEvoVRAM_LP;
	94
	95	switch (fb->depth) {
	96	case 8: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_8; break;
	97	case 15: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_15; break;
	98	case 16: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_16; break;
	99	case 24:
	100	case 32: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_24; break;
	101	case 30: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_30; break;
	102	default:
	103	NV_ERROR(dev, "unknown depth %d\n", fb->depth);
	104	return -EINVAL;
	105	}
	106
	107	if (dev_priv->chipset == 0x50)
	108	nv_fb->r_format \|= (tile_flags << 8);
	109
2fad3d5e BS	110	if (!tile_flags) {
2fad3d5e BS	111	if (dev_priv->card_type < NV_D0)
01f2c773	112	nv_fb->r_pitch = 0x00100000 \| fb->pitches[0];
2fad3d5e	113	else
01f2c773	114	nv_fb->r_pitch = 0x01000000 \| fb->pitches[0];
2fad3d5e	115	} else {
45c4e0aa BS	116	u32 mode = nvbo->tile_mode;
	117	if (dev_priv->card_type >= NV_C0)
	118	mode >>= 4;
01f2c773	119	nv_fb->r_pitch = ((fb->pitches[0] / 4) << 4) \| mode;
45c4e0aa BS	120	}
	121	}
	122
38651674	123	return 0;
6ee73861 BS	124	}
	125
	126	static struct drm_framebuffer *
	127	nouveau_user_framebuffer_create(struct drm_device *dev,
	128	struct drm_file *file_priv,
308e5bcb	129	struct drm_mode_fb_cmd2 *mode_cmd)
6ee73861	130	{
38651674	131	struct nouveau_framebuffer *nouveau_fb;
6ee73861	132	struct drm_gem_object *gem;
38651674	133	int ret;
6ee73861	134
308e5bcb	135	gem = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]);
6ee73861	136	if (!gem)
cce13ff7	137	return ERR_PTR(-ENOENT);
6ee73861	138
38651674 DA	139	nouveau_fb = kzalloc(sizeof(struct nouveau_framebuffer), GFP_KERNEL);
38651674 DA	140	if (!nouveau_fb)
cce13ff7	141	return ERR_PTR(-ENOMEM);
38651674 DA	142
	143	ret = nouveau_framebuffer_init(dev, nouveau_fb, mode_cmd, nouveau_gem_object(gem));
	144	if (ret) {
6ee73861	145	drm_gem_object_unreference(gem);
cce13ff7	146	return ERR_PTR(ret);
6ee73861 BS	147	}
6ee73861 BS	148
38651674	149	return &nouveau_fb->base;
6ee73861 BS	150	}
6ee73861 BS	151
27d5030a	152	static const struct drm_mode_config_funcs nouveau_mode_config_funcs = {
6ee73861	153	.fb_create = nouveau_user_framebuffer_create,
eb1f8e4f	154	.output_poll_changed = nouveau_fbcon_output_poll_changed,
6ee73861 BS	155	};
6ee73861 BS	156
b29caa58	157
4a67d391	158	struct nouveau_drm_prop_enum_list {
de691855	159	u8 gen_mask;
b29caa58 BS	160	int type;
	161	char *name;
	162	};
	163
4a67d391	164	static struct nouveau_drm_prop_enum_list underscan[] = {
92854622 BS	165	{ 6, UNDERSCAN_AUTO, "auto" },
	166	{ 6, UNDERSCAN_OFF, "off" },
	167	{ 6, UNDERSCAN_ON, "on" },
de691855	168	{}
b29caa58 BS	169	};
b29caa58 BS	170
4a67d391	171	static struct nouveau_drm_prop_enum_list dither_mode[] = {
de691855 BS	172	{ 7, DITHERING_MODE_AUTO, "auto" },
	173	{ 7, DITHERING_MODE_OFF, "off" },
	174	{ 1, DITHERING_MODE_ON, "on" },
	175	{ 6, DITHERING_MODE_STATIC2X2, "static 2x2" },
	176	{ 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" },
	177	{ 4, DITHERING_MODE_TEMPORAL, "temporal" },
	178	{}
	179	};
	180
4a67d391	181	static struct nouveau_drm_prop_enum_list dither_depth[] = {
de691855 BS	182	{ 6, DITHERING_DEPTH_AUTO, "auto" },
	183	{ 6, DITHERING_DEPTH_6BPC, "6 bpc" },
	184	{ 6, DITHERING_DEPTH_8BPC, "8 bpc" },
	185	{}
	186	};
	187
	188	#define PROP_ENUM(p,gen,n,list) do { \
4a67d391	189	struct nouveau_drm_prop_enum_list *l = (list); \
de691855 BS	190	int c = 0; \
	191	while (l->gen_mask) { \
	192	if (l->gen_mask & (1 << (gen))) \
	193	c++; \
	194	l++; \
	195	} \
	196	if (c) { \
	197	p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c); \
	198	l = (list); \
	199	c = 0; \
	200	while (p && l->gen_mask) { \
	201	if (l->gen_mask & (1 << (gen))) { \
	202	drm_property_add_enum(p, c, l->type, l->name); \
	203	c++; \
	204	} \
	205	l++; \
	206	} \
	207	} \
	208	} while(0)
	209
f62b27db BS	210	int
	211	nouveau_display_init(struct drm_device *dev)
	212	{
	213	struct drm_nouveau_private *dev_priv = dev->dev_private;
	214	struct nouveau_display_engine *disp = &dev_priv->engine.display;
52c4d767	215	struct drm_connector *connector;
f62b27db BS	216	int ret;
	217
	218	ret = disp->init(dev);
52c4d767 BS	219	if (ret)
	220	return ret;
	221
7df898b1 BS	222	/* power on internal panel if it's not already. the init tables of
	223	* some vbios default this to off for some reason, causing the
	224	* panel to not work after resume
	225	*/
	226	if (nouveau_gpio_func_get(dev, DCB_GPIO_PANEL_POWER) == 0) {
	227	nouveau_gpio_func_set(dev, DCB_GPIO_PANEL_POWER, true);
	228	msleep(300);
	229	}
	230
	231	/* enable polling for external displays */
52c4d767 BS	232	drm_kms_helper_poll_enable(dev);
	233
	234	/* enable hotplug interrupts */
	235	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
	236	struct nouveau_connector *conn = nouveau_connector(connector);
	237	nouveau_gpio_irq(dev, 0, conn->hpd, 0xff, true);
f62b27db BS	238	}
	239
	240	return ret;
	241	}
	242
	243	void
	244	nouveau_display_fini(struct drm_device *dev)
	245	{
	246	struct drm_nouveau_private *dev_priv = dev->dev_private;
	247	struct nouveau_display_engine *disp = &dev_priv->engine.display;
52c4d767 BS	248	struct drm_connector *connector;
	249
	250	/* disable hotplug interrupts */
	251	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
	252	struct nouveau_connector *conn = nouveau_connector(connector);
	253	nouveau_gpio_irq(dev, 0, conn->hpd, 0xff, false);
	254	}
f62b27db BS	255
	256	drm_kms_helper_poll_disable(dev);
	257	disp->fini(dev);
	258	}
	259
27d5030a BS	260	int
	261	nouveau_display_create(struct drm_device *dev)
	262	{
	263	struct drm_nouveau_private *dev_priv = dev->dev_private;
	264	struct nouveau_display_engine *disp = &dev_priv->engine.display;
de691855	265	int ret, gen;
27d5030a BS	266
	267	drm_mode_config_init(dev);
	268	drm_mode_create_scaling_mode_property(dev);
4ceca5f8	269	drm_mode_create_dvi_i_properties(dev);
de691855 BS	270
	271	if (dev_priv->card_type < NV_50)
	272	gen = 0;
	273	else
	274	if (dev_priv->card_type < NV_D0)
	275	gen = 1;
	276	else
	277	gen = 2;
	278
	279	PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode);
	280	PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth);
	281	PROP_ENUM(disp->underscan_property, gen, "underscan", underscan);
b29caa58 BS	282
b29caa58 BS	283	disp->underscan_hborder_property =
d9bc3c02	284	drm_property_create_range(dev, 0, "underscan hborder", 0, 128);
b29caa58 BS	285
b29caa58 BS	286	disp->underscan_vborder_property =
d9bc3c02	287	drm_property_create_range(dev, 0, "underscan vborder", 0, 128);
b29caa58	288
df26bc9c CB	289	if (gen == 1) {
	290	disp->vibrant_hue_property =
	291	drm_property_create(dev, DRM_MODE_PROP_RANGE,
	292	"vibrant hue", 2);
	293	disp->vibrant_hue_property->values[0] = 0;
	294	disp->vibrant_hue_property->values[1] = 180; /* -90..+90 */
	295
	296	disp->color_vibrance_property =
	297	drm_property_create(dev, DRM_MODE_PROP_RANGE,
	298	"color vibrance", 2);
	299	disp->color_vibrance_property->values[0] = 0;
	300	disp->color_vibrance_property->values[1] = 200; /* -100..+100 */
	301	}
	302
e6ecefaa	303	dev->mode_config.funcs = &nouveau_mode_config_funcs;
27d5030a BS	304	dev->mode_config.fb_base = pci_resource_start(dev->pdev, 1);
	305
	306	dev->mode_config.min_width = 0;
	307	dev->mode_config.min_height = 0;
	308	if (dev_priv->card_type < NV_10) {
	309	dev->mode_config.max_width = 2048;
	310	dev->mode_config.max_height = 2048;
	311	} else
	312	if (dev_priv->card_type < NV_50) {
	313	dev->mode_config.max_width = 4096;
	314	dev->mode_config.max_height = 4096;
	315	} else {
	316	dev->mode_config.max_width = 8192;
	317	dev->mode_config.max_height = 8192;
	318	}
	319
f1377998 DA	320	dev->mode_config.preferred_depth = 24;
	321	dev->mode_config.prefer_shadow = 1;
	322
f62b27db BS	323	drm_kms_helper_poll_init(dev);
	324	drm_kms_helper_poll_disable(dev);
	325
27d5030a BS	326	ret = disp->create(dev);
	327	if (ret)
	328	return ret;
	329
f62b27db BS	330	if (dev->mode_config.num_crtc) {
	331	ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
	332	if (ret)
	333	return ret;
	334	}
	335
2a44e499	336	return ret;
27d5030a BS	337	}
	338
	339	void
	340	nouveau_display_destroy(struct drm_device *dev)
	341	{
	342	struct drm_nouveau_private *dev_priv = dev->dev_private;
	343	struct nouveau_display_engine *disp = &dev_priv->engine.display;
	344
f62b27db BS	345	drm_vblank_cleanup(dev);
f62b27db BS	346
27d5030a	347	disp->destroy(dev);
f62b27db BS	348
f62b27db BS	349	drm_kms_helper_poll_fini(dev);
27d5030a BS	350	drm_mode_config_cleanup(dev);
	351	}
	352
042206c0 FJ	353	int
	354	nouveau_vblank_enable(struct drm_device *dev, int crtc)
	355	{
	356	struct drm_nouveau_private *dev_priv = dev->dev_private;
	357
	358	if (dev_priv->card_type >= NV_50)
	359	nv_mask(dev, NV50_PDISPLAY_INTR_EN_1, 0,
	360	NV50_PDISPLAY_INTR_EN_1_VBLANK_CRTC_(crtc));
	361	else
	362	NVWriteCRTC(dev, crtc, NV_PCRTC_INTR_EN_0,
	363	NV_PCRTC_INTR_0_VBLANK);
	364
	365	return 0;
	366	}
	367
	368	void
	369	nouveau_vblank_disable(struct drm_device *dev, int crtc)
	370	{
	371	struct drm_nouveau_private *dev_priv = dev->dev_private;
	372
	373	if (dev_priv->card_type >= NV_50)
	374	nv_mask(dev, NV50_PDISPLAY_INTR_EN_1,
	375	NV50_PDISPLAY_INTR_EN_1_VBLANK_CRTC_(crtc), 0);
	376	else
	377	NVWriteCRTC(dev, crtc, NV_PCRTC_INTR_EN_0, 0);
	378	}
332b242f FJ	379
	380	static int
	381	nouveau_page_flip_reserve(struct nouveau_bo *old_bo,
	382	struct nouveau_bo *new_bo)
	383	{
	384	int ret;
	385
	386	ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM);
	387	if (ret)
	388	return ret;
	389
	390	ret = ttm_bo_reserve(&new_bo->bo, false, false, false, 0);
	391	if (ret)
	392	goto fail;
	393
	394	ret = ttm_bo_reserve(&old_bo->bo, false, false, false, 0);
	395	if (ret)
	396	goto fail_unreserve;
	397
	398	return 0;
	399
	400	fail_unreserve:
	401	ttm_bo_unreserve(&new_bo->bo);
	402	fail:
	403	nouveau_bo_unpin(new_bo);
	404	return ret;
	405	}
	406
	407	static void
	408	nouveau_page_flip_unreserve(struct nouveau_bo *old_bo,
	409	struct nouveau_bo *new_bo,
	410	struct nouveau_fence *fence)
	411	{
	412	nouveau_bo_fence(new_bo, fence);
	413	ttm_bo_unreserve(&new_bo->bo);
	414
	415	nouveau_bo_fence(old_bo, fence);
	416	ttm_bo_unreserve(&old_bo->bo);
	417
	418	nouveau_bo_unpin(old_bo);
	419	}
	420
	421	static int
	422	nouveau_page_flip_emit(struct nouveau_channel *chan,
	423	struct nouveau_bo *old_bo,
	424	struct nouveau_bo *new_bo,
	425	struct nouveau_page_flip_state *s,
	426	struct nouveau_fence **pfence)
	427	{
bd2f2037	428	struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
332b242f FJ	429	struct drm_device *dev = chan->dev;
	430	unsigned long flags;
	431	int ret;
	432
	433	/* Queue it to the pending list */
	434	spin_lock_irqsave(&dev->event_lock, flags);
	435	list_add_tail(&s->head, &chan->nvsw.flip);
	436	spin_unlock_irqrestore(&dev->event_lock, flags);
	437
	438	/* Synchronize with the old framebuffer */
	439	ret = nouveau_fence_sync(old_bo->bo.sync_obj, chan);
	440	if (ret)
	441	goto fail;
	442
	443	/* Emit the pageflip */
d5316e25	444	ret = RING_SPACE(chan, 3);
332b242f FJ	445	if (ret)
	446	goto fail;
	447
d5316e25	448	if (dev_priv->card_type < NV_C0) {
bd2f2037	449	BEGIN_RING(chan, NvSubSw, NV_SW_PAGE_FLIP, 1);
d5316e25 BS	450	OUT_RING (chan, 0x00000000);
	451	OUT_RING (chan, 0x00000000);
	452	} else {
	453	BEGIN_NVC0(chan, 2, 0, NV10_SUBCHAN_REF_CNT, 1);
	454	OUT_RING (chan, ++chan->fence.sequence);
	455	BEGIN_NVC0(chan, 8, 0, NVSW_SUBCHAN_PAGE_FLIP, 0x0000);
	456	}
bd2f2037	457	FIRE_RING (chan);
332b242f FJ	458
	459	ret = nouveau_fence_new(chan, pfence, true);
	460	if (ret)
	461	goto fail;
	462
	463	return 0;
	464	fail:
	465	spin_lock_irqsave(&dev->event_lock, flags);
	466	list_del(&s->head);
	467	spin_unlock_irqrestore(&dev->event_lock, flags);
	468	return ret;
	469	}
	470
	471	int
	472	nouveau_crtc_page_flip(struct drm_crtc crtc, struct drm_framebuffer fb,
	473	struct drm_pending_vblank_event *event)
	474	{
	475	struct drm_device *dev = crtc->dev;
	476	struct drm_nouveau_private *dev_priv = dev->dev_private;
	477	struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->fb)->nvbo;
	478	struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo;
	479	struct nouveau_page_flip_state *s;
	480	struct nouveau_channel *chan;
	481	struct nouveau_fence *fence;
	482	int ret;
	483
a82dd49f	484	if (!dev_priv->channel)
332b242f FJ	485	return -ENODEV;
	486
	487	s = kzalloc(sizeof(*s), GFP_KERNEL);
	488	if (!s)
	489	return -ENOMEM;
	490
	491	/* Don't let the buffers go away while we flip */
	492	ret = nouveau_page_flip_reserve(old_bo, new_bo);
	493	if (ret)
	494	goto fail_free;
	495
	496	/* Initialize a page flip struct */
	497	*s = (struct nouveau_page_flip_state)
2503c6fa	498	{ { }, event, nouveau_crtc(crtc)->index,
01f2c773	499	fb->bits_per_pixel, fb->pitches[0], crtc->x, crtc->y,
332b242f FJ	500	new_bo->bo.offset };
	501
	502	/* Choose the channel the flip will be handled in */
	503	chan = nouveau_fence_channel(new_bo->bo.sync_obj);
	504	if (!chan)
	505	chan = nouveau_channel_get_unlocked(dev_priv->channel);
	506	mutex_lock(&chan->mutex);
	507
	508	/* Emit a page flip */
d7117e0d	509	if (dev_priv->card_type >= NV_50) {
3376ee37 BS	510	if (dev_priv->card_type >= NV_D0)
	511	ret = nvd0_display_flip_next(crtc, fb, chan, 0);
	512	else
	513	ret = nv50_display_flip_next(crtc, fb, chan);
d7117e0d BS	514	if (ret) {
	515	nouveau_channel_put(&chan);
	516	goto fail_unreserve;
	517	}
	518	}
	519
332b242f FJ	520	ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence);
	521	nouveau_channel_put(&chan);
	522	if (ret)
	523	goto fail_unreserve;
	524
	525	/* Update the crtc struct and cleanup */
	526	crtc->fb = fb;
	527
	528	nouveau_page_flip_unreserve(old_bo, new_bo, fence);
	529	nouveau_fence_unref(&fence);
	530	return 0;
	531
	532	fail_unreserve:
	533	nouveau_page_flip_unreserve(old_bo, new_bo, NULL);
	534	fail_free:
	535	kfree(s);
	536	return ret;
	537	}
	538
	539	int
	540	nouveau_finish_page_flip(struct nouveau_channel *chan,
	541	struct nouveau_page_flip_state *ps)
	542	{
	543	struct drm_device *dev = chan->dev;
	544	struct nouveau_page_flip_state *s;
	545	unsigned long flags;
	546
	547	spin_lock_irqsave(&dev->event_lock, flags);
	548
	549	if (list_empty(&chan->nvsw.flip)) {
	550	NV_ERROR(dev, "Unexpected pageflip in channel %d.\n", chan->id);
	551	spin_unlock_irqrestore(&dev->event_lock, flags);
	552	return -EINVAL;
	553	}
	554
	555	s = list_first_entry(&chan->nvsw.flip,
	556	struct nouveau_page_flip_state, head);
	557	if (s->event) {
	558	struct drm_pending_vblank_event *e = s->event;
	559	struct timeval now;
	560
	561	do_gettimeofday(&now);
	562	e->event.sequence = 0;
	563	e->event.tv_sec = now.tv_sec;
	564	e->event.tv_usec = now.tv_usec;
	565	list_add_tail(&e->base.link, &e->base.file_priv->event_list);
	566	wake_up_interruptible(&e->base.file_priv->event_wait);
	567	}
	568
	569	list_del(&s->head);
d7117e0d BS	570	if (ps)
d7117e0d BS	571	ps = s;
332b242f FJ	572	kfree(s);
	573
	574	spin_unlock_irqrestore(&dev->event_lock, flags);
	575	return 0;
	576	}
33dbc27f BS	577
	578	int
	579	nouveau_display_dumb_create(struct drm_file file_priv, struct drm_device dev,
	580	struct drm_mode_create_dumb *args)
	581	{
	582	struct nouveau_bo *bo;
	583	int ret;
	584
	585	args->pitch = roundup(args->width * (args->bpp / 8), 256);
	586	args->size = args->pitch * args->height;
	587	args->size = roundup(args->size, PAGE_SIZE);
	588
	589	ret = nouveau_gem_new(dev, args->size, 0, TTM_PL_FLAG_VRAM, 0, 0, &bo);
	590	if (ret)
	591	return ret;
	592
	593	ret = drm_gem_handle_create(file_priv, bo->gem, &args->handle);
	594	drm_gem_object_unreference_unlocked(bo->gem);
	595	return ret;
	596	}
	597
	598	int
	599	nouveau_display_dumb_destroy(struct drm_file file_priv, struct drm_device dev,
	600	uint32_t handle)
	601	{
	602	return drm_gem_handle_delete(file_priv, handle);
	603	}
	604
	605	int
	606	nouveau_display_dumb_map_offset(struct drm_file *file_priv,
	607	struct drm_device *dev,
	608	uint32_t handle, uint64_t *poffset)
	609	{
	610	struct drm_gem_object *gem;
	611
	612	gem = drm_gem_object_lookup(dev, file_priv, handle);
	613	if (gem) {
	614	struct nouveau_bo *bo = gem->driver_private;
	615	*poffset = bo->bo.addr_space_offset;
	616	drm_gem_object_unreference_unlocked(gem);
	617	return 0;
	618	}
	619
	620	return -ENOENT;
	621	}