]>
Commit | Line | Data |
---|---|---|
94580299 BS |
1 | /* |
2 | * Copyright 2012 Red Hat Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: Ben Skeggs | |
23 | */ | |
24 | ||
77145f1c | 25 | #include <linux/console.h> |
94580299 BS |
26 | #include <linux/module.h> |
27 | #include <linux/pci.h> | |
5addcf0a DA |
28 | #include <linux/pm_runtime.h> |
29 | #include <linux/vga_switcheroo.h> | |
30 | #include "drmP.h" | |
31 | #include "drm_crtc_helper.h" | |
94580299 | 32 | #include <core/device.h> |
ebb945a9 | 33 | #include <core/gpuobj.h> |
94580299 | 34 | #include <core/class.h> |
c33e05a1 | 35 | #include <core/option.h> |
94580299 | 36 | |
94580299 | 37 | #include "nouveau_drm.h" |
ebb945a9 | 38 | #include "nouveau_dma.h" |
77145f1c BS |
39 | #include "nouveau_ttm.h" |
40 | #include "nouveau_gem.h" | |
cb75d97e | 41 | #include "nouveau_agp.h" |
77145f1c | 42 | #include "nouveau_vga.h" |
26fdd78c | 43 | #include "nouveau_sysfs.h" |
b9ed919f | 44 | #include "nouveau_hwmon.h" |
77145f1c BS |
45 | #include "nouveau_acpi.h" |
46 | #include "nouveau_bios.h" | |
47 | #include "nouveau_ioctl.h" | |
ebb945a9 BS |
48 | #include "nouveau_abi16.h" |
49 | #include "nouveau_fbcon.h" | |
50 | #include "nouveau_fence.h" | |
33b903e8 | 51 | #include "nouveau_debugfs.h" |
ebb945a9 | 52 | |
94580299 BS |
53 | MODULE_PARM_DESC(config, "option string to pass to driver core"); |
54 | static char *nouveau_config; | |
55 | module_param_named(config, nouveau_config, charp, 0400); | |
56 | ||
57 | MODULE_PARM_DESC(debug, "debug string to pass to driver core"); | |
58 | static char *nouveau_debug; | |
59 | module_param_named(debug, nouveau_debug, charp, 0400); | |
60 | ||
ebb945a9 BS |
61 | MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration"); |
62 | static int nouveau_noaccel = 0; | |
63 | module_param_named(noaccel, nouveau_noaccel, int, 0400); | |
64 | ||
9430738d BS |
65 | MODULE_PARM_DESC(modeset, "enable driver (default: auto, " |
66 | "0 = disabled, 1 = enabled, 2 = headless)"); | |
67 | int nouveau_modeset = -1; | |
77145f1c BS |
68 | module_param_named(modeset, nouveau_modeset, int, 0400); |
69 | ||
5addcf0a DA |
70 | MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)"); |
71 | int nouveau_runtime_pm = -1; | |
72 | module_param_named(runpm, nouveau_runtime_pm, int, 0400); | |
73 | ||
77145f1c BS |
74 | static struct drm_driver driver; |
75 | ||
94580299 | 76 | static u64 |
420b9469 | 77 | nouveau_pci_name(struct pci_dev *pdev) |
94580299 BS |
78 | { |
79 | u64 name = (u64)pci_domain_nr(pdev->bus) << 32; | |
80 | name |= pdev->bus->number << 16; | |
81 | name |= PCI_SLOT(pdev->devfn) << 8; | |
82 | return name | PCI_FUNC(pdev->devfn); | |
83 | } | |
84 | ||
420b9469 AC |
85 | static u64 |
86 | nouveau_platform_name(struct platform_device *platformdev) | |
87 | { | |
88 | return platformdev->id; | |
89 | } | |
90 | ||
91 | static u64 | |
92 | nouveau_name(struct drm_device *dev) | |
93 | { | |
94 | if (dev->pdev) | |
95 | return nouveau_pci_name(dev->pdev); | |
96 | else | |
97 | return nouveau_platform_name(dev->platformdev); | |
98 | } | |
99 | ||
94580299 | 100 | static int |
420b9469 | 101 | nouveau_cli_create(u64 name, const char *sname, |
fa6df8c1 | 102 | int size, void **pcli) |
94580299 | 103 | { |
0ad72863 BS |
104 | struct nouveau_cli *cli = *pcli = kzalloc(size, GFP_KERNEL); |
105 | if (cli) { | |
106 | int ret = nvif_client_init(NULL, NULL, sname, name, | |
107 | nouveau_config, nouveau_debug, | |
108 | &cli->base); | |
109 | if (ret == 0) | |
110 | mutex_init(&cli->mutex); | |
94580299 | 111 | return ret; |
dd5700ea | 112 | } |
0ad72863 | 113 | return -ENOMEM; |
94580299 BS |
114 | } |
115 | ||
116 | static void | |
117 | nouveau_cli_destroy(struct nouveau_cli *cli) | |
118 | { | |
0ad72863 BS |
119 | nouveau_vm_ref(NULL, &nvkm_client(&cli->base)->vm, NULL); |
120 | nvif_client_fini(&cli->base); | |
94580299 BS |
121 | } |
122 | ||
ebb945a9 BS |
123 | static void |
124 | nouveau_accel_fini(struct nouveau_drm *drm) | |
125 | { | |
ebb945a9 | 126 | nouveau_channel_del(&drm->channel); |
0ad72863 BS |
127 | nvif_object_fini(&drm->ntfy); |
128 | nouveau_gpuobj_ref(NULL, &drm->notify); | |
129 | nvif_object_fini(&drm->nvsw); | |
49981046 | 130 | nouveau_channel_del(&drm->cechan); |
0ad72863 | 131 | nvif_object_fini(&drm->ttm.copy); |
ebb945a9 BS |
132 | if (drm->fence) |
133 | nouveau_fence(drm)->dtor(drm); | |
134 | } | |
135 | ||
136 | static void | |
137 | nouveau_accel_init(struct nouveau_drm *drm) | |
138 | { | |
967e7bde | 139 | struct nvif_device *device = &drm->device; |
49981046 | 140 | u32 arg0, arg1; |
967e7bde BS |
141 | u32 sclass[16]; |
142 | int ret, i; | |
ebb945a9 | 143 | |
967e7bde | 144 | if (nouveau_noaccel) |
ebb945a9 BS |
145 | return; |
146 | ||
147 | /* initialise synchronisation routines */ | |
967e7bde BS |
148 | /*XXX: this is crap, but the fence/channel stuff is a little |
149 | * backwards in some places. this will be fixed. | |
150 | */ | |
0ad72863 | 151 | ret = nvif_object_sclass(&device->base, sclass, ARRAY_SIZE(sclass)); |
967e7bde BS |
152 | if (ret < 0) |
153 | return; | |
154 | ||
155 | for (ret = -ENOSYS, i = 0; ret && i < ARRAY_SIZE(sclass); i++) { | |
156 | switch (sclass[i]) { | |
157 | case NV03_CHANNEL_DMA_CLASS: | |
158 | ret = nv04_fence_create(drm); | |
159 | break; | |
160 | case NV10_CHANNEL_DMA_CLASS: | |
161 | ret = nv10_fence_create(drm); | |
162 | break; | |
163 | case NV17_CHANNEL_DMA_CLASS: | |
164 | case NV40_CHANNEL_DMA_CLASS: | |
165 | ret = nv17_fence_create(drm); | |
166 | break; | |
167 | case NV50_CHANNEL_IND_CLASS: | |
168 | ret = nv50_fence_create(drm); | |
169 | break; | |
170 | case NV84_CHANNEL_IND_CLASS: | |
171 | ret = nv84_fence_create(drm); | |
172 | break; | |
173 | case NVC0_CHANNEL_IND_CLASS: | |
174 | case NVE0_CHANNEL_IND_CLASS: | |
175 | ret = nvc0_fence_create(drm); | |
176 | break; | |
177 | default: | |
178 | break; | |
179 | } | |
180 | } | |
181 | ||
ebb945a9 BS |
182 | if (ret) { |
183 | NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret); | |
184 | nouveau_accel_fini(drm); | |
185 | return; | |
186 | } | |
187 | ||
967e7bde | 188 | if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) { |
0ad72863 | 189 | ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN + 1, |
49981046 BS |
190 | NVE0_CHANNEL_IND_ENGINE_CE0 | |
191 | NVE0_CHANNEL_IND_ENGINE_CE1, 0, | |
192 | &drm->cechan); | |
193 | if (ret) | |
194 | NV_ERROR(drm, "failed to create ce channel, %d\n", ret); | |
195 | ||
196 | arg0 = NVE0_CHANNEL_IND_ENGINE_GR; | |
49469800 | 197 | arg1 = 1; |
00fc6f6f | 198 | } else |
967e7bde BS |
199 | if (device->info.chipset >= 0xa3 && |
200 | device->info.chipset != 0xaa && | |
201 | device->info.chipset != 0xac) { | |
0ad72863 BS |
202 | ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN + 1, |
203 | NvDmaFB, NvDmaTT, &drm->cechan); | |
00fc6f6f BS |
204 | if (ret) |
205 | NV_ERROR(drm, "failed to create ce channel, %d\n", ret); | |
206 | ||
207 | arg0 = NvDmaFB; | |
208 | arg1 = NvDmaTT; | |
49981046 BS |
209 | } else { |
210 | arg0 = NvDmaFB; | |
211 | arg1 = NvDmaTT; | |
212 | } | |
213 | ||
0ad72863 BS |
214 | ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN, arg0, arg1, |
215 | &drm->channel); | |
ebb945a9 BS |
216 | if (ret) { |
217 | NV_ERROR(drm, "failed to create kernel channel, %d\n", ret); | |
218 | nouveau_accel_fini(drm); | |
219 | return; | |
220 | } | |
221 | ||
0ad72863 BS |
222 | ret = nvif_object_init(drm->channel->object, NULL, NVDRM_NVSW, |
223 | nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw); | |
69a6146d | 224 | if (ret == 0) { |
0ad72863 | 225 | struct nouveau_software_chan *swch; |
69a6146d BS |
226 | ret = RING_SPACE(drm->channel, 2); |
227 | if (ret == 0) { | |
967e7bde | 228 | if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { |
69a6146d BS |
229 | BEGIN_NV04(drm->channel, NvSubSw, 0, 1); |
230 | OUT_RING (drm->channel, NVDRM_NVSW); | |
231 | } else | |
967e7bde | 232 | if (device->info.family < NV_DEVICE_INFO_V0_KEPLER) { |
69a6146d BS |
233 | BEGIN_NVC0(drm->channel, FermiSw, 0, 1); |
234 | OUT_RING (drm->channel, 0x001f0000); | |
235 | } | |
236 | } | |
0ad72863 | 237 | swch = (void *)nvkm_object(&drm->nvsw)->parent; |
69a6146d BS |
238 | swch->flip = nouveau_flip_complete; |
239 | swch->flip_data = drm->channel; | |
240 | } | |
241 | ||
242 | if (ret) { | |
243 | NV_ERROR(drm, "failed to allocate software object, %d\n", ret); | |
244 | nouveau_accel_fini(drm); | |
245 | return; | |
246 | } | |
247 | ||
967e7bde BS |
248 | if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { |
249 | ret = nouveau_gpuobj_new(nvkm_object(&drm->device), NULL, 32, | |
250 | 0, 0, &drm->notify); | |
ebb945a9 BS |
251 | if (ret) { |
252 | NV_ERROR(drm, "failed to allocate notifier, %d\n", ret); | |
253 | nouveau_accel_fini(drm); | |
254 | return; | |
255 | } | |
256 | ||
0ad72863 BS |
257 | ret = nvif_object_init(drm->channel->object, NULL, NvNotify0, |
258 | NV_DMA_IN_MEMORY_CLASS, | |
259 | &(struct nv_dma_class) { | |
ebb945a9 BS |
260 | .flags = NV_DMA_TARGET_VRAM | |
261 | NV_DMA_ACCESS_RDWR, | |
262 | .start = drm->notify->addr, | |
263 | .limit = drm->notify->addr + 31 | |
0ad72863 BS |
264 | }, sizeof(struct nv_dma_class), |
265 | &drm->ntfy); | |
ebb945a9 BS |
266 | if (ret) { |
267 | nouveau_accel_fini(drm); | |
268 | return; | |
269 | } | |
270 | } | |
271 | ||
272 | ||
49981046 | 273 | nouveau_bo_move_init(drm); |
ebb945a9 BS |
274 | } |
275 | ||
56550d94 GKH |
276 | static int nouveau_drm_probe(struct pci_dev *pdev, |
277 | const struct pci_device_id *pent) | |
94580299 BS |
278 | { |
279 | struct nouveau_device *device; | |
ebb945a9 BS |
280 | struct apertures_struct *aper; |
281 | bool boot = false; | |
94580299 BS |
282 | int ret; |
283 | ||
ebb945a9 BS |
284 | /* remove conflicting drivers (vesafb, efifb etc) */ |
285 | aper = alloc_apertures(3); | |
286 | if (!aper) | |
287 | return -ENOMEM; | |
288 | ||
289 | aper->ranges[0].base = pci_resource_start(pdev, 1); | |
290 | aper->ranges[0].size = pci_resource_len(pdev, 1); | |
291 | aper->count = 1; | |
292 | ||
293 | if (pci_resource_len(pdev, 2)) { | |
294 | aper->ranges[aper->count].base = pci_resource_start(pdev, 2); | |
295 | aper->ranges[aper->count].size = pci_resource_len(pdev, 2); | |
296 | aper->count++; | |
297 | } | |
298 | ||
299 | if (pci_resource_len(pdev, 3)) { | |
300 | aper->ranges[aper->count].base = pci_resource_start(pdev, 3); | |
301 | aper->ranges[aper->count].size = pci_resource_len(pdev, 3); | |
302 | aper->count++; | |
303 | } | |
304 | ||
305 | #ifdef CONFIG_X86 | |
306 | boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; | |
307 | #endif | |
308 | remove_conflicting_framebuffers(aper, "nouveaufb", boot); | |
83ef7777 | 309 | kfree(aper); |
ebb945a9 | 310 | |
420b9469 AC |
311 | ret = nouveau_device_create(pdev, NOUVEAU_BUS_PCI, |
312 | nouveau_pci_name(pdev), pci_name(pdev), | |
94580299 BS |
313 | nouveau_config, nouveau_debug, &device); |
314 | if (ret) | |
315 | return ret; | |
316 | ||
317 | pci_set_master(pdev); | |
318 | ||
77145f1c | 319 | ret = drm_get_pci_dev(pdev, pent, &driver); |
94580299 | 320 | if (ret) { |
ebb945a9 | 321 | nouveau_object_ref(NULL, (struct nouveau_object **)&device); |
94580299 BS |
322 | return ret; |
323 | } | |
324 | ||
325 | return 0; | |
326 | } | |
327 | ||
5addcf0a DA |
328 | #define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403 |
329 | ||
330 | static void | |
46941b0f | 331 | nouveau_get_hdmi_dev(struct nouveau_drm *drm) |
5addcf0a | 332 | { |
46941b0f | 333 | struct pci_dev *pdev = drm->dev->pdev; |
5addcf0a | 334 | |
420b9469 | 335 | if (!pdev) { |
40189b0c | 336 | DRM_INFO("not a PCI device; no HDMI\n"); |
420b9469 AC |
337 | drm->hdmi_device = NULL; |
338 | return; | |
339 | } | |
340 | ||
5addcf0a DA |
341 | /* subfunction one is a hdmi audio device? */ |
342 | drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number, | |
343 | PCI_DEVFN(PCI_SLOT(pdev->devfn), 1)); | |
344 | ||
345 | if (!drm->hdmi_device) { | |
46941b0f | 346 | NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1); |
5addcf0a DA |
347 | return; |
348 | } | |
349 | ||
350 | if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) { | |
46941b0f | 351 | NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class); |
5addcf0a DA |
352 | pci_dev_put(drm->hdmi_device); |
353 | drm->hdmi_device = NULL; | |
354 | return; | |
355 | } | |
356 | } | |
357 | ||
5b8a43ae | 358 | static int |
94580299 BS |
359 | nouveau_drm_load(struct drm_device *dev, unsigned long flags) |
360 | { | |
361 | struct pci_dev *pdev = dev->pdev; | |
362 | struct nouveau_drm *drm; | |
363 | int ret; | |
364 | ||
420b9469 AC |
365 | ret = nouveau_cli_create(nouveau_name(dev), "DRM", sizeof(*drm), |
366 | (void **)&drm); | |
94580299 BS |
367 | if (ret) |
368 | return ret; | |
369 | ||
77145f1c BS |
370 | dev->dev_private = drm; |
371 | drm->dev = dev; | |
0ad72863 BS |
372 | nvkm_client(&drm->client.base)->debug = |
373 | nouveau_dbgopt(nouveau_debug, "DRM"); | |
77145f1c | 374 | |
94580299 | 375 | INIT_LIST_HEAD(&drm->clients); |
ebb945a9 | 376 | spin_lock_init(&drm->tile.lock); |
94580299 | 377 | |
46941b0f | 378 | nouveau_get_hdmi_dev(drm); |
5addcf0a | 379 | |
cb75d97e BS |
380 | /* make sure AGP controller is in a consistent state before we |
381 | * (possibly) execute vbios init tables (see nouveau_agp.h) | |
382 | */ | |
420b9469 | 383 | if (pdev && drm_pci_device_is_agp(dev) && dev->agp) { |
cb75d97e BS |
384 | /* dummy device object, doesn't init anything, but allows |
385 | * agp code access to registers | |
386 | */ | |
0ad72863 BS |
387 | ret = nvif_device_init(&drm->client.base.base, NULL, |
388 | NVDRM_DEVICE, NV_DEVICE_CLASS, | |
389 | &(struct nv_device_class) { | |
cb75d97e BS |
390 | .device = ~0, |
391 | .disable = | |
392 | ~(NV_DEVICE_DISABLE_MMIO | | |
393 | NV_DEVICE_DISABLE_IDENTIFY), | |
394 | .debug0 = ~0, | |
0ad72863 BS |
395 | }, sizeof(struct nv_device_class), |
396 | &drm->device); | |
cb75d97e | 397 | if (ret) |
ebb945a9 | 398 | goto fail_device; |
cb75d97e BS |
399 | |
400 | nouveau_agp_reset(drm); | |
0ad72863 | 401 | nvif_device_fini(&drm->device); |
cb75d97e BS |
402 | } |
403 | ||
0ad72863 BS |
404 | ret = nvif_device_init(&drm->client.base.base, NULL, NVDRM_DEVICE, |
405 | NV_DEVICE_CLASS, | |
406 | &(struct nv_device_class) { | |
94580299 BS |
407 | .device = ~0, |
408 | .disable = 0, | |
409 | .debug0 = 0, | |
0ad72863 BS |
410 | }, sizeof(struct nv_device_class), |
411 | &drm->device); | |
94580299 BS |
412 | if (ret) |
413 | goto fail_device; | |
414 | ||
7d3428cd IM |
415 | dev->irq_enabled = true; |
416 | ||
77145f1c BS |
417 | /* workaround an odd issue on nvc1 by disabling the device's |
418 | * nosnoop capability. hopefully won't cause issues until a | |
419 | * better fix is found - assuming there is one... | |
420 | */ | |
967e7bde BS |
421 | if (drm->device.info.chipset == 0xc1) |
422 | nvif_mask(&drm->device, 0x00088080, 0x00000800, 0x00000000); | |
ebb945a9 | 423 | |
77145f1c | 424 | nouveau_vga_init(drm); |
cb75d97e BS |
425 | nouveau_agp_init(drm); |
426 | ||
967e7bde BS |
427 | if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) { |
428 | ret = nouveau_vm_new(nvkm_device(&drm->device), 0, (1ULL << 40), | |
3ee6f5b5 | 429 | 0x1000, &drm->client.vm); |
ebb945a9 BS |
430 | if (ret) |
431 | goto fail_device; | |
3ee6f5b5 | 432 | |
0ad72863 | 433 | nvkm_client(&drm->client.base)->vm = drm->client.vm; |
ebb945a9 BS |
434 | } |
435 | ||
436 | ret = nouveau_ttm_init(drm); | |
94580299 | 437 | if (ret) |
77145f1c BS |
438 | goto fail_ttm; |
439 | ||
440 | ret = nouveau_bios_init(dev); | |
441 | if (ret) | |
442 | goto fail_bios; | |
443 | ||
77145f1c | 444 | ret = nouveau_display_create(dev); |
ebb945a9 | 445 | if (ret) |
77145f1c BS |
446 | goto fail_dispctor; |
447 | ||
448 | if (dev->mode_config.num_crtc) { | |
449 | ret = nouveau_display_init(dev); | |
450 | if (ret) | |
451 | goto fail_dispinit; | |
452 | } | |
453 | ||
26fdd78c | 454 | nouveau_sysfs_init(dev); |
b9ed919f | 455 | nouveau_hwmon_init(dev); |
ebb945a9 BS |
456 | nouveau_accel_init(drm); |
457 | nouveau_fbcon_init(dev); | |
5addcf0a DA |
458 | |
459 | if (nouveau_runtime_pm != 0) { | |
460 | pm_runtime_use_autosuspend(dev->dev); | |
461 | pm_runtime_set_autosuspend_delay(dev->dev, 5000); | |
462 | pm_runtime_set_active(dev->dev); | |
463 | pm_runtime_allow(dev->dev); | |
464 | pm_runtime_mark_last_busy(dev->dev); | |
465 | pm_runtime_put(dev->dev); | |
466 | } | |
94580299 BS |
467 | return 0; |
468 | ||
77145f1c BS |
469 | fail_dispinit: |
470 | nouveau_display_destroy(dev); | |
471 | fail_dispctor: | |
77145f1c BS |
472 | nouveau_bios_takedown(dev); |
473 | fail_bios: | |
ebb945a9 | 474 | nouveau_ttm_fini(drm); |
77145f1c BS |
475 | fail_ttm: |
476 | nouveau_agp_fini(drm); | |
477 | nouveau_vga_fini(drm); | |
94580299 | 478 | fail_device: |
0ad72863 | 479 | nvif_device_fini(&drm->device); |
94580299 BS |
480 | nouveau_cli_destroy(&drm->client); |
481 | return ret; | |
482 | } | |
483 | ||
5b8a43ae | 484 | static int |
94580299 BS |
485 | nouveau_drm_unload(struct drm_device *dev) |
486 | { | |
77145f1c | 487 | struct nouveau_drm *drm = nouveau_drm(dev); |
94580299 | 488 | |
5addcf0a | 489 | pm_runtime_get_sync(dev->dev); |
ebb945a9 BS |
490 | nouveau_fbcon_fini(dev); |
491 | nouveau_accel_fini(drm); | |
b9ed919f | 492 | nouveau_hwmon_fini(dev); |
26fdd78c | 493 | nouveau_sysfs_fini(dev); |
77145f1c | 494 | |
9430738d BS |
495 | if (dev->mode_config.num_crtc) |
496 | nouveau_display_fini(dev); | |
77145f1c BS |
497 | nouveau_display_destroy(dev); |
498 | ||
77145f1c | 499 | nouveau_bios_takedown(dev); |
94580299 | 500 | |
ebb945a9 | 501 | nouveau_ttm_fini(drm); |
cb75d97e | 502 | nouveau_agp_fini(drm); |
77145f1c | 503 | nouveau_vga_fini(drm); |
cb75d97e | 504 | |
0ad72863 | 505 | nvif_device_fini(&drm->device); |
5addcf0a DA |
506 | if (drm->hdmi_device) |
507 | pci_dev_put(drm->hdmi_device); | |
94580299 BS |
508 | nouveau_cli_destroy(&drm->client); |
509 | return 0; | |
510 | } | |
511 | ||
8ba9ff11 AC |
512 | void |
513 | nouveau_drm_device_remove(struct drm_device *dev) | |
94580299 | 514 | { |
77145f1c | 515 | struct nouveau_drm *drm = nouveau_drm(dev); |
0ad72863 | 516 | struct nouveau_client *client; |
ebb945a9 | 517 | struct nouveau_object *device; |
77145f1c | 518 | |
7d3428cd | 519 | dev->irq_enabled = false; |
0ad72863 BS |
520 | client = nvkm_client(&drm->client.base); |
521 | device = client->device; | |
77145f1c BS |
522 | drm_put_dev(dev); |
523 | ||
ebb945a9 BS |
524 | nouveau_object_ref(NULL, &device); |
525 | nouveau_object_debug(); | |
94580299 | 526 | } |
8ba9ff11 AC |
527 | EXPORT_SYMBOL(nouveau_drm_device_remove); |
528 | ||
529 | static void | |
530 | nouveau_drm_remove(struct pci_dev *pdev) | |
531 | { | |
532 | struct drm_device *dev = pci_get_drvdata(pdev); | |
533 | ||
534 | nouveau_drm_device_remove(dev); | |
535 | } | |
94580299 | 536 | |
cd897837 | 537 | static int |
05c63c2f | 538 | nouveau_do_suspend(struct drm_device *dev, bool runtime) |
94580299 | 539 | { |
77145f1c | 540 | struct nouveau_drm *drm = nouveau_drm(dev); |
94580299 BS |
541 | struct nouveau_cli *cli; |
542 | int ret; | |
543 | ||
05c63c2f | 544 | if (dev->mode_config.num_crtc && !runtime) { |
c52f4fa6 | 545 | NV_INFO(drm, "suspending display...\n"); |
9430738d BS |
546 | ret = nouveau_display_suspend(dev); |
547 | if (ret) | |
548 | return ret; | |
549 | } | |
94580299 | 550 | |
c52f4fa6 | 551 | NV_INFO(drm, "evicting buffers...\n"); |
ebb945a9 BS |
552 | ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM); |
553 | ||
c52f4fa6 | 554 | NV_INFO(drm, "waiting for kernel channels to go idle...\n"); |
81dff21b BS |
555 | if (drm->cechan) { |
556 | ret = nouveau_channel_idle(drm->cechan); | |
557 | if (ret) | |
f3980dc5 | 558 | goto fail_display; |
81dff21b BS |
559 | } |
560 | ||
561 | if (drm->channel) { | |
562 | ret = nouveau_channel_idle(drm->channel); | |
563 | if (ret) | |
f3980dc5 | 564 | goto fail_display; |
81dff21b BS |
565 | } |
566 | ||
c52f4fa6 | 567 | NV_INFO(drm, "suspending client object trees...\n"); |
ebb945a9 | 568 | if (drm->fence && nouveau_fence(drm)->suspend) { |
f3980dc5 IM |
569 | if (!nouveau_fence(drm)->suspend(drm)) { |
570 | ret = -ENOMEM; | |
571 | goto fail_display; | |
572 | } | |
ebb945a9 BS |
573 | } |
574 | ||
94580299 | 575 | list_for_each_entry(cli, &drm->clients, head) { |
0ad72863 | 576 | ret = nvif_client_suspend(&cli->base); |
94580299 BS |
577 | if (ret) |
578 | goto fail_client; | |
579 | } | |
580 | ||
c52f4fa6 | 581 | NV_INFO(drm, "suspending kernel object tree...\n"); |
0ad72863 | 582 | ret = nvif_client_suspend(&drm->client.base); |
94580299 BS |
583 | if (ret) |
584 | goto fail_client; | |
585 | ||
cb75d97e | 586 | nouveau_agp_fini(drm); |
94580299 BS |
587 | return 0; |
588 | ||
589 | fail_client: | |
590 | list_for_each_entry_continue_reverse(cli, &drm->clients, head) { | |
0ad72863 | 591 | nvif_client_resume(&cli->base); |
94580299 BS |
592 | } |
593 | ||
f3980dc5 IM |
594 | if (drm->fence && nouveau_fence(drm)->resume) |
595 | nouveau_fence(drm)->resume(drm); | |
596 | ||
597 | fail_display: | |
9430738d | 598 | if (dev->mode_config.num_crtc) { |
c52f4fa6 | 599 | NV_INFO(drm, "resuming display...\n"); |
9430738d BS |
600 | nouveau_display_resume(dev); |
601 | } | |
94580299 BS |
602 | return ret; |
603 | } | |
604 | ||
2d8b9ccb | 605 | int nouveau_pmops_suspend(struct device *dev) |
94580299 | 606 | { |
2d8b9ccb DA |
607 | struct pci_dev *pdev = to_pci_dev(dev); |
608 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
94580299 BS |
609 | int ret; |
610 | ||
5addcf0a DA |
611 | if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || |
612 | drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) | |
94580299 BS |
613 | return 0; |
614 | ||
5addcf0a DA |
615 | if (drm_dev->mode_config.num_crtc) |
616 | nouveau_fbcon_set_suspend(drm_dev, 1); | |
617 | ||
05c63c2f | 618 | ret = nouveau_do_suspend(drm_dev, false); |
94580299 BS |
619 | if (ret) |
620 | return ret; | |
2d8b9ccb DA |
621 | |
622 | pci_save_state(pdev); | |
623 | pci_disable_device(pdev); | |
624 | pci_set_power_state(pdev, PCI_D3hot); | |
2d8b9ccb DA |
625 | return 0; |
626 | } | |
627 | ||
cd897837 | 628 | static int |
2d8b9ccb DA |
629 | nouveau_do_resume(struct drm_device *dev) |
630 | { | |
631 | struct nouveau_drm *drm = nouveau_drm(dev); | |
632 | struct nouveau_cli *cli; | |
633 | ||
c52f4fa6 | 634 | NV_INFO(drm, "re-enabling device...\n"); |
94580299 | 635 | |
cb75d97e BS |
636 | nouveau_agp_reset(drm); |
637 | ||
c52f4fa6 | 638 | NV_INFO(drm, "resuming kernel object tree...\n"); |
0ad72863 | 639 | nvif_client_resume(&drm->client.base); |
ebb945a9 | 640 | nouveau_agp_init(drm); |
94580299 | 641 | |
c52f4fa6 | 642 | NV_INFO(drm, "resuming client object trees...\n"); |
81dff21b BS |
643 | if (drm->fence && nouveau_fence(drm)->resume) |
644 | nouveau_fence(drm)->resume(drm); | |
645 | ||
94580299 | 646 | list_for_each_entry(cli, &drm->clients, head) { |
0ad72863 | 647 | nvif_client_resume(&cli->base); |
94580299 | 648 | } |
cb75d97e | 649 | |
77145f1c | 650 | nouveau_run_vbios_init(dev); |
77145f1c | 651 | |
9430738d | 652 | if (dev->mode_config.num_crtc) { |
c52f4fa6 | 653 | NV_INFO(drm, "resuming display...\n"); |
5addcf0a | 654 | nouveau_display_repin(dev); |
9430738d | 655 | } |
5addcf0a | 656 | |
77145f1c | 657 | return 0; |
94580299 BS |
658 | } |
659 | ||
2d8b9ccb DA |
660 | int nouveau_pmops_resume(struct device *dev) |
661 | { | |
662 | struct pci_dev *pdev = to_pci_dev(dev); | |
663 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
664 | int ret; | |
665 | ||
5addcf0a DA |
666 | if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || |
667 | drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) | |
2d8b9ccb DA |
668 | return 0; |
669 | ||
670 | pci_set_power_state(pdev, PCI_D0); | |
671 | pci_restore_state(pdev); | |
672 | ret = pci_enable_device(pdev); | |
673 | if (ret) | |
674 | return ret; | |
675 | pci_set_master(pdev); | |
676 | ||
5addcf0a | 677 | ret = nouveau_do_resume(drm_dev); |
c52f4fa6 | 678 | if (ret) |
5addcf0a | 679 | return ret; |
5addcf0a | 680 | |
028791bb | 681 | if (drm_dev->mode_config.num_crtc) { |
01172772 | 682 | nouveau_display_resume(drm_dev); |
028791bb BS |
683 | nouveau_fbcon_set_suspend(drm_dev, 0); |
684 | } | |
685 | ||
5addcf0a | 686 | return 0; |
2d8b9ccb DA |
687 | } |
688 | ||
689 | static int nouveau_pmops_freeze(struct device *dev) | |
690 | { | |
691 | struct pci_dev *pdev = to_pci_dev(dev); | |
692 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
5addcf0a DA |
693 | int ret; |
694 | ||
5addcf0a DA |
695 | if (drm_dev->mode_config.num_crtc) |
696 | nouveau_fbcon_set_suspend(drm_dev, 1); | |
2d8b9ccb | 697 | |
05c63c2f | 698 | ret = nouveau_do_suspend(drm_dev, false); |
5addcf0a | 699 | return ret; |
2d8b9ccb DA |
700 | } |
701 | ||
702 | static int nouveau_pmops_thaw(struct device *dev) | |
703 | { | |
704 | struct pci_dev *pdev = to_pci_dev(dev); | |
705 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
5addcf0a | 706 | int ret; |
2d8b9ccb | 707 | |
5addcf0a | 708 | ret = nouveau_do_resume(drm_dev); |
c52f4fa6 | 709 | if (ret) |
5addcf0a | 710 | return ret; |
028791bb BS |
711 | |
712 | if (drm_dev->mode_config.num_crtc) { | |
01172772 | 713 | nouveau_display_resume(drm_dev); |
028791bb BS |
714 | nouveau_fbcon_set_suspend(drm_dev, 0); |
715 | } | |
716 | ||
5addcf0a | 717 | return 0; |
2d8b9ccb DA |
718 | } |
719 | ||
720 | ||
5b8a43ae | 721 | static int |
ebb945a9 BS |
722 | nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv) |
723 | { | |
ebb945a9 BS |
724 | struct nouveau_drm *drm = nouveau_drm(dev); |
725 | struct nouveau_cli *cli; | |
a2896ced | 726 | char name[32], tmpname[TASK_COMM_LEN]; |
ebb945a9 BS |
727 | int ret; |
728 | ||
5addcf0a DA |
729 | /* need to bring up power immediately if opening device */ |
730 | ret = pm_runtime_get_sync(dev->dev); | |
b6c4285a | 731 | if (ret < 0 && ret != -EACCES) |
5addcf0a DA |
732 | return ret; |
733 | ||
a2896ced MS |
734 | get_task_comm(tmpname, current); |
735 | snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid)); | |
fa6df8c1 | 736 | |
420b9469 AC |
737 | ret = nouveau_cli_create(nouveau_name(dev), name, sizeof(*cli), |
738 | (void **)&cli); | |
739 | ||
ebb945a9 | 740 | if (ret) |
5addcf0a | 741 | goto out_suspend; |
ebb945a9 | 742 | |
0ad72863 BS |
743 | cli->base.super = false; |
744 | ||
967e7bde BS |
745 | if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) { |
746 | ret = nouveau_vm_new(nvkm_device(&drm->device), 0, (1ULL << 40), | |
3ee6f5b5 | 747 | 0x1000, &cli->vm); |
ebb945a9 BS |
748 | if (ret) { |
749 | nouveau_cli_destroy(cli); | |
5addcf0a | 750 | goto out_suspend; |
ebb945a9 | 751 | } |
3ee6f5b5 | 752 | |
0ad72863 | 753 | nvkm_client(&cli->base)->vm = cli->vm; |
ebb945a9 BS |
754 | } |
755 | ||
756 | fpriv->driver_priv = cli; | |
757 | ||
758 | mutex_lock(&drm->client.mutex); | |
759 | list_add(&cli->head, &drm->clients); | |
760 | mutex_unlock(&drm->client.mutex); | |
5addcf0a DA |
761 | |
762 | out_suspend: | |
763 | pm_runtime_mark_last_busy(dev->dev); | |
764 | pm_runtime_put_autosuspend(dev->dev); | |
765 | ||
766 | return ret; | |
ebb945a9 BS |
767 | } |
768 | ||
5b8a43ae | 769 | static void |
ebb945a9 BS |
770 | nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv) |
771 | { | |
772 | struct nouveau_cli *cli = nouveau_cli(fpriv); | |
773 | struct nouveau_drm *drm = nouveau_drm(dev); | |
774 | ||
5addcf0a DA |
775 | pm_runtime_get_sync(dev->dev); |
776 | ||
ebb945a9 BS |
777 | if (cli->abi16) |
778 | nouveau_abi16_fini(cli->abi16); | |
779 | ||
780 | mutex_lock(&drm->client.mutex); | |
781 | list_del(&cli->head); | |
782 | mutex_unlock(&drm->client.mutex); | |
5addcf0a | 783 | |
ebb945a9 BS |
784 | } |
785 | ||
5b8a43ae | 786 | static void |
ebb945a9 BS |
787 | nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv) |
788 | { | |
789 | struct nouveau_cli *cli = nouveau_cli(fpriv); | |
790 | nouveau_cli_destroy(cli); | |
5addcf0a DA |
791 | pm_runtime_mark_last_busy(dev->dev); |
792 | pm_runtime_put_autosuspend(dev->dev); | |
ebb945a9 BS |
793 | } |
794 | ||
baa70943 | 795 | static const struct drm_ioctl_desc |
77145f1c | 796 | nouveau_ioctls[] = { |
7d761258 | 797 | DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), |
77145f1c | 798 | DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
7d761258 MP |
799 | DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), |
800 | DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
801 | DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
802 | DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
803 | DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
804 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
805 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
806 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
807 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
808 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
77145f1c BS |
809 | }; |
810 | ||
5addcf0a DA |
811 | long nouveau_drm_ioctl(struct file *filp, |
812 | unsigned int cmd, unsigned long arg) | |
813 | { | |
814 | struct drm_file *file_priv = filp->private_data; | |
815 | struct drm_device *dev; | |
816 | long ret; | |
817 | dev = file_priv->minor->dev; | |
818 | ||
819 | ret = pm_runtime_get_sync(dev->dev); | |
b6c4285a | 820 | if (ret < 0 && ret != -EACCES) |
5addcf0a DA |
821 | return ret; |
822 | ||
823 | ret = drm_ioctl(filp, cmd, arg); | |
824 | ||
825 | pm_runtime_mark_last_busy(dev->dev); | |
826 | pm_runtime_put_autosuspend(dev->dev); | |
827 | return ret; | |
828 | } | |
77145f1c BS |
829 | static const struct file_operations |
830 | nouveau_driver_fops = { | |
831 | .owner = THIS_MODULE, | |
832 | .open = drm_open, | |
833 | .release = drm_release, | |
5addcf0a | 834 | .unlocked_ioctl = nouveau_drm_ioctl, |
77145f1c BS |
835 | .mmap = nouveau_ttm_mmap, |
836 | .poll = drm_poll, | |
77145f1c BS |
837 | .read = drm_read, |
838 | #if defined(CONFIG_COMPAT) | |
839 | .compat_ioctl = nouveau_compat_ioctl, | |
840 | #endif | |
841 | .llseek = noop_llseek, | |
842 | }; | |
843 | ||
844 | static struct drm_driver | |
845 | driver = { | |
846 | .driver_features = | |
4cb4ea39 | 847 | DRIVER_USE_AGP | |
7d761258 | 848 | DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER, |
77145f1c BS |
849 | |
850 | .load = nouveau_drm_load, | |
851 | .unload = nouveau_drm_unload, | |
852 | .open = nouveau_drm_open, | |
853 | .preclose = nouveau_drm_preclose, | |
854 | .postclose = nouveau_drm_postclose, | |
855 | .lastclose = nouveau_vga_lastclose, | |
856 | ||
33b903e8 MS |
857 | #if defined(CONFIG_DEBUG_FS) |
858 | .debugfs_init = nouveau_debugfs_init, | |
859 | .debugfs_cleanup = nouveau_debugfs_takedown, | |
860 | #endif | |
861 | ||
77145f1c | 862 | .get_vblank_counter = drm_vblank_count, |
51cb4b39 BS |
863 | .enable_vblank = nouveau_display_vblank_enable, |
864 | .disable_vblank = nouveau_display_vblank_disable, | |
d83ef853 BS |
865 | .get_scanout_position = nouveau_display_scanoutpos, |
866 | .get_vblank_timestamp = nouveau_display_vblstamp, | |
77145f1c BS |
867 | |
868 | .ioctls = nouveau_ioctls, | |
baa70943 | 869 | .num_ioctls = ARRAY_SIZE(nouveau_ioctls), |
77145f1c BS |
870 | .fops = &nouveau_driver_fops, |
871 | ||
872 | .prime_handle_to_fd = drm_gem_prime_handle_to_fd, | |
873 | .prime_fd_to_handle = drm_gem_prime_fd_to_handle, | |
ab9ccb96 AP |
874 | .gem_prime_export = drm_gem_prime_export, |
875 | .gem_prime_import = drm_gem_prime_import, | |
876 | .gem_prime_pin = nouveau_gem_prime_pin, | |
1af7c7dd | 877 | .gem_prime_unpin = nouveau_gem_prime_unpin, |
ab9ccb96 AP |
878 | .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table, |
879 | .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table, | |
880 | .gem_prime_vmap = nouveau_gem_prime_vmap, | |
881 | .gem_prime_vunmap = nouveau_gem_prime_vunmap, | |
77145f1c | 882 | |
77145f1c BS |
883 | .gem_free_object = nouveau_gem_object_del, |
884 | .gem_open_object = nouveau_gem_object_open, | |
885 | .gem_close_object = nouveau_gem_object_close, | |
886 | ||
887 | .dumb_create = nouveau_display_dumb_create, | |
888 | .dumb_map_offset = nouveau_display_dumb_map_offset, | |
43387b37 | 889 | .dumb_destroy = drm_gem_dumb_destroy, |
77145f1c BS |
890 | |
891 | .name = DRIVER_NAME, | |
892 | .desc = DRIVER_DESC, | |
893 | #ifdef GIT_REVISION | |
894 | .date = GIT_REVISION, | |
895 | #else | |
896 | .date = DRIVER_DATE, | |
897 | #endif | |
898 | .major = DRIVER_MAJOR, | |
899 | .minor = DRIVER_MINOR, | |
900 | .patchlevel = DRIVER_PATCHLEVEL, | |
901 | }; | |
902 | ||
94580299 BS |
903 | static struct pci_device_id |
904 | nouveau_drm_pci_table[] = { | |
905 | { | |
906 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID), | |
907 | .class = PCI_BASE_CLASS_DISPLAY << 16, | |
908 | .class_mask = 0xff << 16, | |
909 | }, | |
910 | { | |
911 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID), | |
912 | .class = PCI_BASE_CLASS_DISPLAY << 16, | |
913 | .class_mask = 0xff << 16, | |
914 | }, | |
915 | {} | |
916 | }; | |
917 | ||
5addcf0a DA |
918 | static int nouveau_pmops_runtime_suspend(struct device *dev) |
919 | { | |
920 | struct pci_dev *pdev = to_pci_dev(dev); | |
921 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
922 | int ret; | |
923 | ||
adbbdbac DA |
924 | if (nouveau_runtime_pm == 0) { |
925 | pm_runtime_forbid(dev); | |
926 | return -EBUSY; | |
927 | } | |
5addcf0a | 928 | |
b25b4427 IM |
929 | /* are we optimus enabled? */ |
930 | if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) { | |
931 | DRM_DEBUG_DRIVER("failing to power off - not optimus\n"); | |
adbbdbac DA |
932 | pm_runtime_forbid(dev); |
933 | return -EBUSY; | |
b25b4427 IM |
934 | } |
935 | ||
c52f4fa6 | 936 | nv_debug_level(SILENT); |
5addcf0a DA |
937 | drm_kms_helper_poll_disable(drm_dev); |
938 | vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF); | |
939 | nouveau_switcheroo_optimus_dsm(); | |
05c63c2f | 940 | ret = nouveau_do_suspend(drm_dev, true); |
5addcf0a DA |
941 | pci_save_state(pdev); |
942 | pci_disable_device(pdev); | |
943 | pci_set_power_state(pdev, PCI_D3cold); | |
944 | drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; | |
945 | return ret; | |
946 | } | |
947 | ||
948 | static int nouveau_pmops_runtime_resume(struct device *dev) | |
949 | { | |
950 | struct pci_dev *pdev = to_pci_dev(dev); | |
951 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
967e7bde | 952 | struct nvif_device *device = &nouveau_drm(drm_dev)->device; |
5addcf0a DA |
953 | int ret; |
954 | ||
955 | if (nouveau_runtime_pm == 0) | |
956 | return -EINVAL; | |
957 | ||
958 | pci_set_power_state(pdev, PCI_D0); | |
959 | pci_restore_state(pdev); | |
960 | ret = pci_enable_device(pdev); | |
961 | if (ret) | |
962 | return ret; | |
963 | pci_set_master(pdev); | |
964 | ||
965 | ret = nouveau_do_resume(drm_dev); | |
5addcf0a DA |
966 | drm_kms_helper_poll_enable(drm_dev); |
967 | /* do magic */ | |
db2bec18 | 968 | nvif_mask(device, 0x88488, (1 << 25), (1 << 25)); |
5addcf0a DA |
969 | vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON); |
970 | drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; | |
c52f4fa6 | 971 | nv_debug_level(NORMAL); |
5addcf0a DA |
972 | return ret; |
973 | } | |
974 | ||
975 | static int nouveau_pmops_runtime_idle(struct device *dev) | |
976 | { | |
977 | struct pci_dev *pdev = to_pci_dev(dev); | |
978 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
979 | struct nouveau_drm *drm = nouveau_drm(drm_dev); | |
980 | struct drm_crtc *crtc; | |
981 | ||
adbbdbac DA |
982 | if (nouveau_runtime_pm == 0) { |
983 | pm_runtime_forbid(dev); | |
5addcf0a | 984 | return -EBUSY; |
adbbdbac | 985 | } |
5addcf0a DA |
986 | |
987 | /* are we optimus enabled? */ | |
988 | if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) { | |
989 | DRM_DEBUG_DRIVER("failing to power off - not optimus\n"); | |
adbbdbac | 990 | pm_runtime_forbid(dev); |
5addcf0a DA |
991 | return -EBUSY; |
992 | } | |
993 | ||
994 | /* if we have a hdmi audio device - make sure it has a driver loaded */ | |
995 | if (drm->hdmi_device) { | |
996 | if (!drm->hdmi_device->driver) { | |
997 | DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n"); | |
998 | pm_runtime_mark_last_busy(dev); | |
999 | return -EBUSY; | |
1000 | } | |
1001 | } | |
1002 | ||
1003 | list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) { | |
1004 | if (crtc->enabled) { | |
1005 | DRM_DEBUG_DRIVER("failing to power off - crtc active\n"); | |
1006 | return -EBUSY; | |
1007 | } | |
1008 | } | |
1009 | pm_runtime_mark_last_busy(dev); | |
1010 | pm_runtime_autosuspend(dev); | |
1011 | /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ | |
1012 | return 1; | |
1013 | } | |
1014 | ||
2d8b9ccb DA |
1015 | static const struct dev_pm_ops nouveau_pm_ops = { |
1016 | .suspend = nouveau_pmops_suspend, | |
1017 | .resume = nouveau_pmops_resume, | |
1018 | .freeze = nouveau_pmops_freeze, | |
1019 | .thaw = nouveau_pmops_thaw, | |
1020 | .poweroff = nouveau_pmops_freeze, | |
1021 | .restore = nouveau_pmops_resume, | |
5addcf0a DA |
1022 | .runtime_suspend = nouveau_pmops_runtime_suspend, |
1023 | .runtime_resume = nouveau_pmops_runtime_resume, | |
1024 | .runtime_idle = nouveau_pmops_runtime_idle, | |
2d8b9ccb DA |
1025 | }; |
1026 | ||
94580299 BS |
1027 | static struct pci_driver |
1028 | nouveau_drm_pci_driver = { | |
1029 | .name = "nouveau", | |
1030 | .id_table = nouveau_drm_pci_table, | |
1031 | .probe = nouveau_drm_probe, | |
1032 | .remove = nouveau_drm_remove, | |
2d8b9ccb | 1033 | .driver.pm = &nouveau_pm_ops, |
94580299 BS |
1034 | }; |
1035 | ||
8ba9ff11 AC |
1036 | struct drm_device * |
1037 | nouveau_platform_device_create_(struct platform_device *pdev, int size, | |
1038 | void **pobject) | |
420b9469 | 1039 | { |
8ba9ff11 AC |
1040 | struct drm_device *drm; |
1041 | int err; | |
420b9469 | 1042 | |
8ba9ff11 | 1043 | err = nouveau_device_create_(pdev, NOUVEAU_BUS_PLATFORM, |
420b9469 AC |
1044 | nouveau_platform_name(pdev), |
1045 | dev_name(&pdev->dev), nouveau_config, | |
8ba9ff11 AC |
1046 | nouveau_debug, size, pobject); |
1047 | if (err) | |
1048 | return ERR_PTR(err); | |
1049 | ||
1050 | drm = drm_dev_alloc(&driver, &pdev->dev); | |
1051 | if (!drm) { | |
1052 | err = -ENOMEM; | |
1053 | goto err_free; | |
420b9469 AC |
1054 | } |
1055 | ||
8ba9ff11 AC |
1056 | err = drm_dev_set_unique(drm, "%s", dev_name(&pdev->dev)); |
1057 | if (err < 0) | |
1058 | goto err_free; | |
1059 | ||
1060 | drm->platformdev = pdev; | |
1061 | platform_set_drvdata(pdev, drm); | |
1062 | ||
1063 | return drm; | |
1064 | ||
1065 | err_free: | |
1066 | nouveau_object_ref(NULL, (struct nouveau_object **)pobject); | |
1067 | ||
1068 | return ERR_PTR(err); | |
420b9469 | 1069 | } |
8ba9ff11 | 1070 | EXPORT_SYMBOL(nouveau_platform_device_create_); |
420b9469 | 1071 | |
94580299 BS |
1072 | static int __init |
1073 | nouveau_drm_init(void) | |
1074 | { | |
77145f1c BS |
1075 | if (nouveau_modeset == -1) { |
1076 | #ifdef CONFIG_VGA_CONSOLE | |
1077 | if (vgacon_text_force()) | |
1078 | nouveau_modeset = 0; | |
77145f1c | 1079 | #endif |
77145f1c BS |
1080 | } |
1081 | ||
1082 | if (!nouveau_modeset) | |
1083 | return 0; | |
1084 | ||
1085 | nouveau_register_dsm_handler(); | |
1086 | return drm_pci_init(&driver, &nouveau_drm_pci_driver); | |
94580299 BS |
1087 | } |
1088 | ||
1089 | static void __exit | |
1090 | nouveau_drm_exit(void) | |
1091 | { | |
77145f1c BS |
1092 | if (!nouveau_modeset) |
1093 | return; | |
1094 | ||
1095 | drm_pci_exit(&driver, &nouveau_drm_pci_driver); | |
1096 | nouveau_unregister_dsm_handler(); | |
94580299 BS |
1097 | } |
1098 | ||
1099 | module_init(nouveau_drm_init); | |
1100 | module_exit(nouveau_drm_exit); | |
1101 | ||
1102 | MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table); | |
77145f1c BS |
1103 | MODULE_AUTHOR(DRIVER_AUTHOR); |
1104 | MODULE_DESCRIPTION(DRIVER_DESC); | |
94580299 | 1105 | MODULE_LICENSE("GPL and additional rights"); |