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Commit | Line | Data |
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94580299 BS |
1 | /* |
2 | * Copyright 2012 Red Hat Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: Ben Skeggs | |
23 | */ | |
24 | ||
77145f1c | 25 | #include <linux/console.h> |
94580299 BS |
26 | #include <linux/module.h> |
27 | #include <linux/pci.h> | |
5addcf0a DA |
28 | #include <linux/pm_runtime.h> |
29 | #include <linux/vga_switcheroo.h> | |
fdb751ef | 30 | |
5addcf0a DA |
31 | #include "drmP.h" |
32 | #include "drm_crtc_helper.h" | |
fdb751ef | 33 | |
94580299 | 34 | #include <core/device.h> |
ebb945a9 | 35 | #include <core/gpuobj.h> |
c33e05a1 | 36 | #include <core/option.h> |
94580299 | 37 | |
94580299 | 38 | #include "nouveau_drm.h" |
ebb945a9 | 39 | #include "nouveau_dma.h" |
77145f1c BS |
40 | #include "nouveau_ttm.h" |
41 | #include "nouveau_gem.h" | |
cb75d97e | 42 | #include "nouveau_agp.h" |
77145f1c | 43 | #include "nouveau_vga.h" |
26fdd78c | 44 | #include "nouveau_sysfs.h" |
b9ed919f | 45 | #include "nouveau_hwmon.h" |
77145f1c BS |
46 | #include "nouveau_acpi.h" |
47 | #include "nouveau_bios.h" | |
48 | #include "nouveau_ioctl.h" | |
ebb945a9 BS |
49 | #include "nouveau_abi16.h" |
50 | #include "nouveau_fbcon.h" | |
51 | #include "nouveau_fence.h" | |
33b903e8 | 52 | #include "nouveau_debugfs.h" |
27111a23 | 53 | #include "nouveau_usif.h" |
ebb945a9 | 54 | |
94580299 BS |
55 | MODULE_PARM_DESC(config, "option string to pass to driver core"); |
56 | static char *nouveau_config; | |
57 | module_param_named(config, nouveau_config, charp, 0400); | |
58 | ||
59 | MODULE_PARM_DESC(debug, "debug string to pass to driver core"); | |
60 | static char *nouveau_debug; | |
61 | module_param_named(debug, nouveau_debug, charp, 0400); | |
62 | ||
ebb945a9 BS |
63 | MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration"); |
64 | static int nouveau_noaccel = 0; | |
65 | module_param_named(noaccel, nouveau_noaccel, int, 0400); | |
66 | ||
9430738d BS |
67 | MODULE_PARM_DESC(modeset, "enable driver (default: auto, " |
68 | "0 = disabled, 1 = enabled, 2 = headless)"); | |
69 | int nouveau_modeset = -1; | |
77145f1c BS |
70 | module_param_named(modeset, nouveau_modeset, int, 0400); |
71 | ||
5addcf0a DA |
72 | MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)"); |
73 | int nouveau_runtime_pm = -1; | |
74 | module_param_named(runpm, nouveau_runtime_pm, int, 0400); | |
75 | ||
77145f1c BS |
76 | static struct drm_driver driver; |
77 | ||
94580299 | 78 | static u64 |
420b9469 | 79 | nouveau_pci_name(struct pci_dev *pdev) |
94580299 BS |
80 | { |
81 | u64 name = (u64)pci_domain_nr(pdev->bus) << 32; | |
82 | name |= pdev->bus->number << 16; | |
83 | name |= PCI_SLOT(pdev->devfn) << 8; | |
84 | return name | PCI_FUNC(pdev->devfn); | |
85 | } | |
86 | ||
420b9469 AC |
87 | static u64 |
88 | nouveau_platform_name(struct platform_device *platformdev) | |
89 | { | |
90 | return platformdev->id; | |
91 | } | |
92 | ||
93 | static u64 | |
94 | nouveau_name(struct drm_device *dev) | |
95 | { | |
96 | if (dev->pdev) | |
97 | return nouveau_pci_name(dev->pdev); | |
98 | else | |
99 | return nouveau_platform_name(dev->platformdev); | |
100 | } | |
101 | ||
94580299 | 102 | static int |
420b9469 | 103 | nouveau_cli_create(u64 name, const char *sname, |
fa6df8c1 | 104 | int size, void **pcli) |
94580299 | 105 | { |
0ad72863 BS |
106 | struct nouveau_cli *cli = *pcli = kzalloc(size, GFP_KERNEL); |
107 | if (cli) { | |
108 | int ret = nvif_client_init(NULL, NULL, sname, name, | |
109 | nouveau_config, nouveau_debug, | |
110 | &cli->base); | |
27111a23 | 111 | if (ret == 0) { |
0ad72863 | 112 | mutex_init(&cli->mutex); |
27111a23 BS |
113 | usif_client_init(cli); |
114 | } | |
94580299 | 115 | return ret; |
dd5700ea | 116 | } |
0ad72863 | 117 | return -ENOMEM; |
94580299 BS |
118 | } |
119 | ||
120 | static void | |
121 | nouveau_cli_destroy(struct nouveau_cli *cli) | |
122 | { | |
0ad72863 BS |
123 | nouveau_vm_ref(NULL, &nvkm_client(&cli->base)->vm, NULL); |
124 | nvif_client_fini(&cli->base); | |
27111a23 | 125 | usif_client_fini(cli); |
94580299 BS |
126 | } |
127 | ||
ebb945a9 BS |
128 | static void |
129 | nouveau_accel_fini(struct nouveau_drm *drm) | |
130 | { | |
ebb945a9 | 131 | nouveau_channel_del(&drm->channel); |
0ad72863 BS |
132 | nvif_object_fini(&drm->ntfy); |
133 | nouveau_gpuobj_ref(NULL, &drm->notify); | |
134 | nvif_object_fini(&drm->nvsw); | |
49981046 | 135 | nouveau_channel_del(&drm->cechan); |
0ad72863 | 136 | nvif_object_fini(&drm->ttm.copy); |
ebb945a9 BS |
137 | if (drm->fence) |
138 | nouveau_fence(drm)->dtor(drm); | |
139 | } | |
140 | ||
141 | static void | |
142 | nouveau_accel_init(struct nouveau_drm *drm) | |
143 | { | |
967e7bde | 144 | struct nvif_device *device = &drm->device; |
49981046 | 145 | u32 arg0, arg1; |
967e7bde BS |
146 | u32 sclass[16]; |
147 | int ret, i; | |
ebb945a9 | 148 | |
967e7bde | 149 | if (nouveau_noaccel) |
ebb945a9 BS |
150 | return; |
151 | ||
152 | /* initialise synchronisation routines */ | |
967e7bde BS |
153 | /*XXX: this is crap, but the fence/channel stuff is a little |
154 | * backwards in some places. this will be fixed. | |
155 | */ | |
0ad72863 | 156 | ret = nvif_object_sclass(&device->base, sclass, ARRAY_SIZE(sclass)); |
967e7bde BS |
157 | if (ret < 0) |
158 | return; | |
159 | ||
160 | for (ret = -ENOSYS, i = 0; ret && i < ARRAY_SIZE(sclass); i++) { | |
161 | switch (sclass[i]) { | |
bbf8906b | 162 | case NV03_CHANNEL_DMA: |
967e7bde BS |
163 | ret = nv04_fence_create(drm); |
164 | break; | |
bbf8906b | 165 | case NV10_CHANNEL_DMA: |
967e7bde BS |
166 | ret = nv10_fence_create(drm); |
167 | break; | |
bbf8906b BS |
168 | case NV17_CHANNEL_DMA: |
169 | case NV40_CHANNEL_DMA: | |
967e7bde BS |
170 | ret = nv17_fence_create(drm); |
171 | break; | |
bbf8906b | 172 | case NV50_CHANNEL_GPFIFO: |
967e7bde BS |
173 | ret = nv50_fence_create(drm); |
174 | break; | |
bbf8906b | 175 | case G82_CHANNEL_GPFIFO: |
967e7bde BS |
176 | ret = nv84_fence_create(drm); |
177 | break; | |
bbf8906b BS |
178 | case FERMI_CHANNEL_GPFIFO: |
179 | case KEPLER_CHANNEL_GPFIFO_A: | |
967e7bde BS |
180 | ret = nvc0_fence_create(drm); |
181 | break; | |
182 | default: | |
183 | break; | |
184 | } | |
185 | } | |
186 | ||
ebb945a9 BS |
187 | if (ret) { |
188 | NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret); | |
189 | nouveau_accel_fini(drm); | |
190 | return; | |
191 | } | |
192 | ||
967e7bde | 193 | if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) { |
0ad72863 | 194 | ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN + 1, |
bbf8906b BS |
195 | KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE0| |
196 | KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE1, | |
197 | 0, &drm->cechan); | |
49981046 BS |
198 | if (ret) |
199 | NV_ERROR(drm, "failed to create ce channel, %d\n", ret); | |
200 | ||
bbf8906b | 201 | arg0 = KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_GR; |
49469800 | 202 | arg1 = 1; |
00fc6f6f | 203 | } else |
967e7bde BS |
204 | if (device->info.chipset >= 0xa3 && |
205 | device->info.chipset != 0xaa && | |
206 | device->info.chipset != 0xac) { | |
0ad72863 BS |
207 | ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN + 1, |
208 | NvDmaFB, NvDmaTT, &drm->cechan); | |
00fc6f6f BS |
209 | if (ret) |
210 | NV_ERROR(drm, "failed to create ce channel, %d\n", ret); | |
211 | ||
212 | arg0 = NvDmaFB; | |
213 | arg1 = NvDmaTT; | |
49981046 BS |
214 | } else { |
215 | arg0 = NvDmaFB; | |
216 | arg1 = NvDmaTT; | |
217 | } | |
218 | ||
0ad72863 BS |
219 | ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN, arg0, arg1, |
220 | &drm->channel); | |
ebb945a9 BS |
221 | if (ret) { |
222 | NV_ERROR(drm, "failed to create kernel channel, %d\n", ret); | |
223 | nouveau_accel_fini(drm); | |
224 | return; | |
225 | } | |
226 | ||
0ad72863 BS |
227 | ret = nvif_object_init(drm->channel->object, NULL, NVDRM_NVSW, |
228 | nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw); | |
69a6146d | 229 | if (ret == 0) { |
0ad72863 | 230 | struct nouveau_software_chan *swch; |
69a6146d BS |
231 | ret = RING_SPACE(drm->channel, 2); |
232 | if (ret == 0) { | |
967e7bde | 233 | if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { |
69a6146d BS |
234 | BEGIN_NV04(drm->channel, NvSubSw, 0, 1); |
235 | OUT_RING (drm->channel, NVDRM_NVSW); | |
236 | } else | |
967e7bde | 237 | if (device->info.family < NV_DEVICE_INFO_V0_KEPLER) { |
69a6146d BS |
238 | BEGIN_NVC0(drm->channel, FermiSw, 0, 1); |
239 | OUT_RING (drm->channel, 0x001f0000); | |
240 | } | |
241 | } | |
0ad72863 | 242 | swch = (void *)nvkm_object(&drm->nvsw)->parent; |
69a6146d BS |
243 | swch->flip = nouveau_flip_complete; |
244 | swch->flip_data = drm->channel; | |
245 | } | |
246 | ||
247 | if (ret) { | |
248 | NV_ERROR(drm, "failed to allocate software object, %d\n", ret); | |
249 | nouveau_accel_fini(drm); | |
250 | return; | |
251 | } | |
252 | ||
967e7bde BS |
253 | if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { |
254 | ret = nouveau_gpuobj_new(nvkm_object(&drm->device), NULL, 32, | |
255 | 0, 0, &drm->notify); | |
ebb945a9 BS |
256 | if (ret) { |
257 | NV_ERROR(drm, "failed to allocate notifier, %d\n", ret); | |
258 | nouveau_accel_fini(drm); | |
259 | return; | |
260 | } | |
261 | ||
0ad72863 | 262 | ret = nvif_object_init(drm->channel->object, NULL, NvNotify0, |
4acfd707 BS |
263 | NV_DMA_IN_MEMORY, |
264 | &(struct nv_dma_v0) { | |
265 | .target = NV_DMA_V0_TARGET_VRAM, | |
266 | .access = NV_DMA_V0_ACCESS_RDWR, | |
ebb945a9 BS |
267 | .start = drm->notify->addr, |
268 | .limit = drm->notify->addr + 31 | |
4acfd707 | 269 | }, sizeof(struct nv_dma_v0), |
0ad72863 | 270 | &drm->ntfy); |
ebb945a9 BS |
271 | if (ret) { |
272 | nouveau_accel_fini(drm); | |
273 | return; | |
274 | } | |
275 | } | |
276 | ||
277 | ||
49981046 | 278 | nouveau_bo_move_init(drm); |
ebb945a9 BS |
279 | } |
280 | ||
56550d94 GKH |
281 | static int nouveau_drm_probe(struct pci_dev *pdev, |
282 | const struct pci_device_id *pent) | |
94580299 BS |
283 | { |
284 | struct nouveau_device *device; | |
ebb945a9 BS |
285 | struct apertures_struct *aper; |
286 | bool boot = false; | |
94580299 BS |
287 | int ret; |
288 | ||
ebb945a9 BS |
289 | /* remove conflicting drivers (vesafb, efifb etc) */ |
290 | aper = alloc_apertures(3); | |
291 | if (!aper) | |
292 | return -ENOMEM; | |
293 | ||
294 | aper->ranges[0].base = pci_resource_start(pdev, 1); | |
295 | aper->ranges[0].size = pci_resource_len(pdev, 1); | |
296 | aper->count = 1; | |
297 | ||
298 | if (pci_resource_len(pdev, 2)) { | |
299 | aper->ranges[aper->count].base = pci_resource_start(pdev, 2); | |
300 | aper->ranges[aper->count].size = pci_resource_len(pdev, 2); | |
301 | aper->count++; | |
302 | } | |
303 | ||
304 | if (pci_resource_len(pdev, 3)) { | |
305 | aper->ranges[aper->count].base = pci_resource_start(pdev, 3); | |
306 | aper->ranges[aper->count].size = pci_resource_len(pdev, 3); | |
307 | aper->count++; | |
308 | } | |
309 | ||
310 | #ifdef CONFIG_X86 | |
311 | boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; | |
312 | #endif | |
771fa0e4 BS |
313 | if (nouveau_modeset != 2) |
314 | remove_conflicting_framebuffers(aper, "nouveaufb", boot); | |
83ef7777 | 315 | kfree(aper); |
ebb945a9 | 316 | |
420b9469 AC |
317 | ret = nouveau_device_create(pdev, NOUVEAU_BUS_PCI, |
318 | nouveau_pci_name(pdev), pci_name(pdev), | |
94580299 BS |
319 | nouveau_config, nouveau_debug, &device); |
320 | if (ret) | |
321 | return ret; | |
322 | ||
323 | pci_set_master(pdev); | |
324 | ||
77145f1c | 325 | ret = drm_get_pci_dev(pdev, pent, &driver); |
94580299 | 326 | if (ret) { |
ebb945a9 | 327 | nouveau_object_ref(NULL, (struct nouveau_object **)&device); |
94580299 BS |
328 | return ret; |
329 | } | |
330 | ||
331 | return 0; | |
332 | } | |
333 | ||
5addcf0a DA |
334 | #define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403 |
335 | ||
336 | static void | |
46941b0f | 337 | nouveau_get_hdmi_dev(struct nouveau_drm *drm) |
5addcf0a | 338 | { |
46941b0f | 339 | struct pci_dev *pdev = drm->dev->pdev; |
5addcf0a | 340 | |
420b9469 | 341 | if (!pdev) { |
40189b0c | 342 | DRM_INFO("not a PCI device; no HDMI\n"); |
420b9469 AC |
343 | drm->hdmi_device = NULL; |
344 | return; | |
345 | } | |
346 | ||
5addcf0a DA |
347 | /* subfunction one is a hdmi audio device? */ |
348 | drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number, | |
349 | PCI_DEVFN(PCI_SLOT(pdev->devfn), 1)); | |
350 | ||
351 | if (!drm->hdmi_device) { | |
46941b0f | 352 | NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1); |
5addcf0a DA |
353 | return; |
354 | } | |
355 | ||
356 | if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) { | |
46941b0f | 357 | NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class); |
5addcf0a DA |
358 | pci_dev_put(drm->hdmi_device); |
359 | drm->hdmi_device = NULL; | |
360 | return; | |
361 | } | |
362 | } | |
363 | ||
5b8a43ae | 364 | static int |
94580299 BS |
365 | nouveau_drm_load(struct drm_device *dev, unsigned long flags) |
366 | { | |
367 | struct pci_dev *pdev = dev->pdev; | |
368 | struct nouveau_drm *drm; | |
369 | int ret; | |
370 | ||
420b9469 AC |
371 | ret = nouveau_cli_create(nouveau_name(dev), "DRM", sizeof(*drm), |
372 | (void **)&drm); | |
94580299 BS |
373 | if (ret) |
374 | return ret; | |
375 | ||
77145f1c BS |
376 | dev->dev_private = drm; |
377 | drm->dev = dev; | |
0ad72863 BS |
378 | nvkm_client(&drm->client.base)->debug = |
379 | nouveau_dbgopt(nouveau_debug, "DRM"); | |
77145f1c | 380 | |
94580299 | 381 | INIT_LIST_HEAD(&drm->clients); |
ebb945a9 | 382 | spin_lock_init(&drm->tile.lock); |
94580299 | 383 | |
46941b0f | 384 | nouveau_get_hdmi_dev(drm); |
5addcf0a | 385 | |
cb75d97e BS |
386 | /* make sure AGP controller is in a consistent state before we |
387 | * (possibly) execute vbios init tables (see nouveau_agp.h) | |
388 | */ | |
420b9469 | 389 | if (pdev && drm_pci_device_is_agp(dev) && dev->agp) { |
586491e6 BS |
390 | const u64 enables = NV_DEVICE_V0_DISABLE_IDENTIFY | |
391 | NV_DEVICE_V0_DISABLE_MMIO; | |
cb75d97e BS |
392 | /* dummy device object, doesn't init anything, but allows |
393 | * agp code access to registers | |
394 | */ | |
0ad72863 | 395 | ret = nvif_device_init(&drm->client.base.base, NULL, |
586491e6 BS |
396 | NVDRM_DEVICE, NV_DEVICE, |
397 | &(struct nv_device_v0) { | |
cb75d97e | 398 | .device = ~0, |
586491e6 | 399 | .disable = ~enables, |
cb75d97e | 400 | .debug0 = ~0, |
586491e6 | 401 | }, sizeof(struct nv_device_v0), |
0ad72863 | 402 | &drm->device); |
cb75d97e | 403 | if (ret) |
ebb945a9 | 404 | goto fail_device; |
cb75d97e BS |
405 | |
406 | nouveau_agp_reset(drm); | |
0ad72863 | 407 | nvif_device_fini(&drm->device); |
cb75d97e BS |
408 | } |
409 | ||
0ad72863 | 410 | ret = nvif_device_init(&drm->client.base.base, NULL, NVDRM_DEVICE, |
586491e6 BS |
411 | NV_DEVICE, |
412 | &(struct nv_device_v0) { | |
94580299 BS |
413 | .device = ~0, |
414 | .disable = 0, | |
415 | .debug0 = 0, | |
586491e6 | 416 | }, sizeof(struct nv_device_v0), |
0ad72863 | 417 | &drm->device); |
94580299 BS |
418 | if (ret) |
419 | goto fail_device; | |
420 | ||
7d3428cd IM |
421 | dev->irq_enabled = true; |
422 | ||
77145f1c BS |
423 | /* workaround an odd issue on nvc1 by disabling the device's |
424 | * nosnoop capability. hopefully won't cause issues until a | |
425 | * better fix is found - assuming there is one... | |
426 | */ | |
967e7bde BS |
427 | if (drm->device.info.chipset == 0xc1) |
428 | nvif_mask(&drm->device, 0x00088080, 0x00000800, 0x00000000); | |
ebb945a9 | 429 | |
77145f1c | 430 | nouveau_vga_init(drm); |
cb75d97e BS |
431 | nouveau_agp_init(drm); |
432 | ||
967e7bde BS |
433 | if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) { |
434 | ret = nouveau_vm_new(nvkm_device(&drm->device), 0, (1ULL << 40), | |
3ee6f5b5 | 435 | 0x1000, &drm->client.vm); |
ebb945a9 BS |
436 | if (ret) |
437 | goto fail_device; | |
3ee6f5b5 | 438 | |
0ad72863 | 439 | nvkm_client(&drm->client.base)->vm = drm->client.vm; |
ebb945a9 BS |
440 | } |
441 | ||
442 | ret = nouveau_ttm_init(drm); | |
94580299 | 443 | if (ret) |
77145f1c BS |
444 | goto fail_ttm; |
445 | ||
446 | ret = nouveau_bios_init(dev); | |
447 | if (ret) | |
448 | goto fail_bios; | |
449 | ||
77145f1c | 450 | ret = nouveau_display_create(dev); |
ebb945a9 | 451 | if (ret) |
77145f1c BS |
452 | goto fail_dispctor; |
453 | ||
454 | if (dev->mode_config.num_crtc) { | |
455 | ret = nouveau_display_init(dev); | |
456 | if (ret) | |
457 | goto fail_dispinit; | |
458 | } | |
459 | ||
26fdd78c | 460 | nouveau_sysfs_init(dev); |
b9ed919f | 461 | nouveau_hwmon_init(dev); |
ebb945a9 BS |
462 | nouveau_accel_init(drm); |
463 | nouveau_fbcon_init(dev); | |
5addcf0a DA |
464 | |
465 | if (nouveau_runtime_pm != 0) { | |
466 | pm_runtime_use_autosuspend(dev->dev); | |
467 | pm_runtime_set_autosuspend_delay(dev->dev, 5000); | |
468 | pm_runtime_set_active(dev->dev); | |
469 | pm_runtime_allow(dev->dev); | |
470 | pm_runtime_mark_last_busy(dev->dev); | |
471 | pm_runtime_put(dev->dev); | |
472 | } | |
94580299 BS |
473 | return 0; |
474 | ||
77145f1c BS |
475 | fail_dispinit: |
476 | nouveau_display_destroy(dev); | |
477 | fail_dispctor: | |
77145f1c BS |
478 | nouveau_bios_takedown(dev); |
479 | fail_bios: | |
ebb945a9 | 480 | nouveau_ttm_fini(drm); |
77145f1c BS |
481 | fail_ttm: |
482 | nouveau_agp_fini(drm); | |
483 | nouveau_vga_fini(drm); | |
94580299 | 484 | fail_device: |
0ad72863 | 485 | nvif_device_fini(&drm->device); |
94580299 BS |
486 | nouveau_cli_destroy(&drm->client); |
487 | return ret; | |
488 | } | |
489 | ||
5b8a43ae | 490 | static int |
94580299 BS |
491 | nouveau_drm_unload(struct drm_device *dev) |
492 | { | |
77145f1c | 493 | struct nouveau_drm *drm = nouveau_drm(dev); |
94580299 | 494 | |
5addcf0a | 495 | pm_runtime_get_sync(dev->dev); |
ebb945a9 BS |
496 | nouveau_fbcon_fini(dev); |
497 | nouveau_accel_fini(drm); | |
b9ed919f | 498 | nouveau_hwmon_fini(dev); |
26fdd78c | 499 | nouveau_sysfs_fini(dev); |
77145f1c | 500 | |
9430738d BS |
501 | if (dev->mode_config.num_crtc) |
502 | nouveau_display_fini(dev); | |
77145f1c BS |
503 | nouveau_display_destroy(dev); |
504 | ||
77145f1c | 505 | nouveau_bios_takedown(dev); |
94580299 | 506 | |
ebb945a9 | 507 | nouveau_ttm_fini(drm); |
cb75d97e | 508 | nouveau_agp_fini(drm); |
77145f1c | 509 | nouveau_vga_fini(drm); |
cb75d97e | 510 | |
0ad72863 | 511 | nvif_device_fini(&drm->device); |
5addcf0a DA |
512 | if (drm->hdmi_device) |
513 | pci_dev_put(drm->hdmi_device); | |
94580299 BS |
514 | nouveau_cli_destroy(&drm->client); |
515 | return 0; | |
516 | } | |
517 | ||
8ba9ff11 AC |
518 | void |
519 | nouveau_drm_device_remove(struct drm_device *dev) | |
94580299 | 520 | { |
77145f1c | 521 | struct nouveau_drm *drm = nouveau_drm(dev); |
0ad72863 | 522 | struct nouveau_client *client; |
ebb945a9 | 523 | struct nouveau_object *device; |
77145f1c | 524 | |
7d3428cd | 525 | dev->irq_enabled = false; |
0ad72863 BS |
526 | client = nvkm_client(&drm->client.base); |
527 | device = client->device; | |
77145f1c BS |
528 | drm_put_dev(dev); |
529 | ||
ebb945a9 BS |
530 | nouveau_object_ref(NULL, &device); |
531 | nouveau_object_debug(); | |
94580299 | 532 | } |
8ba9ff11 AC |
533 | EXPORT_SYMBOL(nouveau_drm_device_remove); |
534 | ||
535 | static void | |
536 | nouveau_drm_remove(struct pci_dev *pdev) | |
537 | { | |
538 | struct drm_device *dev = pci_get_drvdata(pdev); | |
539 | ||
540 | nouveau_drm_device_remove(dev); | |
541 | } | |
94580299 | 542 | |
cd897837 | 543 | static int |
05c63c2f | 544 | nouveau_do_suspend(struct drm_device *dev, bool runtime) |
94580299 | 545 | { |
77145f1c | 546 | struct nouveau_drm *drm = nouveau_drm(dev); |
94580299 BS |
547 | struct nouveau_cli *cli; |
548 | int ret; | |
549 | ||
05c63c2f | 550 | if (dev->mode_config.num_crtc && !runtime) { |
c52f4fa6 | 551 | NV_INFO(drm, "suspending display...\n"); |
9430738d BS |
552 | ret = nouveau_display_suspend(dev); |
553 | if (ret) | |
554 | return ret; | |
555 | } | |
94580299 | 556 | |
c52f4fa6 | 557 | NV_INFO(drm, "evicting buffers...\n"); |
ebb945a9 BS |
558 | ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM); |
559 | ||
c52f4fa6 | 560 | NV_INFO(drm, "waiting for kernel channels to go idle...\n"); |
81dff21b BS |
561 | if (drm->cechan) { |
562 | ret = nouveau_channel_idle(drm->cechan); | |
563 | if (ret) | |
f3980dc5 | 564 | goto fail_display; |
81dff21b BS |
565 | } |
566 | ||
567 | if (drm->channel) { | |
568 | ret = nouveau_channel_idle(drm->channel); | |
569 | if (ret) | |
f3980dc5 | 570 | goto fail_display; |
81dff21b BS |
571 | } |
572 | ||
c52f4fa6 | 573 | NV_INFO(drm, "suspending client object trees...\n"); |
ebb945a9 | 574 | if (drm->fence && nouveau_fence(drm)->suspend) { |
f3980dc5 IM |
575 | if (!nouveau_fence(drm)->suspend(drm)) { |
576 | ret = -ENOMEM; | |
577 | goto fail_display; | |
578 | } | |
ebb945a9 BS |
579 | } |
580 | ||
94580299 | 581 | list_for_each_entry(cli, &drm->clients, head) { |
0ad72863 | 582 | ret = nvif_client_suspend(&cli->base); |
94580299 BS |
583 | if (ret) |
584 | goto fail_client; | |
585 | } | |
586 | ||
c52f4fa6 | 587 | NV_INFO(drm, "suspending kernel object tree...\n"); |
0ad72863 | 588 | ret = nvif_client_suspend(&drm->client.base); |
94580299 BS |
589 | if (ret) |
590 | goto fail_client; | |
591 | ||
cb75d97e | 592 | nouveau_agp_fini(drm); |
94580299 BS |
593 | return 0; |
594 | ||
595 | fail_client: | |
596 | list_for_each_entry_continue_reverse(cli, &drm->clients, head) { | |
0ad72863 | 597 | nvif_client_resume(&cli->base); |
94580299 BS |
598 | } |
599 | ||
f3980dc5 IM |
600 | if (drm->fence && nouveau_fence(drm)->resume) |
601 | nouveau_fence(drm)->resume(drm); | |
602 | ||
603 | fail_display: | |
9430738d | 604 | if (dev->mode_config.num_crtc) { |
c52f4fa6 | 605 | NV_INFO(drm, "resuming display...\n"); |
9430738d BS |
606 | nouveau_display_resume(dev); |
607 | } | |
94580299 BS |
608 | return ret; |
609 | } | |
610 | ||
2d8b9ccb | 611 | int nouveau_pmops_suspend(struct device *dev) |
94580299 | 612 | { |
2d8b9ccb DA |
613 | struct pci_dev *pdev = to_pci_dev(dev); |
614 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
94580299 BS |
615 | int ret; |
616 | ||
5addcf0a DA |
617 | if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || |
618 | drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) | |
94580299 BS |
619 | return 0; |
620 | ||
5addcf0a DA |
621 | if (drm_dev->mode_config.num_crtc) |
622 | nouveau_fbcon_set_suspend(drm_dev, 1); | |
623 | ||
05c63c2f | 624 | ret = nouveau_do_suspend(drm_dev, false); |
94580299 BS |
625 | if (ret) |
626 | return ret; | |
2d8b9ccb DA |
627 | |
628 | pci_save_state(pdev); | |
629 | pci_disable_device(pdev); | |
630 | pci_set_power_state(pdev, PCI_D3hot); | |
2d8b9ccb DA |
631 | return 0; |
632 | } | |
633 | ||
cd897837 | 634 | static int |
2d8b9ccb DA |
635 | nouveau_do_resume(struct drm_device *dev) |
636 | { | |
637 | struct nouveau_drm *drm = nouveau_drm(dev); | |
638 | struct nouveau_cli *cli; | |
639 | ||
c52f4fa6 | 640 | NV_INFO(drm, "re-enabling device...\n"); |
94580299 | 641 | |
cb75d97e BS |
642 | nouveau_agp_reset(drm); |
643 | ||
c52f4fa6 | 644 | NV_INFO(drm, "resuming kernel object tree...\n"); |
0ad72863 | 645 | nvif_client_resume(&drm->client.base); |
ebb945a9 | 646 | nouveau_agp_init(drm); |
94580299 | 647 | |
c52f4fa6 | 648 | NV_INFO(drm, "resuming client object trees...\n"); |
81dff21b BS |
649 | if (drm->fence && nouveau_fence(drm)->resume) |
650 | nouveau_fence(drm)->resume(drm); | |
651 | ||
94580299 | 652 | list_for_each_entry(cli, &drm->clients, head) { |
0ad72863 | 653 | nvif_client_resume(&cli->base); |
94580299 | 654 | } |
cb75d97e | 655 | |
77145f1c | 656 | nouveau_run_vbios_init(dev); |
77145f1c | 657 | |
9430738d | 658 | if (dev->mode_config.num_crtc) { |
c52f4fa6 | 659 | NV_INFO(drm, "resuming display...\n"); |
5addcf0a | 660 | nouveau_display_repin(dev); |
9430738d | 661 | } |
5addcf0a | 662 | |
77145f1c | 663 | return 0; |
94580299 BS |
664 | } |
665 | ||
2d8b9ccb DA |
666 | int nouveau_pmops_resume(struct device *dev) |
667 | { | |
668 | struct pci_dev *pdev = to_pci_dev(dev); | |
669 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
670 | int ret; | |
671 | ||
5addcf0a DA |
672 | if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || |
673 | drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) | |
2d8b9ccb DA |
674 | return 0; |
675 | ||
676 | pci_set_power_state(pdev, PCI_D0); | |
677 | pci_restore_state(pdev); | |
678 | ret = pci_enable_device(pdev); | |
679 | if (ret) | |
680 | return ret; | |
681 | pci_set_master(pdev); | |
682 | ||
5addcf0a | 683 | ret = nouveau_do_resume(drm_dev); |
c52f4fa6 | 684 | if (ret) |
5addcf0a | 685 | return ret; |
5addcf0a | 686 | |
028791bb | 687 | if (drm_dev->mode_config.num_crtc) { |
01172772 | 688 | nouveau_display_resume(drm_dev); |
028791bb BS |
689 | nouveau_fbcon_set_suspend(drm_dev, 0); |
690 | } | |
691 | ||
5addcf0a | 692 | return 0; |
2d8b9ccb DA |
693 | } |
694 | ||
695 | static int nouveau_pmops_freeze(struct device *dev) | |
696 | { | |
697 | struct pci_dev *pdev = to_pci_dev(dev); | |
698 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
5addcf0a DA |
699 | int ret; |
700 | ||
5addcf0a DA |
701 | if (drm_dev->mode_config.num_crtc) |
702 | nouveau_fbcon_set_suspend(drm_dev, 1); | |
2d8b9ccb | 703 | |
05c63c2f | 704 | ret = nouveau_do_suspend(drm_dev, false); |
5addcf0a | 705 | return ret; |
2d8b9ccb DA |
706 | } |
707 | ||
708 | static int nouveau_pmops_thaw(struct device *dev) | |
709 | { | |
710 | struct pci_dev *pdev = to_pci_dev(dev); | |
711 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
5addcf0a | 712 | int ret; |
2d8b9ccb | 713 | |
5addcf0a | 714 | ret = nouveau_do_resume(drm_dev); |
c52f4fa6 | 715 | if (ret) |
5addcf0a | 716 | return ret; |
028791bb BS |
717 | |
718 | if (drm_dev->mode_config.num_crtc) { | |
01172772 | 719 | nouveau_display_resume(drm_dev); |
028791bb BS |
720 | nouveau_fbcon_set_suspend(drm_dev, 0); |
721 | } | |
722 | ||
5addcf0a | 723 | return 0; |
2d8b9ccb DA |
724 | } |
725 | ||
726 | ||
5b8a43ae | 727 | static int |
ebb945a9 BS |
728 | nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv) |
729 | { | |
ebb945a9 BS |
730 | struct nouveau_drm *drm = nouveau_drm(dev); |
731 | struct nouveau_cli *cli; | |
a2896ced | 732 | char name[32], tmpname[TASK_COMM_LEN]; |
ebb945a9 BS |
733 | int ret; |
734 | ||
5addcf0a DA |
735 | /* need to bring up power immediately if opening device */ |
736 | ret = pm_runtime_get_sync(dev->dev); | |
b6c4285a | 737 | if (ret < 0 && ret != -EACCES) |
5addcf0a DA |
738 | return ret; |
739 | ||
a2896ced MS |
740 | get_task_comm(tmpname, current); |
741 | snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid)); | |
fa6df8c1 | 742 | |
420b9469 AC |
743 | ret = nouveau_cli_create(nouveau_name(dev), name, sizeof(*cli), |
744 | (void **)&cli); | |
745 | ||
ebb945a9 | 746 | if (ret) |
5addcf0a | 747 | goto out_suspend; |
ebb945a9 | 748 | |
0ad72863 BS |
749 | cli->base.super = false; |
750 | ||
967e7bde BS |
751 | if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) { |
752 | ret = nouveau_vm_new(nvkm_device(&drm->device), 0, (1ULL << 40), | |
3ee6f5b5 | 753 | 0x1000, &cli->vm); |
ebb945a9 BS |
754 | if (ret) { |
755 | nouveau_cli_destroy(cli); | |
5addcf0a | 756 | goto out_suspend; |
ebb945a9 | 757 | } |
3ee6f5b5 | 758 | |
0ad72863 | 759 | nvkm_client(&cli->base)->vm = cli->vm; |
ebb945a9 BS |
760 | } |
761 | ||
762 | fpriv->driver_priv = cli; | |
763 | ||
764 | mutex_lock(&drm->client.mutex); | |
765 | list_add(&cli->head, &drm->clients); | |
766 | mutex_unlock(&drm->client.mutex); | |
5addcf0a DA |
767 | |
768 | out_suspend: | |
769 | pm_runtime_mark_last_busy(dev->dev); | |
770 | pm_runtime_put_autosuspend(dev->dev); | |
771 | ||
772 | return ret; | |
ebb945a9 BS |
773 | } |
774 | ||
5b8a43ae | 775 | static void |
ebb945a9 BS |
776 | nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv) |
777 | { | |
778 | struct nouveau_cli *cli = nouveau_cli(fpriv); | |
779 | struct nouveau_drm *drm = nouveau_drm(dev); | |
780 | ||
5addcf0a DA |
781 | pm_runtime_get_sync(dev->dev); |
782 | ||
ebb945a9 BS |
783 | if (cli->abi16) |
784 | nouveau_abi16_fini(cli->abi16); | |
785 | ||
786 | mutex_lock(&drm->client.mutex); | |
787 | list_del(&cli->head); | |
788 | mutex_unlock(&drm->client.mutex); | |
5addcf0a | 789 | |
ebb945a9 BS |
790 | } |
791 | ||
5b8a43ae | 792 | static void |
ebb945a9 BS |
793 | nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv) |
794 | { | |
795 | struct nouveau_cli *cli = nouveau_cli(fpriv); | |
796 | nouveau_cli_destroy(cli); | |
5addcf0a DA |
797 | pm_runtime_mark_last_busy(dev->dev); |
798 | pm_runtime_put_autosuspend(dev->dev); | |
ebb945a9 BS |
799 | } |
800 | ||
baa70943 | 801 | static const struct drm_ioctl_desc |
77145f1c | 802 | nouveau_ioctls[] = { |
7d761258 | 803 | DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), |
77145f1c | 804 | DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
7d761258 MP |
805 | DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), |
806 | DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
807 | DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
808 | DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
809 | DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
810 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
811 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
812 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
813 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
814 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
77145f1c BS |
815 | }; |
816 | ||
27111a23 BS |
817 | long |
818 | nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |
5addcf0a | 819 | { |
27111a23 BS |
820 | struct drm_file *filp = file->private_data; |
821 | struct drm_device *dev = filp->minor->dev; | |
5addcf0a | 822 | long ret; |
5addcf0a DA |
823 | |
824 | ret = pm_runtime_get_sync(dev->dev); | |
b6c4285a | 825 | if (ret < 0 && ret != -EACCES) |
5addcf0a DA |
826 | return ret; |
827 | ||
27111a23 BS |
828 | switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) { |
829 | case DRM_NOUVEAU_NVIF: | |
830 | ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd)); | |
831 | break; | |
832 | default: | |
833 | ret = drm_ioctl(file, cmd, arg); | |
834 | break; | |
835 | } | |
5addcf0a DA |
836 | |
837 | pm_runtime_mark_last_busy(dev->dev); | |
838 | pm_runtime_put_autosuspend(dev->dev); | |
839 | return ret; | |
840 | } | |
27111a23 | 841 | |
77145f1c BS |
842 | static const struct file_operations |
843 | nouveau_driver_fops = { | |
844 | .owner = THIS_MODULE, | |
845 | .open = drm_open, | |
846 | .release = drm_release, | |
5addcf0a | 847 | .unlocked_ioctl = nouveau_drm_ioctl, |
77145f1c BS |
848 | .mmap = nouveau_ttm_mmap, |
849 | .poll = drm_poll, | |
77145f1c BS |
850 | .read = drm_read, |
851 | #if defined(CONFIG_COMPAT) | |
852 | .compat_ioctl = nouveau_compat_ioctl, | |
853 | #endif | |
854 | .llseek = noop_llseek, | |
855 | }; | |
856 | ||
857 | static struct drm_driver | |
858 | driver = { | |
859 | .driver_features = | |
4cb4ea39 | 860 | DRIVER_USE_AGP | |
7d761258 | 861 | DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER, |
77145f1c BS |
862 | |
863 | .load = nouveau_drm_load, | |
864 | .unload = nouveau_drm_unload, | |
865 | .open = nouveau_drm_open, | |
866 | .preclose = nouveau_drm_preclose, | |
867 | .postclose = nouveau_drm_postclose, | |
868 | .lastclose = nouveau_vga_lastclose, | |
869 | ||
33b903e8 MS |
870 | #if defined(CONFIG_DEBUG_FS) |
871 | .debugfs_init = nouveau_debugfs_init, | |
872 | .debugfs_cleanup = nouveau_debugfs_takedown, | |
873 | #endif | |
874 | ||
77145f1c | 875 | .get_vblank_counter = drm_vblank_count, |
51cb4b39 BS |
876 | .enable_vblank = nouveau_display_vblank_enable, |
877 | .disable_vblank = nouveau_display_vblank_disable, | |
d83ef853 BS |
878 | .get_scanout_position = nouveau_display_scanoutpos, |
879 | .get_vblank_timestamp = nouveau_display_vblstamp, | |
77145f1c BS |
880 | |
881 | .ioctls = nouveau_ioctls, | |
baa70943 | 882 | .num_ioctls = ARRAY_SIZE(nouveau_ioctls), |
77145f1c BS |
883 | .fops = &nouveau_driver_fops, |
884 | ||
885 | .prime_handle_to_fd = drm_gem_prime_handle_to_fd, | |
886 | .prime_fd_to_handle = drm_gem_prime_fd_to_handle, | |
ab9ccb96 AP |
887 | .gem_prime_export = drm_gem_prime_export, |
888 | .gem_prime_import = drm_gem_prime_import, | |
889 | .gem_prime_pin = nouveau_gem_prime_pin, | |
3aac4502 | 890 | .gem_prime_res_obj = nouveau_gem_prime_res_obj, |
1af7c7dd | 891 | .gem_prime_unpin = nouveau_gem_prime_unpin, |
ab9ccb96 AP |
892 | .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table, |
893 | .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table, | |
894 | .gem_prime_vmap = nouveau_gem_prime_vmap, | |
895 | .gem_prime_vunmap = nouveau_gem_prime_vunmap, | |
77145f1c | 896 | |
77145f1c BS |
897 | .gem_free_object = nouveau_gem_object_del, |
898 | .gem_open_object = nouveau_gem_object_open, | |
899 | .gem_close_object = nouveau_gem_object_close, | |
900 | ||
901 | .dumb_create = nouveau_display_dumb_create, | |
902 | .dumb_map_offset = nouveau_display_dumb_map_offset, | |
43387b37 | 903 | .dumb_destroy = drm_gem_dumb_destroy, |
77145f1c BS |
904 | |
905 | .name = DRIVER_NAME, | |
906 | .desc = DRIVER_DESC, | |
907 | #ifdef GIT_REVISION | |
908 | .date = GIT_REVISION, | |
909 | #else | |
910 | .date = DRIVER_DATE, | |
911 | #endif | |
912 | .major = DRIVER_MAJOR, | |
913 | .minor = DRIVER_MINOR, | |
914 | .patchlevel = DRIVER_PATCHLEVEL, | |
915 | }; | |
916 | ||
94580299 BS |
917 | static struct pci_device_id |
918 | nouveau_drm_pci_table[] = { | |
919 | { | |
920 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID), | |
921 | .class = PCI_BASE_CLASS_DISPLAY << 16, | |
922 | .class_mask = 0xff << 16, | |
923 | }, | |
924 | { | |
925 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID), | |
926 | .class = PCI_BASE_CLASS_DISPLAY << 16, | |
927 | .class_mask = 0xff << 16, | |
928 | }, | |
929 | {} | |
930 | }; | |
931 | ||
5addcf0a DA |
932 | static int nouveau_pmops_runtime_suspend(struct device *dev) |
933 | { | |
934 | struct pci_dev *pdev = to_pci_dev(dev); | |
935 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
936 | int ret; | |
937 | ||
adbbdbac DA |
938 | if (nouveau_runtime_pm == 0) { |
939 | pm_runtime_forbid(dev); | |
940 | return -EBUSY; | |
941 | } | |
5addcf0a | 942 | |
b25b4427 IM |
943 | /* are we optimus enabled? */ |
944 | if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) { | |
945 | DRM_DEBUG_DRIVER("failing to power off - not optimus\n"); | |
adbbdbac DA |
946 | pm_runtime_forbid(dev); |
947 | return -EBUSY; | |
b25b4427 IM |
948 | } |
949 | ||
c52f4fa6 | 950 | nv_debug_level(SILENT); |
5addcf0a DA |
951 | drm_kms_helper_poll_disable(drm_dev); |
952 | vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF); | |
953 | nouveau_switcheroo_optimus_dsm(); | |
05c63c2f | 954 | ret = nouveau_do_suspend(drm_dev, true); |
5addcf0a DA |
955 | pci_save_state(pdev); |
956 | pci_disable_device(pdev); | |
957 | pci_set_power_state(pdev, PCI_D3cold); | |
958 | drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; | |
959 | return ret; | |
960 | } | |
961 | ||
962 | static int nouveau_pmops_runtime_resume(struct device *dev) | |
963 | { | |
964 | struct pci_dev *pdev = to_pci_dev(dev); | |
965 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
967e7bde | 966 | struct nvif_device *device = &nouveau_drm(drm_dev)->device; |
5addcf0a DA |
967 | int ret; |
968 | ||
969 | if (nouveau_runtime_pm == 0) | |
970 | return -EINVAL; | |
971 | ||
972 | pci_set_power_state(pdev, PCI_D0); | |
973 | pci_restore_state(pdev); | |
974 | ret = pci_enable_device(pdev); | |
975 | if (ret) | |
976 | return ret; | |
977 | pci_set_master(pdev); | |
978 | ||
979 | ret = nouveau_do_resume(drm_dev); | |
5addcf0a DA |
980 | drm_kms_helper_poll_enable(drm_dev); |
981 | /* do magic */ | |
db2bec18 | 982 | nvif_mask(device, 0x88488, (1 << 25), (1 << 25)); |
5addcf0a DA |
983 | vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON); |
984 | drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; | |
c52f4fa6 | 985 | nv_debug_level(NORMAL); |
5addcf0a DA |
986 | return ret; |
987 | } | |
988 | ||
989 | static int nouveau_pmops_runtime_idle(struct device *dev) | |
990 | { | |
991 | struct pci_dev *pdev = to_pci_dev(dev); | |
992 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
993 | struct nouveau_drm *drm = nouveau_drm(drm_dev); | |
994 | struct drm_crtc *crtc; | |
995 | ||
adbbdbac DA |
996 | if (nouveau_runtime_pm == 0) { |
997 | pm_runtime_forbid(dev); | |
5addcf0a | 998 | return -EBUSY; |
adbbdbac | 999 | } |
5addcf0a DA |
1000 | |
1001 | /* are we optimus enabled? */ | |
1002 | if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) { | |
1003 | DRM_DEBUG_DRIVER("failing to power off - not optimus\n"); | |
adbbdbac | 1004 | pm_runtime_forbid(dev); |
5addcf0a DA |
1005 | return -EBUSY; |
1006 | } | |
1007 | ||
1008 | /* if we have a hdmi audio device - make sure it has a driver loaded */ | |
1009 | if (drm->hdmi_device) { | |
1010 | if (!drm->hdmi_device->driver) { | |
1011 | DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n"); | |
1012 | pm_runtime_mark_last_busy(dev); | |
1013 | return -EBUSY; | |
1014 | } | |
1015 | } | |
1016 | ||
1017 | list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) { | |
1018 | if (crtc->enabled) { | |
1019 | DRM_DEBUG_DRIVER("failing to power off - crtc active\n"); | |
1020 | return -EBUSY; | |
1021 | } | |
1022 | } | |
1023 | pm_runtime_mark_last_busy(dev); | |
1024 | pm_runtime_autosuspend(dev); | |
1025 | /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ | |
1026 | return 1; | |
1027 | } | |
1028 | ||
2d8b9ccb DA |
1029 | static const struct dev_pm_ops nouveau_pm_ops = { |
1030 | .suspend = nouveau_pmops_suspend, | |
1031 | .resume = nouveau_pmops_resume, | |
1032 | .freeze = nouveau_pmops_freeze, | |
1033 | .thaw = nouveau_pmops_thaw, | |
1034 | .poweroff = nouveau_pmops_freeze, | |
1035 | .restore = nouveau_pmops_resume, | |
5addcf0a DA |
1036 | .runtime_suspend = nouveau_pmops_runtime_suspend, |
1037 | .runtime_resume = nouveau_pmops_runtime_resume, | |
1038 | .runtime_idle = nouveau_pmops_runtime_idle, | |
2d8b9ccb DA |
1039 | }; |
1040 | ||
94580299 BS |
1041 | static struct pci_driver |
1042 | nouveau_drm_pci_driver = { | |
1043 | .name = "nouveau", | |
1044 | .id_table = nouveau_drm_pci_table, | |
1045 | .probe = nouveau_drm_probe, | |
1046 | .remove = nouveau_drm_remove, | |
2d8b9ccb | 1047 | .driver.pm = &nouveau_pm_ops, |
94580299 BS |
1048 | }; |
1049 | ||
8ba9ff11 AC |
1050 | struct drm_device * |
1051 | nouveau_platform_device_create_(struct platform_device *pdev, int size, | |
1052 | void **pobject) | |
420b9469 | 1053 | { |
8ba9ff11 AC |
1054 | struct drm_device *drm; |
1055 | int err; | |
420b9469 | 1056 | |
8ba9ff11 | 1057 | err = nouveau_device_create_(pdev, NOUVEAU_BUS_PLATFORM, |
420b9469 AC |
1058 | nouveau_platform_name(pdev), |
1059 | dev_name(&pdev->dev), nouveau_config, | |
8ba9ff11 AC |
1060 | nouveau_debug, size, pobject); |
1061 | if (err) | |
1062 | return ERR_PTR(err); | |
1063 | ||
1064 | drm = drm_dev_alloc(&driver, &pdev->dev); | |
1065 | if (!drm) { | |
1066 | err = -ENOMEM; | |
1067 | goto err_free; | |
420b9469 AC |
1068 | } |
1069 | ||
8ba9ff11 AC |
1070 | err = drm_dev_set_unique(drm, "%s", dev_name(&pdev->dev)); |
1071 | if (err < 0) | |
1072 | goto err_free; | |
1073 | ||
1074 | drm->platformdev = pdev; | |
1075 | platform_set_drvdata(pdev, drm); | |
1076 | ||
1077 | return drm; | |
1078 | ||
1079 | err_free: | |
1080 | nouveau_object_ref(NULL, (struct nouveau_object **)pobject); | |
1081 | ||
1082 | return ERR_PTR(err); | |
420b9469 | 1083 | } |
8ba9ff11 | 1084 | EXPORT_SYMBOL(nouveau_platform_device_create_); |
420b9469 | 1085 | |
94580299 BS |
1086 | static int __init |
1087 | nouveau_drm_init(void) | |
1088 | { | |
77145f1c BS |
1089 | if (nouveau_modeset == -1) { |
1090 | #ifdef CONFIG_VGA_CONSOLE | |
1091 | if (vgacon_text_force()) | |
1092 | nouveau_modeset = 0; | |
77145f1c | 1093 | #endif |
77145f1c BS |
1094 | } |
1095 | ||
1096 | if (!nouveau_modeset) | |
1097 | return 0; | |
1098 | ||
1099 | nouveau_register_dsm_handler(); | |
1100 | return drm_pci_init(&driver, &nouveau_drm_pci_driver); | |
94580299 BS |
1101 | } |
1102 | ||
1103 | static void __exit | |
1104 | nouveau_drm_exit(void) | |
1105 | { | |
77145f1c BS |
1106 | if (!nouveau_modeset) |
1107 | return; | |
1108 | ||
1109 | drm_pci_exit(&driver, &nouveau_drm_pci_driver); | |
1110 | nouveau_unregister_dsm_handler(); | |
94580299 BS |
1111 | } |
1112 | ||
1113 | module_init(nouveau_drm_init); | |
1114 | module_exit(nouveau_drm_exit); | |
1115 | ||
1116 | MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table); | |
77145f1c BS |
1117 | MODULE_AUTHOR(DRIVER_AUTHOR); |
1118 | MODULE_DESCRIPTION(DRIVER_DESC); | |
94580299 | 1119 | MODULE_LICENSE("GPL and additional rights"); |