]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blame - drivers/gpu/drm/nouveau/nouveau_drm.c
Merge tag 'mediatek-drm-2016-06-20' of git://git.pengutronix.de/git/pza/linux into...
[mirror_ubuntu-bionic-kernel.git] / drivers / gpu / drm / nouveau / nouveau_drm.c
CommitLineData
94580299
BS
1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
77145f1c 25#include <linux/console.h>
c5fd936e 26#include <linux/delay.h>
94580299
BS
27#include <linux/module.h>
28#include <linux/pci.h>
5addcf0a
DA
29#include <linux/pm_runtime.h>
30#include <linux/vga_switcheroo.h>
fdb751ef 31
5addcf0a
DA
32#include "drmP.h"
33#include "drm_crtc_helper.h"
fdb751ef 34
ebb945a9 35#include <core/gpuobj.h>
c33e05a1 36#include <core/option.h>
7974dd1b
BS
37#include <core/pci.h>
38#include <core/tegra.h>
94580299 39
923bc416 40#include <nvif/class.h>
845f2725 41#include <nvif/cl0002.h>
8ed1730c 42#include <nvif/cla06f.h>
538b269b
BS
43#include <nvif/if0004.h>
44
4dc28134 45#include "nouveau_drv.h"
ebb945a9 46#include "nouveau_dma.h"
77145f1c
BS
47#include "nouveau_ttm.h"
48#include "nouveau_gem.h"
77145f1c 49#include "nouveau_vga.h"
b9ed919f 50#include "nouveau_hwmon.h"
77145f1c
BS
51#include "nouveau_acpi.h"
52#include "nouveau_bios.h"
53#include "nouveau_ioctl.h"
ebb945a9
BS
54#include "nouveau_abi16.h"
55#include "nouveau_fbcon.h"
56#include "nouveau_fence.h"
33b903e8 57#include "nouveau_debugfs.h"
27111a23 58#include "nouveau_usif.h"
703fa264 59#include "nouveau_connector.h"
055a65d5 60#include "nouveau_platform.h"
ebb945a9 61
94580299
BS
62MODULE_PARM_DESC(config, "option string to pass to driver core");
63static char *nouveau_config;
64module_param_named(config, nouveau_config, charp, 0400);
65
66MODULE_PARM_DESC(debug, "debug string to pass to driver core");
67static char *nouveau_debug;
68module_param_named(debug, nouveau_debug, charp, 0400);
69
ebb945a9
BS
70MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
71static int nouveau_noaccel = 0;
72module_param_named(noaccel, nouveau_noaccel, int, 0400);
73
9430738d
BS
74MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
75 "0 = disabled, 1 = enabled, 2 = headless)");
76int nouveau_modeset = -1;
77145f1c
BS
77module_param_named(modeset, nouveau_modeset, int, 0400);
78
5addcf0a
DA
79MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
80int nouveau_runtime_pm = -1;
81module_param_named(runpm, nouveau_runtime_pm, int, 0400);
82
915b4d11
DH
83static struct drm_driver driver_stub;
84static struct drm_driver driver_pci;
85static struct drm_driver driver_platform;
77145f1c 86
94580299 87static u64
420b9469 88nouveau_pci_name(struct pci_dev *pdev)
94580299
BS
89{
90 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
91 name |= pdev->bus->number << 16;
92 name |= PCI_SLOT(pdev->devfn) << 8;
93 return name | PCI_FUNC(pdev->devfn);
94}
95
420b9469
AC
96static u64
97nouveau_platform_name(struct platform_device *platformdev)
98{
99 return platformdev->id;
100}
101
102static u64
103nouveau_name(struct drm_device *dev)
104{
105 if (dev->pdev)
106 return nouveau_pci_name(dev->pdev);
107 else
108 return nouveau_platform_name(dev->platformdev);
109}
110
94580299 111static int
9ad97ede 112nouveau_cli_create(struct drm_device *dev, const char *sname,
fa6df8c1 113 int size, void **pcli)
94580299 114{
0ad72863 115 struct nouveau_cli *cli = *pcli = kzalloc(size, GFP_KERNEL);
9ad97ede 116 int ret;
0ad72863 117 if (cli) {
9ad97ede
BS
118 snprintf(cli->name, sizeof(cli->name), "%s", sname);
119 cli->dev = dev;
120
a01ca78c 121 ret = nvif_client_init(NULL, cli->name, nouveau_name(dev),
9ad97ede
BS
122 nouveau_config, nouveau_debug,
123 &cli->base);
27111a23 124 if (ret == 0) {
0ad72863 125 mutex_init(&cli->mutex);
27111a23
BS
126 usif_client_init(cli);
127 }
94580299 128 return ret;
dd5700ea 129 }
0ad72863 130 return -ENOMEM;
94580299
BS
131}
132
133static void
134nouveau_cli_destroy(struct nouveau_cli *cli)
135{
be83cd4e 136 nvkm_vm_ref(NULL, &nvxx_client(&cli->base)->vm, NULL);
0ad72863 137 nvif_client_fini(&cli->base);
27111a23 138 usif_client_fini(cli);
f5654d95 139 kfree(cli);
94580299
BS
140}
141
ebb945a9
BS
142static void
143nouveau_accel_fini(struct nouveau_drm *drm)
144{
fbd58ebd 145 nouveau_channel_idle(drm->channel);
0ad72863 146 nvif_object_fini(&drm->ntfy);
f027f491 147 nvkm_gpuobj_del(&drm->notify);
fbd58ebd 148 nvif_notify_fini(&drm->flip);
0ad72863 149 nvif_object_fini(&drm->nvsw);
fbd58ebd
BS
150 nouveau_channel_del(&drm->channel);
151
152 nouveau_channel_idle(drm->cechan);
0ad72863 153 nvif_object_fini(&drm->ttm.copy);
fbd58ebd
BS
154 nouveau_channel_del(&drm->cechan);
155
ebb945a9
BS
156 if (drm->fence)
157 nouveau_fence(drm)->dtor(drm);
158}
159
160static void
161nouveau_accel_init(struct nouveau_drm *drm)
162{
967e7bde 163 struct nvif_device *device = &drm->device;
41a63406 164 struct nvif_sclass *sclass;
49981046 165 u32 arg0, arg1;
41a63406 166 int ret, i, n;
ebb945a9 167
967e7bde 168 if (nouveau_noaccel)
ebb945a9
BS
169 return;
170
171 /* initialise synchronisation routines */
967e7bde
BS
172 /*XXX: this is crap, but the fence/channel stuff is a little
173 * backwards in some places. this will be fixed.
174 */
41a63406 175 ret = n = nvif_object_sclass_get(&device->object, &sclass);
967e7bde
BS
176 if (ret < 0)
177 return;
178
41a63406
BS
179 for (ret = -ENOSYS, i = 0; i < n; i++) {
180 switch (sclass[i].oclass) {
bbf8906b 181 case NV03_CHANNEL_DMA:
967e7bde
BS
182 ret = nv04_fence_create(drm);
183 break;
bbf8906b 184 case NV10_CHANNEL_DMA:
967e7bde
BS
185 ret = nv10_fence_create(drm);
186 break;
bbf8906b
BS
187 case NV17_CHANNEL_DMA:
188 case NV40_CHANNEL_DMA:
967e7bde
BS
189 ret = nv17_fence_create(drm);
190 break;
bbf8906b 191 case NV50_CHANNEL_GPFIFO:
967e7bde
BS
192 ret = nv50_fence_create(drm);
193 break;
bbf8906b 194 case G82_CHANNEL_GPFIFO:
967e7bde
BS
195 ret = nv84_fence_create(drm);
196 break;
bbf8906b
BS
197 case FERMI_CHANNEL_GPFIFO:
198 case KEPLER_CHANNEL_GPFIFO_A:
63f8c9b7 199 case KEPLER_CHANNEL_GPFIFO_B:
a1020afe 200 case MAXWELL_CHANNEL_GPFIFO_A:
967e7bde
BS
201 ret = nvc0_fence_create(drm);
202 break;
203 default:
204 break;
205 }
206 }
207
41a63406 208 nvif_object_sclass_put(&sclass);
ebb945a9
BS
209 if (ret) {
210 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
211 nouveau_accel_fini(drm);
212 return;
213 }
214
967e7bde 215 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
fcf3f91c 216 ret = nouveau_channel_new(drm, &drm->device,
1f5ff7f5
BS
217 NVA06F_V0_ENGINE_CE0 |
218 NVA06F_V0_ENGINE_CE1,
bbf8906b 219 0, &drm->cechan);
49981046
BS
220 if (ret)
221 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
222
1f5ff7f5 223 arg0 = NVA06F_V0_ENGINE_GR;
49469800 224 arg1 = 1;
00fc6f6f 225 } else
967e7bde
BS
226 if (device->info.chipset >= 0xa3 &&
227 device->info.chipset != 0xaa &&
228 device->info.chipset != 0xac) {
fcf3f91c 229 ret = nouveau_channel_new(drm, &drm->device,
0ad72863 230 NvDmaFB, NvDmaTT, &drm->cechan);
00fc6f6f
BS
231 if (ret)
232 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
233
234 arg0 = NvDmaFB;
235 arg1 = NvDmaTT;
49981046
BS
236 } else {
237 arg0 = NvDmaFB;
238 arg1 = NvDmaTT;
239 }
240
fcf3f91c 241 ret = nouveau_channel_new(drm, &drm->device, arg0, arg1, &drm->channel);
ebb945a9
BS
242 if (ret) {
243 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
244 nouveau_accel_fini(drm);
245 return;
246 }
247
a01ca78c 248 ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW,
0ad72863 249 nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw);
69a6146d 250 if (ret == 0) {
69a6146d
BS
251 ret = RING_SPACE(drm->channel, 2);
252 if (ret == 0) {
967e7bde 253 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
69a6146d
BS
254 BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
255 OUT_RING (drm->channel, NVDRM_NVSW);
256 } else
967e7bde 257 if (device->info.family < NV_DEVICE_INFO_V0_KEPLER) {
69a6146d
BS
258 BEGIN_NVC0(drm->channel, FermiSw, 0, 1);
259 OUT_RING (drm->channel, 0x001f0000);
260 }
261 }
898a2b32
BS
262
263 ret = nvif_notify_init(&drm->nvsw, nouveau_flip_complete,
538b269b
BS
264 false, NV04_NVSW_NTFY_UEVENT,
265 NULL, 0, 0, &drm->flip);
898a2b32
BS
266 if (ret == 0)
267 ret = nvif_notify_get(&drm->flip);
268 if (ret) {
269 nouveau_accel_fini(drm);
270 return;
271 }
69a6146d
BS
272 }
273
274 if (ret) {
275 NV_ERROR(drm, "failed to allocate software object, %d\n", ret);
276 nouveau_accel_fini(drm);
277 return;
278 }
279
967e7bde 280 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
f027f491
BS
281 ret = nvkm_gpuobj_new(nvxx_device(&drm->device), 32, 0, false,
282 NULL, &drm->notify);
ebb945a9
BS
283 if (ret) {
284 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
285 nouveau_accel_fini(drm);
286 return;
287 }
288
a01ca78c 289 ret = nvif_object_init(&drm->channel->user, NvNotify0,
4acfd707
BS
290 NV_DMA_IN_MEMORY,
291 &(struct nv_dma_v0) {
292 .target = NV_DMA_V0_TARGET_VRAM,
293 .access = NV_DMA_V0_ACCESS_RDWR,
ebb945a9
BS
294 .start = drm->notify->addr,
295 .limit = drm->notify->addr + 31
4acfd707 296 }, sizeof(struct nv_dma_v0),
0ad72863 297 &drm->ntfy);
ebb945a9
BS
298 if (ret) {
299 nouveau_accel_fini(drm);
300 return;
301 }
302 }
303
304
49981046 305 nouveau_bo_move_init(drm);
ebb945a9
BS
306}
307
56550d94
GKH
308static int nouveau_drm_probe(struct pci_dev *pdev,
309 const struct pci_device_id *pent)
94580299 310{
be83cd4e 311 struct nvkm_device *device;
ebb945a9
BS
312 struct apertures_struct *aper;
313 bool boot = false;
94580299
BS
314 int ret;
315
b00e5334 316 if (vga_switcheroo_client_probe_defer(pdev))
98b3a340
LW
317 return -EPROBE_DEFER;
318
ebb945a9
BS
319 /* remove conflicting drivers (vesafb, efifb etc) */
320 aper = alloc_apertures(3);
321 if (!aper)
322 return -ENOMEM;
323
324 aper->ranges[0].base = pci_resource_start(pdev, 1);
325 aper->ranges[0].size = pci_resource_len(pdev, 1);
326 aper->count = 1;
327
328 if (pci_resource_len(pdev, 2)) {
329 aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
330 aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
331 aper->count++;
332 }
333
334 if (pci_resource_len(pdev, 3)) {
335 aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
336 aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
337 aper->count++;
338 }
339
340#ifdef CONFIG_X86
341 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
342#endif
771fa0e4
BS
343 if (nouveau_modeset != 2)
344 remove_conflicting_framebuffers(aper, "nouveaufb", boot);
83ef7777 345 kfree(aper);
ebb945a9 346
7974dd1b
BS
347 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
348 true, true, ~0ULL, &device);
94580299
BS
349 if (ret)
350 return ret;
351
352 pci_set_master(pdev);
353
915b4d11 354 ret = drm_get_pci_dev(pdev, pent, &driver_pci);
94580299 355 if (ret) {
e781dc8f 356 nvkm_device_del(&device);
94580299
BS
357 return ret;
358 }
359
360 return 0;
361}
362
5addcf0a
DA
363#define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
364
365static void
46941b0f 366nouveau_get_hdmi_dev(struct nouveau_drm *drm)
5addcf0a 367{
46941b0f 368 struct pci_dev *pdev = drm->dev->pdev;
5addcf0a 369
420b9469 370 if (!pdev) {
f2a0adad 371 NV_DEBUG(drm, "not a PCI device; no HDMI\n");
420b9469
AC
372 drm->hdmi_device = NULL;
373 return;
374 }
375
5addcf0a
DA
376 /* subfunction one is a hdmi audio device? */
377 drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number,
378 PCI_DEVFN(PCI_SLOT(pdev->devfn), 1));
379
380 if (!drm->hdmi_device) {
46941b0f 381 NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1);
5addcf0a
DA
382 return;
383 }
384
385 if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) {
46941b0f 386 NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class);
5addcf0a
DA
387 pci_dev_put(drm->hdmi_device);
388 drm->hdmi_device = NULL;
389 return;
390 }
391}
392
5b8a43ae 393static int
94580299
BS
394nouveau_drm_load(struct drm_device *dev, unsigned long flags)
395{
94580299
BS
396 struct nouveau_drm *drm;
397 int ret;
398
9ad97ede 399 ret = nouveau_cli_create(dev, "DRM", sizeof(*drm), (void **)&drm);
94580299
BS
400 if (ret)
401 return ret;
402
77145f1c
BS
403 dev->dev_private = drm;
404 drm->dev = dev;
989aa5b7 405 nvxx_client(&drm->client.base)->debug =
be83cd4e 406 nvkm_dbgopt(nouveau_debug, "DRM");
77145f1c 407
94580299 408 INIT_LIST_HEAD(&drm->clients);
ebb945a9 409 spin_lock_init(&drm->tile.lock);
94580299 410
46941b0f 411 nouveau_get_hdmi_dev(drm);
5addcf0a 412
fcf3f91c 413 ret = nvif_device_init(&drm->client.base.object, 0, NV_DEVICE,
586491e6 414 &(struct nv_device_v0) {
94580299 415 .device = ~0,
586491e6 416 }, sizeof(struct nv_device_v0),
0ad72863 417 &drm->device);
94580299
BS
418 if (ret)
419 goto fail_device;
420
7d3428cd
IM
421 dev->irq_enabled = true;
422
77145f1c
BS
423 /* workaround an odd issue on nvc1 by disabling the device's
424 * nosnoop capability. hopefully won't cause issues until a
425 * better fix is found - assuming there is one...
426 */
967e7bde 427 if (drm->device.info.chipset == 0xc1)
a01ca78c 428 nvif_mask(&drm->device.object, 0x00088080, 0x00000800, 0x00000000);
ebb945a9 429
77145f1c 430 nouveau_vga_init(drm);
cb75d97e 431
967e7bde 432 if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
be83cd4e 433 ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40),
1de68568 434 0x1000, NULL, &drm->client.vm);
ebb945a9
BS
435 if (ret)
436 goto fail_device;
3ee6f5b5 437
989aa5b7 438 nvxx_client(&drm->client.base)->vm = drm->client.vm;
ebb945a9
BS
439 }
440
441 ret = nouveau_ttm_init(drm);
94580299 442 if (ret)
77145f1c
BS
443 goto fail_ttm;
444
445 ret = nouveau_bios_init(dev);
446 if (ret)
447 goto fail_bios;
448
77145f1c 449 ret = nouveau_display_create(dev);
ebb945a9 450 if (ret)
77145f1c
BS
451 goto fail_dispctor;
452
453 if (dev->mode_config.num_crtc) {
454 ret = nouveau_display_init(dev);
455 if (ret)
456 goto fail_dispinit;
457 }
458
b126a200 459 nouveau_debugfs_init(drm);
b9ed919f 460 nouveau_hwmon_init(dev);
ebb945a9
BS
461 nouveau_accel_init(drm);
462 nouveau_fbcon_init(dev);
5addcf0a
DA
463
464 if (nouveau_runtime_pm != 0) {
465 pm_runtime_use_autosuspend(dev->dev);
466 pm_runtime_set_autosuspend_delay(dev->dev, 5000);
467 pm_runtime_set_active(dev->dev);
468 pm_runtime_allow(dev->dev);
469 pm_runtime_mark_last_busy(dev->dev);
470 pm_runtime_put(dev->dev);
471 }
94580299
BS
472 return 0;
473
77145f1c
BS
474fail_dispinit:
475 nouveau_display_destroy(dev);
476fail_dispctor:
77145f1c
BS
477 nouveau_bios_takedown(dev);
478fail_bios:
ebb945a9 479 nouveau_ttm_fini(drm);
77145f1c 480fail_ttm:
77145f1c 481 nouveau_vga_fini(drm);
94580299 482fail_device:
0ad72863 483 nvif_device_fini(&drm->device);
94580299
BS
484 nouveau_cli_destroy(&drm->client);
485 return ret;
486}
487
5b8a43ae 488static int
94580299
BS
489nouveau_drm_unload(struct drm_device *dev)
490{
77145f1c 491 struct nouveau_drm *drm = nouveau_drm(dev);
94580299 492
5addcf0a 493 pm_runtime_get_sync(dev->dev);
ebb945a9
BS
494 nouveau_fbcon_fini(dev);
495 nouveau_accel_fini(drm);
b9ed919f 496 nouveau_hwmon_fini(dev);
b126a200 497 nouveau_debugfs_fini(drm);
77145f1c 498
9430738d
BS
499 if (dev->mode_config.num_crtc)
500 nouveau_display_fini(dev);
77145f1c
BS
501 nouveau_display_destroy(dev);
502
77145f1c 503 nouveau_bios_takedown(dev);
94580299 504
ebb945a9 505 nouveau_ttm_fini(drm);
77145f1c 506 nouveau_vga_fini(drm);
cb75d97e 507
0ad72863 508 nvif_device_fini(&drm->device);
5addcf0a
DA
509 if (drm->hdmi_device)
510 pci_dev_put(drm->hdmi_device);
94580299
BS
511 nouveau_cli_destroy(&drm->client);
512 return 0;
513}
514
8ba9ff11
AC
515void
516nouveau_drm_device_remove(struct drm_device *dev)
94580299 517{
77145f1c 518 struct nouveau_drm *drm = nouveau_drm(dev);
be83cd4e 519 struct nvkm_client *client;
76ecea5b 520 struct nvkm_device *device;
77145f1c 521
7d3428cd 522 dev->irq_enabled = false;
989aa5b7 523 client = nvxx_client(&drm->client.base);
4e7e62d6 524 device = nvkm_device_find(client->device);
77145f1c
BS
525 drm_put_dev(dev);
526
e781dc8f 527 nvkm_device_del(&device);
94580299 528}
8ba9ff11
AC
529
530static void
531nouveau_drm_remove(struct pci_dev *pdev)
532{
533 struct drm_device *dev = pci_get_drvdata(pdev);
534
535 nouveau_drm_device_remove(dev);
536}
94580299 537
cd897837 538static int
05c63c2f 539nouveau_do_suspend(struct drm_device *dev, bool runtime)
94580299 540{
77145f1c 541 struct nouveau_drm *drm = nouveau_drm(dev);
94580299
BS
542 struct nouveau_cli *cli;
543 int ret;
544
6fbb702e
BS
545 if (dev->mode_config.num_crtc) {
546 NV_INFO(drm, "suspending console...\n");
547 nouveau_fbcon_set_suspend(dev, 1);
c52f4fa6 548 NV_INFO(drm, "suspending display...\n");
6fbb702e 549 ret = nouveau_display_suspend(dev, runtime);
9430738d
BS
550 if (ret)
551 return ret;
552 }
94580299 553
c52f4fa6 554 NV_INFO(drm, "evicting buffers...\n");
ebb945a9
BS
555 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
556
c52f4fa6 557 NV_INFO(drm, "waiting for kernel channels to go idle...\n");
81dff21b
BS
558 if (drm->cechan) {
559 ret = nouveau_channel_idle(drm->cechan);
560 if (ret)
f3980dc5 561 goto fail_display;
81dff21b
BS
562 }
563
564 if (drm->channel) {
565 ret = nouveau_channel_idle(drm->channel);
566 if (ret)
f3980dc5 567 goto fail_display;
81dff21b
BS
568 }
569
c52f4fa6 570 NV_INFO(drm, "suspending client object trees...\n");
ebb945a9 571 if (drm->fence && nouveau_fence(drm)->suspend) {
f3980dc5
IM
572 if (!nouveau_fence(drm)->suspend(drm)) {
573 ret = -ENOMEM;
574 goto fail_display;
575 }
ebb945a9
BS
576 }
577
94580299 578 list_for_each_entry(cli, &drm->clients, head) {
0ad72863 579 ret = nvif_client_suspend(&cli->base);
94580299
BS
580 if (ret)
581 goto fail_client;
582 }
583
c52f4fa6 584 NV_INFO(drm, "suspending kernel object tree...\n");
0ad72863 585 ret = nvif_client_suspend(&drm->client.base);
94580299
BS
586 if (ret)
587 goto fail_client;
588
94580299
BS
589 return 0;
590
591fail_client:
592 list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
0ad72863 593 nvif_client_resume(&cli->base);
94580299
BS
594 }
595
f3980dc5
IM
596 if (drm->fence && nouveau_fence(drm)->resume)
597 nouveau_fence(drm)->resume(drm);
598
599fail_display:
9430738d 600 if (dev->mode_config.num_crtc) {
c52f4fa6 601 NV_INFO(drm, "resuming display...\n");
6fbb702e 602 nouveau_display_resume(dev, runtime);
9430738d 603 }
94580299
BS
604 return ret;
605}
606
cd897837 607static int
6fbb702e 608nouveau_do_resume(struct drm_device *dev, bool runtime)
2d8b9ccb
DA
609{
610 struct nouveau_drm *drm = nouveau_drm(dev);
611 struct nouveau_cli *cli;
612
c52f4fa6 613 NV_INFO(drm, "resuming kernel object tree...\n");
0ad72863 614 nvif_client_resume(&drm->client.base);
94580299 615
c52f4fa6 616 NV_INFO(drm, "resuming client object trees...\n");
81dff21b
BS
617 if (drm->fence && nouveau_fence(drm)->resume)
618 nouveau_fence(drm)->resume(drm);
619
94580299 620 list_for_each_entry(cli, &drm->clients, head) {
0ad72863 621 nvif_client_resume(&cli->base);
94580299 622 }
cb75d97e 623
77145f1c 624 nouveau_run_vbios_init(dev);
77145f1c 625
9430738d 626 if (dev->mode_config.num_crtc) {
c52f4fa6 627 NV_INFO(drm, "resuming display...\n");
6fbb702e
BS
628 nouveau_display_resume(dev, runtime);
629 NV_INFO(drm, "resuming console...\n");
630 nouveau_fbcon_set_suspend(dev, 0);
9430738d 631 }
5addcf0a 632
77145f1c 633 return 0;
94580299
BS
634}
635
7bb6d442
BS
636int
637nouveau_pmops_suspend(struct device *dev)
638{
639 struct pci_dev *pdev = to_pci_dev(dev);
640 struct drm_device *drm_dev = pci_get_drvdata(pdev);
641 int ret;
642
643 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
644 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
645 return 0;
646
647 ret = nouveau_do_suspend(drm_dev, false);
648 if (ret)
649 return ret;
650
651 pci_save_state(pdev);
652 pci_disable_device(pdev);
7bb6d442 653 pci_set_power_state(pdev, PCI_D3hot);
c5fd936e 654 udelay(200);
7bb6d442
BS
655 return 0;
656}
657
658int
659nouveau_pmops_resume(struct device *dev)
2d8b9ccb
DA
660{
661 struct pci_dev *pdev = to_pci_dev(dev);
662 struct drm_device *drm_dev = pci_get_drvdata(pdev);
663 int ret;
664
5addcf0a
DA
665 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
666 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
2d8b9ccb
DA
667 return 0;
668
669 pci_set_power_state(pdev, PCI_D0);
670 pci_restore_state(pdev);
671 ret = pci_enable_device(pdev);
672 if (ret)
673 return ret;
674 pci_set_master(pdev);
675
6fbb702e 676 return nouveau_do_resume(drm_dev, false);
2d8b9ccb
DA
677}
678
7bb6d442
BS
679static int
680nouveau_pmops_freeze(struct device *dev)
2d8b9ccb
DA
681{
682 struct pci_dev *pdev = to_pci_dev(dev);
683 struct drm_device *drm_dev = pci_get_drvdata(pdev);
6fbb702e 684 return nouveau_do_suspend(drm_dev, false);
2d8b9ccb
DA
685}
686
7bb6d442
BS
687static int
688nouveau_pmops_thaw(struct device *dev)
2d8b9ccb
DA
689{
690 struct pci_dev *pdev = to_pci_dev(dev);
691 struct drm_device *drm_dev = pci_get_drvdata(pdev);
6fbb702e 692 return nouveau_do_resume(drm_dev, false);
2d8b9ccb
DA
693}
694
7bb6d442
BS
695static int
696nouveau_pmops_runtime_suspend(struct device *dev)
697{
698 struct pci_dev *pdev = to_pci_dev(dev);
699 struct drm_device *drm_dev = pci_get_drvdata(pdev);
700 int ret;
701
702 if (nouveau_runtime_pm == 0) {
703 pm_runtime_forbid(dev);
704 return -EBUSY;
705 }
706
707 /* are we optimus enabled? */
708 if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
709 DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
710 pm_runtime_forbid(dev);
711 return -EBUSY;
712 }
713
7bb6d442
BS
714 drm_kms_helper_poll_disable(drm_dev);
715 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
716 nouveau_switcheroo_optimus_dsm();
717 ret = nouveau_do_suspend(drm_dev, true);
718 pci_save_state(pdev);
719 pci_disable_device(pdev);
8c863944 720 pci_ignore_hotplug(pdev);
7bb6d442
BS
721 pci_set_power_state(pdev, PCI_D3cold);
722 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
723 return ret;
724}
725
726static int
727nouveau_pmops_runtime_resume(struct device *dev)
728{
729 struct pci_dev *pdev = to_pci_dev(dev);
730 struct drm_device *drm_dev = pci_get_drvdata(pdev);
731 struct nvif_device *device = &nouveau_drm(drm_dev)->device;
732 int ret;
733
734 if (nouveau_runtime_pm == 0)
735 return -EINVAL;
736
737 pci_set_power_state(pdev, PCI_D0);
738 pci_restore_state(pdev);
739 ret = pci_enable_device(pdev);
740 if (ret)
741 return ret;
742 pci_set_master(pdev);
743
744 ret = nouveau_do_resume(drm_dev, true);
745 drm_kms_helper_poll_enable(drm_dev);
746 /* do magic */
a01ca78c 747 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
7bb6d442
BS
748 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
749 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
7bb6d442
BS
750 return ret;
751}
752
753static int
754nouveau_pmops_runtime_idle(struct device *dev)
755{
756 struct pci_dev *pdev = to_pci_dev(dev);
757 struct drm_device *drm_dev = pci_get_drvdata(pdev);
758 struct nouveau_drm *drm = nouveau_drm(drm_dev);
759 struct drm_crtc *crtc;
760
761 if (nouveau_runtime_pm == 0) {
762 pm_runtime_forbid(dev);
763 return -EBUSY;
764 }
765
766 /* are we optimus enabled? */
767 if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
768 DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
769 pm_runtime_forbid(dev);
770 return -EBUSY;
771 }
772
773 /* if we have a hdmi audio device - make sure it has a driver loaded */
774 if (drm->hdmi_device) {
775 if (!drm->hdmi_device->driver) {
776 DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n");
777 pm_runtime_mark_last_busy(dev);
778 return -EBUSY;
779 }
780 }
781
782 list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) {
783 if (crtc->enabled) {
784 DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
785 return -EBUSY;
786 }
787 }
788 pm_runtime_mark_last_busy(dev);
789 pm_runtime_autosuspend(dev);
790 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
791 return 1;
792}
2d8b9ccb 793
5b8a43ae 794static int
ebb945a9
BS
795nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
796{
ebb945a9
BS
797 struct nouveau_drm *drm = nouveau_drm(dev);
798 struct nouveau_cli *cli;
a2896ced 799 char name[32], tmpname[TASK_COMM_LEN];
ebb945a9
BS
800 int ret;
801
5addcf0a
DA
802 /* need to bring up power immediately if opening device */
803 ret = pm_runtime_get_sync(dev->dev);
b6c4285a 804 if (ret < 0 && ret != -EACCES)
5addcf0a
DA
805 return ret;
806
a2896ced
MS
807 get_task_comm(tmpname, current);
808 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
fa6df8c1 809
9ad97ede 810 ret = nouveau_cli_create(dev, name, sizeof(*cli), (void **)&cli);
420b9469 811
ebb945a9 812 if (ret)
5addcf0a 813 goto out_suspend;
ebb945a9 814
0ad72863
BS
815 cli->base.super = false;
816
967e7bde 817 if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
be83cd4e 818 ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40),
1de68568 819 0x1000, NULL, &cli->vm);
ebb945a9
BS
820 if (ret) {
821 nouveau_cli_destroy(cli);
5addcf0a 822 goto out_suspend;
ebb945a9 823 }
3ee6f5b5 824
989aa5b7 825 nvxx_client(&cli->base)->vm = cli->vm;
ebb945a9
BS
826 }
827
828 fpriv->driver_priv = cli;
829
830 mutex_lock(&drm->client.mutex);
831 list_add(&cli->head, &drm->clients);
832 mutex_unlock(&drm->client.mutex);
5addcf0a
DA
833
834out_suspend:
835 pm_runtime_mark_last_busy(dev->dev);
836 pm_runtime_put_autosuspend(dev->dev);
837
838 return ret;
ebb945a9
BS
839}
840
5b8a43ae 841static void
ebb945a9
BS
842nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
843{
844 struct nouveau_cli *cli = nouveau_cli(fpriv);
845 struct nouveau_drm *drm = nouveau_drm(dev);
846
5addcf0a
DA
847 pm_runtime_get_sync(dev->dev);
848
ac8c7930 849 mutex_lock(&cli->mutex);
ebb945a9
BS
850 if (cli->abi16)
851 nouveau_abi16_fini(cli->abi16);
ac8c7930 852 mutex_unlock(&cli->mutex);
ebb945a9
BS
853
854 mutex_lock(&drm->client.mutex);
855 list_del(&cli->head);
856 mutex_unlock(&drm->client.mutex);
5addcf0a 857
ebb945a9
BS
858}
859
5b8a43ae 860static void
ebb945a9
BS
861nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
862{
863 struct nouveau_cli *cli = nouveau_cli(fpriv);
864 nouveau_cli_destroy(cli);
5addcf0a
DA
865 pm_runtime_mark_last_busy(dev->dev);
866 pm_runtime_put_autosuspend(dev->dev);
ebb945a9
BS
867}
868
baa70943 869static const struct drm_ioctl_desc
77145f1c 870nouveau_ioctls[] = {
f8c47144
DV
871 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_AUTH|DRM_RENDER_ALLOW),
872 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
873 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
874 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_AUTH|DRM_RENDER_ALLOW),
875 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
876 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
877 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_AUTH|DRM_RENDER_ALLOW),
878 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH|DRM_RENDER_ALLOW),
879 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH|DRM_RENDER_ALLOW),
880 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW),
881 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW),
882 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH|DRM_RENDER_ALLOW),
77145f1c
BS
883};
884
27111a23
BS
885long
886nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
5addcf0a 887{
27111a23
BS
888 struct drm_file *filp = file->private_data;
889 struct drm_device *dev = filp->minor->dev;
5addcf0a 890 long ret;
5addcf0a
DA
891
892 ret = pm_runtime_get_sync(dev->dev);
b6c4285a 893 if (ret < 0 && ret != -EACCES)
5addcf0a
DA
894 return ret;
895
27111a23
BS
896 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
897 case DRM_NOUVEAU_NVIF:
898 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
899 break;
900 default:
901 ret = drm_ioctl(file, cmd, arg);
902 break;
903 }
5addcf0a
DA
904
905 pm_runtime_mark_last_busy(dev->dev);
906 pm_runtime_put_autosuspend(dev->dev);
907 return ret;
908}
27111a23 909
77145f1c
BS
910static const struct file_operations
911nouveau_driver_fops = {
912 .owner = THIS_MODULE,
913 .open = drm_open,
914 .release = drm_release,
5addcf0a 915 .unlocked_ioctl = nouveau_drm_ioctl,
77145f1c
BS
916 .mmap = nouveau_ttm_mmap,
917 .poll = drm_poll,
77145f1c
BS
918 .read = drm_read,
919#if defined(CONFIG_COMPAT)
920 .compat_ioctl = nouveau_compat_ioctl,
921#endif
922 .llseek = noop_llseek,
923};
924
925static struct drm_driver
915b4d11 926driver_stub = {
77145f1c 927 .driver_features =
0e975980
PA
928 DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER |
929 DRIVER_KMS_LEGACY_CONTEXT,
77145f1c
BS
930
931 .load = nouveau_drm_load,
932 .unload = nouveau_drm_unload,
933 .open = nouveau_drm_open,
934 .preclose = nouveau_drm_preclose,
935 .postclose = nouveau_drm_postclose,
936 .lastclose = nouveau_vga_lastclose,
937
33b903e8 938#if defined(CONFIG_DEBUG_FS)
56c101af
KH
939 .debugfs_init = nouveau_drm_debugfs_init,
940 .debugfs_cleanup = nouveau_drm_debugfs_cleanup,
33b903e8
MS
941#endif
942
b44f8408 943 .get_vblank_counter = drm_vblank_no_hw_counter,
51cb4b39
BS
944 .enable_vblank = nouveau_display_vblank_enable,
945 .disable_vblank = nouveau_display_vblank_disable,
d83ef853
BS
946 .get_scanout_position = nouveau_display_scanoutpos,
947 .get_vblank_timestamp = nouveau_display_vblstamp,
77145f1c
BS
948
949 .ioctls = nouveau_ioctls,
baa70943 950 .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
77145f1c
BS
951 .fops = &nouveau_driver_fops,
952
953 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
954 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
ab9ccb96
AP
955 .gem_prime_export = drm_gem_prime_export,
956 .gem_prime_import = drm_gem_prime_import,
957 .gem_prime_pin = nouveau_gem_prime_pin,
3aac4502 958 .gem_prime_res_obj = nouveau_gem_prime_res_obj,
1af7c7dd 959 .gem_prime_unpin = nouveau_gem_prime_unpin,
ab9ccb96
AP
960 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
961 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
962 .gem_prime_vmap = nouveau_gem_prime_vmap,
963 .gem_prime_vunmap = nouveau_gem_prime_vunmap,
77145f1c 964
a51e6ac4 965 .gem_free_object_unlocked = nouveau_gem_object_del,
77145f1c
BS
966 .gem_open_object = nouveau_gem_object_open,
967 .gem_close_object = nouveau_gem_object_close,
968
969 .dumb_create = nouveau_display_dumb_create,
970 .dumb_map_offset = nouveau_display_dumb_map_offset,
43387b37 971 .dumb_destroy = drm_gem_dumb_destroy,
77145f1c
BS
972
973 .name = DRIVER_NAME,
974 .desc = DRIVER_DESC,
975#ifdef GIT_REVISION
976 .date = GIT_REVISION,
977#else
978 .date = DRIVER_DATE,
979#endif
980 .major = DRIVER_MAJOR,
981 .minor = DRIVER_MINOR,
982 .patchlevel = DRIVER_PATCHLEVEL,
983};
984
94580299
BS
985static struct pci_device_id
986nouveau_drm_pci_table[] = {
987 {
988 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
989 .class = PCI_BASE_CLASS_DISPLAY << 16,
990 .class_mask = 0xff << 16,
991 },
992 {
993 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
994 .class = PCI_BASE_CLASS_DISPLAY << 16,
995 .class_mask = 0xff << 16,
996 },
997 {}
998};
999
703fa264
PM
1000static void nouveau_display_options(void)
1001{
1002 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
1003
1004 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
1005 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
1006 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
1007 DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel);
1008 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
1009 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
1010 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
1011 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
1012 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
1013 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
703fa264
PM
1014}
1015
2d8b9ccb
DA
1016static const struct dev_pm_ops nouveau_pm_ops = {
1017 .suspend = nouveau_pmops_suspend,
1018 .resume = nouveau_pmops_resume,
1019 .freeze = nouveau_pmops_freeze,
1020 .thaw = nouveau_pmops_thaw,
1021 .poweroff = nouveau_pmops_freeze,
1022 .restore = nouveau_pmops_resume,
5addcf0a
DA
1023 .runtime_suspend = nouveau_pmops_runtime_suspend,
1024 .runtime_resume = nouveau_pmops_runtime_resume,
1025 .runtime_idle = nouveau_pmops_runtime_idle,
2d8b9ccb
DA
1026};
1027
94580299
BS
1028static struct pci_driver
1029nouveau_drm_pci_driver = {
1030 .name = "nouveau",
1031 .id_table = nouveau_drm_pci_table,
1032 .probe = nouveau_drm_probe,
1033 .remove = nouveau_drm_remove,
2d8b9ccb 1034 .driver.pm = &nouveau_pm_ops,
94580299
BS
1035};
1036
8ba9ff11 1037struct drm_device *
e396ecd1
AC
1038nouveau_platform_device_create(const struct nvkm_device_tegra_func *func,
1039 struct platform_device *pdev,
47b2505e 1040 struct nvkm_device **pdevice)
420b9469 1041{
8ba9ff11
AC
1042 struct drm_device *drm;
1043 int err;
420b9469 1044
e396ecd1 1045 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug,
7974dd1b 1046 true, true, ~0ULL, pdevice);
8ba9ff11 1047 if (err)
e781dc8f 1048 goto err_free;
8ba9ff11 1049
915b4d11 1050 drm = drm_dev_alloc(&driver_platform, &pdev->dev);
8ba9ff11
AC
1051 if (!drm) {
1052 err = -ENOMEM;
1053 goto err_free;
420b9469
AC
1054 }
1055
8ba9ff11
AC
1056 drm->platformdev = pdev;
1057 platform_set_drvdata(pdev, drm);
1058
1059 return drm;
1060
1061err_free:
e781dc8f 1062 nvkm_device_del(pdevice);
8ba9ff11
AC
1063
1064 return ERR_PTR(err);
420b9469
AC
1065}
1066
94580299
BS
1067static int __init
1068nouveau_drm_init(void)
1069{
915b4d11
DH
1070 driver_pci = driver_stub;
1071 driver_pci.set_busid = drm_pci_set_busid;
1072 driver_platform = driver_stub;
915b4d11 1073
703fa264
PM
1074 nouveau_display_options();
1075
77145f1c 1076 if (nouveau_modeset == -1) {
77145f1c
BS
1077 if (vgacon_text_force())
1078 nouveau_modeset = 0;
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1079 }
1080
1081 if (!nouveau_modeset)
1082 return 0;
1083
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1084#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1085 platform_driver_register(&nouveau_platform_driver);
1086#endif
1087
77145f1c 1088 nouveau_register_dsm_handler();
915b4d11 1089 return drm_pci_init(&driver_pci, &nouveau_drm_pci_driver);
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1090}
1091
1092static void __exit
1093nouveau_drm_exit(void)
1094{
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1095 if (!nouveau_modeset)
1096 return;
1097
915b4d11 1098 drm_pci_exit(&driver_pci, &nouveau_drm_pci_driver);
77145f1c 1099 nouveau_unregister_dsm_handler();
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1100
1101#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1102 platform_driver_unregister(&nouveau_platform_driver);
1103#endif
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1104}
1105
1106module_init(nouveau_drm_init);
1107module_exit(nouveau_drm_exit);
1108
1109MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
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1110MODULE_AUTHOR(DRIVER_AUTHOR);
1111MODULE_DESCRIPTION(DRIVER_DESC);
94580299 1112MODULE_LICENSE("GPL and additional rights");