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drm/mm: add "best_match" flag to drm_mm_insert_node()
[mirror_ubuntu-bionic-kernel.git] / drivers / gpu / drm / nouveau / nouveau_drm.c
CommitLineData
94580299
BS
1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
77145f1c 25#include <linux/console.h>
94580299
BS
26#include <linux/module.h>
27#include <linux/pci.h>
28
29#include <core/device.h>
30#include <core/client.h>
ebb945a9 31#include <core/gpuobj.h>
94580299
BS
32#include <core/class.h>
33
dded35de 34#include <engine/device.h>
1d7c71a3 35#include <engine/disp.h>
9fe72f9e 36#include <engine/fifo.h>
1d7c71a3 37
dded35de
BS
38#include <subdev/vm.h>
39
94580299 40#include "nouveau_drm.h"
ebb945a9 41#include "nouveau_dma.h"
77145f1c
BS
42#include "nouveau_ttm.h"
43#include "nouveau_gem.h"
cb75d97e 44#include "nouveau_agp.h"
77145f1c
BS
45#include "nouveau_vga.h"
46#include "nouveau_pm.h"
47#include "nouveau_acpi.h"
48#include "nouveau_bios.h"
49#include "nouveau_ioctl.h"
ebb945a9
BS
50#include "nouveau_abi16.h"
51#include "nouveau_fbcon.h"
52#include "nouveau_fence.h"
33b903e8 53#include "nouveau_debugfs.h"
ebb945a9 54
94580299
BS
55MODULE_PARM_DESC(config, "option string to pass to driver core");
56static char *nouveau_config;
57module_param_named(config, nouveau_config, charp, 0400);
58
59MODULE_PARM_DESC(debug, "debug string to pass to driver core");
60static char *nouveau_debug;
61module_param_named(debug, nouveau_debug, charp, 0400);
62
ebb945a9
BS
63MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
64static int nouveau_noaccel = 0;
65module_param_named(noaccel, nouveau_noaccel, int, 0400);
66
9430738d
BS
67MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
68 "0 = disabled, 1 = enabled, 2 = headless)");
69int nouveau_modeset = -1;
77145f1c
BS
70module_param_named(modeset, nouveau_modeset, int, 0400);
71
72static struct drm_driver driver;
73
e4604d8f
ML
74static int
75nouveau_drm_vblank_handler(struct nouveau_eventh *event, int head)
76{
77 struct nouveau_drm *drm =
78 container_of(event, struct nouveau_drm, vblank[head]);
79 drm_handle_vblank(drm->dev, head);
80 return NVKM_EVENT_KEEP;
81}
82
1d7c71a3
BS
83static int
84nouveau_drm_vblank_enable(struct drm_device *dev, int head)
85{
86 struct nouveau_drm *drm = nouveau_drm(dev);
87 struct nouveau_disp *pdisp = nouveau_disp(drm->device);
e4604d8f
ML
88
89 if (WARN_ON_ONCE(head > ARRAY_SIZE(drm->vblank)))
90 return -EIO;
91 WARN_ON_ONCE(drm->vblank[head].func);
92 drm->vblank[head].func = nouveau_drm_vblank_handler;
93 nouveau_event_get(pdisp->vblank, head, &drm->vblank[head]);
1d7c71a3
BS
94 return 0;
95}
96
97static void
98nouveau_drm_vblank_disable(struct drm_device *dev, int head)
99{
100 struct nouveau_drm *drm = nouveau_drm(dev);
101 struct nouveau_disp *pdisp = nouveau_disp(drm->device);
e4604d8f
ML
102 if (drm->vblank[head].func)
103 nouveau_event_put(pdisp->vblank, head, &drm->vblank[head]);
104 else
105 WARN_ON_ONCE(1);
106 drm->vblank[head].func = NULL;
1d7c71a3
BS
107}
108
94580299
BS
109static u64
110nouveau_name(struct pci_dev *pdev)
111{
112 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
113 name |= pdev->bus->number << 16;
114 name |= PCI_SLOT(pdev->devfn) << 8;
115 return name | PCI_FUNC(pdev->devfn);
116}
117
118static int
fa6df8c1
BS
119nouveau_cli_create(struct pci_dev *pdev, const char *name,
120 int size, void **pcli)
94580299
BS
121{
122 struct nouveau_cli *cli;
123 int ret;
124
dd5700ea 125 *pcli = NULL;
94580299
BS
126 ret = nouveau_client_create_(name, nouveau_name(pdev), nouveau_config,
127 nouveau_debug, size, pcli);
128 cli = *pcli;
dd5700ea
MS
129 if (ret) {
130 if (cli)
131 nouveau_client_destroy(&cli->base);
132 *pcli = NULL;
94580299 133 return ret;
dd5700ea 134 }
94580299
BS
135
136 mutex_init(&cli->mutex);
137 return 0;
138}
139
140static void
141nouveau_cli_destroy(struct nouveau_cli *cli)
142{
143 struct nouveau_object *client = nv_object(cli);
ebb945a9 144 nouveau_vm_ref(NULL, &cli->base.vm, NULL);
94580299
BS
145 nouveau_client_fini(&cli->base, false);
146 atomic_set(&client->refcount, 1);
147 nouveau_object_ref(NULL, &client);
148}
149
ebb945a9
BS
150static void
151nouveau_accel_fini(struct nouveau_drm *drm)
152{
153 nouveau_gpuobj_ref(NULL, &drm->notify);
154 nouveau_channel_del(&drm->channel);
49981046 155 nouveau_channel_del(&drm->cechan);
ebb945a9
BS
156 if (drm->fence)
157 nouveau_fence(drm)->dtor(drm);
158}
159
160static void
161nouveau_accel_init(struct nouveau_drm *drm)
162{
163 struct nouveau_device *device = nv_device(drm->device);
164 struct nouveau_object *object;
49981046 165 u32 arg0, arg1;
ebb945a9
BS
166 int ret;
167
9fe72f9e 168 if (nouveau_noaccel || !nouveau_fifo(device) /*XXX*/)
ebb945a9
BS
169 return;
170
171 /* initialise synchronisation routines */
172 if (device->card_type < NV_10) ret = nv04_fence_create(drm);
60e5cb79
BS
173 else if (device->chipset < 0x17) ret = nv10_fence_create(drm);
174 else if (device->card_type < NV_50) ret = nv17_fence_create(drm);
ace5a9b8 175 else if (device->chipset < 0x84) ret = nv50_fence_create(drm);
ebb945a9
BS
176 else if (device->card_type < NV_C0) ret = nv84_fence_create(drm);
177 else ret = nvc0_fence_create(drm);
178 if (ret) {
179 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
180 nouveau_accel_fini(drm);
181 return;
182 }
183
49981046
BS
184 if (device->card_type >= NV_E0) {
185 ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE,
186 NVDRM_CHAN + 1,
187 NVE0_CHANNEL_IND_ENGINE_CE0 |
188 NVE0_CHANNEL_IND_ENGINE_CE1, 0,
189 &drm->cechan);
190 if (ret)
191 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
192
193 arg0 = NVE0_CHANNEL_IND_ENGINE_GR;
49469800 194 arg1 = 1;
49981046
BS
195 } else {
196 arg0 = NvDmaFB;
197 arg1 = NvDmaTT;
198 }
199
ebb945a9 200 ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, NVDRM_CHAN,
49981046 201 arg0, arg1, &drm->channel);
ebb945a9
BS
202 if (ret) {
203 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
204 nouveau_accel_fini(drm);
205 return;
206 }
207
208 if (device->card_type < NV_C0) {
209 ret = nouveau_gpuobj_new(drm->device, NULL, 32, 0, 0,
210 &drm->notify);
211 if (ret) {
212 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
213 nouveau_accel_fini(drm);
214 return;
215 }
216
217 ret = nouveau_object_new(nv_object(drm),
218 drm->channel->handle, NvNotify0,
219 0x003d, &(struct nv_dma_class) {
220 .flags = NV_DMA_TARGET_VRAM |
221 NV_DMA_ACCESS_RDWR,
222 .start = drm->notify->addr,
223 .limit = drm->notify->addr + 31
224 }, sizeof(struct nv_dma_class),
225 &object);
226 if (ret) {
227 nouveau_accel_fini(drm);
228 return;
229 }
230 }
231
232
49981046 233 nouveau_bo_move_init(drm);
ebb945a9
BS
234}
235
56550d94
GKH
236static int nouveau_drm_probe(struct pci_dev *pdev,
237 const struct pci_device_id *pent)
94580299
BS
238{
239 struct nouveau_device *device;
ebb945a9
BS
240 struct apertures_struct *aper;
241 bool boot = false;
94580299
BS
242 int ret;
243
ebb945a9
BS
244 /* remove conflicting drivers (vesafb, efifb etc) */
245 aper = alloc_apertures(3);
246 if (!aper)
247 return -ENOMEM;
248
249 aper->ranges[0].base = pci_resource_start(pdev, 1);
250 aper->ranges[0].size = pci_resource_len(pdev, 1);
251 aper->count = 1;
252
253 if (pci_resource_len(pdev, 2)) {
254 aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
255 aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
256 aper->count++;
257 }
258
259 if (pci_resource_len(pdev, 3)) {
260 aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
261 aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
262 aper->count++;
263 }
264
265#ifdef CONFIG_X86
266 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
267#endif
268 remove_conflicting_framebuffers(aper, "nouveaufb", boot);
83ef7777 269 kfree(aper);
ebb945a9 270
94580299
BS
271 ret = nouveau_device_create(pdev, nouveau_name(pdev), pci_name(pdev),
272 nouveau_config, nouveau_debug, &device);
273 if (ret)
274 return ret;
275
276 pci_set_master(pdev);
277
77145f1c 278 ret = drm_get_pci_dev(pdev, pent, &driver);
94580299 279 if (ret) {
ebb945a9 280 nouveau_object_ref(NULL, (struct nouveau_object **)&device);
94580299
BS
281 return ret;
282 }
283
284 return 0;
285}
286
5f97ab91
MS
287static struct lock_class_key drm_client_lock_class_key;
288
5b8a43ae 289static int
94580299
BS
290nouveau_drm_load(struct drm_device *dev, unsigned long flags)
291{
292 struct pci_dev *pdev = dev->pdev;
ebb945a9 293 struct nouveau_device *device;
94580299
BS
294 struct nouveau_drm *drm;
295 int ret;
296
fa6df8c1 297 ret = nouveau_cli_create(pdev, "DRM", sizeof(*drm), (void**)&drm);
94580299
BS
298 if (ret)
299 return ret;
5f97ab91 300 lockdep_set_class(&drm->client.mutex, &drm_client_lock_class_key);
94580299 301
77145f1c
BS
302 dev->dev_private = drm;
303 drm->dev = dev;
304
94580299 305 INIT_LIST_HEAD(&drm->clients);
ebb945a9 306 spin_lock_init(&drm->tile.lock);
94580299 307
cb75d97e
BS
308 /* make sure AGP controller is in a consistent state before we
309 * (possibly) execute vbios init tables (see nouveau_agp.h)
310 */
311 if (drm_pci_device_is_agp(dev) && dev->agp) {
312 /* dummy device object, doesn't init anything, but allows
313 * agp code access to registers
314 */
315 ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT,
316 NVDRM_DEVICE, 0x0080,
317 &(struct nv_device_class) {
318 .device = ~0,
319 .disable =
320 ~(NV_DEVICE_DISABLE_MMIO |
321 NV_DEVICE_DISABLE_IDENTIFY),
322 .debug0 = ~0,
323 }, sizeof(struct nv_device_class),
324 &drm->device);
325 if (ret)
ebb945a9 326 goto fail_device;
cb75d97e
BS
327
328 nouveau_agp_reset(drm);
329 nouveau_object_del(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE);
330 }
331
94580299
BS
332 ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE,
333 0x0080, &(struct nv_device_class) {
334 .device = ~0,
335 .disable = 0,
336 .debug0 = 0,
337 }, sizeof(struct nv_device_class),
338 &drm->device);
339 if (ret)
340 goto fail_device;
341
77145f1c
BS
342 /* workaround an odd issue on nvc1 by disabling the device's
343 * nosnoop capability. hopefully won't cause issues until a
344 * better fix is found - assuming there is one...
345 */
ebb945a9 346 device = nv_device(drm->device);
77145f1c
BS
347 if (nv_device(drm->device)->chipset == 0xc1)
348 nv_mask(device, 0x00088080, 0x00000800, 0x00000000);
ebb945a9 349
77145f1c 350 nouveau_vga_init(drm);
cb75d97e
BS
351 nouveau_agp_init(drm);
352
ebb945a9
BS
353 if (device->card_type >= NV_50) {
354 ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
355 0x1000, &drm->client.base.vm);
356 if (ret)
357 goto fail_device;
358 }
359
360 ret = nouveau_ttm_init(drm);
94580299 361 if (ret)
77145f1c
BS
362 goto fail_ttm;
363
364 ret = nouveau_bios_init(dev);
365 if (ret)
366 goto fail_bios;
367
77145f1c 368 ret = nouveau_display_create(dev);
ebb945a9 369 if (ret)
77145f1c
BS
370 goto fail_dispctor;
371
372 if (dev->mode_config.num_crtc) {
373 ret = nouveau_display_init(dev);
374 if (ret)
375 goto fail_dispinit;
376 }
377
378 nouveau_pm_init(dev);
ebb945a9
BS
379
380 nouveau_accel_init(drm);
381 nouveau_fbcon_init(dev);
94580299
BS
382 return 0;
383
77145f1c
BS
384fail_dispinit:
385 nouveau_display_destroy(dev);
386fail_dispctor:
77145f1c
BS
387 nouveau_bios_takedown(dev);
388fail_bios:
ebb945a9 389 nouveau_ttm_fini(drm);
77145f1c
BS
390fail_ttm:
391 nouveau_agp_fini(drm);
392 nouveau_vga_fini(drm);
94580299
BS
393fail_device:
394 nouveau_cli_destroy(&drm->client);
395 return ret;
396}
397
5b8a43ae 398static int
94580299
BS
399nouveau_drm_unload(struct drm_device *dev)
400{
77145f1c 401 struct nouveau_drm *drm = nouveau_drm(dev);
94580299 402
ebb945a9
BS
403 nouveau_fbcon_fini(dev);
404 nouveau_accel_fini(drm);
405
77145f1c
BS
406 nouveau_pm_fini(dev);
407
9430738d
BS
408 if (dev->mode_config.num_crtc)
409 nouveau_display_fini(dev);
77145f1c
BS
410 nouveau_display_destroy(dev);
411
77145f1c 412 nouveau_bios_takedown(dev);
94580299 413
ebb945a9 414 nouveau_ttm_fini(drm);
cb75d97e 415 nouveau_agp_fini(drm);
77145f1c 416 nouveau_vga_fini(drm);
cb75d97e 417
94580299
BS
418 nouveau_cli_destroy(&drm->client);
419 return 0;
420}
421
422static void
423nouveau_drm_remove(struct pci_dev *pdev)
424{
77145f1c
BS
425 struct drm_device *dev = pci_get_drvdata(pdev);
426 struct nouveau_drm *drm = nouveau_drm(dev);
ebb945a9 427 struct nouveau_object *device;
77145f1c
BS
428
429 device = drm->client.base.device;
430 drm_put_dev(dev);
431
ebb945a9
BS
432 nouveau_object_ref(NULL, &device);
433 nouveau_object_debug();
94580299
BS
434}
435
cd897837 436static int
2d8b9ccb 437nouveau_do_suspend(struct drm_device *dev)
94580299 438{
77145f1c 439 struct nouveau_drm *drm = nouveau_drm(dev);
94580299
BS
440 struct nouveau_cli *cli;
441 int ret;
442
9430738d
BS
443 if (dev->mode_config.num_crtc) {
444 NV_INFO(drm, "suspending fbcon...\n");
445 nouveau_fbcon_set_suspend(dev, 1);
ebb945a9 446
9430738d
BS
447 NV_INFO(drm, "suspending display...\n");
448 ret = nouveau_display_suspend(dev);
449 if (ret)
450 return ret;
451 }
94580299 452
ebb945a9
BS
453 NV_INFO(drm, "evicting buffers...\n");
454 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
455
81dff21b
BS
456 NV_INFO(drm, "waiting for kernel channels to go idle...\n");
457 if (drm->cechan) {
458 ret = nouveau_channel_idle(drm->cechan);
459 if (ret)
460 return ret;
461 }
462
463 if (drm->channel) {
464 ret = nouveau_channel_idle(drm->channel);
465 if (ret)
466 return ret;
467 }
468
469 NV_INFO(drm, "suspending client object trees...\n");
ebb945a9
BS
470 if (drm->fence && nouveau_fence(drm)->suspend) {
471 if (!nouveau_fence(drm)->suspend(drm))
472 return -ENOMEM;
473 }
474
94580299
BS
475 list_for_each_entry(cli, &drm->clients, head) {
476 ret = nouveau_client_fini(&cli->base, true);
477 if (ret)
478 goto fail_client;
479 }
480
81dff21b 481 NV_INFO(drm, "suspending kernel object tree...\n");
94580299
BS
482 ret = nouveau_client_fini(&drm->client.base, true);
483 if (ret)
484 goto fail_client;
485
cb75d97e 486 nouveau_agp_fini(drm);
94580299
BS
487 return 0;
488
489fail_client:
490 list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
491 nouveau_client_init(&cli->base);
492 }
493
9430738d
BS
494 if (dev->mode_config.num_crtc) {
495 NV_INFO(drm, "resuming display...\n");
496 nouveau_display_resume(dev);
497 }
94580299
BS
498 return ret;
499}
500
2d8b9ccb 501int nouveau_pmops_suspend(struct device *dev)
94580299 502{
2d8b9ccb
DA
503 struct pci_dev *pdev = to_pci_dev(dev);
504 struct drm_device *drm_dev = pci_get_drvdata(pdev);
94580299
BS
505 int ret;
506
2d8b9ccb 507 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
94580299
BS
508 return 0;
509
2d8b9ccb 510 ret = nouveau_do_suspend(drm_dev);
94580299
BS
511 if (ret)
512 return ret;
2d8b9ccb
DA
513
514 pci_save_state(pdev);
515 pci_disable_device(pdev);
516 pci_set_power_state(pdev, PCI_D3hot);
517
518 return 0;
519}
520
cd897837 521static int
2d8b9ccb
DA
522nouveau_do_resume(struct drm_device *dev)
523{
524 struct nouveau_drm *drm = nouveau_drm(dev);
525 struct nouveau_cli *cli;
526
527 NV_INFO(drm, "re-enabling device...\n");
94580299 528
cb75d97e
BS
529 nouveau_agp_reset(drm);
530
81dff21b 531 NV_INFO(drm, "resuming kernel object tree...\n");
94580299 532 nouveau_client_init(&drm->client.base);
ebb945a9 533 nouveau_agp_init(drm);
94580299 534
81dff21b
BS
535 NV_INFO(drm, "resuming client object trees...\n");
536 if (drm->fence && nouveau_fence(drm)->resume)
537 nouveau_fence(drm)->resume(drm);
538
94580299
BS
539 list_for_each_entry(cli, &drm->clients, head) {
540 nouveau_client_init(&cli->base);
541 }
cb75d97e 542
77145f1c 543 nouveau_run_vbios_init(dev);
77145f1c
BS
544 nouveau_pm_resume(dev);
545
9430738d
BS
546 if (dev->mode_config.num_crtc) {
547 NV_INFO(drm, "resuming display...\n");
548 nouveau_display_resume(dev);
549 }
77145f1c 550 return 0;
94580299
BS
551}
552
2d8b9ccb
DA
553int nouveau_pmops_resume(struct device *dev)
554{
555 struct pci_dev *pdev = to_pci_dev(dev);
556 struct drm_device *drm_dev = pci_get_drvdata(pdev);
557 int ret;
558
559 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
560 return 0;
561
562 pci_set_power_state(pdev, PCI_D0);
563 pci_restore_state(pdev);
564 ret = pci_enable_device(pdev);
565 if (ret)
566 return ret;
567 pci_set_master(pdev);
568
569 return nouveau_do_resume(drm_dev);
570}
571
572static int nouveau_pmops_freeze(struct device *dev)
573{
574 struct pci_dev *pdev = to_pci_dev(dev);
575 struct drm_device *drm_dev = pci_get_drvdata(pdev);
576
577 return nouveau_do_suspend(drm_dev);
578}
579
580static int nouveau_pmops_thaw(struct device *dev)
581{
582 struct pci_dev *pdev = to_pci_dev(dev);
583 struct drm_device *drm_dev = pci_get_drvdata(pdev);
584
585 return nouveau_do_resume(drm_dev);
586}
587
588
5b8a43ae 589static int
ebb945a9
BS
590nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
591{
592 struct pci_dev *pdev = dev->pdev;
593 struct nouveau_drm *drm = nouveau_drm(dev);
594 struct nouveau_cli *cli;
a2896ced 595 char name[32], tmpname[TASK_COMM_LEN];
ebb945a9
BS
596 int ret;
597
a2896ced
MS
598 get_task_comm(tmpname, current);
599 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
fa6df8c1
BS
600
601 ret = nouveau_cli_create(pdev, name, sizeof(*cli), (void **)&cli);
ebb945a9
BS
602 if (ret)
603 return ret;
604
605 if (nv_device(drm->device)->card_type >= NV_50) {
606 ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
607 0x1000, &cli->base.vm);
608 if (ret) {
609 nouveau_cli_destroy(cli);
610 return ret;
611 }
612 }
613
614 fpriv->driver_priv = cli;
615
616 mutex_lock(&drm->client.mutex);
617 list_add(&cli->head, &drm->clients);
618 mutex_unlock(&drm->client.mutex);
619 return 0;
620}
621
5b8a43ae 622static void
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623nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
624{
625 struct nouveau_cli *cli = nouveau_cli(fpriv);
626 struct nouveau_drm *drm = nouveau_drm(dev);
627
628 if (cli->abi16)
629 nouveau_abi16_fini(cli->abi16);
630
631 mutex_lock(&drm->client.mutex);
632 list_del(&cli->head);
633 mutex_unlock(&drm->client.mutex);
634}
635
5b8a43ae 636static void
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637nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
638{
639 struct nouveau_cli *cli = nouveau_cli(fpriv);
640 nouveau_cli_destroy(cli);
641}
642
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643static struct drm_ioctl_desc
644nouveau_ioctls[] = {
645 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH),
646 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
647 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH),
648 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH),
649 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH),
650 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH),
651 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH),
652 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH),
653 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH),
654 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
655 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
656 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH),
657};
658
659static const struct file_operations
660nouveau_driver_fops = {
661 .owner = THIS_MODULE,
662 .open = drm_open,
663 .release = drm_release,
664 .unlocked_ioctl = drm_ioctl,
665 .mmap = nouveau_ttm_mmap,
666 .poll = drm_poll,
667 .fasync = drm_fasync,
668 .read = drm_read,
669#if defined(CONFIG_COMPAT)
670 .compat_ioctl = nouveau_compat_ioctl,
671#endif
672 .llseek = noop_llseek,
673};
674
675static struct drm_driver
676driver = {
677 .driver_features =
4cb4ea39 678 DRIVER_USE_AGP |
0fa9061a 679 DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME,
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680
681 .load = nouveau_drm_load,
682 .unload = nouveau_drm_unload,
683 .open = nouveau_drm_open,
684 .preclose = nouveau_drm_preclose,
685 .postclose = nouveau_drm_postclose,
686 .lastclose = nouveau_vga_lastclose,
687
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688#if defined(CONFIG_DEBUG_FS)
689 .debugfs_init = nouveau_debugfs_init,
690 .debugfs_cleanup = nouveau_debugfs_takedown,
691#endif
692
77145f1c 693 .get_vblank_counter = drm_vblank_count,
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694 .enable_vblank = nouveau_drm_vblank_enable,
695 .disable_vblank = nouveau_drm_vblank_disable,
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696
697 .ioctls = nouveau_ioctls,
698 .fops = &nouveau_driver_fops,
699
700 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
701 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
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702 .gem_prime_export = drm_gem_prime_export,
703 .gem_prime_import = drm_gem_prime_import,
704 .gem_prime_pin = nouveau_gem_prime_pin,
1af7c7dd 705 .gem_prime_unpin = nouveau_gem_prime_unpin,
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706 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
707 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
708 .gem_prime_vmap = nouveau_gem_prime_vmap,
709 .gem_prime_vunmap = nouveau_gem_prime_vunmap,
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710
711 .gem_init_object = nouveau_gem_object_new,
712 .gem_free_object = nouveau_gem_object_del,
713 .gem_open_object = nouveau_gem_object_open,
714 .gem_close_object = nouveau_gem_object_close,
715
716 .dumb_create = nouveau_display_dumb_create,
717 .dumb_map_offset = nouveau_display_dumb_map_offset,
43387b37 718 .dumb_destroy = drm_gem_dumb_destroy,
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719
720 .name = DRIVER_NAME,
721 .desc = DRIVER_DESC,
722#ifdef GIT_REVISION
723 .date = GIT_REVISION,
724#else
725 .date = DRIVER_DATE,
726#endif
727 .major = DRIVER_MAJOR,
728 .minor = DRIVER_MINOR,
729 .patchlevel = DRIVER_PATCHLEVEL,
730};
731
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732static struct pci_device_id
733nouveau_drm_pci_table[] = {
734 {
735 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
736 .class = PCI_BASE_CLASS_DISPLAY << 16,
737 .class_mask = 0xff << 16,
738 },
739 {
740 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
741 .class = PCI_BASE_CLASS_DISPLAY << 16,
742 .class_mask = 0xff << 16,
743 },
744 {}
745};
746
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747static const struct dev_pm_ops nouveau_pm_ops = {
748 .suspend = nouveau_pmops_suspend,
749 .resume = nouveau_pmops_resume,
750 .freeze = nouveau_pmops_freeze,
751 .thaw = nouveau_pmops_thaw,
752 .poweroff = nouveau_pmops_freeze,
753 .restore = nouveau_pmops_resume,
754};
755
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756static struct pci_driver
757nouveau_drm_pci_driver = {
758 .name = "nouveau",
759 .id_table = nouveau_drm_pci_table,
760 .probe = nouveau_drm_probe,
761 .remove = nouveau_drm_remove,
2d8b9ccb 762 .driver.pm = &nouveau_pm_ops,
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763};
764
765static int __init
766nouveau_drm_init(void)
767{
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768 driver.num_ioctls = ARRAY_SIZE(nouveau_ioctls);
769
770 if (nouveau_modeset == -1) {
771#ifdef CONFIG_VGA_CONSOLE
772 if (vgacon_text_force())
773 nouveau_modeset = 0;
77145f1c 774#endif
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775 }
776
777 if (!nouveau_modeset)
778 return 0;
779
780 nouveau_register_dsm_handler();
781 return drm_pci_init(&driver, &nouveau_drm_pci_driver);
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782}
783
784static void __exit
785nouveau_drm_exit(void)
786{
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787 if (!nouveau_modeset)
788 return;
789
790 drm_pci_exit(&driver, &nouveau_drm_pci_driver);
791 nouveau_unregister_dsm_handler();
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792}
793
794module_init(nouveau_drm_init);
795module_exit(nouveau_drm_exit);
796
797MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
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798MODULE_AUTHOR(DRIVER_AUTHOR);
799MODULE_DESCRIPTION(DRIVER_DESC);
94580299 800MODULE_LICENSE("GPL and additional rights");