]>
Commit | Line | Data |
---|---|---|
94580299 BS |
1 | /* |
2 | * Copyright 2012 Red Hat Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: Ben Skeggs | |
23 | */ | |
24 | ||
77145f1c | 25 | #include <linux/console.h> |
94580299 BS |
26 | #include <linux/module.h> |
27 | #include <linux/pci.h> | |
28 | ||
29 | #include <core/device.h> | |
30 | #include <core/client.h> | |
ebb945a9 | 31 | #include <core/gpuobj.h> |
94580299 BS |
32 | #include <core/class.h> |
33 | ||
34 | #include <subdev/device.h> | |
ebb945a9 | 35 | #include <subdev/vm.h> |
94580299 BS |
36 | |
37 | #include "nouveau_drm.h" | |
77145f1c | 38 | #include "nouveau_irq.h" |
ebb945a9 | 39 | #include "nouveau_dma.h" |
77145f1c BS |
40 | #include "nouveau_ttm.h" |
41 | #include "nouveau_gem.h" | |
cb75d97e | 42 | #include "nouveau_agp.h" |
77145f1c BS |
43 | #include "nouveau_vga.h" |
44 | #include "nouveau_pm.h" | |
45 | #include "nouveau_acpi.h" | |
46 | #include "nouveau_bios.h" | |
47 | #include "nouveau_ioctl.h" | |
ebb945a9 BS |
48 | #include "nouveau_abi16.h" |
49 | #include "nouveau_fbcon.h" | |
50 | #include "nouveau_fence.h" | |
51 | ||
52 | #include "nouveau_ttm.h" | |
94580299 | 53 | |
94580299 BS |
54 | MODULE_PARM_DESC(config, "option string to pass to driver core"); |
55 | static char *nouveau_config; | |
56 | module_param_named(config, nouveau_config, charp, 0400); | |
57 | ||
58 | MODULE_PARM_DESC(debug, "debug string to pass to driver core"); | |
59 | static char *nouveau_debug; | |
60 | module_param_named(debug, nouveau_debug, charp, 0400); | |
61 | ||
ebb945a9 BS |
62 | MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration"); |
63 | static int nouveau_noaccel = 0; | |
64 | module_param_named(noaccel, nouveau_noaccel, int, 0400); | |
65 | ||
9430738d BS |
66 | MODULE_PARM_DESC(modeset, "enable driver (default: auto, " |
67 | "0 = disabled, 1 = enabled, 2 = headless)"); | |
68 | int nouveau_modeset = -1; | |
77145f1c BS |
69 | module_param_named(modeset, nouveau_modeset, int, 0400); |
70 | ||
71 | static struct drm_driver driver; | |
72 | ||
94580299 BS |
73 | static u64 |
74 | nouveau_name(struct pci_dev *pdev) | |
75 | { | |
76 | u64 name = (u64)pci_domain_nr(pdev->bus) << 32; | |
77 | name |= pdev->bus->number << 16; | |
78 | name |= PCI_SLOT(pdev->devfn) << 8; | |
79 | return name | PCI_FUNC(pdev->devfn); | |
80 | } | |
81 | ||
82 | static int | |
fa6df8c1 BS |
83 | nouveau_cli_create(struct pci_dev *pdev, const char *name, |
84 | int size, void **pcli) | |
94580299 BS |
85 | { |
86 | struct nouveau_cli *cli; | |
87 | int ret; | |
88 | ||
89 | ret = nouveau_client_create_(name, nouveau_name(pdev), nouveau_config, | |
90 | nouveau_debug, size, pcli); | |
91 | cli = *pcli; | |
92 | if (ret) | |
93 | return ret; | |
94 | ||
95 | mutex_init(&cli->mutex); | |
96 | return 0; | |
97 | } | |
98 | ||
99 | static void | |
100 | nouveau_cli_destroy(struct nouveau_cli *cli) | |
101 | { | |
102 | struct nouveau_object *client = nv_object(cli); | |
ebb945a9 | 103 | nouveau_vm_ref(NULL, &cli->base.vm, NULL); |
94580299 BS |
104 | nouveau_client_fini(&cli->base, false); |
105 | atomic_set(&client->refcount, 1); | |
106 | nouveau_object_ref(NULL, &client); | |
107 | } | |
108 | ||
ebb945a9 BS |
109 | static void |
110 | nouveau_accel_fini(struct nouveau_drm *drm) | |
111 | { | |
112 | nouveau_gpuobj_ref(NULL, &drm->notify); | |
113 | nouveau_channel_del(&drm->channel); | |
49981046 | 114 | nouveau_channel_del(&drm->cechan); |
ebb945a9 BS |
115 | if (drm->fence) |
116 | nouveau_fence(drm)->dtor(drm); | |
117 | } | |
118 | ||
119 | static void | |
120 | nouveau_accel_init(struct nouveau_drm *drm) | |
121 | { | |
122 | struct nouveau_device *device = nv_device(drm->device); | |
123 | struct nouveau_object *object; | |
49981046 | 124 | u32 arg0, arg1; |
ebb945a9 BS |
125 | int ret; |
126 | ||
127 | if (nouveau_noaccel) | |
128 | return; | |
129 | ||
130 | /* initialise synchronisation routines */ | |
131 | if (device->card_type < NV_10) ret = nv04_fence_create(drm); | |
132 | else if (device->chipset < 0x84) ret = nv10_fence_create(drm); | |
133 | else if (device->card_type < NV_C0) ret = nv84_fence_create(drm); | |
134 | else ret = nvc0_fence_create(drm); | |
135 | if (ret) { | |
136 | NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret); | |
137 | nouveau_accel_fini(drm); | |
138 | return; | |
139 | } | |
140 | ||
49981046 BS |
141 | if (device->card_type >= NV_E0) { |
142 | ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, | |
143 | NVDRM_CHAN + 1, | |
144 | NVE0_CHANNEL_IND_ENGINE_CE0 | | |
145 | NVE0_CHANNEL_IND_ENGINE_CE1, 0, | |
146 | &drm->cechan); | |
147 | if (ret) | |
148 | NV_ERROR(drm, "failed to create ce channel, %d\n", ret); | |
149 | ||
150 | arg0 = NVE0_CHANNEL_IND_ENGINE_GR; | |
151 | arg1 = 0; | |
152 | } else { | |
153 | arg0 = NvDmaFB; | |
154 | arg1 = NvDmaTT; | |
155 | } | |
156 | ||
ebb945a9 | 157 | ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, NVDRM_CHAN, |
49981046 | 158 | arg0, arg1, &drm->channel); |
ebb945a9 BS |
159 | if (ret) { |
160 | NV_ERROR(drm, "failed to create kernel channel, %d\n", ret); | |
161 | nouveau_accel_fini(drm); | |
162 | return; | |
163 | } | |
164 | ||
165 | if (device->card_type < NV_C0) { | |
166 | ret = nouveau_gpuobj_new(drm->device, NULL, 32, 0, 0, | |
167 | &drm->notify); | |
168 | if (ret) { | |
169 | NV_ERROR(drm, "failed to allocate notifier, %d\n", ret); | |
170 | nouveau_accel_fini(drm); | |
171 | return; | |
172 | } | |
173 | ||
174 | ret = nouveau_object_new(nv_object(drm), | |
175 | drm->channel->handle, NvNotify0, | |
176 | 0x003d, &(struct nv_dma_class) { | |
177 | .flags = NV_DMA_TARGET_VRAM | | |
178 | NV_DMA_ACCESS_RDWR, | |
179 | .start = drm->notify->addr, | |
180 | .limit = drm->notify->addr + 31 | |
181 | }, sizeof(struct nv_dma_class), | |
182 | &object); | |
183 | if (ret) { | |
184 | nouveau_accel_fini(drm); | |
185 | return; | |
186 | } | |
187 | } | |
188 | ||
189 | ||
49981046 | 190 | nouveau_bo_move_init(drm); |
ebb945a9 BS |
191 | } |
192 | ||
94580299 BS |
193 | static int __devinit |
194 | nouveau_drm_probe(struct pci_dev *pdev, const struct pci_device_id *pent) | |
195 | { | |
196 | struct nouveau_device *device; | |
ebb945a9 BS |
197 | struct apertures_struct *aper; |
198 | bool boot = false; | |
94580299 BS |
199 | int ret; |
200 | ||
ebb945a9 BS |
201 | /* remove conflicting drivers (vesafb, efifb etc) */ |
202 | aper = alloc_apertures(3); | |
203 | if (!aper) | |
204 | return -ENOMEM; | |
205 | ||
206 | aper->ranges[0].base = pci_resource_start(pdev, 1); | |
207 | aper->ranges[0].size = pci_resource_len(pdev, 1); | |
208 | aper->count = 1; | |
209 | ||
210 | if (pci_resource_len(pdev, 2)) { | |
211 | aper->ranges[aper->count].base = pci_resource_start(pdev, 2); | |
212 | aper->ranges[aper->count].size = pci_resource_len(pdev, 2); | |
213 | aper->count++; | |
214 | } | |
215 | ||
216 | if (pci_resource_len(pdev, 3)) { | |
217 | aper->ranges[aper->count].base = pci_resource_start(pdev, 3); | |
218 | aper->ranges[aper->count].size = pci_resource_len(pdev, 3); | |
219 | aper->count++; | |
220 | } | |
221 | ||
222 | #ifdef CONFIG_X86 | |
223 | boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; | |
224 | #endif | |
225 | remove_conflicting_framebuffers(aper, "nouveaufb", boot); | |
83ef7777 | 226 | kfree(aper); |
ebb945a9 | 227 | |
94580299 BS |
228 | ret = nouveau_device_create(pdev, nouveau_name(pdev), pci_name(pdev), |
229 | nouveau_config, nouveau_debug, &device); | |
230 | if (ret) | |
231 | return ret; | |
232 | ||
233 | pci_set_master(pdev); | |
234 | ||
77145f1c | 235 | ret = drm_get_pci_dev(pdev, pent, &driver); |
94580299 | 236 | if (ret) { |
ebb945a9 | 237 | nouveau_object_ref(NULL, (struct nouveau_object **)&device); |
94580299 BS |
238 | return ret; |
239 | } | |
240 | ||
241 | return 0; | |
242 | } | |
243 | ||
5b8a43ae | 244 | static int |
94580299 BS |
245 | nouveau_drm_load(struct drm_device *dev, unsigned long flags) |
246 | { | |
247 | struct pci_dev *pdev = dev->pdev; | |
ebb945a9 | 248 | struct nouveau_device *device; |
94580299 BS |
249 | struct nouveau_drm *drm; |
250 | int ret; | |
251 | ||
fa6df8c1 | 252 | ret = nouveau_cli_create(pdev, "DRM", sizeof(*drm), (void**)&drm); |
94580299 BS |
253 | if (ret) |
254 | return ret; | |
255 | ||
77145f1c BS |
256 | dev->dev_private = drm; |
257 | drm->dev = dev; | |
258 | ||
94580299 | 259 | INIT_LIST_HEAD(&drm->clients); |
ebb945a9 | 260 | spin_lock_init(&drm->tile.lock); |
94580299 | 261 | |
cb75d97e BS |
262 | /* make sure AGP controller is in a consistent state before we |
263 | * (possibly) execute vbios init tables (see nouveau_agp.h) | |
264 | */ | |
265 | if (drm_pci_device_is_agp(dev) && dev->agp) { | |
266 | /* dummy device object, doesn't init anything, but allows | |
267 | * agp code access to registers | |
268 | */ | |
269 | ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, | |
270 | NVDRM_DEVICE, 0x0080, | |
271 | &(struct nv_device_class) { | |
272 | .device = ~0, | |
273 | .disable = | |
274 | ~(NV_DEVICE_DISABLE_MMIO | | |
275 | NV_DEVICE_DISABLE_IDENTIFY), | |
276 | .debug0 = ~0, | |
277 | }, sizeof(struct nv_device_class), | |
278 | &drm->device); | |
279 | if (ret) | |
ebb945a9 | 280 | goto fail_device; |
cb75d97e BS |
281 | |
282 | nouveau_agp_reset(drm); | |
283 | nouveau_object_del(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE); | |
284 | } | |
285 | ||
94580299 BS |
286 | ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE, |
287 | 0x0080, &(struct nv_device_class) { | |
288 | .device = ~0, | |
289 | .disable = 0, | |
290 | .debug0 = 0, | |
291 | }, sizeof(struct nv_device_class), | |
292 | &drm->device); | |
293 | if (ret) | |
294 | goto fail_device; | |
295 | ||
77145f1c BS |
296 | /* workaround an odd issue on nvc1 by disabling the device's |
297 | * nosnoop capability. hopefully won't cause issues until a | |
298 | * better fix is found - assuming there is one... | |
299 | */ | |
ebb945a9 | 300 | device = nv_device(drm->device); |
77145f1c BS |
301 | if (nv_device(drm->device)->chipset == 0xc1) |
302 | nv_mask(device, 0x00088080, 0x00000800, 0x00000000); | |
ebb945a9 | 303 | |
77145f1c | 304 | nouveau_vga_init(drm); |
cb75d97e BS |
305 | nouveau_agp_init(drm); |
306 | ||
ebb945a9 BS |
307 | if (device->card_type >= NV_50) { |
308 | ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40), | |
309 | 0x1000, &drm->client.base.vm); | |
310 | if (ret) | |
311 | goto fail_device; | |
312 | } | |
313 | ||
314 | ret = nouveau_ttm_init(drm); | |
94580299 | 315 | if (ret) |
77145f1c BS |
316 | goto fail_ttm; |
317 | ||
318 | ret = nouveau_bios_init(dev); | |
319 | if (ret) | |
320 | goto fail_bios; | |
321 | ||
322 | ret = nouveau_irq_init(dev); | |
323 | if (ret) | |
324 | goto fail_irq; | |
94580299 | 325 | |
77145f1c | 326 | ret = nouveau_display_create(dev); |
ebb945a9 | 327 | if (ret) |
77145f1c BS |
328 | goto fail_dispctor; |
329 | ||
330 | if (dev->mode_config.num_crtc) { | |
331 | ret = nouveau_display_init(dev); | |
332 | if (ret) | |
333 | goto fail_dispinit; | |
334 | } | |
335 | ||
336 | nouveau_pm_init(dev); | |
ebb945a9 BS |
337 | |
338 | nouveau_accel_init(drm); | |
339 | nouveau_fbcon_init(dev); | |
94580299 BS |
340 | return 0; |
341 | ||
77145f1c BS |
342 | fail_dispinit: |
343 | nouveau_display_destroy(dev); | |
344 | fail_dispctor: | |
345 | nouveau_irq_fini(dev); | |
346 | fail_irq: | |
347 | nouveau_bios_takedown(dev); | |
348 | fail_bios: | |
ebb945a9 | 349 | nouveau_ttm_fini(drm); |
77145f1c BS |
350 | fail_ttm: |
351 | nouveau_agp_fini(drm); | |
352 | nouveau_vga_fini(drm); | |
94580299 BS |
353 | fail_device: |
354 | nouveau_cli_destroy(&drm->client); | |
355 | return ret; | |
356 | } | |
357 | ||
5b8a43ae | 358 | static int |
94580299 BS |
359 | nouveau_drm_unload(struct drm_device *dev) |
360 | { | |
77145f1c | 361 | struct nouveau_drm *drm = nouveau_drm(dev); |
94580299 | 362 | |
ebb945a9 BS |
363 | nouveau_fbcon_fini(dev); |
364 | nouveau_accel_fini(drm); | |
365 | ||
77145f1c BS |
366 | nouveau_pm_fini(dev); |
367 | ||
9430738d BS |
368 | if (dev->mode_config.num_crtc) |
369 | nouveau_display_fini(dev); | |
77145f1c BS |
370 | nouveau_display_destroy(dev); |
371 | ||
372 | nouveau_irq_fini(dev); | |
373 | nouveau_bios_takedown(dev); | |
94580299 | 374 | |
ebb945a9 | 375 | nouveau_ttm_fini(drm); |
cb75d97e | 376 | nouveau_agp_fini(drm); |
77145f1c | 377 | nouveau_vga_fini(drm); |
cb75d97e | 378 | |
94580299 BS |
379 | nouveau_cli_destroy(&drm->client); |
380 | return 0; | |
381 | } | |
382 | ||
383 | static void | |
384 | nouveau_drm_remove(struct pci_dev *pdev) | |
385 | { | |
77145f1c BS |
386 | struct drm_device *dev = pci_get_drvdata(pdev); |
387 | struct nouveau_drm *drm = nouveau_drm(dev); | |
ebb945a9 | 388 | struct nouveau_object *device; |
77145f1c BS |
389 | |
390 | device = drm->client.base.device; | |
391 | drm_put_dev(dev); | |
392 | ||
ebb945a9 BS |
393 | nouveau_object_ref(NULL, &device); |
394 | nouveau_object_debug(); | |
94580299 BS |
395 | } |
396 | ||
397 | int | |
2d8b9ccb | 398 | nouveau_do_suspend(struct drm_device *dev) |
94580299 | 399 | { |
77145f1c | 400 | struct nouveau_drm *drm = nouveau_drm(dev); |
94580299 BS |
401 | struct nouveau_cli *cli; |
402 | int ret; | |
403 | ||
9430738d BS |
404 | if (dev->mode_config.num_crtc) { |
405 | NV_INFO(drm, "suspending fbcon...\n"); | |
406 | nouveau_fbcon_set_suspend(dev, 1); | |
ebb945a9 | 407 | |
9430738d BS |
408 | NV_INFO(drm, "suspending display...\n"); |
409 | ret = nouveau_display_suspend(dev); | |
410 | if (ret) | |
411 | return ret; | |
412 | } | |
94580299 | 413 | |
ebb945a9 BS |
414 | NV_INFO(drm, "evicting buffers...\n"); |
415 | ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM); | |
416 | ||
417 | if (drm->fence && nouveau_fence(drm)->suspend) { | |
418 | if (!nouveau_fence(drm)->suspend(drm)) | |
419 | return -ENOMEM; | |
420 | } | |
421 | ||
422 | NV_INFO(drm, "suspending client object trees...\n"); | |
94580299 BS |
423 | list_for_each_entry(cli, &drm->clients, head) { |
424 | ret = nouveau_client_fini(&cli->base, true); | |
425 | if (ret) | |
426 | goto fail_client; | |
427 | } | |
428 | ||
429 | ret = nouveau_client_fini(&drm->client.base, true); | |
430 | if (ret) | |
431 | goto fail_client; | |
432 | ||
cb75d97e | 433 | nouveau_agp_fini(drm); |
94580299 BS |
434 | return 0; |
435 | ||
436 | fail_client: | |
437 | list_for_each_entry_continue_reverse(cli, &drm->clients, head) { | |
438 | nouveau_client_init(&cli->base); | |
439 | } | |
440 | ||
9430738d BS |
441 | if (dev->mode_config.num_crtc) { |
442 | NV_INFO(drm, "resuming display...\n"); | |
443 | nouveau_display_resume(dev); | |
444 | } | |
94580299 BS |
445 | return ret; |
446 | } | |
447 | ||
2d8b9ccb | 448 | int nouveau_pmops_suspend(struct device *dev) |
94580299 | 449 | { |
2d8b9ccb DA |
450 | struct pci_dev *pdev = to_pci_dev(dev); |
451 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
94580299 BS |
452 | int ret; |
453 | ||
2d8b9ccb | 454 | if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF) |
94580299 BS |
455 | return 0; |
456 | ||
2d8b9ccb | 457 | ret = nouveau_do_suspend(drm_dev); |
94580299 BS |
458 | if (ret) |
459 | return ret; | |
2d8b9ccb DA |
460 | |
461 | pci_save_state(pdev); | |
462 | pci_disable_device(pdev); | |
463 | pci_set_power_state(pdev, PCI_D3hot); | |
464 | ||
465 | return 0; | |
466 | } | |
467 | ||
468 | int | |
469 | nouveau_do_resume(struct drm_device *dev) | |
470 | { | |
471 | struct nouveau_drm *drm = nouveau_drm(dev); | |
472 | struct nouveau_cli *cli; | |
473 | ||
474 | NV_INFO(drm, "re-enabling device...\n"); | |
94580299 | 475 | |
cb75d97e BS |
476 | nouveau_agp_reset(drm); |
477 | ||
ebb945a9 | 478 | NV_INFO(drm, "resuming client object trees...\n"); |
94580299 | 479 | nouveau_client_init(&drm->client.base); |
ebb945a9 | 480 | nouveau_agp_init(drm); |
94580299 BS |
481 | |
482 | list_for_each_entry(cli, &drm->clients, head) { | |
483 | nouveau_client_init(&cli->base); | |
484 | } | |
cb75d97e | 485 | |
ebb945a9 BS |
486 | if (drm->fence && nouveau_fence(drm)->resume) |
487 | nouveau_fence(drm)->resume(drm); | |
94580299 | 488 | |
77145f1c BS |
489 | nouveau_run_vbios_init(dev); |
490 | nouveau_irq_postinstall(dev); | |
491 | nouveau_pm_resume(dev); | |
492 | ||
9430738d BS |
493 | if (dev->mode_config.num_crtc) { |
494 | NV_INFO(drm, "resuming display...\n"); | |
495 | nouveau_display_resume(dev); | |
496 | } | |
77145f1c | 497 | return 0; |
94580299 BS |
498 | } |
499 | ||
2d8b9ccb DA |
500 | int nouveau_pmops_resume(struct device *dev) |
501 | { | |
502 | struct pci_dev *pdev = to_pci_dev(dev); | |
503 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
504 | int ret; | |
505 | ||
506 | if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF) | |
507 | return 0; | |
508 | ||
509 | pci_set_power_state(pdev, PCI_D0); | |
510 | pci_restore_state(pdev); | |
511 | ret = pci_enable_device(pdev); | |
512 | if (ret) | |
513 | return ret; | |
514 | pci_set_master(pdev); | |
515 | ||
516 | return nouveau_do_resume(drm_dev); | |
517 | } | |
518 | ||
519 | static int nouveau_pmops_freeze(struct device *dev) | |
520 | { | |
521 | struct pci_dev *pdev = to_pci_dev(dev); | |
522 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
523 | ||
524 | return nouveau_do_suspend(drm_dev); | |
525 | } | |
526 | ||
527 | static int nouveau_pmops_thaw(struct device *dev) | |
528 | { | |
529 | struct pci_dev *pdev = to_pci_dev(dev); | |
530 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
531 | ||
532 | return nouveau_do_resume(drm_dev); | |
533 | } | |
534 | ||
535 | ||
5b8a43ae | 536 | static int |
ebb945a9 BS |
537 | nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv) |
538 | { | |
539 | struct pci_dev *pdev = dev->pdev; | |
540 | struct nouveau_drm *drm = nouveau_drm(dev); | |
541 | struct nouveau_cli *cli; | |
fa6df8c1 | 542 | char name[16]; |
ebb945a9 BS |
543 | int ret; |
544 | ||
612a9aab | 545 | snprintf(name, sizeof(name), "%d", pid_nr(fpriv->pid)); |
fa6df8c1 BS |
546 | |
547 | ret = nouveau_cli_create(pdev, name, sizeof(*cli), (void **)&cli); | |
ebb945a9 BS |
548 | if (ret) |
549 | return ret; | |
550 | ||
551 | if (nv_device(drm->device)->card_type >= NV_50) { | |
552 | ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40), | |
553 | 0x1000, &cli->base.vm); | |
554 | if (ret) { | |
555 | nouveau_cli_destroy(cli); | |
556 | return ret; | |
557 | } | |
558 | } | |
559 | ||
560 | fpriv->driver_priv = cli; | |
561 | ||
562 | mutex_lock(&drm->client.mutex); | |
563 | list_add(&cli->head, &drm->clients); | |
564 | mutex_unlock(&drm->client.mutex); | |
565 | return 0; | |
566 | } | |
567 | ||
5b8a43ae | 568 | static void |
ebb945a9 BS |
569 | nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv) |
570 | { | |
571 | struct nouveau_cli *cli = nouveau_cli(fpriv); | |
572 | struct nouveau_drm *drm = nouveau_drm(dev); | |
573 | ||
574 | if (cli->abi16) | |
575 | nouveau_abi16_fini(cli->abi16); | |
576 | ||
577 | mutex_lock(&drm->client.mutex); | |
578 | list_del(&cli->head); | |
579 | mutex_unlock(&drm->client.mutex); | |
580 | } | |
581 | ||
5b8a43ae | 582 | static void |
ebb945a9 BS |
583 | nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv) |
584 | { | |
585 | struct nouveau_cli *cli = nouveau_cli(fpriv); | |
586 | nouveau_cli_destroy(cli); | |
587 | } | |
588 | ||
77145f1c BS |
589 | static struct drm_ioctl_desc |
590 | nouveau_ioctls[] = { | |
591 | DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH), | |
592 | DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | |
593 | DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH), | |
594 | DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH), | |
595 | DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH), | |
596 | DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH), | |
597 | DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH), | |
598 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH), | |
599 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH), | |
600 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH), | |
601 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH), | |
602 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH), | |
603 | }; | |
604 | ||
605 | static const struct file_operations | |
606 | nouveau_driver_fops = { | |
607 | .owner = THIS_MODULE, | |
608 | .open = drm_open, | |
609 | .release = drm_release, | |
610 | .unlocked_ioctl = drm_ioctl, | |
611 | .mmap = nouveau_ttm_mmap, | |
612 | .poll = drm_poll, | |
613 | .fasync = drm_fasync, | |
614 | .read = drm_read, | |
615 | #if defined(CONFIG_COMPAT) | |
616 | .compat_ioctl = nouveau_compat_ioctl, | |
617 | #endif | |
618 | .llseek = noop_llseek, | |
619 | }; | |
620 | ||
621 | static struct drm_driver | |
622 | driver = { | |
623 | .driver_features = | |
624 | DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG | | |
625 | DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM | | |
626 | DRIVER_MODESET | DRIVER_PRIME, | |
627 | ||
628 | .load = nouveau_drm_load, | |
629 | .unload = nouveau_drm_unload, | |
630 | .open = nouveau_drm_open, | |
631 | .preclose = nouveau_drm_preclose, | |
632 | .postclose = nouveau_drm_postclose, | |
633 | .lastclose = nouveau_vga_lastclose, | |
634 | ||
635 | .irq_preinstall = nouveau_irq_preinstall, | |
636 | .irq_postinstall = nouveau_irq_postinstall, | |
637 | .irq_uninstall = nouveau_irq_uninstall, | |
638 | .irq_handler = nouveau_irq_handler, | |
639 | ||
640 | .get_vblank_counter = drm_vblank_count, | |
641 | .enable_vblank = nouveau_vblank_enable, | |
642 | .disable_vblank = nouveau_vblank_disable, | |
643 | ||
644 | .ioctls = nouveau_ioctls, | |
645 | .fops = &nouveau_driver_fops, | |
646 | ||
647 | .prime_handle_to_fd = drm_gem_prime_handle_to_fd, | |
648 | .prime_fd_to_handle = drm_gem_prime_fd_to_handle, | |
649 | .gem_prime_export = nouveau_gem_prime_export, | |
650 | .gem_prime_import = nouveau_gem_prime_import, | |
651 | ||
652 | .gem_init_object = nouveau_gem_object_new, | |
653 | .gem_free_object = nouveau_gem_object_del, | |
654 | .gem_open_object = nouveau_gem_object_open, | |
655 | .gem_close_object = nouveau_gem_object_close, | |
656 | ||
657 | .dumb_create = nouveau_display_dumb_create, | |
658 | .dumb_map_offset = nouveau_display_dumb_map_offset, | |
659 | .dumb_destroy = nouveau_display_dumb_destroy, | |
660 | ||
661 | .name = DRIVER_NAME, | |
662 | .desc = DRIVER_DESC, | |
663 | #ifdef GIT_REVISION | |
664 | .date = GIT_REVISION, | |
665 | #else | |
666 | .date = DRIVER_DATE, | |
667 | #endif | |
668 | .major = DRIVER_MAJOR, | |
669 | .minor = DRIVER_MINOR, | |
670 | .patchlevel = DRIVER_PATCHLEVEL, | |
671 | }; | |
672 | ||
94580299 BS |
673 | static struct pci_device_id |
674 | nouveau_drm_pci_table[] = { | |
675 | { | |
676 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID), | |
677 | .class = PCI_BASE_CLASS_DISPLAY << 16, | |
678 | .class_mask = 0xff << 16, | |
679 | }, | |
680 | { | |
681 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID), | |
682 | .class = PCI_BASE_CLASS_DISPLAY << 16, | |
683 | .class_mask = 0xff << 16, | |
684 | }, | |
685 | {} | |
686 | }; | |
687 | ||
2d8b9ccb DA |
688 | static const struct dev_pm_ops nouveau_pm_ops = { |
689 | .suspend = nouveau_pmops_suspend, | |
690 | .resume = nouveau_pmops_resume, | |
691 | .freeze = nouveau_pmops_freeze, | |
692 | .thaw = nouveau_pmops_thaw, | |
693 | .poweroff = nouveau_pmops_freeze, | |
694 | .restore = nouveau_pmops_resume, | |
695 | }; | |
696 | ||
94580299 BS |
697 | static struct pci_driver |
698 | nouveau_drm_pci_driver = { | |
699 | .name = "nouveau", | |
700 | .id_table = nouveau_drm_pci_table, | |
701 | .probe = nouveau_drm_probe, | |
702 | .remove = nouveau_drm_remove, | |
2d8b9ccb | 703 | .driver.pm = &nouveau_pm_ops, |
94580299 BS |
704 | }; |
705 | ||
706 | static int __init | |
707 | nouveau_drm_init(void) | |
708 | { | |
77145f1c BS |
709 | driver.num_ioctls = ARRAY_SIZE(nouveau_ioctls); |
710 | ||
711 | if (nouveau_modeset == -1) { | |
712 | #ifdef CONFIG_VGA_CONSOLE | |
713 | if (vgacon_text_force()) | |
714 | nouveau_modeset = 0; | |
77145f1c | 715 | #endif |
77145f1c BS |
716 | } |
717 | ||
718 | if (!nouveau_modeset) | |
719 | return 0; | |
720 | ||
721 | nouveau_register_dsm_handler(); | |
722 | return drm_pci_init(&driver, &nouveau_drm_pci_driver); | |
94580299 BS |
723 | } |
724 | ||
725 | static void __exit | |
726 | nouveau_drm_exit(void) | |
727 | { | |
77145f1c BS |
728 | if (!nouveau_modeset) |
729 | return; | |
730 | ||
731 | drm_pci_exit(&driver, &nouveau_drm_pci_driver); | |
732 | nouveau_unregister_dsm_handler(); | |
94580299 BS |
733 | } |
734 | ||
735 | module_init(nouveau_drm_init); | |
736 | module_exit(nouveau_drm_exit); | |
737 | ||
738 | MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table); | |
77145f1c BS |
739 | MODULE_AUTHOR(DRIVER_AUTHOR); |
740 | MODULE_DESCRIPTION(DRIVER_DESC); | |
94580299 | 741 | MODULE_LICENSE("GPL and additional rights"); |