]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blame - drivers/gpu/drm/nouveau/nouveau_drm.c
Merge tag 'drm-intel-next-fixes-2014-12-04' of git://anongit.freedesktop.org/drm...
[mirror_ubuntu-bionic-kernel.git] / drivers / gpu / drm / nouveau / nouveau_drm.c
CommitLineData
94580299
BS
1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
77145f1c 25#include <linux/console.h>
94580299
BS
26#include <linux/module.h>
27#include <linux/pci.h>
5addcf0a
DA
28#include <linux/pm_runtime.h>
29#include <linux/vga_switcheroo.h>
fdb751ef 30
5addcf0a
DA
31#include "drmP.h"
32#include "drm_crtc_helper.h"
fdb751ef 33
94580299 34#include <core/device.h>
ebb945a9 35#include <core/gpuobj.h>
c33e05a1 36#include <core/option.h>
94580299 37
94580299 38#include "nouveau_drm.h"
ebb945a9 39#include "nouveau_dma.h"
77145f1c
BS
40#include "nouveau_ttm.h"
41#include "nouveau_gem.h"
cb75d97e 42#include "nouveau_agp.h"
77145f1c 43#include "nouveau_vga.h"
26fdd78c 44#include "nouveau_sysfs.h"
b9ed919f 45#include "nouveau_hwmon.h"
77145f1c
BS
46#include "nouveau_acpi.h"
47#include "nouveau_bios.h"
48#include "nouveau_ioctl.h"
ebb945a9
BS
49#include "nouveau_abi16.h"
50#include "nouveau_fbcon.h"
51#include "nouveau_fence.h"
33b903e8 52#include "nouveau_debugfs.h"
27111a23 53#include "nouveau_usif.h"
703fa264 54#include "nouveau_connector.h"
ebb945a9 55
94580299
BS
56MODULE_PARM_DESC(config, "option string to pass to driver core");
57static char *nouveau_config;
58module_param_named(config, nouveau_config, charp, 0400);
59
60MODULE_PARM_DESC(debug, "debug string to pass to driver core");
61static char *nouveau_debug;
62module_param_named(debug, nouveau_debug, charp, 0400);
63
ebb945a9
BS
64MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
65static int nouveau_noaccel = 0;
66module_param_named(noaccel, nouveau_noaccel, int, 0400);
67
9430738d
BS
68MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
69 "0 = disabled, 1 = enabled, 2 = headless)");
70int nouveau_modeset = -1;
77145f1c
BS
71module_param_named(modeset, nouveau_modeset, int, 0400);
72
5addcf0a
DA
73MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
74int nouveau_runtime_pm = -1;
75module_param_named(runpm, nouveau_runtime_pm, int, 0400);
76
915b4d11
DH
77static struct drm_driver driver_stub;
78static struct drm_driver driver_pci;
79static struct drm_driver driver_platform;
77145f1c 80
94580299 81static u64
420b9469 82nouveau_pci_name(struct pci_dev *pdev)
94580299
BS
83{
84 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
85 name |= pdev->bus->number << 16;
86 name |= PCI_SLOT(pdev->devfn) << 8;
87 return name | PCI_FUNC(pdev->devfn);
88}
89
420b9469
AC
90static u64
91nouveau_platform_name(struct platform_device *platformdev)
92{
93 return platformdev->id;
94}
95
96static u64
97nouveau_name(struct drm_device *dev)
98{
99 if (dev->pdev)
100 return nouveau_pci_name(dev->pdev);
101 else
102 return nouveau_platform_name(dev->platformdev);
103}
104
94580299 105static int
420b9469 106nouveau_cli_create(u64 name, const char *sname,
fa6df8c1 107 int size, void **pcli)
94580299 108{
0ad72863
BS
109 struct nouveau_cli *cli = *pcli = kzalloc(size, GFP_KERNEL);
110 if (cli) {
111 int ret = nvif_client_init(NULL, NULL, sname, name,
112 nouveau_config, nouveau_debug,
113 &cli->base);
27111a23 114 if (ret == 0) {
0ad72863 115 mutex_init(&cli->mutex);
27111a23
BS
116 usif_client_init(cli);
117 }
94580299 118 return ret;
dd5700ea 119 }
0ad72863 120 return -ENOMEM;
94580299
BS
121}
122
123static void
124nouveau_cli_destroy(struct nouveau_cli *cli)
125{
0ad72863
BS
126 nouveau_vm_ref(NULL, &nvkm_client(&cli->base)->vm, NULL);
127 nvif_client_fini(&cli->base);
27111a23 128 usif_client_fini(cli);
94580299
BS
129}
130
ebb945a9
BS
131static void
132nouveau_accel_fini(struct nouveau_drm *drm)
133{
ebb945a9 134 nouveau_channel_del(&drm->channel);
0ad72863
BS
135 nvif_object_fini(&drm->ntfy);
136 nouveau_gpuobj_ref(NULL, &drm->notify);
137 nvif_object_fini(&drm->nvsw);
49981046 138 nouveau_channel_del(&drm->cechan);
0ad72863 139 nvif_object_fini(&drm->ttm.copy);
ebb945a9
BS
140 if (drm->fence)
141 nouveau_fence(drm)->dtor(drm);
142}
143
144static void
145nouveau_accel_init(struct nouveau_drm *drm)
146{
967e7bde 147 struct nvif_device *device = &drm->device;
49981046 148 u32 arg0, arg1;
967e7bde
BS
149 u32 sclass[16];
150 int ret, i;
ebb945a9 151
967e7bde 152 if (nouveau_noaccel)
ebb945a9
BS
153 return;
154
155 /* initialise synchronisation routines */
967e7bde
BS
156 /*XXX: this is crap, but the fence/channel stuff is a little
157 * backwards in some places. this will be fixed.
158 */
0ad72863 159 ret = nvif_object_sclass(&device->base, sclass, ARRAY_SIZE(sclass));
967e7bde
BS
160 if (ret < 0)
161 return;
162
163 for (ret = -ENOSYS, i = 0; ret && i < ARRAY_SIZE(sclass); i++) {
164 switch (sclass[i]) {
bbf8906b 165 case NV03_CHANNEL_DMA:
967e7bde
BS
166 ret = nv04_fence_create(drm);
167 break;
bbf8906b 168 case NV10_CHANNEL_DMA:
967e7bde
BS
169 ret = nv10_fence_create(drm);
170 break;
bbf8906b
BS
171 case NV17_CHANNEL_DMA:
172 case NV40_CHANNEL_DMA:
967e7bde
BS
173 ret = nv17_fence_create(drm);
174 break;
bbf8906b 175 case NV50_CHANNEL_GPFIFO:
967e7bde
BS
176 ret = nv50_fence_create(drm);
177 break;
bbf8906b 178 case G82_CHANNEL_GPFIFO:
967e7bde
BS
179 ret = nv84_fence_create(drm);
180 break;
bbf8906b
BS
181 case FERMI_CHANNEL_GPFIFO:
182 case KEPLER_CHANNEL_GPFIFO_A:
967e7bde
BS
183 ret = nvc0_fence_create(drm);
184 break;
185 default:
186 break;
187 }
188 }
189
ebb945a9
BS
190 if (ret) {
191 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
192 nouveau_accel_fini(drm);
193 return;
194 }
195
967e7bde 196 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
0ad72863 197 ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN + 1,
bbf8906b
BS
198 KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE0|
199 KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE1,
200 0, &drm->cechan);
49981046
BS
201 if (ret)
202 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
203
bbf8906b 204 arg0 = KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_GR;
49469800 205 arg1 = 1;
00fc6f6f 206 } else
967e7bde
BS
207 if (device->info.chipset >= 0xa3 &&
208 device->info.chipset != 0xaa &&
209 device->info.chipset != 0xac) {
0ad72863
BS
210 ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN + 1,
211 NvDmaFB, NvDmaTT, &drm->cechan);
00fc6f6f
BS
212 if (ret)
213 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
214
215 arg0 = NvDmaFB;
216 arg1 = NvDmaTT;
49981046
BS
217 } else {
218 arg0 = NvDmaFB;
219 arg1 = NvDmaTT;
220 }
221
0ad72863
BS
222 ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN, arg0, arg1,
223 &drm->channel);
ebb945a9
BS
224 if (ret) {
225 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
226 nouveau_accel_fini(drm);
227 return;
228 }
229
0ad72863
BS
230 ret = nvif_object_init(drm->channel->object, NULL, NVDRM_NVSW,
231 nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw);
69a6146d 232 if (ret == 0) {
0ad72863 233 struct nouveau_software_chan *swch;
69a6146d
BS
234 ret = RING_SPACE(drm->channel, 2);
235 if (ret == 0) {
967e7bde 236 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
69a6146d
BS
237 BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
238 OUT_RING (drm->channel, NVDRM_NVSW);
239 } else
967e7bde 240 if (device->info.family < NV_DEVICE_INFO_V0_KEPLER) {
69a6146d
BS
241 BEGIN_NVC0(drm->channel, FermiSw, 0, 1);
242 OUT_RING (drm->channel, 0x001f0000);
243 }
244 }
0ad72863 245 swch = (void *)nvkm_object(&drm->nvsw)->parent;
69a6146d
BS
246 swch->flip = nouveau_flip_complete;
247 swch->flip_data = drm->channel;
248 }
249
250 if (ret) {
251 NV_ERROR(drm, "failed to allocate software object, %d\n", ret);
252 nouveau_accel_fini(drm);
253 return;
254 }
255
967e7bde
BS
256 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
257 ret = nouveau_gpuobj_new(nvkm_object(&drm->device), NULL, 32,
258 0, 0, &drm->notify);
ebb945a9
BS
259 if (ret) {
260 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
261 nouveau_accel_fini(drm);
262 return;
263 }
264
0ad72863 265 ret = nvif_object_init(drm->channel->object, NULL, NvNotify0,
4acfd707
BS
266 NV_DMA_IN_MEMORY,
267 &(struct nv_dma_v0) {
268 .target = NV_DMA_V0_TARGET_VRAM,
269 .access = NV_DMA_V0_ACCESS_RDWR,
ebb945a9
BS
270 .start = drm->notify->addr,
271 .limit = drm->notify->addr + 31
4acfd707 272 }, sizeof(struct nv_dma_v0),
0ad72863 273 &drm->ntfy);
ebb945a9
BS
274 if (ret) {
275 nouveau_accel_fini(drm);
276 return;
277 }
278 }
279
280
49981046 281 nouveau_bo_move_init(drm);
ebb945a9
BS
282}
283
56550d94
GKH
284static int nouveau_drm_probe(struct pci_dev *pdev,
285 const struct pci_device_id *pent)
94580299
BS
286{
287 struct nouveau_device *device;
ebb945a9
BS
288 struct apertures_struct *aper;
289 bool boot = false;
94580299
BS
290 int ret;
291
ebb945a9
BS
292 /* remove conflicting drivers (vesafb, efifb etc) */
293 aper = alloc_apertures(3);
294 if (!aper)
295 return -ENOMEM;
296
297 aper->ranges[0].base = pci_resource_start(pdev, 1);
298 aper->ranges[0].size = pci_resource_len(pdev, 1);
299 aper->count = 1;
300
301 if (pci_resource_len(pdev, 2)) {
302 aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
303 aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
304 aper->count++;
305 }
306
307 if (pci_resource_len(pdev, 3)) {
308 aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
309 aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
310 aper->count++;
311 }
312
313#ifdef CONFIG_X86
314 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
315#endif
771fa0e4
BS
316 if (nouveau_modeset != 2)
317 remove_conflicting_framebuffers(aper, "nouveaufb", boot);
83ef7777 318 kfree(aper);
ebb945a9 319
420b9469
AC
320 ret = nouveau_device_create(pdev, NOUVEAU_BUS_PCI,
321 nouveau_pci_name(pdev), pci_name(pdev),
94580299
BS
322 nouveau_config, nouveau_debug, &device);
323 if (ret)
324 return ret;
325
326 pci_set_master(pdev);
327
915b4d11 328 ret = drm_get_pci_dev(pdev, pent, &driver_pci);
94580299 329 if (ret) {
ebb945a9 330 nouveau_object_ref(NULL, (struct nouveau_object **)&device);
94580299
BS
331 return ret;
332 }
333
334 return 0;
335}
336
5addcf0a
DA
337#define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
338
339static void
46941b0f 340nouveau_get_hdmi_dev(struct nouveau_drm *drm)
5addcf0a 341{
46941b0f 342 struct pci_dev *pdev = drm->dev->pdev;
5addcf0a 343
420b9469 344 if (!pdev) {
40189b0c 345 DRM_INFO("not a PCI device; no HDMI\n");
420b9469
AC
346 drm->hdmi_device = NULL;
347 return;
348 }
349
5addcf0a
DA
350 /* subfunction one is a hdmi audio device? */
351 drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number,
352 PCI_DEVFN(PCI_SLOT(pdev->devfn), 1));
353
354 if (!drm->hdmi_device) {
46941b0f 355 NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1);
5addcf0a
DA
356 return;
357 }
358
359 if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) {
46941b0f 360 NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class);
5addcf0a
DA
361 pci_dev_put(drm->hdmi_device);
362 drm->hdmi_device = NULL;
363 return;
364 }
365}
366
5b8a43ae 367static int
94580299
BS
368nouveau_drm_load(struct drm_device *dev, unsigned long flags)
369{
370 struct pci_dev *pdev = dev->pdev;
371 struct nouveau_drm *drm;
372 int ret;
373
420b9469
AC
374 ret = nouveau_cli_create(nouveau_name(dev), "DRM", sizeof(*drm),
375 (void **)&drm);
94580299
BS
376 if (ret)
377 return ret;
378
77145f1c
BS
379 dev->dev_private = drm;
380 drm->dev = dev;
0ad72863
BS
381 nvkm_client(&drm->client.base)->debug =
382 nouveau_dbgopt(nouveau_debug, "DRM");
77145f1c 383
94580299 384 INIT_LIST_HEAD(&drm->clients);
ebb945a9 385 spin_lock_init(&drm->tile.lock);
94580299 386
46941b0f 387 nouveau_get_hdmi_dev(drm);
5addcf0a 388
cb75d97e
BS
389 /* make sure AGP controller is in a consistent state before we
390 * (possibly) execute vbios init tables (see nouveau_agp.h)
391 */
420b9469 392 if (pdev && drm_pci_device_is_agp(dev) && dev->agp) {
586491e6
BS
393 const u64 enables = NV_DEVICE_V0_DISABLE_IDENTIFY |
394 NV_DEVICE_V0_DISABLE_MMIO;
cb75d97e
BS
395 /* dummy device object, doesn't init anything, but allows
396 * agp code access to registers
397 */
0ad72863 398 ret = nvif_device_init(&drm->client.base.base, NULL,
586491e6
BS
399 NVDRM_DEVICE, NV_DEVICE,
400 &(struct nv_device_v0) {
cb75d97e 401 .device = ~0,
586491e6 402 .disable = ~enables,
cb75d97e 403 .debug0 = ~0,
586491e6 404 }, sizeof(struct nv_device_v0),
0ad72863 405 &drm->device);
cb75d97e 406 if (ret)
ebb945a9 407 goto fail_device;
cb75d97e
BS
408
409 nouveau_agp_reset(drm);
0ad72863 410 nvif_device_fini(&drm->device);
cb75d97e
BS
411 }
412
0ad72863 413 ret = nvif_device_init(&drm->client.base.base, NULL, NVDRM_DEVICE,
586491e6
BS
414 NV_DEVICE,
415 &(struct nv_device_v0) {
94580299
BS
416 .device = ~0,
417 .disable = 0,
418 .debug0 = 0,
586491e6 419 }, sizeof(struct nv_device_v0),
0ad72863 420 &drm->device);
94580299
BS
421 if (ret)
422 goto fail_device;
423
7d3428cd
IM
424 dev->irq_enabled = true;
425
77145f1c
BS
426 /* workaround an odd issue on nvc1 by disabling the device's
427 * nosnoop capability. hopefully won't cause issues until a
428 * better fix is found - assuming there is one...
429 */
967e7bde
BS
430 if (drm->device.info.chipset == 0xc1)
431 nvif_mask(&drm->device, 0x00088080, 0x00000800, 0x00000000);
ebb945a9 432
77145f1c 433 nouveau_vga_init(drm);
cb75d97e
BS
434 nouveau_agp_init(drm);
435
967e7bde
BS
436 if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
437 ret = nouveau_vm_new(nvkm_device(&drm->device), 0, (1ULL << 40),
3ee6f5b5 438 0x1000, &drm->client.vm);
ebb945a9
BS
439 if (ret)
440 goto fail_device;
3ee6f5b5 441
0ad72863 442 nvkm_client(&drm->client.base)->vm = drm->client.vm;
ebb945a9
BS
443 }
444
445 ret = nouveau_ttm_init(drm);
94580299 446 if (ret)
77145f1c
BS
447 goto fail_ttm;
448
449 ret = nouveau_bios_init(dev);
450 if (ret)
451 goto fail_bios;
452
77145f1c 453 ret = nouveau_display_create(dev);
ebb945a9 454 if (ret)
77145f1c
BS
455 goto fail_dispctor;
456
457 if (dev->mode_config.num_crtc) {
458 ret = nouveau_display_init(dev);
459 if (ret)
460 goto fail_dispinit;
461 }
462
26fdd78c 463 nouveau_sysfs_init(dev);
b9ed919f 464 nouveau_hwmon_init(dev);
ebb945a9
BS
465 nouveau_accel_init(drm);
466 nouveau_fbcon_init(dev);
5addcf0a
DA
467
468 if (nouveau_runtime_pm != 0) {
469 pm_runtime_use_autosuspend(dev->dev);
470 pm_runtime_set_autosuspend_delay(dev->dev, 5000);
471 pm_runtime_set_active(dev->dev);
472 pm_runtime_allow(dev->dev);
473 pm_runtime_mark_last_busy(dev->dev);
474 pm_runtime_put(dev->dev);
475 }
94580299
BS
476 return 0;
477
77145f1c
BS
478fail_dispinit:
479 nouveau_display_destroy(dev);
480fail_dispctor:
77145f1c
BS
481 nouveau_bios_takedown(dev);
482fail_bios:
ebb945a9 483 nouveau_ttm_fini(drm);
77145f1c
BS
484fail_ttm:
485 nouveau_agp_fini(drm);
486 nouveau_vga_fini(drm);
94580299 487fail_device:
0ad72863 488 nvif_device_fini(&drm->device);
94580299
BS
489 nouveau_cli_destroy(&drm->client);
490 return ret;
491}
492
5b8a43ae 493static int
94580299
BS
494nouveau_drm_unload(struct drm_device *dev)
495{
77145f1c 496 struct nouveau_drm *drm = nouveau_drm(dev);
94580299 497
5addcf0a 498 pm_runtime_get_sync(dev->dev);
ebb945a9
BS
499 nouveau_fbcon_fini(dev);
500 nouveau_accel_fini(drm);
b9ed919f 501 nouveau_hwmon_fini(dev);
26fdd78c 502 nouveau_sysfs_fini(dev);
77145f1c 503
9430738d
BS
504 if (dev->mode_config.num_crtc)
505 nouveau_display_fini(dev);
77145f1c
BS
506 nouveau_display_destroy(dev);
507
77145f1c 508 nouveau_bios_takedown(dev);
94580299 509
ebb945a9 510 nouveau_ttm_fini(drm);
cb75d97e 511 nouveau_agp_fini(drm);
77145f1c 512 nouveau_vga_fini(drm);
cb75d97e 513
0ad72863 514 nvif_device_fini(&drm->device);
5addcf0a
DA
515 if (drm->hdmi_device)
516 pci_dev_put(drm->hdmi_device);
94580299
BS
517 nouveau_cli_destroy(&drm->client);
518 return 0;
519}
520
8ba9ff11
AC
521void
522nouveau_drm_device_remove(struct drm_device *dev)
94580299 523{
77145f1c 524 struct nouveau_drm *drm = nouveau_drm(dev);
0ad72863 525 struct nouveau_client *client;
ebb945a9 526 struct nouveau_object *device;
77145f1c 527
7d3428cd 528 dev->irq_enabled = false;
0ad72863
BS
529 client = nvkm_client(&drm->client.base);
530 device = client->device;
77145f1c
BS
531 drm_put_dev(dev);
532
ebb945a9
BS
533 nouveau_object_ref(NULL, &device);
534 nouveau_object_debug();
94580299 535}
8ba9ff11
AC
536EXPORT_SYMBOL(nouveau_drm_device_remove);
537
538static void
539nouveau_drm_remove(struct pci_dev *pdev)
540{
541 struct drm_device *dev = pci_get_drvdata(pdev);
542
543 nouveau_drm_device_remove(dev);
544}
94580299 545
cd897837 546static int
05c63c2f 547nouveau_do_suspend(struct drm_device *dev, bool runtime)
94580299 548{
77145f1c 549 struct nouveau_drm *drm = nouveau_drm(dev);
94580299
BS
550 struct nouveau_cli *cli;
551 int ret;
552
6fbb702e
BS
553 if (dev->mode_config.num_crtc) {
554 NV_INFO(drm, "suspending console...\n");
555 nouveau_fbcon_set_suspend(dev, 1);
c52f4fa6 556 NV_INFO(drm, "suspending display...\n");
6fbb702e 557 ret = nouveau_display_suspend(dev, runtime);
9430738d
BS
558 if (ret)
559 return ret;
560 }
94580299 561
c52f4fa6 562 NV_INFO(drm, "evicting buffers...\n");
ebb945a9
BS
563 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
564
c52f4fa6 565 NV_INFO(drm, "waiting for kernel channels to go idle...\n");
81dff21b
BS
566 if (drm->cechan) {
567 ret = nouveau_channel_idle(drm->cechan);
568 if (ret)
f3980dc5 569 goto fail_display;
81dff21b
BS
570 }
571
572 if (drm->channel) {
573 ret = nouveau_channel_idle(drm->channel);
574 if (ret)
f3980dc5 575 goto fail_display;
81dff21b
BS
576 }
577
c52f4fa6 578 NV_INFO(drm, "suspending client object trees...\n");
ebb945a9 579 if (drm->fence && nouveau_fence(drm)->suspend) {
f3980dc5
IM
580 if (!nouveau_fence(drm)->suspend(drm)) {
581 ret = -ENOMEM;
582 goto fail_display;
583 }
ebb945a9
BS
584 }
585
94580299 586 list_for_each_entry(cli, &drm->clients, head) {
0ad72863 587 ret = nvif_client_suspend(&cli->base);
94580299
BS
588 if (ret)
589 goto fail_client;
590 }
591
c52f4fa6 592 NV_INFO(drm, "suspending kernel object tree...\n");
0ad72863 593 ret = nvif_client_suspend(&drm->client.base);
94580299
BS
594 if (ret)
595 goto fail_client;
596
cb75d97e 597 nouveau_agp_fini(drm);
94580299
BS
598 return 0;
599
600fail_client:
601 list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
0ad72863 602 nvif_client_resume(&cli->base);
94580299
BS
603 }
604
f3980dc5
IM
605 if (drm->fence && nouveau_fence(drm)->resume)
606 nouveau_fence(drm)->resume(drm);
607
608fail_display:
9430738d 609 if (dev->mode_config.num_crtc) {
c52f4fa6 610 NV_INFO(drm, "resuming display...\n");
6fbb702e 611 nouveau_display_resume(dev, runtime);
9430738d 612 }
94580299
BS
613 return ret;
614}
615
cd897837 616static int
6fbb702e 617nouveau_do_resume(struct drm_device *dev, bool runtime)
2d8b9ccb
DA
618{
619 struct nouveau_drm *drm = nouveau_drm(dev);
620 struct nouveau_cli *cli;
621
c52f4fa6 622 NV_INFO(drm, "re-enabling device...\n");
94580299 623
cb75d97e
BS
624 nouveau_agp_reset(drm);
625
c52f4fa6 626 NV_INFO(drm, "resuming kernel object tree...\n");
0ad72863 627 nvif_client_resume(&drm->client.base);
ebb945a9 628 nouveau_agp_init(drm);
94580299 629
c52f4fa6 630 NV_INFO(drm, "resuming client object trees...\n");
81dff21b
BS
631 if (drm->fence && nouveau_fence(drm)->resume)
632 nouveau_fence(drm)->resume(drm);
633
94580299 634 list_for_each_entry(cli, &drm->clients, head) {
0ad72863 635 nvif_client_resume(&cli->base);
94580299 636 }
cb75d97e 637
77145f1c 638 nouveau_run_vbios_init(dev);
77145f1c 639
9430738d 640 if (dev->mode_config.num_crtc) {
c52f4fa6 641 NV_INFO(drm, "resuming display...\n");
6fbb702e
BS
642 nouveau_display_resume(dev, runtime);
643 NV_INFO(drm, "resuming console...\n");
644 nouveau_fbcon_set_suspend(dev, 0);
9430738d 645 }
5addcf0a 646
77145f1c 647 return 0;
94580299
BS
648}
649
7bb6d442
BS
650int
651nouveau_pmops_suspend(struct device *dev)
652{
653 struct pci_dev *pdev = to_pci_dev(dev);
654 struct drm_device *drm_dev = pci_get_drvdata(pdev);
655 int ret;
656
657 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
658 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
659 return 0;
660
661 ret = nouveau_do_suspend(drm_dev, false);
662 if (ret)
663 return ret;
664
665 pci_save_state(pdev);
666 pci_disable_device(pdev);
667 pci_ignore_hotplug(pdev);
668 pci_set_power_state(pdev, PCI_D3hot);
669 return 0;
670}
671
672int
673nouveau_pmops_resume(struct device *dev)
2d8b9ccb
DA
674{
675 struct pci_dev *pdev = to_pci_dev(dev);
676 struct drm_device *drm_dev = pci_get_drvdata(pdev);
677 int ret;
678
5addcf0a
DA
679 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
680 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
2d8b9ccb
DA
681 return 0;
682
683 pci_set_power_state(pdev, PCI_D0);
684 pci_restore_state(pdev);
685 ret = pci_enable_device(pdev);
686 if (ret)
687 return ret;
688 pci_set_master(pdev);
689
6fbb702e 690 return nouveau_do_resume(drm_dev, false);
2d8b9ccb
DA
691}
692
7bb6d442
BS
693static int
694nouveau_pmops_freeze(struct device *dev)
2d8b9ccb
DA
695{
696 struct pci_dev *pdev = to_pci_dev(dev);
697 struct drm_device *drm_dev = pci_get_drvdata(pdev);
6fbb702e 698 return nouveau_do_suspend(drm_dev, false);
2d8b9ccb
DA
699}
700
7bb6d442
BS
701static int
702nouveau_pmops_thaw(struct device *dev)
2d8b9ccb
DA
703{
704 struct pci_dev *pdev = to_pci_dev(dev);
705 struct drm_device *drm_dev = pci_get_drvdata(pdev);
6fbb702e 706 return nouveau_do_resume(drm_dev, false);
2d8b9ccb
DA
707}
708
7bb6d442
BS
709static int
710nouveau_pmops_runtime_suspend(struct device *dev)
711{
712 struct pci_dev *pdev = to_pci_dev(dev);
713 struct drm_device *drm_dev = pci_get_drvdata(pdev);
714 int ret;
715
716 if (nouveau_runtime_pm == 0) {
717 pm_runtime_forbid(dev);
718 return -EBUSY;
719 }
720
721 /* are we optimus enabled? */
722 if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
723 DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
724 pm_runtime_forbid(dev);
725 return -EBUSY;
726 }
727
728 nv_debug_level(SILENT);
729 drm_kms_helper_poll_disable(drm_dev);
730 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
731 nouveau_switcheroo_optimus_dsm();
732 ret = nouveau_do_suspend(drm_dev, true);
733 pci_save_state(pdev);
734 pci_disable_device(pdev);
735 pci_set_power_state(pdev, PCI_D3cold);
736 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
737 return ret;
738}
739
740static int
741nouveau_pmops_runtime_resume(struct device *dev)
742{
743 struct pci_dev *pdev = to_pci_dev(dev);
744 struct drm_device *drm_dev = pci_get_drvdata(pdev);
745 struct nvif_device *device = &nouveau_drm(drm_dev)->device;
746 int ret;
747
748 if (nouveau_runtime_pm == 0)
749 return -EINVAL;
750
751 pci_set_power_state(pdev, PCI_D0);
752 pci_restore_state(pdev);
753 ret = pci_enable_device(pdev);
754 if (ret)
755 return ret;
756 pci_set_master(pdev);
757
758 ret = nouveau_do_resume(drm_dev, true);
759 drm_kms_helper_poll_enable(drm_dev);
760 /* do magic */
761 nvif_mask(device, 0x88488, (1 << 25), (1 << 25));
762 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
763 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
764 nv_debug_level(NORMAL);
765 return ret;
766}
767
768static int
769nouveau_pmops_runtime_idle(struct device *dev)
770{
771 struct pci_dev *pdev = to_pci_dev(dev);
772 struct drm_device *drm_dev = pci_get_drvdata(pdev);
773 struct nouveau_drm *drm = nouveau_drm(drm_dev);
774 struct drm_crtc *crtc;
775
776 if (nouveau_runtime_pm == 0) {
777 pm_runtime_forbid(dev);
778 return -EBUSY;
779 }
780
781 /* are we optimus enabled? */
782 if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
783 DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
784 pm_runtime_forbid(dev);
785 return -EBUSY;
786 }
787
788 /* if we have a hdmi audio device - make sure it has a driver loaded */
789 if (drm->hdmi_device) {
790 if (!drm->hdmi_device->driver) {
791 DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n");
792 pm_runtime_mark_last_busy(dev);
793 return -EBUSY;
794 }
795 }
796
797 list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) {
798 if (crtc->enabled) {
799 DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
800 return -EBUSY;
801 }
802 }
803 pm_runtime_mark_last_busy(dev);
804 pm_runtime_autosuspend(dev);
805 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
806 return 1;
807}
2d8b9ccb 808
5b8a43ae 809static int
ebb945a9
BS
810nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
811{
ebb945a9
BS
812 struct nouveau_drm *drm = nouveau_drm(dev);
813 struct nouveau_cli *cli;
a2896ced 814 char name[32], tmpname[TASK_COMM_LEN];
ebb945a9
BS
815 int ret;
816
5addcf0a
DA
817 /* need to bring up power immediately if opening device */
818 ret = pm_runtime_get_sync(dev->dev);
b6c4285a 819 if (ret < 0 && ret != -EACCES)
5addcf0a
DA
820 return ret;
821
a2896ced
MS
822 get_task_comm(tmpname, current);
823 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
fa6df8c1 824
420b9469
AC
825 ret = nouveau_cli_create(nouveau_name(dev), name, sizeof(*cli),
826 (void **)&cli);
827
ebb945a9 828 if (ret)
5addcf0a 829 goto out_suspend;
ebb945a9 830
0ad72863
BS
831 cli->base.super = false;
832
967e7bde
BS
833 if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
834 ret = nouveau_vm_new(nvkm_device(&drm->device), 0, (1ULL << 40),
3ee6f5b5 835 0x1000, &cli->vm);
ebb945a9
BS
836 if (ret) {
837 nouveau_cli_destroy(cli);
5addcf0a 838 goto out_suspend;
ebb945a9 839 }
3ee6f5b5 840
0ad72863 841 nvkm_client(&cli->base)->vm = cli->vm;
ebb945a9
BS
842 }
843
844 fpriv->driver_priv = cli;
845
846 mutex_lock(&drm->client.mutex);
847 list_add(&cli->head, &drm->clients);
848 mutex_unlock(&drm->client.mutex);
5addcf0a
DA
849
850out_suspend:
851 pm_runtime_mark_last_busy(dev->dev);
852 pm_runtime_put_autosuspend(dev->dev);
853
854 return ret;
ebb945a9
BS
855}
856
5b8a43ae 857static void
ebb945a9
BS
858nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
859{
860 struct nouveau_cli *cli = nouveau_cli(fpriv);
861 struct nouveau_drm *drm = nouveau_drm(dev);
862
5addcf0a
DA
863 pm_runtime_get_sync(dev->dev);
864
ebb945a9
BS
865 if (cli->abi16)
866 nouveau_abi16_fini(cli->abi16);
867
868 mutex_lock(&drm->client.mutex);
869 list_del(&cli->head);
870 mutex_unlock(&drm->client.mutex);
5addcf0a 871
ebb945a9
BS
872}
873
5b8a43ae 874static void
ebb945a9
BS
875nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
876{
877 struct nouveau_cli *cli = nouveau_cli(fpriv);
878 nouveau_cli_destroy(cli);
5addcf0a
DA
879 pm_runtime_mark_last_busy(dev->dev);
880 pm_runtime_put_autosuspend(dev->dev);
ebb945a9
BS
881}
882
baa70943 883static const struct drm_ioctl_desc
77145f1c 884nouveau_ioctls[] = {
7d761258 885 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
77145f1c 886 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
7d761258
MP
887 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
888 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
889 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
890 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
891 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
892 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
893 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
894 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
895 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
896 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
77145f1c
BS
897};
898
27111a23
BS
899long
900nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
5addcf0a 901{
27111a23
BS
902 struct drm_file *filp = file->private_data;
903 struct drm_device *dev = filp->minor->dev;
5addcf0a 904 long ret;
5addcf0a
DA
905
906 ret = pm_runtime_get_sync(dev->dev);
b6c4285a 907 if (ret < 0 && ret != -EACCES)
5addcf0a
DA
908 return ret;
909
27111a23
BS
910 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
911 case DRM_NOUVEAU_NVIF:
912 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
913 break;
914 default:
915 ret = drm_ioctl(file, cmd, arg);
916 break;
917 }
5addcf0a
DA
918
919 pm_runtime_mark_last_busy(dev->dev);
920 pm_runtime_put_autosuspend(dev->dev);
921 return ret;
922}
27111a23 923
77145f1c
BS
924static const struct file_operations
925nouveau_driver_fops = {
926 .owner = THIS_MODULE,
927 .open = drm_open,
928 .release = drm_release,
5addcf0a 929 .unlocked_ioctl = nouveau_drm_ioctl,
77145f1c
BS
930 .mmap = nouveau_ttm_mmap,
931 .poll = drm_poll,
77145f1c
BS
932 .read = drm_read,
933#if defined(CONFIG_COMPAT)
934 .compat_ioctl = nouveau_compat_ioctl,
935#endif
936 .llseek = noop_llseek,
937};
938
939static struct drm_driver
915b4d11 940driver_stub = {
77145f1c 941 .driver_features =
4cb4ea39 942 DRIVER_USE_AGP |
7d761258 943 DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER,
77145f1c
BS
944
945 .load = nouveau_drm_load,
946 .unload = nouveau_drm_unload,
947 .open = nouveau_drm_open,
948 .preclose = nouveau_drm_preclose,
949 .postclose = nouveau_drm_postclose,
950 .lastclose = nouveau_vga_lastclose,
951
33b903e8
MS
952#if defined(CONFIG_DEBUG_FS)
953 .debugfs_init = nouveau_debugfs_init,
954 .debugfs_cleanup = nouveau_debugfs_takedown,
955#endif
956
77145f1c 957 .get_vblank_counter = drm_vblank_count,
51cb4b39
BS
958 .enable_vblank = nouveau_display_vblank_enable,
959 .disable_vblank = nouveau_display_vblank_disable,
d83ef853
BS
960 .get_scanout_position = nouveau_display_scanoutpos,
961 .get_vblank_timestamp = nouveau_display_vblstamp,
77145f1c
BS
962
963 .ioctls = nouveau_ioctls,
baa70943 964 .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
77145f1c
BS
965 .fops = &nouveau_driver_fops,
966
967 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
968 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
ab9ccb96
AP
969 .gem_prime_export = drm_gem_prime_export,
970 .gem_prime_import = drm_gem_prime_import,
971 .gem_prime_pin = nouveau_gem_prime_pin,
3aac4502 972 .gem_prime_res_obj = nouveau_gem_prime_res_obj,
1af7c7dd 973 .gem_prime_unpin = nouveau_gem_prime_unpin,
ab9ccb96
AP
974 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
975 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
976 .gem_prime_vmap = nouveau_gem_prime_vmap,
977 .gem_prime_vunmap = nouveau_gem_prime_vunmap,
77145f1c 978
77145f1c
BS
979 .gem_free_object = nouveau_gem_object_del,
980 .gem_open_object = nouveau_gem_object_open,
981 .gem_close_object = nouveau_gem_object_close,
982
983 .dumb_create = nouveau_display_dumb_create,
984 .dumb_map_offset = nouveau_display_dumb_map_offset,
43387b37 985 .dumb_destroy = drm_gem_dumb_destroy,
77145f1c
BS
986
987 .name = DRIVER_NAME,
988 .desc = DRIVER_DESC,
989#ifdef GIT_REVISION
990 .date = GIT_REVISION,
991#else
992 .date = DRIVER_DATE,
993#endif
994 .major = DRIVER_MAJOR,
995 .minor = DRIVER_MINOR,
996 .patchlevel = DRIVER_PATCHLEVEL,
997};
998
94580299
BS
999static struct pci_device_id
1000nouveau_drm_pci_table[] = {
1001 {
1002 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
1003 .class = PCI_BASE_CLASS_DISPLAY << 16,
1004 .class_mask = 0xff << 16,
1005 },
1006 {
1007 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
1008 .class = PCI_BASE_CLASS_DISPLAY << 16,
1009 .class_mask = 0xff << 16,
1010 },
1011 {}
1012};
1013
703fa264
PM
1014static void nouveau_display_options(void)
1015{
1016 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
1017
1018 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
1019 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
1020 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
1021 DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel);
1022 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
1023 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
1024 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
1025 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
1026 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
1027 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
1028 DRM_DEBUG_DRIVER("... pstate : %d\n", nouveau_pstate);
1029}
1030
2d8b9ccb
DA
1031static const struct dev_pm_ops nouveau_pm_ops = {
1032 .suspend = nouveau_pmops_suspend,
1033 .resume = nouveau_pmops_resume,
1034 .freeze = nouveau_pmops_freeze,
1035 .thaw = nouveau_pmops_thaw,
1036 .poweroff = nouveau_pmops_freeze,
1037 .restore = nouveau_pmops_resume,
5addcf0a
DA
1038 .runtime_suspend = nouveau_pmops_runtime_suspend,
1039 .runtime_resume = nouveau_pmops_runtime_resume,
1040 .runtime_idle = nouveau_pmops_runtime_idle,
2d8b9ccb
DA
1041};
1042
94580299
BS
1043static struct pci_driver
1044nouveau_drm_pci_driver = {
1045 .name = "nouveau",
1046 .id_table = nouveau_drm_pci_table,
1047 .probe = nouveau_drm_probe,
1048 .remove = nouveau_drm_remove,
2d8b9ccb 1049 .driver.pm = &nouveau_pm_ops,
94580299
BS
1050};
1051
8ba9ff11
AC
1052struct drm_device *
1053nouveau_platform_device_create_(struct platform_device *pdev, int size,
1054 void **pobject)
420b9469 1055{
8ba9ff11
AC
1056 struct drm_device *drm;
1057 int err;
420b9469 1058
8ba9ff11 1059 err = nouveau_device_create_(pdev, NOUVEAU_BUS_PLATFORM,
420b9469
AC
1060 nouveau_platform_name(pdev),
1061 dev_name(&pdev->dev), nouveau_config,
8ba9ff11
AC
1062 nouveau_debug, size, pobject);
1063 if (err)
1064 return ERR_PTR(err);
1065
915b4d11 1066 drm = drm_dev_alloc(&driver_platform, &pdev->dev);
8ba9ff11
AC
1067 if (!drm) {
1068 err = -ENOMEM;
1069 goto err_free;
420b9469
AC
1070 }
1071
8ba9ff11
AC
1072 err = drm_dev_set_unique(drm, "%s", dev_name(&pdev->dev));
1073 if (err < 0)
1074 goto err_free;
1075
1076 drm->platformdev = pdev;
1077 platform_set_drvdata(pdev, drm);
1078
1079 return drm;
1080
1081err_free:
1082 nouveau_object_ref(NULL, (struct nouveau_object **)pobject);
1083
1084 return ERR_PTR(err);
420b9469 1085}
8ba9ff11 1086EXPORT_SYMBOL(nouveau_platform_device_create_);
420b9469 1087
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1088static int __init
1089nouveau_drm_init(void)
1090{
915b4d11
DH
1091 driver_pci = driver_stub;
1092 driver_pci.set_busid = drm_pci_set_busid;
1093 driver_platform = driver_stub;
1094 driver_platform.set_busid = drm_platform_set_busid;
1095
703fa264
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1096 nouveau_display_options();
1097
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1098 if (nouveau_modeset == -1) {
1099#ifdef CONFIG_VGA_CONSOLE
1100 if (vgacon_text_force())
1101 nouveau_modeset = 0;
77145f1c 1102#endif
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1103 }
1104
1105 if (!nouveau_modeset)
1106 return 0;
1107
1108 nouveau_register_dsm_handler();
915b4d11 1109 return drm_pci_init(&driver_pci, &nouveau_drm_pci_driver);
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1110}
1111
1112static void __exit
1113nouveau_drm_exit(void)
1114{
77145f1c
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1115 if (!nouveau_modeset)
1116 return;
1117
915b4d11 1118 drm_pci_exit(&driver_pci, &nouveau_drm_pci_driver);
77145f1c 1119 nouveau_unregister_dsm_handler();
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1120}
1121
1122module_init(nouveau_drm_init);
1123module_exit(nouveau_drm_exit);
1124
1125MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
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1126MODULE_AUTHOR(DRIVER_AUTHOR);
1127MODULE_DESCRIPTION(DRIVER_DESC);
94580299 1128MODULE_LICENSE("GPL and additional rights");