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CommitLineData
94580299
BS
1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
77145f1c 25#include <linux/console.h>
c5fd936e 26#include <linux/delay.h>
94580299
BS
27#include <linux/module.h>
28#include <linux/pci.h>
5addcf0a
DA
29#include <linux/pm_runtime.h>
30#include <linux/vga_switcheroo.h>
fdb751ef 31
ae95621b
MY
32#include <drm/drmP.h>
33#include <drm/drm_crtc_helper.h>
fdb751ef 34
ebb945a9 35#include <core/gpuobj.h>
c33e05a1 36#include <core/option.h>
7974dd1b
BS
37#include <core/pci.h>
38#include <core/tegra.h>
94580299 39
04b88677
BS
40#include <nvif/driver.h>
41
923bc416 42#include <nvif/class.h>
845f2725 43#include <nvif/cl0002.h>
8ed1730c 44#include <nvif/cla06f.h>
538b269b
BS
45#include <nvif/if0004.h>
46
4dc28134 47#include "nouveau_drv.h"
ebb945a9 48#include "nouveau_dma.h"
77145f1c
BS
49#include "nouveau_ttm.h"
50#include "nouveau_gem.h"
77145f1c 51#include "nouveau_vga.h"
8d021d71 52#include "nouveau_led.h"
b9ed919f 53#include "nouveau_hwmon.h"
77145f1c
BS
54#include "nouveau_acpi.h"
55#include "nouveau_bios.h"
56#include "nouveau_ioctl.h"
ebb945a9
BS
57#include "nouveau_abi16.h"
58#include "nouveau_fbcon.h"
59#include "nouveau_fence.h"
33b903e8 60#include "nouveau_debugfs.h"
27111a23 61#include "nouveau_usif.h"
703fa264 62#include "nouveau_connector.h"
055a65d5 63#include "nouveau_platform.h"
ebb945a9 64
94580299
BS
65MODULE_PARM_DESC(config, "option string to pass to driver core");
66static char *nouveau_config;
67module_param_named(config, nouveau_config, charp, 0400);
68
69MODULE_PARM_DESC(debug, "debug string to pass to driver core");
70static char *nouveau_debug;
71module_param_named(debug, nouveau_debug, charp, 0400);
72
ebb945a9
BS
73MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
74static int nouveau_noaccel = 0;
75module_param_named(noaccel, nouveau_noaccel, int, 0400);
76
9430738d
BS
77MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
78 "0 = disabled, 1 = enabled, 2 = headless)");
79int nouveau_modeset = -1;
77145f1c
BS
80module_param_named(modeset, nouveau_modeset, int, 0400);
81
5addcf0a 82MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
321f5c5f 83static int nouveau_runtime_pm = -1;
5addcf0a
DA
84module_param_named(runpm, nouveau_runtime_pm, int, 0400);
85
915b4d11
DH
86static struct drm_driver driver_stub;
87static struct drm_driver driver_pci;
88static struct drm_driver driver_platform;
77145f1c 89
94580299 90static u64
420b9469 91nouveau_pci_name(struct pci_dev *pdev)
94580299
BS
92{
93 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
94 name |= pdev->bus->number << 16;
95 name |= PCI_SLOT(pdev->devfn) << 8;
96 return name | PCI_FUNC(pdev->devfn);
97}
98
420b9469
AC
99static u64
100nouveau_platform_name(struct platform_device *platformdev)
101{
102 return platformdev->id;
103}
104
105static u64
106nouveau_name(struct drm_device *dev)
107{
108 if (dev->pdev)
109 return nouveau_pci_name(dev->pdev);
110 else
76adb460 111 return nouveau_platform_name(to_platform_device(dev->dev));
420b9469
AC
112}
113
20d8a88e
BS
114static void
115nouveau_cli_fini(struct nouveau_cli *cli)
116{
117 nvkm_vm_ref(NULL, &nvxx_client(&cli->base)->vm, NULL);
118 usif_client_fini(cli);
1167c6bc 119 nvif_device_fini(&cli->device);
20d8a88e
BS
120 nvif_client_fini(&cli->base);
121}
122
94580299 123static int
20d8a88e
BS
124nouveau_cli_init(struct nouveau_drm *drm, const char *sname,
125 struct nouveau_cli *cli)
94580299 126{
20d8a88e 127 u64 device = nouveau_name(drm->dev);
9ad97ede 128 int ret;
9ad97ede 129
20d8a88e
BS
130 snprintf(cli->name, sizeof(cli->name), "%s", sname);
131 cli->dev = drm->dev;
132 mutex_init(&cli->mutex);
133 usif_client_init(cli);
134
80e60973
BS
135 if (cli == &drm->client) {
136 ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug,
137 cli->name, device, &cli->base);
138 } else {
139 ret = nvif_client_init(&drm->client.base, cli->name, device,
9ad97ede 140 &cli->base);
dd5700ea 141 }
20d8a88e
BS
142 if (ret) {
143 NV_ERROR(drm, "Client allocation failed: %d\n", ret);
144 goto done;
dd5700ea 145 }
94580299 146
1167c6bc
BS
147 ret = nvif_device_init(&cli->base.object, 0, NV_DEVICE,
148 &(struct nv_device_v0) {
149 .device = ~0,
150 }, sizeof(struct nv_device_v0),
151 &cli->device);
152 if (ret) {
153 NV_ERROR(drm, "Device allocation failed: %d\n", ret);
154 goto done;
155 }
156
20d8a88e
BS
157done:
158 if (ret)
159 nouveau_cli_fini(cli);
160 return ret;
94580299
BS
161}
162
ebb945a9
BS
163static void
164nouveau_accel_fini(struct nouveau_drm *drm)
165{
fbd58ebd 166 nouveau_channel_idle(drm->channel);
0ad72863 167 nvif_object_fini(&drm->ntfy);
f027f491 168 nvkm_gpuobj_del(&drm->notify);
fbd58ebd 169 nvif_notify_fini(&drm->flip);
0ad72863 170 nvif_object_fini(&drm->nvsw);
fbd58ebd
BS
171 nouveau_channel_del(&drm->channel);
172
173 nouveau_channel_idle(drm->cechan);
0ad72863 174 nvif_object_fini(&drm->ttm.copy);
fbd58ebd
BS
175 nouveau_channel_del(&drm->cechan);
176
ebb945a9
BS
177 if (drm->fence)
178 nouveau_fence(drm)->dtor(drm);
179}
180
181static void
182nouveau_accel_init(struct nouveau_drm *drm)
183{
1167c6bc 184 struct nvif_device *device = &drm->client.device;
41a63406 185 struct nvif_sclass *sclass;
49981046 186 u32 arg0, arg1;
41a63406 187 int ret, i, n;
ebb945a9 188
967e7bde 189 if (nouveau_noaccel)
ebb945a9
BS
190 return;
191
192 /* initialise synchronisation routines */
967e7bde
BS
193 /*XXX: this is crap, but the fence/channel stuff is a little
194 * backwards in some places. this will be fixed.
195 */
41a63406 196 ret = n = nvif_object_sclass_get(&device->object, &sclass);
967e7bde
BS
197 if (ret < 0)
198 return;
199
41a63406
BS
200 for (ret = -ENOSYS, i = 0; i < n; i++) {
201 switch (sclass[i].oclass) {
bbf8906b 202 case NV03_CHANNEL_DMA:
967e7bde
BS
203 ret = nv04_fence_create(drm);
204 break;
bbf8906b 205 case NV10_CHANNEL_DMA:
967e7bde
BS
206 ret = nv10_fence_create(drm);
207 break;
bbf8906b
BS
208 case NV17_CHANNEL_DMA:
209 case NV40_CHANNEL_DMA:
967e7bde
BS
210 ret = nv17_fence_create(drm);
211 break;
bbf8906b 212 case NV50_CHANNEL_GPFIFO:
967e7bde
BS
213 ret = nv50_fence_create(drm);
214 break;
bbf8906b 215 case G82_CHANNEL_GPFIFO:
967e7bde
BS
216 ret = nv84_fence_create(drm);
217 break;
bbf8906b
BS
218 case FERMI_CHANNEL_GPFIFO:
219 case KEPLER_CHANNEL_GPFIFO_A:
63f8c9b7 220 case KEPLER_CHANNEL_GPFIFO_B:
a1020afe 221 case MAXWELL_CHANNEL_GPFIFO_A:
e8ff9794 222 case PASCAL_CHANNEL_GPFIFO_A:
967e7bde
BS
223 ret = nvc0_fence_create(drm);
224 break;
225 default:
226 break;
227 }
228 }
229
41a63406 230 nvif_object_sclass_put(&sclass);
ebb945a9
BS
231 if (ret) {
232 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
233 nouveau_accel_fini(drm);
234 return;
235 }
236
967e7bde 237 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
1167c6bc 238 ret = nouveau_channel_new(drm, &drm->client.device,
1f5ff7f5
BS
239 NVA06F_V0_ENGINE_CE0 |
240 NVA06F_V0_ENGINE_CE1,
bbf8906b 241 0, &drm->cechan);
49981046
BS
242 if (ret)
243 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
244
1f5ff7f5 245 arg0 = NVA06F_V0_ENGINE_GR;
49469800 246 arg1 = 1;
00fc6f6f 247 } else
967e7bde
BS
248 if (device->info.chipset >= 0xa3 &&
249 device->info.chipset != 0xaa &&
250 device->info.chipset != 0xac) {
1167c6bc 251 ret = nouveau_channel_new(drm, &drm->client.device,
0ad72863 252 NvDmaFB, NvDmaTT, &drm->cechan);
00fc6f6f
BS
253 if (ret)
254 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
255
256 arg0 = NvDmaFB;
257 arg1 = NvDmaTT;
49981046
BS
258 } else {
259 arg0 = NvDmaFB;
260 arg1 = NvDmaTT;
261 }
262
1167c6bc
BS
263 ret = nouveau_channel_new(drm, &drm->client.device,
264 arg0, arg1, &drm->channel);
ebb945a9
BS
265 if (ret) {
266 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
267 nouveau_accel_fini(drm);
268 return;
269 }
270
a01ca78c 271 ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW,
0ad72863 272 nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw);
69a6146d 273 if (ret == 0) {
69a6146d
BS
274 ret = RING_SPACE(drm->channel, 2);
275 if (ret == 0) {
967e7bde 276 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
69a6146d
BS
277 BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
278 OUT_RING (drm->channel, NVDRM_NVSW);
279 } else
967e7bde 280 if (device->info.family < NV_DEVICE_INFO_V0_KEPLER) {
69a6146d
BS
281 BEGIN_NVC0(drm->channel, FermiSw, 0, 1);
282 OUT_RING (drm->channel, 0x001f0000);
283 }
284 }
898a2b32
BS
285
286 ret = nvif_notify_init(&drm->nvsw, nouveau_flip_complete,
538b269b
BS
287 false, NV04_NVSW_NTFY_UEVENT,
288 NULL, 0, 0, &drm->flip);
898a2b32
BS
289 if (ret == 0)
290 ret = nvif_notify_get(&drm->flip);
291 if (ret) {
292 nouveau_accel_fini(drm);
293 return;
294 }
69a6146d
BS
295 }
296
297 if (ret) {
298 NV_ERROR(drm, "failed to allocate software object, %d\n", ret);
299 nouveau_accel_fini(drm);
300 return;
301 }
302
967e7bde 303 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
1167c6bc
BS
304 ret = nvkm_gpuobj_new(nvxx_device(&drm->client.device), 32, 0,
305 false, NULL, &drm->notify);
ebb945a9
BS
306 if (ret) {
307 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
308 nouveau_accel_fini(drm);
309 return;
310 }
311
a01ca78c 312 ret = nvif_object_init(&drm->channel->user, NvNotify0,
4acfd707
BS
313 NV_DMA_IN_MEMORY,
314 &(struct nv_dma_v0) {
315 .target = NV_DMA_V0_TARGET_VRAM,
316 .access = NV_DMA_V0_ACCESS_RDWR,
ebb945a9
BS
317 .start = drm->notify->addr,
318 .limit = drm->notify->addr + 31
4acfd707 319 }, sizeof(struct nv_dma_v0),
0ad72863 320 &drm->ntfy);
ebb945a9
BS
321 if (ret) {
322 nouveau_accel_fini(drm);
323 return;
324 }
325 }
326
327
49981046 328 nouveau_bo_move_init(drm);
ebb945a9
BS
329}
330
56550d94
GKH
331static int nouveau_drm_probe(struct pci_dev *pdev,
332 const struct pci_device_id *pent)
94580299 333{
be83cd4e 334 struct nvkm_device *device;
ebb945a9
BS
335 struct apertures_struct *aper;
336 bool boot = false;
94580299
BS
337 int ret;
338
b00e5334 339 if (vga_switcheroo_client_probe_defer(pdev))
98b3a340
LW
340 return -EPROBE_DEFER;
341
0e67bed2
BS
342 /* We need to check that the chipset is supported before booting
343 * fbdev off the hardware, as there's no way to put it back.
344 */
345 ret = nvkm_device_pci_new(pdev, NULL, "error", true, false, 0, &device);
346 if (ret)
347 return ret;
348
349 nvkm_device_del(&device);
350
351 /* Remove conflicting drivers (vesafb, efifb etc). */
ebb945a9
BS
352 aper = alloc_apertures(3);
353 if (!aper)
354 return -ENOMEM;
355
356 aper->ranges[0].base = pci_resource_start(pdev, 1);
357 aper->ranges[0].size = pci_resource_len(pdev, 1);
358 aper->count = 1;
359
360 if (pci_resource_len(pdev, 2)) {
361 aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
362 aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
363 aper->count++;
364 }
365
366 if (pci_resource_len(pdev, 3)) {
367 aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
368 aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
369 aper->count++;
370 }
371
372#ifdef CONFIG_X86
373 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
374#endif
771fa0e4 375 if (nouveau_modeset != 2)
44adece5 376 drm_fb_helper_remove_conflicting_framebuffers(aper, "nouveaufb", boot);
83ef7777 377 kfree(aper);
ebb945a9 378
7974dd1b
BS
379 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
380 true, true, ~0ULL, &device);
94580299
BS
381 if (ret)
382 return ret;
383
384 pci_set_master(pdev);
385
915b4d11 386 ret = drm_get_pci_dev(pdev, pent, &driver_pci);
94580299 387 if (ret) {
e781dc8f 388 nvkm_device_del(&device);
94580299
BS
389 return ret;
390 }
391
392 return 0;
393}
394
5addcf0a
DA
395#define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
396
397static void
46941b0f 398nouveau_get_hdmi_dev(struct nouveau_drm *drm)
5addcf0a 399{
46941b0f 400 struct pci_dev *pdev = drm->dev->pdev;
5addcf0a 401
420b9469 402 if (!pdev) {
f2a0adad 403 NV_DEBUG(drm, "not a PCI device; no HDMI\n");
420b9469
AC
404 drm->hdmi_device = NULL;
405 return;
406 }
407
5addcf0a
DA
408 /* subfunction one is a hdmi audio device? */
409 drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number,
410 PCI_DEVFN(PCI_SLOT(pdev->devfn), 1));
411
412 if (!drm->hdmi_device) {
46941b0f 413 NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1);
5addcf0a
DA
414 return;
415 }
416
417 if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) {
46941b0f 418 NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class);
5addcf0a
DA
419 pci_dev_put(drm->hdmi_device);
420 drm->hdmi_device = NULL;
421 return;
422 }
423}
424
5b8a43ae 425static int
94580299
BS
426nouveau_drm_load(struct drm_device *dev, unsigned long flags)
427{
94580299
BS
428 struct nouveau_drm *drm;
429 int ret;
430
20d8a88e
BS
431 if (!(drm = kzalloc(sizeof(*drm), GFP_KERNEL)))
432 return -ENOMEM;
433 dev->dev_private = drm;
434 drm->dev = dev;
435
436 ret = nouveau_cli_init(drm, "DRM", &drm->client);
94580299
BS
437 if (ret)
438 return ret;
439
1167c6bc
BS
440 dev->irq_enabled = true;
441
989aa5b7 442 nvxx_client(&drm->client.base)->debug =
be83cd4e 443 nvkm_dbgopt(nouveau_debug, "DRM");
77145f1c 444
94580299 445 INIT_LIST_HEAD(&drm->clients);
ebb945a9 446 spin_lock_init(&drm->tile.lock);
94580299 447
46941b0f 448 nouveau_get_hdmi_dev(drm);
5addcf0a 449
77145f1c
BS
450 /* workaround an odd issue on nvc1 by disabling the device's
451 * nosnoop capability. hopefully won't cause issues until a
452 * better fix is found - assuming there is one...
453 */
1167c6bc
BS
454 if (drm->client.device.info.chipset == 0xc1)
455 nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000);
ebb945a9 456
77145f1c 457 nouveau_vga_init(drm);
cb75d97e 458
1167c6bc
BS
459 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
460 if (!nvxx_device(&drm->client.device)->mmu) {
2100292c
BS
461 ret = -ENOSYS;
462 goto fail_device;
463 }
464
1167c6bc
BS
465 ret = nvkm_vm_new(nvxx_device(&drm->client.device),
466 0, (1ULL << 40), 0x1000, NULL,
467 &drm->client.vm);
ebb945a9
BS
468 if (ret)
469 goto fail_device;
3ee6f5b5 470
989aa5b7 471 nvxx_client(&drm->client.base)->vm = drm->client.vm;
ebb945a9
BS
472 }
473
474 ret = nouveau_ttm_init(drm);
94580299 475 if (ret)
77145f1c
BS
476 goto fail_ttm;
477
478 ret = nouveau_bios_init(dev);
479 if (ret)
480 goto fail_bios;
481
77145f1c 482 ret = nouveau_display_create(dev);
ebb945a9 483 if (ret)
77145f1c
BS
484 goto fail_dispctor;
485
486 if (dev->mode_config.num_crtc) {
487 ret = nouveau_display_init(dev);
488 if (ret)
489 goto fail_dispinit;
490 }
491
b126a200 492 nouveau_debugfs_init(drm);
b9ed919f 493 nouveau_hwmon_init(dev);
ebb945a9
BS
494 nouveau_accel_init(drm);
495 nouveau_fbcon_init(dev);
8d021d71 496 nouveau_led_init(dev);
5addcf0a 497
8fa4338a 498 if (nouveau_pmops_runtime()) {
5addcf0a
DA
499 pm_runtime_use_autosuspend(dev->dev);
500 pm_runtime_set_autosuspend_delay(dev->dev, 5000);
501 pm_runtime_set_active(dev->dev);
502 pm_runtime_allow(dev->dev);
503 pm_runtime_mark_last_busy(dev->dev);
504 pm_runtime_put(dev->dev);
9a2eba33
PU
505 } else {
506 /* enable polling for external displays */
507 drm_kms_helper_poll_enable(dev);
5addcf0a 508 }
94580299
BS
509 return 0;
510
77145f1c
BS
511fail_dispinit:
512 nouveau_display_destroy(dev);
513fail_dispctor:
77145f1c
BS
514 nouveau_bios_takedown(dev);
515fail_bios:
ebb945a9 516 nouveau_ttm_fini(drm);
77145f1c 517fail_ttm:
77145f1c 518 nouveau_vga_fini(drm);
94580299 519fail_device:
20d8a88e
BS
520 nouveau_cli_fini(&drm->client);
521 kfree(drm);
94580299
BS
522 return ret;
523}
524
11b3c20b 525static void
94580299
BS
526nouveau_drm_unload(struct drm_device *dev)
527{
77145f1c 528 struct nouveau_drm *drm = nouveau_drm(dev);
94580299 529
8fa4338a 530 if (nouveau_pmops_runtime()) {
c1b16b45 531 pm_runtime_get_sync(dev->dev);
55c868a3 532 pm_runtime_forbid(dev->dev);
c1b16b45
LW
533 }
534
8d021d71 535 nouveau_led_fini(dev);
ebb945a9
BS
536 nouveau_fbcon_fini(dev);
537 nouveau_accel_fini(drm);
b9ed919f 538 nouveau_hwmon_fini(dev);
b126a200 539 nouveau_debugfs_fini(drm);
77145f1c 540
9430738d 541 if (dev->mode_config.num_crtc)
3b4c0abb 542 nouveau_display_fini(dev, false);
77145f1c
BS
543 nouveau_display_destroy(dev);
544
77145f1c 545 nouveau_bios_takedown(dev);
94580299 546
ebb945a9 547 nouveau_ttm_fini(drm);
77145f1c 548 nouveau_vga_fini(drm);
cb75d97e 549
5addcf0a
DA
550 if (drm->hdmi_device)
551 pci_dev_put(drm->hdmi_device);
20d8a88e
BS
552 nouveau_cli_fini(&drm->client);
553 kfree(drm);
94580299
BS
554}
555
8ba9ff11
AC
556void
557nouveau_drm_device_remove(struct drm_device *dev)
94580299 558{
77145f1c 559 struct nouveau_drm *drm = nouveau_drm(dev);
be83cd4e 560 struct nvkm_client *client;
76ecea5b 561 struct nvkm_device *device;
77145f1c 562
7d3428cd 563 dev->irq_enabled = false;
989aa5b7 564 client = nvxx_client(&drm->client.base);
4e7e62d6 565 device = nvkm_device_find(client->device);
77145f1c
BS
566 drm_put_dev(dev);
567
e781dc8f 568 nvkm_device_del(&device);
94580299 569}
8ba9ff11
AC
570
571static void
572nouveau_drm_remove(struct pci_dev *pdev)
573{
574 struct drm_device *dev = pci_get_drvdata(pdev);
575
576 nouveau_drm_device_remove(dev);
577}
94580299 578
cd897837 579static int
05c63c2f 580nouveau_do_suspend(struct drm_device *dev, bool runtime)
94580299 581{
77145f1c 582 struct nouveau_drm *drm = nouveau_drm(dev);
94580299
BS
583 int ret;
584
8d021d71
MP
585 nouveau_led_suspend(dev);
586
6fbb702e 587 if (dev->mode_config.num_crtc) {
2d38a535 588 NV_DEBUG(drm, "suspending console...\n");
6fbb702e 589 nouveau_fbcon_set_suspend(dev, 1);
2d38a535 590 NV_DEBUG(drm, "suspending display...\n");
6fbb702e 591 ret = nouveau_display_suspend(dev, runtime);
9430738d
BS
592 if (ret)
593 return ret;
594 }
94580299 595
2d38a535 596 NV_DEBUG(drm, "evicting buffers...\n");
ebb945a9
BS
597 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
598
2d38a535 599 NV_DEBUG(drm, "waiting for kernel channels to go idle...\n");
81dff21b
BS
600 if (drm->cechan) {
601 ret = nouveau_channel_idle(drm->cechan);
602 if (ret)
f3980dc5 603 goto fail_display;
81dff21b
BS
604 }
605
606 if (drm->channel) {
607 ret = nouveau_channel_idle(drm->channel);
608 if (ret)
f3980dc5 609 goto fail_display;
81dff21b
BS
610 }
611
2d38a535 612 NV_DEBUG(drm, "suspending fence...\n");
ebb945a9 613 if (drm->fence && nouveau_fence(drm)->suspend) {
f3980dc5
IM
614 if (!nouveau_fence(drm)->suspend(drm)) {
615 ret = -ENOMEM;
616 goto fail_display;
617 }
ebb945a9
BS
618 }
619
2d38a535 620 NV_DEBUG(drm, "suspending object tree...\n");
0ad72863 621 ret = nvif_client_suspend(&drm->client.base);
94580299
BS
622 if (ret)
623 goto fail_client;
624
94580299
BS
625 return 0;
626
627fail_client:
f3980dc5
IM
628 if (drm->fence && nouveau_fence(drm)->resume)
629 nouveau_fence(drm)->resume(drm);
630
631fail_display:
9430738d 632 if (dev->mode_config.num_crtc) {
2d38a535 633 NV_DEBUG(drm, "resuming display...\n");
6fbb702e 634 nouveau_display_resume(dev, runtime);
9430738d 635 }
94580299
BS
636 return ret;
637}
638
cd897837 639static int
6fbb702e 640nouveau_do_resume(struct drm_device *dev, bool runtime)
2d8b9ccb
DA
641{
642 struct nouveau_drm *drm = nouveau_drm(dev);
2d8b9ccb 643
2d38a535 644 NV_DEBUG(drm, "resuming object tree...\n");
0ad72863 645 nvif_client_resume(&drm->client.base);
94580299 646
2d38a535 647 NV_DEBUG(drm, "resuming fence...\n");
81dff21b
BS
648 if (drm->fence && nouveau_fence(drm)->resume)
649 nouveau_fence(drm)->resume(drm);
650
77145f1c 651 nouveau_run_vbios_init(dev);
77145f1c 652
9430738d 653 if (dev->mode_config.num_crtc) {
2d38a535 654 NV_DEBUG(drm, "resuming display...\n");
6fbb702e 655 nouveau_display_resume(dev, runtime);
2d38a535 656 NV_DEBUG(drm, "resuming console...\n");
6fbb702e 657 nouveau_fbcon_set_suspend(dev, 0);
9430738d 658 }
5addcf0a 659
8d021d71
MP
660 nouveau_led_resume(dev);
661
77145f1c 662 return 0;
94580299
BS
663}
664
7bb6d442
BS
665int
666nouveau_pmops_suspend(struct device *dev)
667{
668 struct pci_dev *pdev = to_pci_dev(dev);
669 struct drm_device *drm_dev = pci_get_drvdata(pdev);
670 int ret;
671
672 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
673 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
674 return 0;
675
676 ret = nouveau_do_suspend(drm_dev, false);
677 if (ret)
678 return ret;
679
680 pci_save_state(pdev);
681 pci_disable_device(pdev);
7bb6d442 682 pci_set_power_state(pdev, PCI_D3hot);
c5fd936e 683 udelay(200);
7bb6d442
BS
684 return 0;
685}
686
687int
688nouveau_pmops_resume(struct device *dev)
2d8b9ccb
DA
689{
690 struct pci_dev *pdev = to_pci_dev(dev);
691 struct drm_device *drm_dev = pci_get_drvdata(pdev);
692 int ret;
693
5addcf0a
DA
694 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
695 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
2d8b9ccb
DA
696 return 0;
697
698 pci_set_power_state(pdev, PCI_D0);
699 pci_restore_state(pdev);
700 ret = pci_enable_device(pdev);
701 if (ret)
702 return ret;
703 pci_set_master(pdev);
704
0b2fe659
HG
705 ret = nouveau_do_resume(drm_dev, false);
706
707 /* Monitors may have been connected / disconnected during suspend */
708 schedule_work(&nouveau_drm(drm_dev)->hpd_work);
709
710 return ret;
2d8b9ccb
DA
711}
712
7bb6d442
BS
713static int
714nouveau_pmops_freeze(struct device *dev)
2d8b9ccb
DA
715{
716 struct pci_dev *pdev = to_pci_dev(dev);
717 struct drm_device *drm_dev = pci_get_drvdata(pdev);
6fbb702e 718 return nouveau_do_suspend(drm_dev, false);
2d8b9ccb
DA
719}
720
7bb6d442
BS
721static int
722nouveau_pmops_thaw(struct device *dev)
2d8b9ccb
DA
723{
724 struct pci_dev *pdev = to_pci_dev(dev);
725 struct drm_device *drm_dev = pci_get_drvdata(pdev);
6fbb702e 726 return nouveau_do_resume(drm_dev, false);
2d8b9ccb
DA
727}
728
321f5c5f 729bool
5499473c 730nouveau_pmops_runtime(void)
321f5c5f
BS
731{
732 if (nouveau_runtime_pm == -1)
733 return nouveau_is_optimus() || nouveau_is_v1_dsm();
734 return nouveau_runtime_pm == 1;
735}
736
7bb6d442
BS
737static int
738nouveau_pmops_runtime_suspend(struct device *dev)
739{
740 struct pci_dev *pdev = to_pci_dev(dev);
741 struct drm_device *drm_dev = pci_get_drvdata(pdev);
742 int ret;
743
321f5c5f 744 if (!nouveau_pmops_runtime()) {
7bb6d442
BS
745 pm_runtime_forbid(dev);
746 return -EBUSY;
747 }
748
7bb6d442
BS
749 drm_kms_helper_poll_disable(drm_dev);
750 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
751 nouveau_switcheroo_optimus_dsm();
752 ret = nouveau_do_suspend(drm_dev, true);
753 pci_save_state(pdev);
754 pci_disable_device(pdev);
8c863944 755 pci_ignore_hotplug(pdev);
7bb6d442
BS
756 pci_set_power_state(pdev, PCI_D3cold);
757 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
758 return ret;
759}
760
761static int
762nouveau_pmops_runtime_resume(struct device *dev)
763{
764 struct pci_dev *pdev = to_pci_dev(dev);
765 struct drm_device *drm_dev = pci_get_drvdata(pdev);
1167c6bc 766 struct nvif_device *device = &nouveau_drm(drm_dev)->client.device;
7bb6d442
BS
767 int ret;
768
321f5c5f
BS
769 if (!nouveau_pmops_runtime()) {
770 pm_runtime_forbid(dev);
771 return -EBUSY;
772 }
7bb6d442
BS
773
774 pci_set_power_state(pdev, PCI_D0);
775 pci_restore_state(pdev);
776 ret = pci_enable_device(pdev);
777 if (ret)
778 return ret;
779 pci_set_master(pdev);
780
781 ret = nouveau_do_resume(drm_dev, true);
cae9ff03 782
7bb6d442 783 /* do magic */
a01ca78c 784 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
7bb6d442
BS
785 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
786 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
0b2fe659
HG
787
788 /* Monitors may have been connected / disconnected during suspend */
789 schedule_work(&nouveau_drm(drm_dev)->hpd_work);
790
7bb6d442
BS
791 return ret;
792}
793
794static int
795nouveau_pmops_runtime_idle(struct device *dev)
796{
797 struct pci_dev *pdev = to_pci_dev(dev);
798 struct drm_device *drm_dev = pci_get_drvdata(pdev);
799 struct nouveau_drm *drm = nouveau_drm(drm_dev);
800 struct drm_crtc *crtc;
801
321f5c5f 802 if (!nouveau_pmops_runtime()) {
7bb6d442
BS
803 pm_runtime_forbid(dev);
804 return -EBUSY;
805 }
806
807 /* if we have a hdmi audio device - make sure it has a driver loaded */
808 if (drm->hdmi_device) {
809 if (!drm->hdmi_device->driver) {
810 DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n");
811 pm_runtime_mark_last_busy(dev);
812 return -EBUSY;
813 }
814 }
815
816 list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) {
817 if (crtc->enabled) {
818 DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
819 return -EBUSY;
820 }
821 }
822 pm_runtime_mark_last_busy(dev);
823 pm_runtime_autosuspend(dev);
824 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
825 return 1;
826}
2d8b9ccb 827
5b8a43ae 828static int
ebb945a9
BS
829nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
830{
ebb945a9
BS
831 struct nouveau_drm *drm = nouveau_drm(dev);
832 struct nouveau_cli *cli;
a2896ced 833 char name[32], tmpname[TASK_COMM_LEN];
ebb945a9
BS
834 int ret;
835
5addcf0a
DA
836 /* need to bring up power immediately if opening device */
837 ret = pm_runtime_get_sync(dev->dev);
b6c4285a 838 if (ret < 0 && ret != -EACCES)
5addcf0a
DA
839 return ret;
840
a2896ced
MS
841 get_task_comm(tmpname, current);
842 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
fa6df8c1 843
20d8a88e
BS
844 if (!(cli = kzalloc(sizeof(*cli), GFP_KERNEL)))
845 return ret;
420b9469 846
20d8a88e 847 ret = nouveau_cli_init(drm, name, cli);
ebb945a9 848 if (ret)
20d8a88e 849 goto done;
ebb945a9 850
0ad72863
BS
851 cli->base.super = false;
852
1167c6bc
BS
853 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
854 ret = nvkm_vm_new(nvxx_device(&drm->client.device), 0,
855 (1ULL << 40), 0x1000, NULL, &cli->vm);
20d8a88e
BS
856 if (ret)
857 goto done;
3ee6f5b5 858
989aa5b7 859 nvxx_client(&cli->base)->vm = cli->vm;
ebb945a9
BS
860 }
861
862 fpriv->driver_priv = cli;
863
864 mutex_lock(&drm->client.mutex);
865 list_add(&cli->head, &drm->clients);
866 mutex_unlock(&drm->client.mutex);
5addcf0a 867
20d8a88e
BS
868done:
869 if (ret && cli) {
870 nouveau_cli_fini(cli);
871 kfree(cli);
872 }
873
5addcf0a
DA
874 pm_runtime_mark_last_busy(dev->dev);
875 pm_runtime_put_autosuspend(dev->dev);
5addcf0a 876 return ret;
ebb945a9
BS
877}
878
5b8a43ae 879static void
f0e73ff3 880nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
ebb945a9
BS
881{
882 struct nouveau_cli *cli = nouveau_cli(fpriv);
883 struct nouveau_drm *drm = nouveau_drm(dev);
884
5addcf0a
DA
885 pm_runtime_get_sync(dev->dev);
886
ac8c7930 887 mutex_lock(&cli->mutex);
ebb945a9
BS
888 if (cli->abi16)
889 nouveau_abi16_fini(cli->abi16);
ac8c7930 890 mutex_unlock(&cli->mutex);
ebb945a9
BS
891
892 mutex_lock(&drm->client.mutex);
893 list_del(&cli->head);
894 mutex_unlock(&drm->client.mutex);
5addcf0a 895
20d8a88e
BS
896 nouveau_cli_fini(cli);
897 kfree(cli);
5addcf0a
DA
898 pm_runtime_mark_last_busy(dev->dev);
899 pm_runtime_put_autosuspend(dev->dev);
ebb945a9
BS
900}
901
baa70943 902static const struct drm_ioctl_desc
77145f1c 903nouveau_ioctls[] = {
f8c47144
DV
904 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_AUTH|DRM_RENDER_ALLOW),
905 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
906 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
907 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_AUTH|DRM_RENDER_ALLOW),
908 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
909 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
910 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_AUTH|DRM_RENDER_ALLOW),
911 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH|DRM_RENDER_ALLOW),
912 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH|DRM_RENDER_ALLOW),
913 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW),
914 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW),
915 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH|DRM_RENDER_ALLOW),
77145f1c
BS
916};
917
27111a23
BS
918long
919nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
5addcf0a 920{
27111a23
BS
921 struct drm_file *filp = file->private_data;
922 struct drm_device *dev = filp->minor->dev;
5addcf0a 923 long ret;
5addcf0a
DA
924
925 ret = pm_runtime_get_sync(dev->dev);
b6c4285a 926 if (ret < 0 && ret != -EACCES)
5addcf0a
DA
927 return ret;
928
27111a23
BS
929 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
930 case DRM_NOUVEAU_NVIF:
931 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
932 break;
933 default:
934 ret = drm_ioctl(file, cmd, arg);
935 break;
936 }
5addcf0a
DA
937
938 pm_runtime_mark_last_busy(dev->dev);
939 pm_runtime_put_autosuspend(dev->dev);
940 return ret;
941}
27111a23 942
77145f1c
BS
943static const struct file_operations
944nouveau_driver_fops = {
945 .owner = THIS_MODULE,
946 .open = drm_open,
947 .release = drm_release,
5addcf0a 948 .unlocked_ioctl = nouveau_drm_ioctl,
77145f1c
BS
949 .mmap = nouveau_ttm_mmap,
950 .poll = drm_poll,
77145f1c
BS
951 .read = drm_read,
952#if defined(CONFIG_COMPAT)
953 .compat_ioctl = nouveau_compat_ioctl,
954#endif
955 .llseek = noop_llseek,
956};
957
958static struct drm_driver
915b4d11 959driver_stub = {
77145f1c 960 .driver_features =
0e975980
PA
961 DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER |
962 DRIVER_KMS_LEGACY_CONTEXT,
77145f1c
BS
963
964 .load = nouveau_drm_load,
965 .unload = nouveau_drm_unload,
966 .open = nouveau_drm_open,
77145f1c
BS
967 .postclose = nouveau_drm_postclose,
968 .lastclose = nouveau_vga_lastclose,
969
33b903e8 970#if defined(CONFIG_DEBUG_FS)
56c101af 971 .debugfs_init = nouveau_drm_debugfs_init,
33b903e8
MS
972#endif
973
51cb4b39
BS
974 .enable_vblank = nouveau_display_vblank_enable,
975 .disable_vblank = nouveau_display_vblank_disable,
d83ef853 976 .get_scanout_position = nouveau_display_scanoutpos,
1bf6ad62 977 .get_vblank_timestamp = drm_calc_vbltimestamp_from_scanoutpos,
77145f1c
BS
978
979 .ioctls = nouveau_ioctls,
baa70943 980 .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
77145f1c
BS
981 .fops = &nouveau_driver_fops,
982
983 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
984 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
ab9ccb96
AP
985 .gem_prime_export = drm_gem_prime_export,
986 .gem_prime_import = drm_gem_prime_import,
987 .gem_prime_pin = nouveau_gem_prime_pin,
3aac4502 988 .gem_prime_res_obj = nouveau_gem_prime_res_obj,
1af7c7dd 989 .gem_prime_unpin = nouveau_gem_prime_unpin,
ab9ccb96
AP
990 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
991 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
992 .gem_prime_vmap = nouveau_gem_prime_vmap,
993 .gem_prime_vunmap = nouveau_gem_prime_vunmap,
77145f1c 994
a51e6ac4 995 .gem_free_object_unlocked = nouveau_gem_object_del,
77145f1c
BS
996 .gem_open_object = nouveau_gem_object_open,
997 .gem_close_object = nouveau_gem_object_close,
998
999 .dumb_create = nouveau_display_dumb_create,
1000 .dumb_map_offset = nouveau_display_dumb_map_offset,
77145f1c
BS
1001
1002 .name = DRIVER_NAME,
1003 .desc = DRIVER_DESC,
1004#ifdef GIT_REVISION
1005 .date = GIT_REVISION,
1006#else
1007 .date = DRIVER_DATE,
1008#endif
1009 .major = DRIVER_MAJOR,
1010 .minor = DRIVER_MINOR,
1011 .patchlevel = DRIVER_PATCHLEVEL,
1012};
1013
94580299
BS
1014static struct pci_device_id
1015nouveau_drm_pci_table[] = {
1016 {
1017 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
1018 .class = PCI_BASE_CLASS_DISPLAY << 16,
1019 .class_mask = 0xff << 16,
1020 },
1021 {
1022 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
1023 .class = PCI_BASE_CLASS_DISPLAY << 16,
1024 .class_mask = 0xff << 16,
1025 },
1026 {}
1027};
1028
703fa264
PM
1029static void nouveau_display_options(void)
1030{
1031 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
1032
1033 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
1034 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
1035 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
1036 DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel);
1037 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
1038 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
1039 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
1040 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
1041 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
1042 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
f3a8b664 1043 DRM_DEBUG_DRIVER("... hdmimhz : %d\n", nouveau_hdmimhz);
703fa264
PM
1044}
1045
2d8b9ccb
DA
1046static const struct dev_pm_ops nouveau_pm_ops = {
1047 .suspend = nouveau_pmops_suspend,
1048 .resume = nouveau_pmops_resume,
1049 .freeze = nouveau_pmops_freeze,
1050 .thaw = nouveau_pmops_thaw,
1051 .poweroff = nouveau_pmops_freeze,
1052 .restore = nouveau_pmops_resume,
5addcf0a
DA
1053 .runtime_suspend = nouveau_pmops_runtime_suspend,
1054 .runtime_resume = nouveau_pmops_runtime_resume,
1055 .runtime_idle = nouveau_pmops_runtime_idle,
2d8b9ccb
DA
1056};
1057
94580299
BS
1058static struct pci_driver
1059nouveau_drm_pci_driver = {
1060 .name = "nouveau",
1061 .id_table = nouveau_drm_pci_table,
1062 .probe = nouveau_drm_probe,
1063 .remove = nouveau_drm_remove,
2d8b9ccb 1064 .driver.pm = &nouveau_pm_ops,
94580299
BS
1065};
1066
8ba9ff11 1067struct drm_device *
e396ecd1
AC
1068nouveau_platform_device_create(const struct nvkm_device_tegra_func *func,
1069 struct platform_device *pdev,
47b2505e 1070 struct nvkm_device **pdevice)
420b9469 1071{
8ba9ff11
AC
1072 struct drm_device *drm;
1073 int err;
420b9469 1074
e396ecd1 1075 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug,
7974dd1b 1076 true, true, ~0ULL, pdevice);
8ba9ff11 1077 if (err)
e781dc8f 1078 goto err_free;
8ba9ff11 1079
915b4d11 1080 drm = drm_dev_alloc(&driver_platform, &pdev->dev);
0f288605
TG
1081 if (IS_ERR(drm)) {
1082 err = PTR_ERR(drm);
8ba9ff11 1083 goto err_free;
420b9469
AC
1084 }
1085
8ba9ff11
AC
1086 platform_set_drvdata(pdev, drm);
1087
1088 return drm;
1089
1090err_free:
e781dc8f 1091 nvkm_device_del(pdevice);
8ba9ff11
AC
1092
1093 return ERR_PTR(err);
420b9469
AC
1094}
1095
94580299
BS
1096static int __init
1097nouveau_drm_init(void)
1098{
915b4d11 1099 driver_pci = driver_stub;
915b4d11 1100 driver_platform = driver_stub;
915b4d11 1101
703fa264
PM
1102 nouveau_display_options();
1103
77145f1c 1104 if (nouveau_modeset == -1) {
77145f1c
BS
1105 if (vgacon_text_force())
1106 nouveau_modeset = 0;
77145f1c
BS
1107 }
1108
1109 if (!nouveau_modeset)
1110 return 0;
1111
055a65d5
AC
1112#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1113 platform_driver_register(&nouveau_platform_driver);
1114#endif
1115
77145f1c 1116 nouveau_register_dsm_handler();
db1a0ae2 1117 nouveau_backlight_ctor();
10631d72
DV
1118
1119#ifdef CONFIG_PCI
1120 return pci_register_driver(&nouveau_drm_pci_driver);
1121#else
1122 return 0;
1123#endif
94580299
BS
1124}
1125
1126static void __exit
1127nouveau_drm_exit(void)
1128{
77145f1c
BS
1129 if (!nouveau_modeset)
1130 return;
1131
10631d72
DV
1132#ifdef CONFIG_PCI
1133 pci_unregister_driver(&nouveau_drm_pci_driver);
1134#endif
db1a0ae2 1135 nouveau_backlight_dtor();
77145f1c 1136 nouveau_unregister_dsm_handler();
055a65d5
AC
1137
1138#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1139 platform_driver_unregister(&nouveau_platform_driver);
1140#endif
94580299
BS
1141}
1142
1143module_init(nouveau_drm_init);
1144module_exit(nouveau_drm_exit);
1145
1146MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
77145f1c
BS
1147MODULE_AUTHOR(DRIVER_AUTHOR);
1148MODULE_DESCRIPTION(DRIVER_DESC);
94580299 1149MODULE_LICENSE("GPL and additional rights");