]>
Commit | Line | Data |
---|---|---|
94580299 BS |
1 | #ifndef __NOUVEAU_DRMCLI_H__ |
2 | #define __NOUVEAU_DRMCLI_H__ | |
3 | ||
77145f1c BS |
4 | #define DRIVER_AUTHOR "Nouveau Project" |
5 | #define DRIVER_EMAIL "nouveau@lists.freedesktop.org" | |
6 | ||
7 | #define DRIVER_NAME "nouveau" | |
8 | #define DRIVER_DESC "nVidia Riva/TNT/GeForce/Quadro/Tesla" | |
9 | #define DRIVER_DATE "20120801" | |
10 | ||
11 | #define DRIVER_MAJOR 1 | |
12 | #define DRIVER_MINOR 1 | |
142c21b8 CB |
13 | #define DRIVER_PATCHLEVEL 1 |
14 | ||
15 | /* | |
16 | * 1.1.1: | |
17 | * - added support for tiled system memory buffer objects | |
18 | * - added support for NOUVEAU_GETPARAM_GRAPH_UNITS on [nvc0,nve0]. | |
19 | * - added support for compressed memory storage types on [nvc0,nve0]. | |
20 | * - added support for software methods 0x600,0x644,0x6ac on nvc0 | |
21 | * to control registers on the MPs to enable performance counters, | |
22 | * and to control the warp error enable mask (OpenGL requires out of | |
23 | * bounds access to local memory to be silently ignored / return 0). | |
24 | */ | |
77145f1c | 25 | |
94580299 | 26 | #include <core/client.h> |
1d7c71a3 | 27 | #include <core/event.h> |
94580299 | 28 | |
ebb945a9 BS |
29 | #include <subdev/vm.h> |
30 | ||
94580299 BS |
31 | #include <drmP.h> |
32 | #include <drm/nouveau_drm.h> | |
33 | ||
612a9aab LT |
34 | #include <drm/ttm/ttm_bo_api.h> |
35 | #include <drm/ttm/ttm_bo_driver.h> | |
36 | #include <drm/ttm/ttm_placement.h> | |
37 | #include <drm/ttm/ttm_memory.h> | |
38 | #include <drm/ttm/ttm_module.h> | |
39 | #include <drm/ttm/ttm_page_alloc.h> | |
ebb945a9 BS |
40 | |
41 | struct nouveau_channel; | |
42 | ||
43 | #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT) | |
44 | ||
ebb945a9 | 45 | #include "nouveau_fence.h" |
77145f1c | 46 | #include "nouveau_bios.h" |
ebb945a9 BS |
47 | |
48 | struct nouveau_drm_tile { | |
49 | struct nouveau_fence *fence; | |
50 | bool used; | |
51 | }; | |
52 | ||
94580299 BS |
53 | enum nouveau_drm_handle { |
54 | NVDRM_CLIENT = 0xffffffff, | |
55 | NVDRM_DEVICE = 0xdddddddd, | |
ebb945a9 BS |
56 | NVDRM_PUSH = 0xbbbb0000, /* |= client chid */ |
57 | NVDRM_CHAN = 0xcccc0000, /* |= client chid */ | |
94580299 BS |
58 | }; |
59 | ||
60 | struct nouveau_cli { | |
61 | struct nouveau_client base; | |
62 | struct list_head head; | |
63 | struct mutex mutex; | |
ebb945a9 | 64 | void *abi16; |
94580299 BS |
65 | }; |
66 | ||
ebb945a9 BS |
67 | static inline struct nouveau_cli * |
68 | nouveau_cli(struct drm_file *fpriv) | |
69 | { | |
70 | return fpriv ? fpriv->driver_priv : NULL; | |
71 | } | |
72 | ||
5addcf0a DA |
73 | extern int nouveau_runtime_pm; |
74 | ||
94580299 BS |
75 | struct nouveau_drm { |
76 | struct nouveau_cli client; | |
77 | struct drm_device *dev; | |
78 | ||
79 | struct nouveau_object *device; | |
80 | struct list_head clients; | |
cb75d97e BS |
81 | |
82 | struct { | |
83 | enum { | |
84 | UNKNOWN = 0, | |
85 | DISABLE = 1, | |
86 | ENABLED = 2 | |
87 | } stat; | |
88 | u32 base; | |
89 | u32 size; | |
90 | } agp; | |
ebb945a9 BS |
91 | |
92 | /* TTM interface support */ | |
93 | struct { | |
94 | struct drm_global_reference mem_global_ref; | |
95 | struct ttm_bo_global_ref bo_global_ref; | |
96 | struct ttm_bo_device bdev; | |
97 | atomic_t validate_sequence; | |
98 | int (*move)(struct nouveau_channel *, | |
99 | struct ttm_buffer_object *, | |
100 | struct ttm_mem_reg *, struct ttm_mem_reg *); | |
1bb3f6a2 | 101 | struct nouveau_channel *chan; |
ebb945a9 BS |
102 | int mtrr; |
103 | } ttm; | |
104 | ||
105 | /* GEM interface support */ | |
106 | struct { | |
107 | u64 vram_available; | |
108 | u64 gart_available; | |
109 | } gem; | |
110 | ||
111 | /* synchronisation */ | |
112 | void *fence; | |
113 | ||
114 | /* context for accelerated drm-internal operations */ | |
49981046 | 115 | struct nouveau_channel *cechan; |
ebb945a9 BS |
116 | struct nouveau_channel *channel; |
117 | struct nouveau_gpuobj *notify; | |
118 | struct nouveau_fbdev *fbcon; | |
119 | ||
120 | /* nv10-nv40 tiling regions */ | |
121 | struct { | |
122 | struct nouveau_drm_tile reg[15]; | |
123 | spinlock_t lock; | |
124 | } tile; | |
51a3d342 | 125 | |
77145f1c BS |
126 | /* modesetting */ |
127 | struct nvbios vbios; | |
128 | struct nouveau_display *display; | |
51a3d342 | 129 | struct backlight_device *backlight; |
77145f1c BS |
130 | |
131 | /* power management */ | |
b9ed919f | 132 | struct nouveau_hwmon *hwmon; |
5addcf0a DA |
133 | |
134 | /* display power reference */ | |
135 | bool have_disp_power_ref; | |
136 | ||
137 | struct dev_pm_domain vga_pm_domain; | |
138 | struct pci_dev *hdmi_device; | |
94580299 BS |
139 | }; |
140 | ||
ebb945a9 BS |
141 | static inline struct nouveau_drm * |
142 | nouveau_drm(struct drm_device *dev) | |
143 | { | |
77145f1c BS |
144 | return dev->dev_private; |
145 | } | |
146 | ||
147 | static inline struct nouveau_device * | |
148 | nouveau_dev(struct drm_device *dev) | |
149 | { | |
150 | return nv_device(nouveau_drm(dev)->device); | |
ebb945a9 BS |
151 | } |
152 | ||
2d8b9ccb DA |
153 | int nouveau_pmops_suspend(struct device *); |
154 | int nouveau_pmops_resume(struct device *); | |
94580299 | 155 | |
aa74c375 BS |
156 | #define NV_FATAL(cli, fmt, args...) nv_fatal((cli), fmt, ##args) |
157 | #define NV_ERROR(cli, fmt, args...) nv_error((cli), fmt, ##args) | |
158 | #define NV_WARN(cli, fmt, args...) nv_warn((cli), fmt, ##args) | |
159 | #define NV_INFO(cli, fmt, args...) nv_info((cli), fmt, ##args) | |
160 | #define NV_DEBUG(cli, fmt, args...) do { \ | |
94580299 | 161 | if (drm_debug & DRM_UT_DRIVER) \ |
aa74c375 | 162 | nv_info((cli), fmt, ##args); \ |
94580299 BS |
163 | } while (0) |
164 | ||
9430738d BS |
165 | extern int nouveau_modeset; |
166 | ||
94580299 | 167 | #endif |