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1 | #ifndef __NOUVEAU_DRMCLI_H__ |
2 | #define __NOUVEAU_DRMCLI_H__ | |
3 | ||
77145f1c BS |
4 | #define DRIVER_AUTHOR "Nouveau Project" |
5 | #define DRIVER_EMAIL "nouveau@lists.freedesktop.org" | |
6 | ||
7 | #define DRIVER_NAME "nouveau" | |
8 | #define DRIVER_DESC "nVidia Riva/TNT/GeForce/Quadro/Tesla" | |
9 | #define DRIVER_DATE "20120801" | |
10 | ||
11 | #define DRIVER_MAJOR 1 | |
a3c1ff87 | 12 | #define DRIVER_MINOR 3 |
79ef5dca | 13 | #define DRIVER_PATCHLEVEL 1 |
142c21b8 CB |
14 | |
15 | /* | |
16 | * 1.1.1: | |
17 | * - added support for tiled system memory buffer objects | |
18 | * - added support for NOUVEAU_GETPARAM_GRAPH_UNITS on [nvc0,nve0]. | |
19 | * - added support for compressed memory storage types on [nvc0,nve0]. | |
20 | * - added support for software methods 0x600,0x644,0x6ac on nvc0 | |
21 | * to control registers on the MPs to enable performance counters, | |
22 | * and to control the warp error enable mask (OpenGL requires out of | |
23 | * bounds access to local memory to be silently ignored / return 0). | |
7820e5ee MK |
24 | * 1.1.2: |
25 | * - fixes multiple bugs in flip completion events and timestamping | |
27111a23 BS |
26 | * 1.2.0: |
27 | * - object api exposed to userspace | |
28 | * - fermi,kepler,maxwell zbc | |
055dffdf ML |
29 | * 1.2.1: |
30 | * - allow concurrent access to bo's mapped read/write. | |
82452755 BS |
31 | * 1.2.2: |
32 | * - add NOUVEAU_GEM_DOMAIN_COHERENT flag | |
a3c1ff87 BS |
33 | * 1.3.0: |
34 | * - NVIF ABI modified, safe because only (current) users are test | |
35 | * programs that get directly linked with NVKM. | |
79ef5dca BS |
36 | * 1.3.1: |
37 | * - implemented limited ABI16/NVIF interop | |
142c21b8 | 38 | */ |
77145f1c | 39 | |
0ad72863 BS |
40 | #include <nvif/client.h> |
41 | #include <nvif/device.h> | |
f5e55187 | 42 | #include <nvif/ioctl.h> |
0ad72863 | 43 | |
94580299 | 44 | #include <drmP.h> |
94580299 | 45 | |
612a9aab LT |
46 | #include <drm/ttm/ttm_bo_api.h> |
47 | #include <drm/ttm/ttm_bo_driver.h> | |
48 | #include <drm/ttm/ttm_placement.h> | |
49 | #include <drm/ttm/ttm_memory.h> | |
50 | #include <drm/ttm/ttm_module.h> | |
51 | #include <drm/ttm/ttm_page_alloc.h> | |
ebb945a9 | 52 | |
a4e610b5 BS |
53 | #include "uapi/drm/nouveau_drm.h" |
54 | ||
ebb945a9 | 55 | struct nouveau_channel; |
8ba9ff11 | 56 | struct platform_device; |
ebb945a9 BS |
57 | |
58 | #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT) | |
59 | ||
ebb945a9 | 60 | #include "nouveau_fence.h" |
77145f1c | 61 | #include "nouveau_bios.h" |
ebb945a9 BS |
62 | |
63 | struct nouveau_drm_tile { | |
64 | struct nouveau_fence *fence; | |
65 | bool used; | |
66 | }; | |
67 | ||
0ad72863 | 68 | enum nouveau_drm_object_route { |
f5e55187 | 69 | NVDRM_OBJECT_NVIF = NVIF_IOCTL_V0_OWNER_NVIF, |
0ad72863 BS |
70 | NVDRM_OBJECT_USIF, |
71 | NVDRM_OBJECT_ABI16, | |
f5e55187 | 72 | NVDRM_OBJECT_ANY = NVIF_IOCTL_V0_OWNER_ANY, |
0ad72863 BS |
73 | }; |
74 | ||
75 | enum nouveau_drm_notify_route { | |
76 | NVDRM_NOTIFY_NVIF = 0, | |
77 | NVDRM_NOTIFY_USIF | |
78 | }; | |
79 | ||
94580299 | 80 | enum nouveau_drm_handle { |
26fdd78c | 81 | NVDRM_CHAN = 0xcccc0000, /* |= client chid */ |
69a6146d | 82 | NVDRM_NVSW = 0x55550000, |
94580299 BS |
83 | }; |
84 | ||
85 | struct nouveau_cli { | |
0ad72863 | 86 | struct nvif_client base; |
be83cd4e | 87 | struct nvkm_vm *vm; /*XXX*/ |
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88 | struct list_head head; |
89 | struct mutex mutex; | |
ebb945a9 | 90 | void *abi16; |
27111a23 BS |
91 | struct list_head objects; |
92 | struct list_head notifys; | |
9ad97ede BS |
93 | char name[32]; |
94 | struct drm_device *dev; | |
94580299 BS |
95 | }; |
96 | ||
ebb945a9 BS |
97 | static inline struct nouveau_cli * |
98 | nouveau_cli(struct drm_file *fpriv) | |
99 | { | |
100 | return fpriv ? fpriv->driver_priv : NULL; | |
101 | } | |
102 | ||
967e7bde | 103 | #include <nvif/object.h> |
967e7bde | 104 | #include <nvif/device.h> |
db2bec18 | 105 | |
5addcf0a DA |
106 | extern int nouveau_runtime_pm; |
107 | ||
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108 | struct nouveau_drm { |
109 | struct nouveau_cli client; | |
110 | struct drm_device *dev; | |
111 | ||
967e7bde | 112 | struct nvif_device device; |
94580299 | 113 | struct list_head clients; |
cb75d97e BS |
114 | |
115 | struct { | |
340b0e7c | 116 | struct agp_bridge_data *bridge; |
cb75d97e BS |
117 | u32 base; |
118 | u32 size; | |
340b0e7c | 119 | bool cma; |
cb75d97e | 120 | } agp; |
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121 | |
122 | /* TTM interface support */ | |
123 | struct { | |
124 | struct drm_global_reference mem_global_ref; | |
125 | struct ttm_bo_global_ref bo_global_ref; | |
126 | struct ttm_bo_device bdev; | |
127 | atomic_t validate_sequence; | |
128 | int (*move)(struct nouveau_channel *, | |
129 | struct ttm_buffer_object *, | |
130 | struct ttm_mem_reg *, struct ttm_mem_reg *); | |
1bb3f6a2 | 131 | struct nouveau_channel *chan; |
0ad72863 | 132 | struct nvif_object copy; |
ebb945a9 BS |
133 | int mtrr; |
134 | } ttm; | |
135 | ||
136 | /* GEM interface support */ | |
137 | struct { | |
138 | u64 vram_available; | |
139 | u64 gart_available; | |
140 | } gem; | |
141 | ||
142 | /* synchronisation */ | |
143 | void *fence; | |
144 | ||
145 | /* context for accelerated drm-internal operations */ | |
49981046 | 146 | struct nouveau_channel *cechan; |
ebb945a9 | 147 | struct nouveau_channel *channel; |
be83cd4e | 148 | struct nvkm_gpuobj *notify; |
ebb945a9 | 149 | struct nouveau_fbdev *fbcon; |
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150 | struct nvif_object nvsw; |
151 | struct nvif_object ntfy; | |
898a2b32 | 152 | struct nvif_notify flip; |
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153 | |
154 | /* nv10-nv40 tiling regions */ | |
155 | struct { | |
156 | struct nouveau_drm_tile reg[15]; | |
157 | spinlock_t lock; | |
158 | } tile; | |
51a3d342 | 159 | |
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160 | /* modesetting */ |
161 | struct nvbios vbios; | |
162 | struct nouveau_display *display; | |
51a3d342 | 163 | struct backlight_device *backlight; |
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164 | |
165 | /* power management */ | |
b9ed919f | 166 | struct nouveau_hwmon *hwmon; |
b126a200 | 167 | struct nouveau_debugfs *debugfs; |
5addcf0a DA |
168 | |
169 | /* display power reference */ | |
170 | bool have_disp_power_ref; | |
171 | ||
172 | struct dev_pm_domain vga_pm_domain; | |
173 | struct pci_dev *hdmi_device; | |
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174 | }; |
175 | ||
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176 | static inline struct nouveau_drm * |
177 | nouveau_drm(struct drm_device *dev) | |
178 | { | |
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179 | return dev->dev_private; |
180 | } | |
181 | ||
2d8b9ccb DA |
182 | int nouveau_pmops_suspend(struct device *); |
183 | int nouveau_pmops_resume(struct device *); | |
94580299 | 184 | |
e396ecd1 AC |
185 | #include <nvkm/core/tegra.h> |
186 | ||
8ba9ff11 | 187 | struct drm_device * |
e396ecd1 AC |
188 | nouveau_platform_device_create(const struct nvkm_device_tegra_func *, |
189 | struct platform_device *, struct nvkm_device **); | |
8ba9ff11 AC |
190 | void nouveau_drm_device_remove(struct drm_device *dev); |
191 | ||
fa2bade9 BS |
192 | #define NV_PRINTK(l,c,f,a...) do { \ |
193 | struct nouveau_cli *_cli = (c); \ | |
9ad97ede | 194 | dev_##l(_cli->dev->dev, "%s: "f, _cli->name, ##a); \ |
fa2bade9 | 195 | } while(0) |
9ad97ede BS |
196 | #define NV_FATAL(drm,f,a...) NV_PRINTK(crit, &(drm)->client, f, ##a) |
197 | #define NV_ERROR(drm,f,a...) NV_PRINTK(err, &(drm)->client, f, ##a) | |
fa2bade9 BS |
198 | #define NV_WARN(drm,f,a...) NV_PRINTK(warn, &(drm)->client, f, ##a) |
199 | #define NV_INFO(drm,f,a...) NV_PRINTK(info, &(drm)->client, f, ##a) | |
9ad97ede BS |
200 | #define NV_DEBUG(drm,f,a...) do { \ |
201 | if (unlikely(drm_debug & DRM_UT_DRIVER)) \ | |
202 | NV_PRINTK(info, &(drm)->client, f, ##a); \ | |
203 | } while(0) | |
94580299 | 204 | |
9430738d BS |
205 | extern int nouveau_modeset; |
206 | ||
94580299 | 207 | #endif |