]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blame - drivers/gpu/drm/nouveau/nouveau_drv.h
drm/nouveau/mmu: remove old vmm frontend
[mirror_ubuntu-bionic-kernel.git] / drivers / gpu / drm / nouveau / nouveau_drv.h
CommitLineData
4dc28134
BS
1#ifndef __NOUVEAU_DRV_H__
2#define __NOUVEAU_DRV_H__
94580299 3
77145f1c
BS
4#define DRIVER_AUTHOR "Nouveau Project"
5#define DRIVER_EMAIL "nouveau@lists.freedesktop.org"
6
7#define DRIVER_NAME "nouveau"
451b58d2 8#define DRIVER_DESC "nVidia Riva/TNT/GeForce/Quadro/Tesla/Tegra K1+"
77145f1c
BS
9#define DRIVER_DATE "20120801"
10
11#define DRIVER_MAJOR 1
a3c1ff87 12#define DRIVER_MINOR 3
79ef5dca 13#define DRIVER_PATCHLEVEL 1
142c21b8
CB
14
15/*
16 * 1.1.1:
17 * - added support for tiled system memory buffer objects
18 * - added support for NOUVEAU_GETPARAM_GRAPH_UNITS on [nvc0,nve0].
19 * - added support for compressed memory storage types on [nvc0,nve0].
20 * - added support for software methods 0x600,0x644,0x6ac on nvc0
21 * to control registers on the MPs to enable performance counters,
22 * and to control the warp error enable mask (OpenGL requires out of
23 * bounds access to local memory to be silently ignored / return 0).
7820e5ee
MK
24 * 1.1.2:
25 * - fixes multiple bugs in flip completion events and timestamping
27111a23
BS
26 * 1.2.0:
27 * - object api exposed to userspace
28 * - fermi,kepler,maxwell zbc
055dffdf
ML
29 * 1.2.1:
30 * - allow concurrent access to bo's mapped read/write.
82452755
BS
31 * 1.2.2:
32 * - add NOUVEAU_GEM_DOMAIN_COHERENT flag
a3c1ff87
BS
33 * 1.3.0:
34 * - NVIF ABI modified, safe because only (current) users are test
35 * programs that get directly linked with NVKM.
79ef5dca
BS
36 * 1.3.1:
37 * - implemented limited ABI16/NVIF interop
142c21b8 38 */
77145f1c 39
3a6536c5
HG
40#include <linux/notifier.h>
41
0ad72863
BS
42#include <nvif/client.h>
43#include <nvif/device.h>
f5e55187 44#include <nvif/ioctl.h>
01670a79 45#include <nvif/mmu.h>
96da0bcd 46#include <nvif/vmm.h>
0ad72863 47
ae95621b 48#include <drm/drmP.h>
94580299 49
612a9aab
LT
50#include <drm/ttm/ttm_bo_api.h>
51#include <drm/ttm/ttm_bo_driver.h>
52#include <drm/ttm/ttm_placement.h>
53#include <drm/ttm/ttm_memory.h>
54#include <drm/ttm/ttm_module.h>
55#include <drm/ttm/ttm_page_alloc.h>
ebb945a9 56
a4e610b5
BS
57#include "uapi/drm/nouveau_drm.h"
58
ebb945a9 59struct nouveau_channel;
8ba9ff11 60struct platform_device;
ebb945a9
BS
61
62#define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
63
ebb945a9 64#include "nouveau_fence.h"
77145f1c 65#include "nouveau_bios.h"
24e8375b 66#include "nouveau_vmm.h"
ebb945a9
BS
67
68struct nouveau_drm_tile {
69 struct nouveau_fence *fence;
70 bool used;
71};
72
0ad72863 73enum nouveau_drm_object_route {
f5e55187 74 NVDRM_OBJECT_NVIF = NVIF_IOCTL_V0_OWNER_NVIF,
0ad72863
BS
75 NVDRM_OBJECT_USIF,
76 NVDRM_OBJECT_ABI16,
f5e55187 77 NVDRM_OBJECT_ANY = NVIF_IOCTL_V0_OWNER_ANY,
0ad72863
BS
78};
79
80enum nouveau_drm_notify_route {
81 NVDRM_NOTIFY_NVIF = 0,
82 NVDRM_NOTIFY_USIF
83};
84
94580299 85enum nouveau_drm_handle {
26fdd78c 86 NVDRM_CHAN = 0xcccc0000, /* |= client chid */
69a6146d 87 NVDRM_NVSW = 0x55550000,
94580299
BS
88};
89
90struct nouveau_cli {
0ad72863 91 struct nvif_client base;
e75c091b 92 struct nouveau_drm *drm;
20d8a88e
BS
93 struct mutex mutex;
94
1167c6bc 95 struct nvif_device device;
01670a79 96 struct nvif_mmu mmu;
24e8375b 97 struct nouveau_vmm vmm;
7f507624 98 const struct nvif_mclass *mem;
1167c6bc 99
94580299 100 struct list_head head;
ebb945a9 101 void *abi16;
27111a23
BS
102 struct list_head objects;
103 struct list_head notifys;
9ad97ede 104 char name[32];
cb7e88e7 105
814a2324
BS
106 struct work_struct work;
107 struct list_head worker;
cb7e88e7 108 struct mutex lock;
94580299
BS
109};
110
814a2324
BS
111struct nouveau_cli_work {
112 void (*func)(struct nouveau_cli_work *);
113 struct nouveau_cli *cli;
114 struct list_head head;
115
116 struct dma_fence *fence;
117 struct dma_fence_cb cb;
118};
119
120void nouveau_cli_work_queue(struct nouveau_cli *, struct dma_fence *,
121 struct nouveau_cli_work *);
122
ebb945a9
BS
123static inline struct nouveau_cli *
124nouveau_cli(struct drm_file *fpriv)
125{
126 return fpriv ? fpriv->driver_priv : NULL;
127}
128
967e7bde 129#include <nvif/object.h>
967e7bde 130#include <nvif/device.h>
db2bec18 131
94580299 132struct nouveau_drm {
cb7e88e7 133 struct nouveau_cli master;
94580299
BS
134 struct nouveau_cli client;
135 struct drm_device *dev;
136
94580299 137 struct list_head clients;
cb75d97e
BS
138
139 struct {
340b0e7c 140 struct agp_bridge_data *bridge;
cb75d97e
BS
141 u32 base;
142 u32 size;
340b0e7c 143 bool cma;
cb75d97e 144 } agp;
ebb945a9
BS
145
146 /* TTM interface support */
147 struct {
148 struct drm_global_reference mem_global_ref;
149 struct ttm_bo_global_ref bo_global_ref;
150 struct ttm_bo_device bdev;
151 atomic_t validate_sequence;
152 int (*move)(struct nouveau_channel *,
153 struct ttm_buffer_object *,
154 struct ttm_mem_reg *, struct ttm_mem_reg *);
1bb3f6a2 155 struct nouveau_channel *chan;
0ad72863 156 struct nvif_object copy;
ebb945a9 157 int mtrr;
658c71f4
BS
158 int type_vram;
159 int type_host;
160 int type_ncoh;
ebb945a9
BS
161 } ttm;
162
163 /* GEM interface support */
164 struct {
165 u64 vram_available;
166 u64 gart_available;
167 } gem;
168
169 /* synchronisation */
170 void *fence;
171
172 /* context for accelerated drm-internal operations */
49981046 173 struct nouveau_channel *cechan;
ebb945a9 174 struct nouveau_channel *channel;
be83cd4e 175 struct nvkm_gpuobj *notify;
ebb945a9 176 struct nouveau_fbdev *fbcon;
0ad72863
BS
177 struct nvif_object nvsw;
178 struct nvif_object ntfy;
898a2b32 179 struct nvif_notify flip;
ebb945a9
BS
180
181 /* nv10-nv40 tiling regions */
182 struct {
183 struct nouveau_drm_tile reg[15];
184 spinlock_t lock;
185 } tile;
51a3d342 186
77145f1c
BS
187 /* modesetting */
188 struct nvbios vbios;
189 struct nouveau_display *display;
51a3d342 190 struct backlight_device *backlight;
db1a0ae2 191 struct list_head bl_connectors;
81280d0e 192 struct work_struct hpd_work;
15266ae3
LP
193 struct work_struct fbcon_work;
194 int fbcon_new_state;
3a6536c5
HG
195#ifdef CONFIG_ACPI
196 struct notifier_block acpi_nb;
3a6536c5 197#endif
77145f1c
BS
198
199 /* power management */
b9ed919f 200 struct nouveau_hwmon *hwmon;
b126a200 201 struct nouveau_debugfs *debugfs;
5addcf0a 202
8d021d71
MP
203 /* led management */
204 struct nouveau_led *led;
205
5addcf0a
DA
206 /* display power reference */
207 bool have_disp_power_ref;
208
209 struct dev_pm_domain vga_pm_domain;
210 struct pci_dev *hdmi_device;
94580299
BS
211};
212
ebb945a9
BS
213static inline struct nouveau_drm *
214nouveau_drm(struct drm_device *dev)
215{
77145f1c
BS
216 return dev->dev_private;
217}
218
2d8b9ccb
DA
219int nouveau_pmops_suspend(struct device *);
220int nouveau_pmops_resume(struct device *);
321f5c5f 221bool nouveau_pmops_runtime(void);
94580299 222
e396ecd1
AC
223#include <nvkm/core/tegra.h>
224
8ba9ff11 225struct drm_device *
e396ecd1
AC
226nouveau_platform_device_create(const struct nvkm_device_tegra_func *,
227 struct platform_device *, struct nvkm_device **);
8ba9ff11
AC
228void nouveau_drm_device_remove(struct drm_device *dev);
229
fa2bade9
BS
230#define NV_PRINTK(l,c,f,a...) do { \
231 struct nouveau_cli *_cli = (c); \
e75c091b 232 dev_##l(_cli->drm->dev->dev, "%s: "f, _cli->name, ##a); \
fa2bade9 233} while(0)
9ad97ede
BS
234#define NV_FATAL(drm,f,a...) NV_PRINTK(crit, &(drm)->client, f, ##a)
235#define NV_ERROR(drm,f,a...) NV_PRINTK(err, &(drm)->client, f, ##a)
fa2bade9
BS
236#define NV_WARN(drm,f,a...) NV_PRINTK(warn, &(drm)->client, f, ##a)
237#define NV_INFO(drm,f,a...) NV_PRINTK(info, &(drm)->client, f, ##a)
9ad97ede
BS
238#define NV_DEBUG(drm,f,a...) do { \
239 if (unlikely(drm_debug & DRM_UT_DRIVER)) \
240 NV_PRINTK(info, &(drm)->client, f, ##a); \
241} while(0)
3dbd036b
BS
242#define NV_ATOMIC(drm,f,a...) do { \
243 if (unlikely(drm_debug & DRM_UT_ATOMIC)) \
244 NV_PRINTK(info, &(drm)->client, f, ##a); \
245} while(0)
94580299 246
9430738d
BS
247extern int nouveau_modeset;
248
94580299 249#endif