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drm/nouveau: Expose some BO usage flags to userspace.
[mirror_ubuntu-bionic-kernel.git] / drivers / gpu / drm / nouveau / nouveau_gem.c
CommitLineData
6ee73861
BS
1/*
2 * Copyright (C) 2008 Ben Skeggs.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 *
25 */
26#include "drmP.h"
27#include "drm.h"
28
29#include "nouveau_drv.h"
30#include "nouveau_drm.h"
31#include "nouveau_dma.h"
32
33#define nouveau_gem_pushbuf_sync(chan) 0
34
35int
36nouveau_gem_object_new(struct drm_gem_object *gem)
37{
38 return 0;
39}
40
41void
42nouveau_gem_object_del(struct drm_gem_object *gem)
43{
44 struct nouveau_bo *nvbo = gem->driver_private;
45 struct ttm_buffer_object *bo = &nvbo->bo;
46
47 if (!nvbo)
48 return;
49 nvbo->gem = NULL;
50
51 if (unlikely(nvbo->cpu_filp))
52 ttm_bo_synccpu_write_release(bo);
53
54 if (unlikely(nvbo->pin_refcnt)) {
55 nvbo->pin_refcnt = 1;
56 nouveau_bo_unpin(nvbo);
57 }
58
59 ttm_bo_unref(&bo);
fd632aa3
DV
60
61 drm_gem_object_release(gem);
62 kfree(gem);
6ee73861
BS
63}
64
65int
66nouveau_gem_new(struct drm_device *dev, struct nouveau_channel *chan,
67 int size, int align, uint32_t flags, uint32_t tile_mode,
68 uint32_t tile_flags, bool no_vm, bool mappable,
69 struct nouveau_bo **pnvbo)
70{
71 struct nouveau_bo *nvbo;
72 int ret;
73
74 ret = nouveau_bo_new(dev, chan, size, align, flags, tile_mode,
75 tile_flags, no_vm, mappable, pnvbo);
76 if (ret)
77 return ret;
78 nvbo = *pnvbo;
79
80 nvbo->gem = drm_gem_object_alloc(dev, nvbo->bo.mem.size);
81 if (!nvbo->gem) {
82 nouveau_bo_ref(NULL, pnvbo);
83 return -ENOMEM;
84 }
85
86 nvbo->bo.persistant_swap_storage = nvbo->gem->filp;
87 nvbo->gem->driver_private = nvbo;
88 return 0;
89}
90
91static int
92nouveau_gem_info(struct drm_gem_object *gem, struct drm_nouveau_gem_info *rep)
93{
94 struct nouveau_bo *nvbo = nouveau_gem_object(gem);
95
96 if (nvbo->bo.mem.mem_type == TTM_PL_TT)
97 rep->domain = NOUVEAU_GEM_DOMAIN_GART;
98 else
99 rep->domain = NOUVEAU_GEM_DOMAIN_VRAM;
100
101 rep->size = nvbo->bo.mem.num_pages << PAGE_SHIFT;
102 rep->offset = nvbo->bo.offset;
103 rep->map_handle = nvbo->mappable ? nvbo->bo.addr_space_offset : 0;
104 rep->tile_mode = nvbo->tile_mode;
105 rep->tile_flags = nvbo->tile_flags;
106 return 0;
107}
108
109static bool
f13b3263
FJ
110nouveau_gem_tile_flags_valid(struct drm_device *dev, uint32_t tile_flags)
111{
112 struct drm_nouveau_private *dev_priv = dev->dev_private;
113
114 if (dev_priv->card_type >= NV_50) {
115 switch (tile_flags & NOUVEAU_GEM_TILE_LAYOUT_MASK) {
116 case 0x0000:
117 case 0x1800:
118 case 0x2800:
119 case 0x4800:
120 case 0x7000:
121 case 0x7400:
122 case 0x7a00:
123 case 0xe000:
124 return true;
125 }
126 } else {
127 if (!(tile_flags & NOUVEAU_GEM_TILE_LAYOUT_MASK))
128 return true;
6ee73861
BS
129 }
130
f13b3263
FJ
131 NV_ERROR(dev, "bad page flags: 0x%08x\n", tile_flags);
132 return false;
6ee73861
BS
133}
134
135int
136nouveau_gem_ioctl_new(struct drm_device *dev, void *data,
137 struct drm_file *file_priv)
138{
139 struct drm_nouveau_private *dev_priv = dev->dev_private;
140 struct drm_nouveau_gem_new *req = data;
141 struct nouveau_bo *nvbo = NULL;
142 struct nouveau_channel *chan = NULL;
143 uint32_t flags = 0;
144 int ret = 0;
145
6ee73861
BS
146 if (unlikely(dev_priv->ttm.bdev.dev_mapping == NULL))
147 dev_priv->ttm.bdev.dev_mapping = dev_priv->dev->dev_mapping;
148
149 if (req->channel_hint) {
150 NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(req->channel_hint,
151 file_priv, chan);
152 }
153
154 if (req->info.domain & NOUVEAU_GEM_DOMAIN_VRAM)
155 flags |= TTM_PL_FLAG_VRAM;
156 if (req->info.domain & NOUVEAU_GEM_DOMAIN_GART)
157 flags |= TTM_PL_FLAG_TT;
158 if (!flags || req->info.domain & NOUVEAU_GEM_DOMAIN_CPU)
159 flags |= TTM_PL_FLAG_SYSTEM;
160
161 if (!nouveau_gem_tile_flags_valid(dev, req->info.tile_flags))
162 return -EINVAL;
163
164 ret = nouveau_gem_new(dev, chan, req->info.size, req->align, flags,
165 req->info.tile_mode, req->info.tile_flags, false,
166 (req->info.domain & NOUVEAU_GEM_DOMAIN_MAPPABLE),
167 &nvbo);
168 if (ret)
169 return ret;
170
171 ret = nouveau_gem_info(nvbo->gem, &req->info);
172 if (ret)
173 goto out;
174
175 ret = drm_gem_handle_create(file_priv, nvbo->gem, &req->info.handle);
29d08b3e
DA
176 /* drop reference from allocate - handle holds it now */
177 drm_gem_object_unreference_unlocked(nvbo->gem);
6ee73861 178out:
6ee73861
BS
179 return ret;
180}
181
182static int
183nouveau_gem_set_domain(struct drm_gem_object *gem, uint32_t read_domains,
184 uint32_t write_domains, uint32_t valid_domains)
185{
186 struct nouveau_bo *nvbo = gem->driver_private;
187 struct ttm_buffer_object *bo = &nvbo->bo;
78ad0f7b
FJ
188 uint32_t domains = valid_domains &
189 (write_domains ? write_domains : read_domains);
190 uint32_t pref_flags = 0, valid_flags = 0;
6ee73861 191
78ad0f7b 192 if (!domains)
6ee73861
BS
193 return -EINVAL;
194
78ad0f7b
FJ
195 if (valid_domains & NOUVEAU_GEM_DOMAIN_VRAM)
196 valid_flags |= TTM_PL_FLAG_VRAM;
197
198 if (valid_domains & NOUVEAU_GEM_DOMAIN_GART)
199 valid_flags |= TTM_PL_FLAG_TT;
200
201 if ((domains & NOUVEAU_GEM_DOMAIN_VRAM) &&
202 bo->mem.mem_type == TTM_PL_VRAM)
203 pref_flags |= TTM_PL_FLAG_VRAM;
204
205 else if ((domains & NOUVEAU_GEM_DOMAIN_GART) &&
206 bo->mem.mem_type == TTM_PL_TT)
207 pref_flags |= TTM_PL_FLAG_TT;
208
209 else if (domains & NOUVEAU_GEM_DOMAIN_VRAM)
210 pref_flags |= TTM_PL_FLAG_VRAM;
211
212 else
213 pref_flags |= TTM_PL_FLAG_TT;
214
215 nouveau_bo_placement_set(nvbo, pref_flags, valid_flags);
6ee73861 216
6ee73861
BS
217 return 0;
218}
219
220struct validate_op {
6ee73861
BS
221 struct list_head vram_list;
222 struct list_head gart_list;
223 struct list_head both_list;
224};
225
226static void
227validate_fini_list(struct list_head *list, struct nouveau_fence *fence)
228{
229 struct list_head *entry, *tmp;
230 struct nouveau_bo *nvbo;
231
232 list_for_each_safe(entry, tmp, list) {
233 nvbo = list_entry(entry, struct nouveau_bo, entry);
234 if (likely(fence)) {
235 struct nouveau_fence *prev_fence;
236
237 spin_lock(&nvbo->bo.lock);
238 prev_fence = nvbo->bo.sync_obj;
239 nvbo->bo.sync_obj = nouveau_fence_ref(fence);
240 spin_unlock(&nvbo->bo.lock);
241 nouveau_fence_unref((void *)&prev_fence);
242 }
243
a1606a95
BS
244 if (unlikely(nvbo->validate_mapped)) {
245 ttm_bo_kunmap(&nvbo->kmap);
246 nvbo->validate_mapped = false;
247 }
248
6ee73861
BS
249 list_del(&nvbo->entry);
250 nvbo->reserved_by = NULL;
251 ttm_bo_unreserve(&nvbo->bo);
374c3af8 252 drm_gem_object_unreference_unlocked(nvbo->gem);
6ee73861
BS
253 }
254}
255
256static void
234896a7 257validate_fini(struct validate_op *op, struct nouveau_fence* fence)
6ee73861 258{
234896a7
LB
259 validate_fini_list(&op->vram_list, fence);
260 validate_fini_list(&op->gart_list, fence);
261 validate_fini_list(&op->both_list, fence);
6ee73861
BS
262}
263
264static int
265validate_init(struct nouveau_channel *chan, struct drm_file *file_priv,
266 struct drm_nouveau_gem_pushbuf_bo *pbbo,
267 int nr_buffers, struct validate_op *op)
268{
269 struct drm_device *dev = chan->dev;
270 struct drm_nouveau_private *dev_priv = dev->dev_private;
271 uint32_t sequence;
272 int trycnt = 0;
273 int ret, i;
274
275 sequence = atomic_add_return(1, &dev_priv->ttm.validate_sequence);
276retry:
277 if (++trycnt > 100000) {
278 NV_ERROR(dev, "%s failed and gave up.\n", __func__);
279 return -EINVAL;
280 }
281
282 for (i = 0; i < nr_buffers; i++) {
283 struct drm_nouveau_gem_pushbuf_bo *b = &pbbo[i];
284 struct drm_gem_object *gem;
285 struct nouveau_bo *nvbo;
286
287 gem = drm_gem_object_lookup(dev, file_priv, b->handle);
288 if (!gem) {
289 NV_ERROR(dev, "Unknown handle 0x%08x\n", b->handle);
290 validate_fini(op, NULL);
bf79cb91 291 return -ENOENT;
6ee73861
BS
292 }
293 nvbo = gem->driver_private;
294
295 if (nvbo->reserved_by && nvbo->reserved_by == file_priv) {
296 NV_ERROR(dev, "multiple instances of buffer %d on "
297 "validation list\n", b->handle);
298 validate_fini(op, NULL);
299 return -EINVAL;
300 }
301
302 ret = ttm_bo_reserve(&nvbo->bo, false, false, true, sequence);
303 if (ret) {
304 validate_fini(op, NULL);
305 if (ret == -EAGAIN)
306 ret = ttm_bo_wait_unreserved(&nvbo->bo, false);
374c3af8 307 drm_gem_object_unreference_unlocked(gem);
a1606a95
BS
308 if (ret) {
309 NV_ERROR(dev, "fail reserve\n");
6ee73861 310 return ret;
a1606a95 311 }
6ee73861
BS
312 goto retry;
313 }
314
a1606a95 315 b->user_priv = (uint64_t)(unsigned long)nvbo;
6ee73861
BS
316 nvbo->reserved_by = file_priv;
317 nvbo->pbbo_index = i;
318 if ((b->valid_domains & NOUVEAU_GEM_DOMAIN_VRAM) &&
319 (b->valid_domains & NOUVEAU_GEM_DOMAIN_GART))
320 list_add_tail(&nvbo->entry, &op->both_list);
321 else
322 if (b->valid_domains & NOUVEAU_GEM_DOMAIN_VRAM)
323 list_add_tail(&nvbo->entry, &op->vram_list);
324 else
325 if (b->valid_domains & NOUVEAU_GEM_DOMAIN_GART)
326 list_add_tail(&nvbo->entry, &op->gart_list);
327 else {
328 NV_ERROR(dev, "invalid valid domains: 0x%08x\n",
329 b->valid_domains);
0208843d 330 list_add_tail(&nvbo->entry, &op->both_list);
6ee73861
BS
331 validate_fini(op, NULL);
332 return -EINVAL;
333 }
334
335 if (unlikely(atomic_read(&nvbo->bo.cpu_writers) > 0)) {
336 validate_fini(op, NULL);
337
338 if (nvbo->cpu_filp == file_priv) {
339 NV_ERROR(dev, "bo %p mapped by process trying "
340 "to validate it!\n", nvbo);
341 return -EINVAL;
342 }
343
ab699ec6 344 mutex_unlock(&drm_global_mutex);
6ee73861 345 ret = ttm_bo_wait_cpu(&nvbo->bo, false);
ab699ec6 346 mutex_lock(&drm_global_mutex);
a1606a95
BS
347 if (ret) {
348 NV_ERROR(dev, "fail wait_cpu\n");
6ee73861 349 return ret;
a1606a95 350 }
6ee73861
BS
351 goto retry;
352 }
353 }
354
355 return 0;
356}
357
358static int
359validate_list(struct nouveau_channel *chan, struct list_head *list,
360 struct drm_nouveau_gem_pushbuf_bo *pbbo, uint64_t user_pbbo_ptr)
361{
362 struct drm_nouveau_gem_pushbuf_bo __user *upbbo =
363 (void __force __user *)(uintptr_t)user_pbbo_ptr;
a1606a95 364 struct drm_device *dev = chan->dev;
6ee73861
BS
365 struct nouveau_bo *nvbo;
366 int ret, relocs = 0;
367
368 list_for_each_entry(nvbo, list, entry) {
369 struct drm_nouveau_gem_pushbuf_bo *b = &pbbo[nvbo->pbbo_index];
6ee73861 370
2730723b 371 ret = nouveau_fence_sync(nvbo->bo.sync_obj, chan);
415e6186
BS
372 if (unlikely(ret)) {
373 NV_ERROR(dev, "fail pre-validate sync\n");
374 return ret;
6ee73861
BS
375 }
376
377 ret = nouveau_gem_set_domain(nvbo->gem, b->read_domains,
378 b->write_domains,
379 b->valid_domains);
a1606a95
BS
380 if (unlikely(ret)) {
381 NV_ERROR(dev, "fail set_domain\n");
6ee73861 382 return ret;
a1606a95 383 }
6ee73861 384
415e6186 385 nvbo->channel = (b->read_domains & (1 << 31)) ? NULL : chan;
6ee73861 386 ret = ttm_bo_validate(&nvbo->bo, &nvbo->placement,
9d87fa21 387 false, false, false);
6ee73861 388 nvbo->channel = NULL;
a1606a95
BS
389 if (unlikely(ret)) {
390 NV_ERROR(dev, "fail ttm_validate\n");
6ee73861 391 return ret;
a1606a95 392 }
6ee73861 393
2730723b 394 ret = nouveau_fence_sync(nvbo->bo.sync_obj, chan);
415e6186
BS
395 if (unlikely(ret)) {
396 NV_ERROR(dev, "fail post-validate sync\n");
397 return ret;
398 }
399
a1606a95 400 if (nvbo->bo.offset == b->presumed.offset &&
6ee73861 401 ((nvbo->bo.mem.mem_type == TTM_PL_VRAM &&
a1606a95 402 b->presumed.domain & NOUVEAU_GEM_DOMAIN_VRAM) ||
6ee73861 403 (nvbo->bo.mem.mem_type == TTM_PL_TT &&
a1606a95 404 b->presumed.domain & NOUVEAU_GEM_DOMAIN_GART)))
6ee73861
BS
405 continue;
406
407 if (nvbo->bo.mem.mem_type == TTM_PL_TT)
a1606a95 408 b->presumed.domain = NOUVEAU_GEM_DOMAIN_GART;
6ee73861 409 else
a1606a95
BS
410 b->presumed.domain = NOUVEAU_GEM_DOMAIN_VRAM;
411 b->presumed.offset = nvbo->bo.offset;
412 b->presumed.valid = 0;
6ee73861
BS
413 relocs++;
414
a1606a95
BS
415 if (DRM_COPY_TO_USER(&upbbo[nvbo->pbbo_index].presumed,
416 &b->presumed, sizeof(b->presumed)))
6ee73861
BS
417 return -EFAULT;
418 }
419
420 return relocs;
421}
422
423static int
424nouveau_gem_pushbuf_validate(struct nouveau_channel *chan,
425 struct drm_file *file_priv,
426 struct drm_nouveau_gem_pushbuf_bo *pbbo,
427 uint64_t user_buffers, int nr_buffers,
428 struct validate_op *op, int *apply_relocs)
429{
a1606a95 430 struct drm_device *dev = chan->dev;
6ee73861
BS
431 int ret, relocs = 0;
432
433 INIT_LIST_HEAD(&op->vram_list);
434 INIT_LIST_HEAD(&op->gart_list);
435 INIT_LIST_HEAD(&op->both_list);
436
6ee73861
BS
437 if (nr_buffers == 0)
438 return 0;
439
440 ret = validate_init(chan, file_priv, pbbo, nr_buffers, op);
a1606a95
BS
441 if (unlikely(ret)) {
442 NV_ERROR(dev, "validate_init\n");
6ee73861 443 return ret;
a1606a95 444 }
6ee73861
BS
445
446 ret = validate_list(chan, &op->vram_list, pbbo, user_buffers);
447 if (unlikely(ret < 0)) {
a1606a95 448 NV_ERROR(dev, "validate vram_list\n");
6ee73861
BS
449 validate_fini(op, NULL);
450 return ret;
451 }
452 relocs += ret;
453
454 ret = validate_list(chan, &op->gart_list, pbbo, user_buffers);
455 if (unlikely(ret < 0)) {
a1606a95 456 NV_ERROR(dev, "validate gart_list\n");
6ee73861
BS
457 validate_fini(op, NULL);
458 return ret;
459 }
460 relocs += ret;
461
462 ret = validate_list(chan, &op->both_list, pbbo, user_buffers);
463 if (unlikely(ret < 0)) {
a1606a95 464 NV_ERROR(dev, "validate both_list\n");
6ee73861
BS
465 validate_fini(op, NULL);
466 return ret;
467 }
468 relocs += ret;
469
470 *apply_relocs = relocs;
471 return 0;
472}
473
474static inline void *
475u_memcpya(uint64_t user, unsigned nmemb, unsigned size)
476{
477 void *mem;
478 void __user *userptr = (void __force __user *)(uintptr_t)user;
479
480 mem = kmalloc(nmemb * size, GFP_KERNEL);
481 if (!mem)
482 return ERR_PTR(-ENOMEM);
483
484 if (DRM_COPY_FROM_USER(mem, userptr, nmemb * size)) {
485 kfree(mem);
486 return ERR_PTR(-EFAULT);
487 }
488
489 return mem;
490}
491
492static int
a1606a95
BS
493nouveau_gem_pushbuf_reloc_apply(struct drm_device *dev,
494 struct drm_nouveau_gem_pushbuf *req,
495 struct drm_nouveau_gem_pushbuf_bo *bo)
6ee73861
BS
496{
497 struct drm_nouveau_gem_pushbuf_reloc *reloc = NULL;
12f735b7
LB
498 int ret = 0;
499 unsigned i;
6ee73861 500
a1606a95 501 reloc = u_memcpya(req->relocs, req->nr_relocs, sizeof(*reloc));
6ee73861
BS
502 if (IS_ERR(reloc))
503 return PTR_ERR(reloc);
504
a1606a95 505 for (i = 0; i < req->nr_relocs; i++) {
6ee73861
BS
506 struct drm_nouveau_gem_pushbuf_reloc *r = &reloc[i];
507 struct drm_nouveau_gem_pushbuf_bo *b;
a1606a95 508 struct nouveau_bo *nvbo;
6ee73861
BS
509 uint32_t data;
510
a1606a95
BS
511 if (unlikely(r->bo_index > req->nr_buffers)) {
512 NV_ERROR(dev, "reloc bo index invalid\n");
6ee73861
BS
513 ret = -EINVAL;
514 break;
515 }
516
517 b = &bo[r->bo_index];
a1606a95 518 if (b->presumed.valid)
6ee73861
BS
519 continue;
520
a1606a95
BS
521 if (unlikely(r->reloc_bo_index > req->nr_buffers)) {
522 NV_ERROR(dev, "reloc container bo index invalid\n");
523 ret = -EINVAL;
524 break;
525 }
526 nvbo = (void *)(unsigned long)bo[r->reloc_bo_index].user_priv;
527
528 if (unlikely(r->reloc_bo_offset + 4 >
529 nvbo->bo.mem.num_pages << PAGE_SHIFT)) {
530 NV_ERROR(dev, "reloc outside of bo\n");
531 ret = -EINVAL;
532 break;
533 }
534
535 if (!nvbo->kmap.virtual) {
536 ret = ttm_bo_kmap(&nvbo->bo, 0, nvbo->bo.mem.num_pages,
537 &nvbo->kmap);
538 if (ret) {
539 NV_ERROR(dev, "failed kmap for reloc\n");
540 break;
541 }
542 nvbo->validate_mapped = true;
543 }
544
6ee73861 545 if (r->flags & NOUVEAU_GEM_RELOC_LOW)
a1606a95 546 data = b->presumed.offset + r->data;
6ee73861
BS
547 else
548 if (r->flags & NOUVEAU_GEM_RELOC_HIGH)
a1606a95 549 data = (b->presumed.offset + r->data) >> 32;
6ee73861
BS
550 else
551 data = r->data;
552
553 if (r->flags & NOUVEAU_GEM_RELOC_OR) {
a1606a95 554 if (b->presumed.domain == NOUVEAU_GEM_DOMAIN_GART)
6ee73861
BS
555 data |= r->tor;
556 else
557 data |= r->vor;
558 }
559
a1606a95
BS
560 spin_lock(&nvbo->bo.lock);
561 ret = ttm_bo_wait(&nvbo->bo, false, false, false);
e32b2c88 562 spin_unlock(&nvbo->bo.lock);
a1606a95
BS
563 if (ret) {
564 NV_ERROR(dev, "reloc wait_idle failed: %d\n", ret);
565 break;
566 }
a1606a95
BS
567
568 nouveau_bo_wr32(nvbo, r->reloc_bo_offset >> 2, data);
6ee73861
BS
569 }
570
571 kfree(reloc);
572 return ret;
573}
574
575int
576nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void *data,
577 struct drm_file *file_priv)
578{
a1606a95 579 struct drm_nouveau_private *dev_priv = dev->dev_private;
6ee73861 580 struct drm_nouveau_gem_pushbuf *req = data;
a1606a95
BS
581 struct drm_nouveau_gem_pushbuf_push *push;
582 struct drm_nouveau_gem_pushbuf_bo *bo;
6ee73861
BS
583 struct nouveau_channel *chan;
584 struct validate_op op;
6e86e041 585 struct nouveau_fence *fence = NULL;
a1606a95 586 int i, j, ret = 0, do_reloc = 0;
6ee73861 587
6ee73861
BS
588 NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(req->channel, file_priv, chan);
589
a1606a95
BS
590 req->vram_available = dev_priv->fb_aper_free;
591 req->gart_available = dev_priv->gart_info.aper_free;
592 if (unlikely(req->nr_push == 0))
593 goto out_next;
6ee73861 594
a1606a95
BS
595 if (unlikely(req->nr_push > NOUVEAU_GEM_MAX_PUSH)) {
596 NV_ERROR(dev, "pushbuf push count exceeds limit: %d max %d\n",
597 req->nr_push, NOUVEAU_GEM_MAX_PUSH);
598 return -EINVAL;
6ee73861
BS
599 }
600
a1606a95
BS
601 if (unlikely(req->nr_buffers > NOUVEAU_GEM_MAX_BUFFERS)) {
602 NV_ERROR(dev, "pushbuf bo count exceeds limit: %d max %d\n",
603 req->nr_buffers, NOUVEAU_GEM_MAX_BUFFERS);
604 return -EINVAL;
6ee73861
BS
605 }
606
a1606a95
BS
607 if (unlikely(req->nr_relocs > NOUVEAU_GEM_MAX_RELOCS)) {
608 NV_ERROR(dev, "pushbuf reloc count exceeds limit: %d max %d\n",
609 req->nr_relocs, NOUVEAU_GEM_MAX_RELOCS);
6ee73861
BS
610 return -EINVAL;
611 }
612
a1606a95
BS
613 push = u_memcpya(req->push, req->nr_push, sizeof(*push));
614 if (IS_ERR(push))
615 return PTR_ERR(push);
616
6ee73861 617 bo = u_memcpya(req->buffers, req->nr_buffers, sizeof(*bo));
a1606a95
BS
618 if (IS_ERR(bo)) {
619 kfree(push);
6ee73861 620 return PTR_ERR(bo);
a1606a95 621 }
6ee73861 622
415e6186
BS
623 /* Mark push buffers as being used on PFIFO, the validation code
624 * will then make sure that if the pushbuf bo moves, that they
625 * happen on the kernel channel, which will in turn cause a sync
626 * to happen before we try and submit the push buffer.
627 */
628 for (i = 0; i < req->nr_push; i++) {
629 if (push[i].bo_index >= req->nr_buffers) {
630 NV_ERROR(dev, "push %d buffer not in list\n", i);
631 ret = -EINVAL;
632 goto out;
633 }
634
635 bo[push[i].bo_index].read_domains |= (1 << 31);
636 }
637
6ee73861
BS
638 /* Validate buffer list */
639 ret = nouveau_gem_pushbuf_validate(chan, file_priv, bo, req->buffers,
640 req->nr_buffers, &op, &do_reloc);
641 if (ret) {
642 NV_ERROR(dev, "validate: %d\n", ret);
643 goto out;
644 }
645
6ee73861
BS
646 /* Apply any relocations that are required */
647 if (do_reloc) {
a1606a95 648 ret = nouveau_gem_pushbuf_reloc_apply(dev, req, bo);
6ee73861 649 if (ret) {
6ee73861 650 NV_ERROR(dev, "reloc apply: %d\n", ret);
6ee73861
BS
651 goto out;
652 }
6ee73861 653 }
6ee73861 654
9a391ad8 655 if (chan->dma.ib_max) {
a1606a95 656 ret = nouveau_dma_wait(chan, req->nr_push + 1, 6);
6ee73861 657 if (ret) {
9a391ad8 658 NV_INFO(dev, "nv50cal_space: %d\n", ret);
6ee73861
BS
659 goto out;
660 }
6ee73861 661
a1606a95
BS
662 for (i = 0; i < req->nr_push; i++) {
663 struct nouveau_bo *nvbo = (void *)(unsigned long)
664 bo[push[i].bo_index].user_priv;
665
666 nv50_dma_push(chan, nvbo, push[i].offset,
667 push[i].length);
668 }
9a391ad8 669 } else
ee508b82 670 if (dev_priv->chipset >= 0x25) {
a1606a95 671 ret = RING_SPACE(chan, req->nr_push * 2);
6ee73861
BS
672 if (ret) {
673 NV_ERROR(dev, "cal_space: %d\n", ret);
674 goto out;
675 }
a1606a95
BS
676
677 for (i = 0; i < req->nr_push; i++) {
678 struct nouveau_bo *nvbo = (void *)(unsigned long)
679 bo[push[i].bo_index].user_priv;
680 struct drm_mm_node *mem = nvbo->bo.mem.mm_node;
681
682 OUT_RING(chan, ((mem->start << PAGE_SHIFT) +
683 push[i].offset) | 2);
684 OUT_RING(chan, 0);
685 }
6ee73861 686 } else {
a1606a95 687 ret = RING_SPACE(chan, req->nr_push * (2 + NOUVEAU_DMA_SKIPS));
6ee73861
BS
688 if (ret) {
689 NV_ERROR(dev, "jmp_space: %d\n", ret);
690 goto out;
691 }
6ee73861 692
a1606a95
BS
693 for (i = 0; i < req->nr_push; i++) {
694 struct nouveau_bo *nvbo = (void *)(unsigned long)
695 bo[push[i].bo_index].user_priv;
696 struct drm_mm_node *mem = nvbo->bo.mem.mm_node;
697 uint32_t cmd;
698
699 cmd = chan->pushbuf_base + ((chan->dma.cur + 2) << 2);
700 cmd |= 0x20000000;
701 if (unlikely(cmd != req->suffix0)) {
702 if (!nvbo->kmap.virtual) {
703 ret = ttm_bo_kmap(&nvbo->bo, 0,
704 nvbo->bo.mem.
705 num_pages,
706 &nvbo->kmap);
707 if (ret) {
708 WIND_RING(chan);
709 goto out;
710 }
711 nvbo->validate_mapped = true;
712 }
713
714 nouveau_bo_wr32(nvbo, (push[i].offset +
715 push[i].length - 8) / 4, cmd);
716 }
717
718 OUT_RING(chan, ((mem->start << PAGE_SHIFT) +
719 push[i].offset) | 0x20000000);
6ee73861 720 OUT_RING(chan, 0);
a1606a95
BS
721 for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
722 OUT_RING(chan, 0);
723 }
6ee73861
BS
724 }
725
234896a7 726 ret = nouveau_fence_new(chan, &fence, true);
6ee73861
BS
727 if (ret) {
728 NV_ERROR(dev, "error fencing pushbuf: %d\n", ret);
729 WIND_RING(chan);
730 goto out;
731 }
732
733out:
234896a7
LB
734 validate_fini(&op, fence);
735 nouveau_fence_unref((void**)&fence);
6ee73861 736 kfree(bo);
a1606a95 737 kfree(push);
6ee73861
BS
738
739out_next:
9a391ad8
BS
740 if (chan->dma.ib_max) {
741 req->suffix0 = 0x00000000;
742 req->suffix1 = 0x00000000;
743 } else
ee508b82 744 if (dev_priv->chipset >= 0x25) {
6ee73861
BS
745 req->suffix0 = 0x00020000;
746 req->suffix1 = 0x00000000;
747 } else {
748 req->suffix0 = 0x20000000 |
749 (chan->pushbuf_base + ((chan->dma.cur + 2) << 2));
750 req->suffix1 = 0x00000000;
751 }
752
753 return ret;
754}
755
6ee73861
BS
756static inline uint32_t
757domain_to_ttm(struct nouveau_bo *nvbo, uint32_t domain)
758{
759 uint32_t flags = 0;
760
761 if (domain & NOUVEAU_GEM_DOMAIN_VRAM)
762 flags |= TTM_PL_FLAG_VRAM;
763 if (domain & NOUVEAU_GEM_DOMAIN_GART)
764 flags |= TTM_PL_FLAG_TT;
765
766 return flags;
767}
768
6ee73861
BS
769int
770nouveau_gem_ioctl_cpu_prep(struct drm_device *dev, void *data,
771 struct drm_file *file_priv)
772{
773 struct drm_nouveau_gem_cpu_prep *req = data;
774 struct drm_gem_object *gem;
775 struct nouveau_bo *nvbo;
776 bool no_wait = !!(req->flags & NOUVEAU_GEM_CPU_PREP_NOWAIT);
777 int ret = -EINVAL;
778
6ee73861
BS
779 gem = drm_gem_object_lookup(dev, file_priv, req->handle);
780 if (!gem)
bf79cb91 781 return -ENOENT;
6ee73861
BS
782 nvbo = nouveau_gem_object(gem);
783
784 if (nvbo->cpu_filp) {
785 if (nvbo->cpu_filp == file_priv)
786 goto out;
787
788 ret = ttm_bo_wait_cpu(&nvbo->bo, no_wait);
6ee73861
BS
789 if (ret)
790 goto out;
791 }
792
793 if (req->flags & NOUVEAU_GEM_CPU_PREP_NOBLOCK) {
f0fbe3eb 794 spin_lock(&nvbo->bo.lock);
6ee73861 795 ret = ttm_bo_wait(&nvbo->bo, false, false, no_wait);
f0fbe3eb 796 spin_unlock(&nvbo->bo.lock);
6ee73861
BS
797 } else {
798 ret = ttm_bo_synccpu_write_grab(&nvbo->bo, no_wait);
6ee73861
BS
799 if (ret == 0)
800 nvbo->cpu_filp = file_priv;
801 }
802
803out:
bc9025bd 804 drm_gem_object_unreference_unlocked(gem);
6ee73861
BS
805 return ret;
806}
807
808int
809nouveau_gem_ioctl_cpu_fini(struct drm_device *dev, void *data,
810 struct drm_file *file_priv)
811{
812 struct drm_nouveau_gem_cpu_prep *req = data;
813 struct drm_gem_object *gem;
814 struct nouveau_bo *nvbo;
815 int ret = -EINVAL;
816
6ee73861
BS
817 gem = drm_gem_object_lookup(dev, file_priv, req->handle);
818 if (!gem)
bf79cb91 819 return -ENOENT;
6ee73861
BS
820 nvbo = nouveau_gem_object(gem);
821
822 if (nvbo->cpu_filp != file_priv)
823 goto out;
824 nvbo->cpu_filp = NULL;
825
826 ttm_bo_synccpu_write_release(&nvbo->bo);
827 ret = 0;
828
829out:
bc9025bd 830 drm_gem_object_unreference_unlocked(gem);
6ee73861
BS
831 return ret;
832}
833
834int
835nouveau_gem_ioctl_info(struct drm_device *dev, void *data,
836 struct drm_file *file_priv)
837{
838 struct drm_nouveau_gem_info *req = data;
839 struct drm_gem_object *gem;
840 int ret;
841
6ee73861
BS
842 gem = drm_gem_object_lookup(dev, file_priv, req->handle);
843 if (!gem)
bf79cb91 844 return -ENOENT;
6ee73861
BS
845
846 ret = nouveau_gem_info(gem, req);
bc9025bd 847 drm_gem_object_unreference_unlocked(gem);
6ee73861
BS
848 return ret;
849}
850