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1 | /* |
2 | * Copyright (C) 2007 Ben Skeggs. | |
3 | * | |
4 | * All Rights Reserved. | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining | |
7 | * a copy of this software and associated documentation files (the | |
8 | * "Software"), to deal in the Software without restriction, including | |
9 | * without limitation the rights to use, copy, modify, merge, publish, | |
10 | * distribute, sublicense, and/or sell copies of the Software, and to | |
11 | * permit persons to whom the Software is furnished to do so, subject to | |
12 | * the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice (including the | |
15 | * next paragraph) shall be included in all copies or substantial | |
16 | * portions of the Software. | |
17 | * | |
18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
19 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
20 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. | |
21 | * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE | |
22 | * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION | |
23 | * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION | |
24 | * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. | |
25 | * | |
26 | */ | |
27 | ||
28 | #include "drmP.h" | |
29 | #include "drm.h" | |
30 | #include "nouveau_drv.h" | |
a8eaebc6 | 31 | #include "nouveau_ramht.h" |
6ee73861 BS |
32 | |
33 | int | |
34 | nouveau_notifier_init_channel(struct nouveau_channel *chan) | |
35 | { | |
36 | struct drm_device *dev = chan->dev; | |
0b718733 | 37 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
6ee73861 | 38 | struct nouveau_bo *ntfy = NULL; |
11dea1a2 | 39 | uint32_t flags, ttmpl; |
6ee73861 BS |
40 | int ret; |
41 | ||
11dea1a2 | 42 | if (nouveau_vram_notify) { |
6ba9a683 | 43 | flags = NOUVEAU_GEM_DOMAIN_VRAM; |
11dea1a2 BS |
44 | ttmpl = TTM_PL_FLAG_VRAM; |
45 | } else { | |
6ba9a683 | 46 | flags = NOUVEAU_GEM_DOMAIN_GART; |
11dea1a2 BS |
47 | ttmpl = TTM_PL_FLAG_TT; |
48 | } | |
f927b890 | 49 | |
f6d4e621 | 50 | ret = nouveau_gem_new(dev, PAGE_SIZE, 0, flags, 0, 0, &ntfy); |
6ee73861 BS |
51 | if (ret) |
52 | return ret; | |
53 | ||
11dea1a2 | 54 | ret = nouveau_bo_pin(ntfy, ttmpl); |
6ee73861 BS |
55 | if (ret) |
56 | goto out_err; | |
57 | ||
58 | ret = nouveau_bo_map(ntfy); | |
59 | if (ret) | |
60 | goto out_err; | |
61 | ||
0b718733 BS |
62 | if (dev_priv->card_type >= NV_50) { |
63 | ret = nouveau_bo_vma_add(ntfy, chan->vm, &chan->notifier_vma); | |
64 | if (ret) | |
65 | goto out_err; | |
66 | } | |
67 | ||
b833ac26 | 68 | ret = drm_mm_init(&chan->notifier_heap, 0, ntfy->bo.mem.size); |
6ee73861 BS |
69 | if (ret) |
70 | goto out_err; | |
71 | ||
72 | chan->notifier_bo = ntfy; | |
73 | out_err: | |
0b718733 BS |
74 | if (ret) { |
75 | nouveau_bo_vma_del(ntfy, &chan->notifier_vma); | |
bc9025bd | 76 | drm_gem_object_unreference_unlocked(ntfy->gem); |
0b718733 | 77 | } |
6ee73861 BS |
78 | |
79 | return ret; | |
80 | } | |
81 | ||
82 | void | |
83 | nouveau_notifier_takedown_channel(struct nouveau_channel *chan) | |
84 | { | |
85 | struct drm_device *dev = chan->dev; | |
86 | ||
87 | if (!chan->notifier_bo) | |
88 | return; | |
89 | ||
0b718733 | 90 | nouveau_bo_vma_del(chan->notifier_bo, &chan->notifier_vma); |
6ee73861 BS |
91 | nouveau_bo_unmap(chan->notifier_bo); |
92 | mutex_lock(&dev->struct_mutex); | |
93 | nouveau_bo_unpin(chan->notifier_bo); | |
6ee73861 | 94 | mutex_unlock(&dev->struct_mutex); |
bc9025bd | 95 | drm_gem_object_unreference_unlocked(chan->notifier_bo->gem); |
b833ac26 | 96 | drm_mm_takedown(&chan->notifier_heap); |
6ee73861 BS |
97 | } |
98 | ||
99 | static void | |
100 | nouveau_notifier_gpuobj_dtor(struct drm_device *dev, | |
101 | struct nouveau_gpuobj *gpuobj) | |
102 | { | |
103 | NV_DEBUG(dev, "\n"); | |
104 | ||
105 | if (gpuobj->priv) | |
b833ac26 | 106 | drm_mm_put_block(gpuobj->priv); |
6ee73861 BS |
107 | } |
108 | ||
109 | int | |
110 | nouveau_notifier_alloc(struct nouveau_channel *chan, uint32_t handle, | |
73412c38 BS |
111 | int size, uint32_t start, uint32_t end, |
112 | uint32_t *b_offset) | |
6ee73861 BS |
113 | { |
114 | struct drm_device *dev = chan->dev; | |
26c0c9e3 | 115 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
6ee73861 | 116 | struct nouveau_gpuobj *nobj = NULL; |
b833ac26 | 117 | struct drm_mm_node *mem; |
b2e0d195 | 118 | uint64_t offset; |
6ee73861 BS |
119 | int target, ret; |
120 | ||
73412c38 BS |
121 | mem = drm_mm_search_free_in_range(&chan->notifier_heap, size, 0, |
122 | start, end, 0); | |
b833ac26 | 123 | if (mem) |
73412c38 | 124 | mem = drm_mm_get_block_range(mem, size, 0, start, end); |
6ee73861 BS |
125 | if (!mem) { |
126 | NV_ERROR(dev, "Channel %d notifier block full\n", chan->id); | |
127 | return -ENOMEM; | |
128 | } | |
129 | ||
26c0c9e3 BS |
130 | if (dev_priv->card_type < NV_50) { |
131 | if (chan->notifier_bo->bo.mem.mem_type == TTM_PL_VRAM) | |
132 | target = NV_MEM_TARGET_VRAM; | |
133 | else | |
134 | target = NV_MEM_TARGET_GART; | |
180cc306 | 135 | offset = chan->notifier_bo->bo.offset; |
26c0c9e3 BS |
136 | } else { |
137 | target = NV_MEM_TARGET_VM; | |
0b718733 | 138 | offset = chan->notifier_vma.offset; |
26c0c9e3 | 139 | } |
6ee73861 BS |
140 | offset += mem->start; |
141 | ||
142 | ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY, offset, | |
7f4a195f | 143 | mem->size, NV_MEM_ACCESS_RW, target, |
6ee73861 BS |
144 | &nobj); |
145 | if (ret) { | |
b833ac26 | 146 | drm_mm_put_block(mem); |
6ee73861 BS |
147 | NV_ERROR(dev, "Error creating notifier ctxdma: %d\n", ret); |
148 | return ret; | |
149 | } | |
b833ac26 BS |
150 | nobj->dtor = nouveau_notifier_gpuobj_dtor; |
151 | nobj->priv = mem; | |
6ee73861 | 152 | |
a8eaebc6 BS |
153 | ret = nouveau_ramht_insert(chan, handle, nobj); |
154 | nouveau_gpuobj_ref(NULL, &nobj); | |
6ee73861 | 155 | if (ret) { |
b833ac26 | 156 | drm_mm_put_block(mem); |
a8eaebc6 | 157 | NV_ERROR(dev, "Error adding notifier to ramht: %d\n", ret); |
6ee73861 BS |
158 | return ret; |
159 | } | |
160 | ||
161 | *b_offset = mem->start; | |
162 | return 0; | |
163 | } | |
164 | ||
165 | int | |
166 | nouveau_notifier_offset(struct nouveau_gpuobj *nobj, uint32_t *poffset) | |
167 | { | |
168 | if (!nobj || nobj->dtor != nouveau_notifier_gpuobj_dtor) | |
169 | return -EINVAL; | |
170 | ||
171 | if (poffset) { | |
b833ac26 | 172 | struct drm_mm_node *mem = nobj->priv; |
6ee73861 BS |
173 | |
174 | if (*poffset >= mem->size) | |
175 | return false; | |
176 | ||
177 | *poffset += mem->start; | |
178 | } | |
179 | ||
180 | return 0; | |
181 | } | |
182 | ||
183 | int | |
184 | nouveau_ioctl_notifier_alloc(struct drm_device *dev, void *data, | |
185 | struct drm_file *file_priv) | |
186 | { | |
587107b6 | 187 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
6ee73861 BS |
188 | struct drm_nouveau_notifierobj_alloc *na = data; |
189 | struct nouveau_channel *chan; | |
190 | int ret; | |
191 | ||
587107b6 BS |
192 | /* completely unnecessary for these chipsets... */ |
193 | if (unlikely(dev_priv->card_type >= NV_C0)) | |
194 | return -EINVAL; | |
195 | ||
e8a863c1 | 196 | chan = nouveau_channel_get(file_priv, na->channel); |
cff5c133 BS |
197 | if (IS_ERR(chan)) |
198 | return PTR_ERR(chan); | |
6ee73861 | 199 | |
73412c38 BS |
200 | ret = nouveau_notifier_alloc(chan, na->handle, na->size, 0, 0x1000, |
201 | &na->offset); | |
cff5c133 BS |
202 | nouveau_channel_put(&chan); |
203 | return ret; | |
6ee73861 | 204 | } |