[mirror_ubuntu-jammy-kernel.git] / drivers / gpu / drm / nouveau / nouveau_ttm.c

/*
 * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA,
 * All Rights Reserved.
 * Copyright (c) 2009 VMware, Inc., Palo Alto, CA., USA,
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sub license,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial portions
 * of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 * USE OR OTHER DEALINGS IN THE SOFTWARE.
 */
#include "nouveau_drv.h"
#include "nouveau_gem.h"
#include "nouveau_mem.h"
#include "nouveau_ttm.h"

#include <drm/drm_legacy.h>

#include <core/tegra.h>

static int
nouveau_manager_init(struct ttm_mem_type_manager *man, unsigned long psize)
{
	return 0;
}

static int
nouveau_manager_fini(struct ttm_mem_type_manager *man)
{
	return 0;
}

static void
nouveau_manager_del(struct ttm_mem_type_manager *man, struct ttm_mem_reg *reg)
{
	nouveau_mem_del(reg);
}

static void
nouveau_manager_debug(struct ttm_mem_type_manager *man,
		      struct drm_printer *printer)
{
}

static int
nouveau_vram_manager_new(struct ttm_mem_type_manager *man,
			 struct ttm_buffer_object *bo,
			 const struct ttm_place *place,
			 struct ttm_mem_reg *reg)
{
	struct nouveau_bo *nvbo = nouveau_bo(bo);
	struct nouveau_drm *drm = nvbo->cli->drm;
	struct nouveau_mem *mem;
	int ret;

	if (drm->client.device.info.ram_size == 0)
		return -ENOMEM;

	ret = nouveau_mem_new(&drm->master, nvbo->kind, nvbo->comp, reg);
	mem = nouveau_mem(reg);
	if (ret)
		return ret;

	ret = nouveau_mem_vram(reg, nvbo->contig, nvbo->page);
	if (ret) {
		nouveau_mem_del(reg);
		if (ret == -ENOSPC) {
			reg->mm_node = NULL;
			return 0;
		}
		return ret;
	}

	return 0;
}

const struct ttm_mem_type_manager_func nouveau_vram_manager = {
	.init = nouveau_manager_init,
	.takedown = nouveau_manager_fini,
	.get_node = nouveau_vram_manager_new,
	.put_node = nouveau_manager_del,
	.debug = nouveau_manager_debug,
};

static int
nouveau_gart_manager_new(struct ttm_mem_type_manager *man,
			 struct ttm_buffer_object *bo,
			 const struct ttm_place *place,
			 struct ttm_mem_reg *reg)
{
	struct nouveau_bo *nvbo = nouveau_bo(bo);
	struct nouveau_drm *drm = nvbo->cli->drm;
	struct nouveau_mem *mem;
	int ret;

	ret = nouveau_mem_new(&drm->master, nvbo->kind, nvbo->comp, reg);
	mem = nouveau_mem(reg);
	if (ret)
		return ret;

	reg->start = 0;
	return 0;
}

const struct ttm_mem_type_manager_func nouveau_gart_manager = {
	.init = nouveau_manager_init,
	.takedown = nouveau_manager_fini,
	.get_node = nouveau_gart_manager_new,
	.put_node = nouveau_manager_del,
	.debug = nouveau_manager_debug
};

static int
nv04_gart_manager_new(struct ttm_mem_type_manager *man,
		      struct ttm_buffer_object *bo,
		      const struct ttm_place *place,
		      struct ttm_mem_reg *reg)
{
	struct nouveau_bo *nvbo = nouveau_bo(bo);
	struct nouveau_drm *drm = nvbo->cli->drm;
	struct nouveau_mem *mem;
	int ret;

	ret = nouveau_mem_new(&drm->master, nvbo->kind, nvbo->comp, reg);
	mem = nouveau_mem(reg);
	if (ret)
		return ret;

	ret = nvif_vmm_get(&mem->cli->vmm.vmm, PTES, false, 12, 0,
			   reg->num_pages << PAGE_SHIFT, &mem->vma[0]);
	if (ret) {
		nouveau_mem_del(reg);
		if (ret == -ENOSPC) {
			reg->mm_node = NULL;
			return 0;
		}
		return ret;
	}

	reg->start = mem->vma[0].addr >> PAGE_SHIFT;
	return 0;
}

const struct ttm_mem_type_manager_func nv04_gart_manager = {
	.init = nouveau_manager_init,
	.takedown = nouveau_manager_fini,
	.get_node = nv04_gart_manager_new,
	.put_node = nouveau_manager_del,
	.debug = nouveau_manager_debug
};

int
nouveau_ttm_mmap(struct file *filp, struct vm_area_struct *vma)
{
	struct drm_file *file_priv = filp->private_data;
	struct nouveau_drm *drm = nouveau_drm(file_priv->minor->dev);

	if (unlikely(vma->vm_pgoff < DRM_FILE_PAGE_OFFSET))
		return drm_legacy_mmap(filp, vma);

	return ttm_bo_mmap(filp, vma, &drm->ttm.bdev);
}

static int
nouveau_ttm_mem_global_init(struct drm_global_reference *ref)
{
	return ttm_mem_global_init(ref->object);
}

static void
nouveau_ttm_mem_global_release(struct drm_global_reference *ref)
{
	ttm_mem_global_release(ref->object);
}

int
nouveau_ttm_global_init(struct nouveau_drm *drm)
{
	struct drm_global_reference *global_ref;
	int ret;

	global_ref = &drm->ttm.mem_global_ref;
	global_ref->global_type = DRM_GLOBAL_TTM_MEM;
	global_ref->size = sizeof(struct ttm_mem_global);
	global_ref->init = &nouveau_ttm_mem_global_init;
	global_ref->release = &nouveau_ttm_mem_global_release;

	ret = drm_global_item_ref(global_ref);
	if (unlikely(ret != 0)) {
		DRM_ERROR("Failed setting up TTM memory accounting\n");
		drm->ttm.mem_global_ref.release = NULL;
		return ret;
	}

	drm->ttm.bo_global_ref.mem_glob = global_ref->object;
	global_ref = &drm->ttm.bo_global_ref.ref;
	global_ref->global_type = DRM_GLOBAL_TTM_BO;
	global_ref->size = sizeof(struct ttm_bo_global);
	global_ref->init = &ttm_bo_global_init;
	global_ref->release = &ttm_bo_global_release;

	ret = drm_global_item_ref(global_ref);
	if (unlikely(ret != 0)) {
		DRM_ERROR("Failed setting up TTM BO subsystem\n");
		drm_global_item_unref(&drm->ttm.mem_global_ref);
		drm->ttm.mem_global_ref.release = NULL;
		return ret;
	}

	return 0;
}

void
nouveau_ttm_global_release(struct nouveau_drm *drm)
{
	if (drm->ttm.mem_global_ref.release == NULL)
		return;

	drm_global_item_unref(&drm->ttm.bo_global_ref.ref);
	drm_global_item_unref(&drm->ttm.mem_global_ref);
	drm->ttm.mem_global_ref.release = NULL;
}

static int
nouveau_ttm_init_host(struct nouveau_drm *drm, u8 kind)
{
	struct nvif_mmu *mmu = &drm->client.mmu;
	int typei;

	typei = nvif_mmu_type(mmu, NVIF_MEM_HOST | NVIF_MEM_MAPPABLE |
					    kind | NVIF_MEM_COHERENT);
	if (typei < 0)
		return -ENOSYS;

	drm->ttm.type_host[!!kind] = typei;

	typei = nvif_mmu_type(mmu, NVIF_MEM_HOST | NVIF_MEM_MAPPABLE | kind);
	if (typei < 0)
		return -ENOSYS;

	drm->ttm.type_ncoh[!!kind] = typei;
	return 0;
}

int
nouveau_ttm_init(struct nouveau_drm *drm)
{
	struct nvkm_device *device = nvxx_device(&drm->client.device);
	struct nvkm_pci *pci = device->pci;
	struct nvif_mmu *mmu = &drm->client.mmu;
	struct drm_device *dev = drm->dev;
	int typei, ret;

	ret = nouveau_ttm_init_host(drm, 0);
	if (ret)
		return ret;

	if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA &&
	    drm->client.device.info.chipset != 0x50) {
		ret = nouveau_ttm_init_host(drm, NVIF_MEM_KIND);
		if (ret)
			return ret;
	}

	if (drm->client.device.info.platform != NV_DEVICE_INFO_V0_SOC &&
	    drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
		typei = nvif_mmu_type(mmu, NVIF_MEM_VRAM | NVIF_MEM_MAPPABLE |
					   NVIF_MEM_KIND |
					   NVIF_MEM_COMP |
					   NVIF_MEM_DISP);
		if (typei < 0)
			return -ENOSYS;

		drm->ttm.type_vram = typei;
	} else {
		drm->ttm.type_vram = -1;
	}

	if (pci && pci->agp.bridge) {
		drm->agp.bridge = pci->agp.bridge;
		drm->agp.base = pci->agp.base;
		drm->agp.size = pci->agp.size;
		drm->agp.cma = pci->agp.cma;
	}

	ret = nouveau_ttm_global_init(drm);
	if (ret)
		return ret;

	ret = ttm_bo_device_init(&drm->ttm.bdev,
				  drm->ttm.bo_global_ref.ref.object,
				  &nouveau_bo_driver,
				  dev->anon_inode->i_mapping,
				  DRM_FILE_PAGE_OFFSET,
				  drm->client.mmu.dmabits <= 32 ? true : false);
	if (ret) {
		NV_ERROR(drm, "error initialising bo driver, %d\n", ret);
		return ret;
	}

	/* VRAM init */
	drm->gem.vram_available = drm->client.device.info.ram_user;

	arch_io_reserve_memtype_wc(device->func->resource_addr(device, 1),
				   device->func->resource_size(device, 1));

	ret = ttm_bo_init_mm(&drm->ttm.bdev, TTM_PL_VRAM,
			      drm->gem.vram_available >> PAGE_SHIFT);
	if (ret) {
		NV_ERROR(drm, "VRAM mm init failed, %d\n", ret);
		return ret;
	}

	drm->ttm.mtrr = arch_phys_wc_add(device->func->resource_addr(device, 1),
					 device->func->resource_size(device, 1));

	/* GART init */
	if (!drm->agp.bridge) {
		drm->gem.gart_available = drm->client.vmm.vmm.limit;
	} else {
		drm->gem.gart_available = drm->agp.size;
	}

	ret = ttm_bo_init_mm(&drm->ttm.bdev, TTM_PL_TT,
			      drm->gem.gart_available >> PAGE_SHIFT);
	if (ret) {
		NV_ERROR(drm, "GART mm init failed, %d\n", ret);
		return ret;
	}

	NV_INFO(drm, "VRAM: %d MiB\n", (u32)(drm->gem.vram_available >> 20));
	NV_INFO(drm, "GART: %d MiB\n", (u32)(drm->gem.gart_available >> 20));
	return 0;
}

void
nouveau_ttm_fini(struct nouveau_drm *drm)
{
	struct nvkm_device *device = nvxx_device(&drm->client.device);

	ttm_bo_clean_mm(&drm->ttm.bdev, TTM_PL_VRAM);
	ttm_bo_clean_mm(&drm->ttm.bdev, TTM_PL_TT);

	ttm_bo_device_release(&drm->ttm.bdev);

	nouveau_ttm_global_release(drm);

	arch_phys_wc_del(drm->ttm.mtrr);
	drm->ttm.mtrr = 0;
	arch_io_free_memtype_wc(device->func->resource_addr(device, 1),
				device->func->resource_size(device, 1));

}
Commit	Line	Data
6ee73861 BS	1	/*
	2	* Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA,
	3	* All Rights Reserved.
	4	* Copyright (c) 2009 VMware, Inc., Palo Alto, CA., USA,
	5	* All Rights Reserved.
	6	*
	7	* Permission is hereby granted, free of charge, to any person obtaining a
	8	* copy of this software and associated documentation files (the "Software"),
	9	* to deal in the Software without restriction, including without limitation
	10	* the rights to use, copy, modify, merge, publish, distribute, sub license,
	11	* and/or sell copies of the Software, and to permit persons to whom the
	12	* Software is furnished to do so, subject to the following conditions:
	13	*
	14	* The above copyright notice and this permission notice (including the
	15	* next paragraph) shall be included in all copies or substantial portions
	16	* of the Software.
	17	*
	18	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	19	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	20	* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
	21	* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
	22	* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
	23	* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
	24	* USE OR OTHER DEALINGS IN THE SOFTWARE.
	25	*/
4dc28134	26	#include "nouveau_drv.h"
ebb945a9	27	#include "nouveau_gem.h"
9ce523cc BS	28	#include "nouveau_mem.h"
9ce523cc BS	29	#include "nouveau_ttm.h"
6ee73861	30
ae95621b	31	#include <drm/drm_legacy.h>
b31cf78b AC	32
	33	#include <core/tegra.h>
	34
bc9e7b9a	35	static int
6be4421a	36	nouveau_manager_init(struct ttm_mem_type_manager *man, unsigned long psize)
bc9e7b9a	37	{
bc9e7b9a BS	38	return 0;
	39	}
	40
	41	static int
6be4421a	42	nouveau_manager_fini(struct ttm_mem_type_manager *man)
bc9e7b9a	43	{
bc9e7b9a BS	44	return 0;
	45	}
	46
6be4421a	47	static void
9ce523cc	48	nouveau_manager_del(struct ttm_mem_type_manager man, struct ttm_mem_reg reg)
6be4421a	49	{
9ce523cc	50	nouveau_mem_del(reg);
6be4421a BS	51	}
6be4421a BS	52
9ce523cc BS	53	static void
	54	nouveau_manager_debug(struct ttm_mem_type_manager *man,
	55	struct drm_printer *printer)
bc9e7b9a	56	{
bc9e7b9a BS	57	}
bc9e7b9a BS	58
bc9e7b9a BS	59	static int
	60	nouveau_vram_manager_new(struct ttm_mem_type_manager *man,
	61	struct ttm_buffer_object *bo,
f1217ed0	62	const struct ttm_place *place,
605f9ccd	63	struct ttm_mem_reg *reg)
bc9e7b9a	64	{
bc9e7b9a	65	struct nouveau_bo *nvbo = nouveau_bo(bo);
9ce523cc BS	66	struct nouveau_drm *drm = nvbo->cli->drm;
9ce523cc BS	67	struct nouveau_mem *mem;
bc9e7b9a BS	68	int ret;
bc9e7b9a BS	69
1167c6bc	70	if (drm->client.device.info.ram_size == 0)
eaecf032 AC	71	return -ENOMEM;
eaecf032 AC	72
9ce523cc BS	73	ret = nouveau_mem_new(&drm->master, nvbo->kind, nvbo->comp, reg);
	74	mem = nouveau_mem(reg);
	75	if (ret)
	76	return ret;
bc9e7b9a	77
9ce523cc	78	ret = nouveau_mem_vram(reg, nvbo->contig, nvbo->page);
bc9e7b9a	79	if (ret) {
9ce523cc BS	80	nouveau_mem_del(reg);
	81	if (ret == -ENOSPC) {
	82	reg->mm_node = NULL;
	83	return 0;
	84	}
	85	return ret;
bc9e7b9a BS	86	}
bc9e7b9a BS	87
bc9e7b9a BS	88	return 0;
	89	}
	90
bc9e7b9a	91	const struct ttm_mem_type_manager_func nouveau_vram_manager = {
6be4421a BS	92	.init = nouveau_manager_init,
6be4421a BS	93	.takedown = nouveau_manager_fini,
2fa70bb9	94	.get_node = nouveau_vram_manager_new,
d7722134	95	.put_node = nouveau_manager_del,
6be4421a	96	.debug = nouveau_manager_debug,
bc9e7b9a BS	97	};
bc9e7b9a BS	98
bc9e7b9a BS	99	static int
	100	nouveau_gart_manager_new(struct ttm_mem_type_manager *man,
	101	struct ttm_buffer_object *bo,
f1217ed0	102	const struct ttm_place *place,
605f9ccd	103	struct ttm_mem_reg *reg)
bc9e7b9a	104	{
de7b7d59	105	struct nouveau_bo *nvbo = nouveau_bo(bo);
9ce523cc BS	106	struct nouveau_drm *drm = nvbo->cli->drm;
	107	struct nouveau_mem *mem;
	108	int ret;
bc9e7b9a	109
9ce523cc BS	110	ret = nouveau_mem_new(&drm->master, nvbo->kind, nvbo->comp, reg);
	111	mem = nouveau_mem(reg);
	112	if (ret)
	113	return ret;
de7b7d59	114
9ce523cc	115	reg->start = 0;
bc9e7b9a BS	116	return 0;
	117	}
	118
bc9e7b9a	119	const struct ttm_mem_type_manager_func nouveau_gart_manager = {
6be4421a BS	120	.init = nouveau_manager_init,
6be4421a BS	121	.takedown = nouveau_manager_fini,
2fa70bb9	122	.get_node = nouveau_gart_manager_new,
9ce523cc	123	.put_node = nouveau_manager_del,
6be4421a	124	.debug = nouveau_manager_debug
bc9e7b9a BS	125	};
bc9e7b9a BS	126
bc9e7b9a BS	127	static int
	128	nv04_gart_manager_new(struct ttm_mem_type_manager *man,
	129	struct ttm_buffer_object *bo,
f1217ed0	130	const struct ttm_place *place,
605f9ccd	131	struct ttm_mem_reg *reg)
bc9e7b9a	132	{
9ce523cc BS	133	struct nouveau_bo *nvbo = nouveau_bo(bo);
	134	struct nouveau_drm *drm = nvbo->cli->drm;
	135	struct nouveau_mem *mem;
bc9e7b9a BS	136	int ret;
bc9e7b9a BS	137
9ce523cc BS	138	ret = nouveau_mem_new(&drm->master, nvbo->kind, nvbo->comp, reg);
	139	mem = nouveau_mem(reg);
	140	if (ret)
	141	return ret;
bc9e7b9a	142
d7722134 BS	143	ret = nvif_vmm_get(&mem->cli->vmm.vmm, PTES, false, 12, 0,
d7722134 BS	144	reg->num_pages << PAGE_SHIFT, &mem->vma[0]);
bc9e7b9a	145	if (ret) {
9ce523cc	146	nouveau_mem_del(reg);
bbb10e63 BS	147	if (ret == -ENOSPC) {
bbb10e63 BS	148	reg->mm_node = NULL;
9ce523cc	149	return 0;
bbb10e63	150	}
bc9e7b9a BS	151	return ret;
	152	}
	153
9ce523cc	154	reg->start = mem->vma[0].addr >> PAGE_SHIFT;
bc9e7b9a BS	155	return 0;
	156	}
	157
bc9e7b9a	158	const struct ttm_mem_type_manager_func nv04_gart_manager = {
6be4421a BS	159	.init = nouveau_manager_init,
6be4421a BS	160	.takedown = nouveau_manager_fini,
2fa70bb9	161	.get_node = nv04_gart_manager_new,
9ce523cc	162	.put_node = nouveau_manager_del,
6be4421a	163	.debug = nouveau_manager_debug
bc9e7b9a BS	164	};
bc9e7b9a BS	165
6ee73861 BS	166	int
	167	nouveau_ttm_mmap(struct file filp, struct vm_area_struct vma)
	168	{
	169	struct drm_file *file_priv = filp->private_data;
77145f1c	170	struct nouveau_drm *drm = nouveau_drm(file_priv->minor->dev);
6ee73861 BS	171
6ee73861 BS	172	if (unlikely(vma->vm_pgoff < DRM_FILE_PAGE_OFFSET))
2036eaa7	173	return drm_legacy_mmap(filp, vma);
6ee73861	174
ebb945a9	175	return ttm_bo_mmap(filp, vma, &drm->ttm.bdev);
6ee73861 BS	176	}
	177
	178	static int
ba4420c2	179	nouveau_ttm_mem_global_init(struct drm_global_reference *ref)
6ee73861 BS	180	{
	181	return ttm_mem_global_init(ref->object);
	182	}
	183
	184	static void
ba4420c2	185	nouveau_ttm_mem_global_release(struct drm_global_reference *ref)
6ee73861 BS	186	{
	187	ttm_mem_global_release(ref->object);
	188	}
	189
	190	int
ebb945a9	191	nouveau_ttm_global_init(struct nouveau_drm *drm)
6ee73861	192	{
ba4420c2	193	struct drm_global_reference *global_ref;
6ee73861 BS	194	int ret;
6ee73861 BS	195
ebb945a9	196	global_ref = &drm->ttm.mem_global_ref;
ba4420c2	197	global_ref->global_type = DRM_GLOBAL_TTM_MEM;
6ee73861 BS	198	global_ref->size = sizeof(struct ttm_mem_global);
	199	global_ref->init = &nouveau_ttm_mem_global_init;
	200	global_ref->release = &nouveau_ttm_mem_global_release;
	201
ba4420c2	202	ret = drm_global_item_ref(global_ref);
6ee73861 BS	203	if (unlikely(ret != 0)) {
6ee73861 BS	204	DRM_ERROR("Failed setting up TTM memory accounting\n");
ebb945a9	205	drm->ttm.mem_global_ref.release = NULL;
6ee73861 BS	206	return ret;
	207	}
	208
ebb945a9 BS	209	drm->ttm.bo_global_ref.mem_glob = global_ref->object;
ebb945a9 BS	210	global_ref = &drm->ttm.bo_global_ref.ref;
ba4420c2	211	global_ref->global_type = DRM_GLOBAL_TTM_BO;
6ee73861 BS	212	global_ref->size = sizeof(struct ttm_bo_global);
	213	global_ref->init = &ttm_bo_global_init;
	214	global_ref->release = &ttm_bo_global_release;
	215
ba4420c2	216	ret = drm_global_item_ref(global_ref);
6ee73861 BS	217	if (unlikely(ret != 0)) {
6ee73861 BS	218	DRM_ERROR("Failed setting up TTM BO subsystem\n");
ebb945a9 BS	219	drm_global_item_unref(&drm->ttm.mem_global_ref);
ebb945a9 BS	220	drm->ttm.mem_global_ref.release = NULL;
6ee73861 BS	221	return ret;
	222	}
	223
	224	return 0;
	225	}
	226
	227	void
ebb945a9	228	nouveau_ttm_global_release(struct nouveau_drm *drm)
6ee73861	229	{
ebb945a9	230	if (drm->ttm.mem_global_ref.release == NULL)
6ee73861 BS	231	return;
6ee73861 BS	232
ebb945a9 BS	233	drm_global_item_unref(&drm->ttm.bo_global_ref.ref);
	234	drm_global_item_unref(&drm->ttm.mem_global_ref);
	235	drm->ttm.mem_global_ref.release = NULL;
	236	}
	237
74a39954 BS	238	static int
74a39954 BS	239	nouveau_ttm_init_host(struct nouveau_drm *drm, u8 kind)
ebb945a9	240	{
658c71f4	241	struct nvif_mmu *mmu = &drm->client.mmu;
74a39954	242	int typei;
658c71f4 BS	243
658c71f4 BS	244	typei = nvif_mmu_type(mmu, NVIF_MEM_HOST \| NVIF_MEM_MAPPABLE \|
74a39954	245	kind \| NVIF_MEM_COHERENT);
658c71f4 BS	246	if (typei < 0)
	247	return -ENOSYS;
	248
74a39954	249	drm->ttm.type_host[!!kind] = typei;
658c71f4	250
74a39954	251	typei = nvif_mmu_type(mmu, NVIF_MEM_HOST \| NVIF_MEM_MAPPABLE \| kind);
658c71f4 BS	252	if (typei < 0)
	253	return -ENOSYS;
	254
74a39954 BS	255	drm->ttm.type_ncoh[!!kind] = typei;
	256	return 0;
	257	}
	258
	259	int
	260	nouveau_ttm_init(struct nouveau_drm *drm)
	261	{
	262	struct nvkm_device *device = nvxx_device(&drm->client.device);
	263	struct nvkm_pci *pci = device->pci;
	264	struct nvif_mmu *mmu = &drm->client.mmu;
	265	struct drm_device *dev = drm->dev;
	266	int typei, ret;
	267
	268	ret = nouveau_ttm_init_host(drm, 0);
	269	if (ret)
	270	return ret;
	271
	272	if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA &&
	273	drm->client.device.info.chipset != 0x50) {
	274	ret = nouveau_ttm_init_host(drm, NVIF_MEM_KIND);
	275	if (ret)
	276	return ret;
	277	}
658c71f4 BS	278
	279	if (drm->client.device.info.platform != NV_DEVICE_INFO_V0_SOC &&
	280	drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
	281	typei = nvif_mmu_type(mmu, NVIF_MEM_VRAM \| NVIF_MEM_MAPPABLE \|
	282	NVIF_MEM_KIND \|
	283	NVIF_MEM_COMP \|
	284	NVIF_MEM_DISP);
	285	if (typei < 0)
	286	return -ENOSYS;
	287
	288	drm->ttm.type_vram = typei;
	289	} else {
	290	drm->ttm.type_vram = -1;
	291	}
ebb945a9	292
340b0e7c BS	293	if (pci && pci->agp.bridge) {
	294	drm->agp.bridge = pci->agp.bridge;
	295	drm->agp.base = pci->agp.base;
	296	drm->agp.size = pci->agp.size;
	297	drm->agp.cma = pci->agp.cma;
	298	}
	299
ebb945a9 BS	300	ret = nouveau_ttm_global_init(drm);
	301	if (ret)
	302	return ret;
	303
	304	ret = ttm_bo_device_init(&drm->ttm.bdev,
	305	drm->ttm.bo_global_ref.ref.object,
44d847b7 DH	306	&nouveau_bo_driver,
	307	dev->anon_inode->i_mapping,
	308	DRM_FILE_PAGE_OFFSET,
325a7282	309	drm->client.mmu.dmabits <= 32 ? true : false);
ebb945a9 BS	310	if (ret) {
	311	NV_ERROR(drm, "error initialising bo driver, %d\n", ret);
	312	return ret;
	313	}
	314
	315	/* VRAM init */
1167c6bc	316	drm->gem.vram_available = drm->client.device.info.ram_user;
ebb945a9	317
7cf321d1 DA	318	arch_io_reserve_memtype_wc(device->func->resource_addr(device, 1),
	319	device->func->resource_size(device, 1));
	320
ebb945a9 BS	321	ret = ttm_bo_init_mm(&drm->ttm.bdev, TTM_PL_VRAM,
	322	drm->gem.vram_available >> PAGE_SHIFT);
	323	if (ret) {
	324	NV_ERROR(drm, "VRAM mm init failed, %d\n", ret);
	325	return ret;
	326	}
	327
7e8820fe BS	328	drm->ttm.mtrr = arch_phys_wc_add(device->func->resource_addr(device, 1),
7e8820fe BS	329	device->func->resource_size(device, 1));
ebb945a9 BS	330
ebb945a9 BS	331	/* GART init */
340b0e7c	332	if (!drm->agp.bridge) {
3c502639	333	drm->gem.gart_available = drm->client.vmm.vmm.limit;
ebb945a9 BS	334	} else {
	335	drm->gem.gart_available = drm->agp.size;
	336	}
	337
	338	ret = ttm_bo_init_mm(&drm->ttm.bdev, TTM_PL_TT,
	339	drm->gem.gart_available >> PAGE_SHIFT);
	340	if (ret) {
	341	NV_ERROR(drm, "GART mm init failed, %d\n", ret);
	342	return ret;
	343	}
	344
	345	NV_INFO(drm, "VRAM: %d MiB\n", (u32)(drm->gem.vram_available >> 20));
	346	NV_INFO(drm, "GART: %d MiB\n", (u32)(drm->gem.gart_available >> 20));
	347	return 0;
	348	}
	349
	350	void
	351	nouveau_ttm_fini(struct nouveau_drm *drm)
	352	{
1167c6bc	353	struct nvkm_device *device = nvxx_device(&drm->client.device);
7cf321d1	354
ebb945a9 BS	355	ttm_bo_clean_mm(&drm->ttm.bdev, TTM_PL_VRAM);
ebb945a9 BS	356	ttm_bo_clean_mm(&drm->ttm.bdev, TTM_PL_TT);
ebb945a9 BS	357
	358	ttm_bo_device_release(&drm->ttm.bdev);
	359
	360	nouveau_ttm_global_release(drm);
	361
247d36d7 AL	362	arch_phys_wc_del(drm->ttm.mtrr);
247d36d7 AL	363	drm->ttm.mtrr = 0;
7cf321d1 DA	364	arch_io_free_memtype_wc(device->func->resource_addr(device, 1),
	365	device->func->resource_size(device, 1));
	366
6ee73861	367	}