]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/gpu/drm/nouveau/nvkm/engine/disp/piocnv50.c
UBUNTU: Ubuntu-4.13.0-45.50
[mirror_ubuntu-artful-kernel.git] / drivers / gpu / drm / nouveau / nvkm / engine / disp / piocnv50.c
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1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24#include "channv50.h"
0ce41e3c 25#include "rootnv50.h"
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26
27#include <subdev/timer.h>
28
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29static void
30nv50_disp_pioc_fini(struct nv50_disp_chan *chan)
2a7909c0 31{
0ce41e3c 32 struct nv50_disp *disp = chan->root->disp;
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33 struct nvkm_subdev *subdev = &disp->base.engine.subdev;
34 struct nvkm_device *device = subdev->device;
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35 int ctrl = chan->chid.ctrl;
36 int user = chan->chid.user;
2a7909c0 37
4391d7f5 38 nvkm_mask(device, 0x610200 + (ctrl * 0x10), 0x00000001, 0x00000000);
2a7909c0 39 if (nvkm_msec(device, 2000,
4391d7f5 40 if (!(nvkm_rd32(device, 0x610200 + (ctrl * 0x10)) & 0x00030000))
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41 break;
42 ) < 0) {
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43 nvkm_error(subdev, "ch %d timeout: %08x\n", user,
44 nvkm_rd32(device, 0x610200 + (ctrl * 0x10)));
2a7909c0 45 }
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46}
47
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48static int
49nv50_disp_pioc_init(struct nv50_disp_chan *chan)
2a7909c0 50{
0ce41e3c 51 struct nv50_disp *disp = chan->root->disp;
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52 struct nvkm_subdev *subdev = &disp->base.engine.subdev;
53 struct nvkm_device *device = subdev->device;
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54 int ctrl = chan->chid.ctrl;
55 int user = chan->chid.user;
2a7909c0 56
4391d7f5 57 nvkm_wr32(device, 0x610200 + (ctrl * 0x10), 0x00002000);
2a7909c0 58 if (nvkm_msec(device, 2000,
4391d7f5 59 if (!(nvkm_rd32(device, 0x610200 + (ctrl * 0x10)) & 0x00030000))
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60 break;
61 ) < 0) {
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62 nvkm_error(subdev, "ch %d timeout0: %08x\n", user,
63 nvkm_rd32(device, 0x610200 + (ctrl * 0x10)));
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64 return -EBUSY;
65 }
66
4391d7f5 67 nvkm_wr32(device, 0x610200 + (ctrl * 0x10), 0x00000001);
2a7909c0 68 if (nvkm_msec(device, 2000,
4391d7f5 69 u32 tmp = nvkm_rd32(device, 0x610200 + (ctrl * 0x10));
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70 if ((tmp & 0x00030000) == 0x00010000)
71 break;
72 ) < 0) {
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73 nvkm_error(subdev, "ch %d timeout1: %08x\n", user,
74 nvkm_rd32(device, 0x610200 + (ctrl * 0x10)));
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75 return -EBUSY;
76 }
77
78 return 0;
79}
80
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81const struct nv50_disp_chan_func
82nv50_disp_pioc_func = {
83 .init = nv50_disp_pioc_init,
84 .fini = nv50_disp_pioc_fini,
85};