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8bded189 FJ |
1 | /* |
2 | * Copyright (C) 2010 Francisco Jerez. | |
3 | * All Rights Reserved. | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining | |
6 | * a copy of this software and associated documentation files (the | |
7 | * "Software"), to deal in the Software without restriction, including | |
8 | * without limitation the rights to use, copy, modify, merge, publish, | |
9 | * distribute, sublicense, and/or sell copies of the Software, and to | |
10 | * permit persons to whom the Software is furnished to do so, subject to | |
11 | * the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice (including the | |
14 | * next paragraph) shall be included in all copies or substantial | |
15 | * portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
18 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
19 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. | |
20 | * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE | |
21 | * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION | |
22 | * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION | |
23 | * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. | |
24 | * | |
25 | */ | |
20cdeaf9 | 26 | #include "nv04.h" |
8bded189 | 27 | |
a5cf68b0 | 28 | void |
b1e4553c | 29 | nv30_fb_tile_init(struct nvkm_fb *fb, int i, u32 addr, u32 size, u32 pitch, |
639c308e | 30 | u32 flags, struct nvkm_fb_tile *tile) |
a5cf68b0 | 31 | { |
150ccf16 | 32 | /* for performance, select alternate bank offset for zeta */ |
e1344412 BS |
33 | if (!(flags & 4)) { |
34 | tile->addr = (0 << 4); | |
35 | } else { | |
b1e4553c BS |
36 | if (fb->tile.comp) /* z compression */ |
37 | fb->tile.comp(fb, i, size, flags, tile); | |
e1344412 BS |
38 | tile->addr = (1 << 4); |
39 | } | |
150ccf16 BS |
40 | |
41 | tile->addr |= 0x00000001; /* enable */ | |
42 | tile->addr |= addr; | |
a5cf68b0 FJ |
43 | tile->limit = max(1u, addr + size) - 1; |
44 | tile->pitch = pitch; | |
45 | } | |
46 | ||
268d5a30 | 47 | static void |
b1e4553c | 48 | nv30_fb_tile_comp(struct nvkm_fb *fb, int i, u32 size, u32 flags, |
639c308e | 49 | struct nvkm_fb_tile *tile) |
268d5a30 | 50 | { |
d7da6284 | 51 | u32 tiles = DIV_ROUND_UP(size, 0x40); |
b1e4553c BS |
52 | u32 tags = round_up(tiles / fb->ram->parts, 0x40); |
53 | if (!nvkm_mm_head(&fb->tags, 0, 1, tags, tags, 1, &tile->tag)) { | |
d7da6284 BS |
54 | if (flags & 2) tile->zcomp |= 0x01000000; /* Z16 */ |
55 | else tile->zcomp |= 0x02000000; /* Z24S8 */ | |
56 | tile->zcomp |= ((tile->tag->offset ) >> 6); | |
57 | tile->zcomp |= ((tile->tag->offset + tags - 1) >> 6) << 12; | |
58 | #ifdef __BIG_ENDIAN | |
59 | tile->zcomp |= 0x10000000; | |
60 | #endif | |
61 | } | |
268d5a30 BS |
62 | } |
63 | ||
8bded189 | 64 | static int |
b1e4553c | 65 | calc_bias(struct nvkm_fb *fb, int k, int i, int j) |
4d1defd7 | 66 | { |
b1e4553c | 67 | struct nvkm_device *device = nv_device(fb); |
861d2107 | 68 | int b = (device->chipset > 0x30 ? |
b1e4553c | 69 | nv_rd32(fb, 0x122c + 0x10 * k + 0x4 * j) >> (4 * (i ^ 1)) : |
4d1defd7 FJ |
70 | 0) & 0xf; |
71 | ||
72 | return 2 * (b & 0x8 ? b - 0x10 : b); | |
73 | } | |
74 | ||
75 | static int | |
b1e4553c | 76 | calc_ref(struct nvkm_fb *fb, int l, int k, int i) |
8bded189 FJ |
77 | { |
78 | int j, x = 0; | |
79 | ||
80 | for (j = 0; j < 4; j++) { | |
b1e4553c | 81 | int m = (l >> (8 * i) & 0xff) + calc_bias(fb, k, i, j); |
8bded189 | 82 | |
4d1defd7 | 83 | x |= (0x80 | clamp(m, 0, 0x1f)) << (8 * j); |
8bded189 FJ |
84 | } |
85 | ||
86 | return x; | |
87 | } | |
88 | ||
11bac407 | 89 | int |
639c308e | 90 | nv30_fb_init(struct nvkm_object *object) |
8bded189 | 91 | { |
639c308e | 92 | struct nvkm_device *device = nv_device(object); |
b1e4553c | 93 | struct nvkm_fb *fb = (void *)object; |
861d2107 | 94 | int ret, i, j; |
8bded189 | 95 | |
b1e4553c | 96 | ret = nvkm_fb_init(fb); |
861d2107 BS |
97 | if (ret) |
98 | return ret; | |
8bded189 FJ |
99 | |
100 | /* Init the memory timing regs at 0x10037c/0x1003ac */ | |
861d2107 BS |
101 | if (device->chipset == 0x30 || |
102 | device->chipset == 0x31 || | |
103 | device->chipset == 0x35) { | |
8bded189 | 104 | /* Related to ROP count */ |
861d2107 | 105 | int n = (device->chipset == 0x31 ? 2 : 4); |
b1e4553c | 106 | int l = nv_rd32(fb, 0x1003d0); |
8bded189 FJ |
107 | |
108 | for (i = 0; i < n; i++) { | |
109 | for (j = 0; j < 3; j++) | |
b1e4553c BS |
110 | nv_wr32(fb, 0x10037c + 0xc * i + 0x4 * j, |
111 | calc_ref(fb, l, 0, j)); | |
8bded189 FJ |
112 | |
113 | for (j = 0; j < 2; j++) | |
b1e4553c BS |
114 | nv_wr32(fb, 0x1003ac + 0x8 * i + 0x4 * j, |
115 | calc_ref(fb, l, 1, j)); | |
8bded189 FJ |
116 | } |
117 | } | |
118 | ||
119 | return 0; | |
120 | } | |
121 | ||
639c308e | 122 | struct nvkm_oclass * |
20cdeaf9 BS |
123 | nv30_fb_oclass = &(struct nv04_fb_impl) { |
124 | .base.base.handle = NV_SUBDEV(FB, 0x30), | |
639c308e | 125 | .base.base.ofuncs = &(struct nvkm_ofuncs) { |
20cdeaf9 | 126 | .ctor = nv04_fb_ctor, |
639c308e | 127 | .dtor = _nvkm_fb_dtor, |
861d2107 | 128 | .init = nv30_fb_init, |
639c308e | 129 | .fini = _nvkm_fb_fini, |
861d2107 | 130 | }, |
20cdeaf9 BS |
131 | .base.memtype = nv04_fb_memtype_valid, |
132 | .base.ram = &nv20_ram_oclass, | |
133 | .tile.regions = 8, | |
134 | .tile.init = nv30_fb_tile_init, | |
135 | .tile.comp = nv30_fb_tile_comp, | |
136 | .tile.fini = nv20_fb_tile_fini, | |
137 | .tile.prog = nv20_fb_tile_prog, | |
138 | }.base.base; |