[mirror_ubuntu-bionic-kernel.git] / drivers / gpu / drm / nouveau / nvkm / subdev / fb / ramnv20.c

/*
 * Copyright 2013 Red Hat Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Ben Skeggs
 */
#include "priv.h"

static int
nv20_ram_create(struct nvkm_object *parent, struct nvkm_object *engine,
		struct nvkm_oclass *oclass, void *data, u32 size,
		struct nvkm_object **pobject)
{
	struct nvkm_fb *fb = nvkm_fb(parent);
	struct nvkm_ram *ram;
	u32 pbus1218 = nv_rd32(fb, 0x001218);
	int ret;

	ret = nvkm_ram_create(parent, engine, oclass, &ram);
	*pobject = nv_object(ram);
	if (ret)
		return ret;

	switch (pbus1218 & 0x00000300) {
	case 0x00000000: ram->type = NV_MEM_TYPE_SDRAM; break;
	case 0x00000100: ram->type = NV_MEM_TYPE_DDR1; break;
	case 0x00000200: ram->type = NV_MEM_TYPE_GDDR3; break;
	case 0x00000300: ram->type = NV_MEM_TYPE_GDDR2; break;
	}
	ram->size  = (nv_rd32(fb, 0x10020c) & 0xff000000);
	ram->parts = (nv_rd32(fb, 0x100200) & 0x00000003) + 1;
	ram->tags  = nv_rd32(fb, 0x100320);
	return 0;
}

struct nvkm_oclass
nv20_ram_oclass = {
	.handle = 0,
	.ofuncs = &(struct nvkm_ofuncs) {
		.ctor = nv20_ram_create,
		.dtor = _nvkm_ram_dtor,
		.init = _nvkm_ram_init,
		.fini = _nvkm_ram_fini,
	}
};
Commit	Line	Data
dceef5d8 BS	1	/*
	2	* Copyright 2013 Red Hat Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*
	22	* Authors: Ben Skeggs
	23	*/
dceef5d8 BS	24	#include "priv.h"
	25
	26	static int
639c308e BS	27	nv20_ram_create(struct nvkm_object parent, struct nvkm_object engine,
	28	struct nvkm_oclass oclass, void data, u32 size,
	29	struct nvkm_object **pobject)
dceef5d8	30	{
b1e4553c	31	struct nvkm_fb *fb = nvkm_fb(parent);
639c308e	32	struct nvkm_ram *ram;
b1e4553c	33	u32 pbus1218 = nv_rd32(fb, 0x001218);
dceef5d8 BS	34	int ret;
dceef5d8 BS	35
639c308e	36	ret = nvkm_ram_create(parent, engine, oclass, &ram);
dceef5d8 BS	37	*pobject = nv_object(ram);
	38	if (ret)
	39	return ret;
	40
	41	switch (pbus1218 & 0x00000300) {
	42	case 0x00000000: ram->type = NV_MEM_TYPE_SDRAM; break;
	43	case 0x00000100: ram->type = NV_MEM_TYPE_DDR1; break;
	44	case 0x00000200: ram->type = NV_MEM_TYPE_GDDR3; break;
	45	case 0x00000300: ram->type = NV_MEM_TYPE_GDDR2; break;
	46	}
b1e4553c BS	47	ram->size = (nv_rd32(fb, 0x10020c) & 0xff000000);
	48	ram->parts = (nv_rd32(fb, 0x100200) & 0x00000003) + 1;
	49	ram->tags = nv_rd32(fb, 0x100320);
dceef5d8 BS	50	return 0;
	51	}
	52
639c308e	53	struct nvkm_oclass
dceef5d8 BS	54	nv20_ram_oclass = {
dceef5d8 BS	55	.handle = 0,
639c308e	56	.ofuncs = &(struct nvkm_ofuncs) {
dceef5d8	57	.ctor = nv20_ram_create,
639c308e BS	58	.dtor = _nvkm_ram_dtor,
	59	.init = _nvkm_ram_init,
	60	.fini = _nvkm_ram_fini,
dceef5d8 BS	61	}
dceef5d8 BS	62	};