[mirror_ubuntu-focal-kernel.git] / drivers / gpu / drm / nouveau / nvkm / subdev / mc / nv04.c

/*
 * Copyright 2012 Red Hat Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Ben Skeggs
 */
#include "priv.h"

const struct nvkm_mc_map
nv04_mc_reset[] = {
	{ 0x00001000, NVKM_ENGINE_GR },
	{ 0x00000100, NVKM_ENGINE_FIFO },
	{}
};

static const struct nvkm_mc_map
nv04_mc_intr[] = {
	{ 0x01010000, NVKM_ENGINE_DISP },
	{ 0x00001000, NVKM_ENGINE_GR },
	{ 0x00000100, NVKM_ENGINE_FIFO },
	{ 0x10000000, NVKM_SUBDEV_BUS },
	{ 0x00100000, NVKM_SUBDEV_TIMER },
	{}
};

void
nv04_mc_intr_unarm(struct nvkm_mc *mc)
{
	struct nvkm_device *device = mc->subdev.device;
	nvkm_wr32(device, 0x000140, 0x00000000);
	nvkm_rd32(device, 0x000140);
}

void
nv04_mc_intr_rearm(struct nvkm_mc *mc)
{
	struct nvkm_device *device = mc->subdev.device;
	nvkm_wr32(device, 0x000140, 0x00000001);
}

u32
nv04_mc_intr_mask(struct nvkm_mc *mc)
{
	return nvkm_rd32(mc->subdev.device, 0x000100);
}

void
nv04_mc_init(struct nvkm_mc *mc)
{
	struct nvkm_device *device = mc->subdev.device;
	nvkm_wr32(device, 0x000200, 0xffffffff); /* everything enabled */
	nvkm_wr32(device, 0x001850, 0x00000001); /* disable rom access */
}

static const struct nvkm_mc_func
nv04_mc = {
	.init = nv04_mc_init,
	.intr = nv04_mc_intr,
	.intr_unarm = nv04_mc_intr_unarm,
	.intr_rearm = nv04_mc_intr_rearm,
	.intr_mask = nv04_mc_intr_mask,
	.reset = nv04_mc_reset,
};

int
nv04_mc_new(struct nvkm_device *device, int index, struct nvkm_mc **pmc)
{
	return nvkm_mc_new_(&nv04_mc, device, index, pmc);
}
Commit	Line	Data
7d9115de BS	1	/*
	2	* Copyright 2012 Red Hat Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*
	22	* Authors: Ben Skeggs
	23	*/
54dcadd5	24	#include "priv.h"
6ee73861	25
667e99ab BS	26	const struct nvkm_mc_map
	27	nv04_mc_reset[] = {
	28	{ 0x00001000, NVKM_ENGINE_GR },
	29	{ 0x00000100, NVKM_ENGINE_FIFO },
	30	{}
	31	};
	32
d85e2a8d	33	static const struct nvkm_mc_map
7d9115de	34	nv04_mc_intr[] = {
d85e2a8d	35	{ 0x01010000, NVKM_ENGINE_DISP },
68f3f702	36	{ 0x00001000, NVKM_ENGINE_GR },
d85e2a8d	37	{ 0x00000100, NVKM_ENGINE_FIFO },
68f3f702	38	{ 0x10000000, NVKM_SUBDEV_BUS },
d85e2a8d	39	{ 0x00100000, NVKM_SUBDEV_TIMER },
7d9115de BS	40	{}
	41	};
	42
d4c4cc83 BS	43	void
	44	nv04_mc_intr_unarm(struct nvkm_mc *mc)
	45	{
	46	struct nvkm_device *device = mc->subdev.device;
	47	nvkm_wr32(device, 0x000140, 0x00000000);
	48	nvkm_rd32(device, 0x000140);
	49	}
	50
	51	void
	52	nv04_mc_intr_rearm(struct nvkm_mc *mc)
	53	{
	54	struct nvkm_device *device = mc->subdev.device;
	55	nvkm_wr32(device, 0x000140, 0x00000001);
	56	}
	57
	58	u32
	59	nv04_mc_intr_mask(struct nvkm_mc *mc)
	60	{
	61	return nvkm_rd32(mc->subdev.device, 0x000100);
	62	}
	63
54dcadd5 BS	64	void
54dcadd5 BS	65	nv04_mc_init(struct nvkm_mc *mc)
08f6fbdb	66	{
25e3a463	67	struct nvkm_device *device = mc->subdev.device;
25e3a463 BS	68	nvkm_wr32(device, 0x000200, 0xffffffff); /* everything enabled */
25e3a463 BS	69	nvkm_wr32(device, 0x001850, 0x00000001); /* disable rom access */
08f6fbdb BS	70	}
08f6fbdb BS	71
54dcadd5 BS	72	static const struct nvkm_mc_func
	73	nv04_mc = {
	74	.init = nv04_mc_init,
	75	.intr = nv04_mc_intr,
d4c4cc83 BS	76	.intr_unarm = nv04_mc_intr_unarm,
	77	.intr_rearm = nv04_mc_intr_rearm,
	78	.intr_mask = nv04_mc_intr_mask,
d85e2a8d	79	.reset = nv04_mc_reset,
54dcadd5 BS	80	};
54dcadd5 BS	81
08f6fbdb	82	int
54dcadd5	83	nv04_mc_new(struct nvkm_device device, int index, struct nvkm_mc *pmc)
7d9115de	84	{
54dcadd5	85	return nvkm_mc_new_(&nv04_mc, device, index, pmc);
6ee73861	86	}