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3863c9bc BS |
1 | /* |
2 | * Copyright 2012 Red Hat Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: Ben Skeggs | |
23 | */ | |
957e18a7 | 24 | #include "mem.h" |
03b0ba7b | 25 | #include "vmm.h" |
3863c9bc | 26 | |
e5f186c4 | 27 | #include <core/option.h> |
3863c9bc | 28 | |
03b0ba7b BS |
29 | #include <nvif/class.h> |
30 | ||
c9582455 | 31 | static void |
03b0ba7b | 32 | nv44_mmu_init(struct nvkm_mmu *mmu) |
3863c9bc | 33 | { |
03b0ba7b | 34 | struct nvkm_device *device = mmu->subdev.device; |
6ce51352 | 35 | struct nvkm_memory *pt = mmu->vmm->pd->pt[0]->memory; |
3863c9bc | 36 | u32 addr; |
3863c9bc BS |
37 | |
38 | /* calculate vram address of this PRAMIN block, object must be | |
39 | * allocated on 512KiB alignment, and not exceed a total size | |
40 | * of 512KiB for this to work correctly | |
41 | */ | |
83f56106 | 42 | addr = nvkm_rd32(device, 0x10020c); |
6ce51352 | 43 | addr -= ((nvkm_memory_addr(pt) >> 19) + 1) << 19; |
3863c9bc | 44 | |
83f56106 | 45 | nvkm_wr32(device, 0x100850, 0x80000000); |
03b0ba7b | 46 | nvkm_wr32(device, 0x100818, mmu->vmm->null); |
6ce51352 | 47 | nvkm_wr32(device, 0x100804, (nvkm_memory_size(pt) / 4) * 4096); |
83f56106 BS |
48 | nvkm_wr32(device, 0x100850, 0x00008000); |
49 | nvkm_mask(device, 0x10008c, 0x00000200, 0x00000200); | |
50 | nvkm_wr32(device, 0x100820, 0x00000000); | |
51 | nvkm_wr32(device, 0x10082c, 0x00000001); | |
52 | nvkm_wr32(device, 0x100800, addr | 0x00000010); | |
3863c9bc BS |
53 | } |
54 | ||
c9582455 BS |
55 | static const struct nvkm_mmu_func |
56 | nv44_mmu = { | |
c9582455 | 57 | .init = nv44_mmu_init, |
c9582455 | 58 | .dma_bits = 39, |
eea5cf0f | 59 | .mmu = {{ -1, -1, NVIF_CLASS_MMU_NV04}}, |
957e18a7 | 60 | .mem = {{ -1, -1, NVIF_CLASS_MEM_NV04}, nv04_mem_new, nv04_mem_map }, |
03b0ba7b | 61 | .vmm = {{ -1, -1, NVIF_CLASS_VMM_NV04}, nv44_vmm_new, true }, |
3863c9bc | 62 | }; |
c9582455 BS |
63 | |
64 | int | |
65 | nv44_mmu_new(struct nvkm_device *device, int index, struct nvkm_mmu **pmmu) | |
66 | { | |
26c9e8ef | 67 | if (device->type == NVKM_DEVICE_AGP || |
c9582455 BS |
68 | !nvkm_boolopt(device->cfgopt, "NvPCIE", true)) |
69 | return nv04_mmu_new(device, index, pmmu); | |
70 | ||
03b0ba7b | 71 | return nvkm_mmu_new_(&nv44_mmu, device, index, pmmu); |
c9582455 | 72 | } |