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Commit | Line | Data |
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cd5351f4 | 1 | /* |
8bb0daff | 2 | * drivers/gpu/drm/omapdrm/omap_connector.c |
cd5351f4 RC |
3 | * |
4 | * Copyright (C) 2011 Texas Instruments | |
5 | * Author: Rob Clark <rob@ti.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify it | |
8 | * under the terms of the GNU General Public License version 2 as published by | |
9 | * the Free Software Foundation. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
14 | * more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License along with | |
17 | * this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
69a12263 | 20 | #include <drm/drm_atomic_helper.h> |
2d278f54 LP |
21 | #include <drm/drm_crtc.h> |
22 | #include <drm/drm_crtc_helper.h> | |
cd5351f4 | 23 | |
2d278f54 | 24 | #include "omap_drv.h" |
cd5351f4 RC |
25 | |
26 | /* | |
27 | * connector funcs | |
28 | */ | |
29 | ||
30 | #define to_omap_connector(x) container_of(x, struct omap_connector, base) | |
31 | ||
32 | struct omap_connector { | |
33 | struct drm_connector base; | |
34 | struct omap_dss_device *dssdev; | |
4f930c0f | 35 | bool hdmi_mode; |
cd5351f4 RC |
36 | }; |
37 | ||
4f930c0f TV |
38 | bool omap_connector_get_hdmi_mode(struct drm_connector *connector) |
39 | { | |
40 | struct omap_connector *omap_connector = to_omap_connector(connector); | |
41 | ||
42 | return omap_connector->hdmi_mode; | |
43 | } | |
44 | ||
f5f9454c | 45 | void copy_timings_omap_to_drm(struct drm_display_mode *mode, |
cd5351f4 RC |
46 | struct omap_video_timings *timings) |
47 | { | |
d8d78941 | 48 | mode->clock = timings->pixelclock / 1000; |
cd5351f4 | 49 | |
81899060 | 50 | mode->hdisplay = timings->hactive; |
0a30e150 | 51 | mode->hsync_start = mode->hdisplay + timings->hfront_porch; |
4dc2250d | 52 | mode->hsync_end = mode->hsync_start + timings->hsync_len; |
a85f4a80 | 53 | mode->htotal = mode->hsync_end + timings->hback_porch; |
cd5351f4 | 54 | |
fb7f3c43 | 55 | mode->vdisplay = timings->vactive; |
0996c68e | 56 | mode->vsync_start = mode->vdisplay + timings->vfront_porch; |
d5bcf0aa | 57 | mode->vsync_end = mode->vsync_start + timings->vsync_len; |
458540c6 | 58 | mode->vtotal = mode->vsync_end + timings->vback_porch; |
cd5351f4 | 59 | |
0b0d7b62 RC |
60 | mode->flags = 0; |
61 | ||
53058299 | 62 | if (timings->flags & DISPLAY_FLAGS_INTERLACED) |
0b0d7b62 | 63 | mode->flags |= DRM_MODE_FLAG_INTERLACE; |
94254edc | 64 | |
531efb38 | 65 | if (timings->flags & DISPLAY_FLAGS_DOUBLECLK) |
25358958 TV |
66 | mode->flags |= DRM_MODE_FLAG_DBLCLK; |
67 | ||
6b44cd27 | 68 | if (timings->flags & DISPLAY_FLAGS_HSYNC_HIGH) |
94254edc RC |
69 | mode->flags |= DRM_MODE_FLAG_PHSYNC; |
70 | else | |
71 | mode->flags |= DRM_MODE_FLAG_NHSYNC; | |
72 | ||
6b44cd27 | 73 | if (timings->flags & DISPLAY_FLAGS_VSYNC_HIGH) |
94254edc RC |
74 | mode->flags |= DRM_MODE_FLAG_PVSYNC; |
75 | else | |
76 | mode->flags |= DRM_MODE_FLAG_NVSYNC; | |
cd5351f4 RC |
77 | } |
78 | ||
f5f9454c | 79 | void copy_timings_drm_to_omap(struct omap_video_timings *timings, |
cd5351f4 RC |
80 | struct drm_display_mode *mode) |
81 | { | |
d8d78941 | 82 | timings->pixelclock = mode->clock * 1000; |
cd5351f4 | 83 | |
81899060 | 84 | timings->hactive = mode->hdisplay; |
0a30e150 | 85 | timings->hfront_porch = mode->hsync_start - mode->hdisplay; |
4dc2250d | 86 | timings->hsync_len = mode->hsync_end - mode->hsync_start; |
a85f4a80 | 87 | timings->hback_porch = mode->htotal - mode->hsync_end; |
cd5351f4 | 88 | |
fb7f3c43 | 89 | timings->vactive = mode->vdisplay; |
0996c68e | 90 | timings->vfront_porch = mode->vsync_start - mode->vdisplay; |
d5bcf0aa | 91 | timings->vsync_len = mode->vsync_end - mode->vsync_start; |
458540c6 | 92 | timings->vback_porch = mode->vtotal - mode->vsync_end; |
0b0d7b62 | 93 | |
53058299 PU |
94 | if (mode->flags & DRM_MODE_FLAG_INTERLACE) |
95 | timings->flags |= DISPLAY_FLAGS_INTERLACED; | |
96 | ||
531efb38 PU |
97 | if (mode->flags & DRM_MODE_FLAG_DBLCLK) |
98 | timings->flags |= DISPLAY_FLAGS_DOUBLECLK; | |
94254edc RC |
99 | |
100 | if (mode->flags & DRM_MODE_FLAG_PHSYNC) | |
6b44cd27 | 101 | timings->flags |= DISPLAY_FLAGS_HSYNC_HIGH; |
94254edc | 102 | else |
6b44cd27 | 103 | timings->flags |= DISPLAY_FLAGS_HSYNC_LOW; |
94254edc RC |
104 | |
105 | if (mode->flags & DRM_MODE_FLAG_PVSYNC) | |
6b44cd27 | 106 | timings->flags |= DISPLAY_FLAGS_VSYNC_HIGH; |
94254edc | 107 | else |
6b44cd27 | 108 | timings->flags |= DISPLAY_FLAGS_VSYNC_LOW; |
94254edc | 109 | |
f149e17a | 110 | timings->flags |= DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_POSEDGE; |
7a16360d | 111 | timings->sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE; |
cd5351f4 RC |
112 | } |
113 | ||
f5f9454c | 114 | static enum drm_connector_status omap_connector_detect( |
cd5351f4 RC |
115 | struct drm_connector *connector, bool force) |
116 | { | |
117 | struct omap_connector *omap_connector = to_omap_connector(connector); | |
118 | struct omap_dss_device *dssdev = omap_connector->dssdev; | |
119 | struct omap_dss_driver *dssdrv = dssdev->driver; | |
120 | enum drm_connector_status ret; | |
121 | ||
122 | if (dssdrv->detect) { | |
fdbf20b3 | 123 | if (dssdrv->detect(dssdev)) |
cd5351f4 | 124 | ret = connector_status_connected; |
fdbf20b3 | 125 | else |
cd5351f4 | 126 | ret = connector_status_disconnected; |
bddabbe1 AT |
127 | } else if (dssdev->type == OMAP_DISPLAY_TYPE_DPI || |
128 | dssdev->type == OMAP_DISPLAY_TYPE_DBI || | |
129 | dssdev->type == OMAP_DISPLAY_TYPE_SDI || | |
130 | dssdev->type == OMAP_DISPLAY_TYPE_DSI) { | |
131 | ret = connector_status_connected; | |
cd5351f4 RC |
132 | } else { |
133 | ret = connector_status_unknown; | |
134 | } | |
135 | ||
136 | VERB("%s: %d (force=%d)", omap_connector->dssdev->name, ret, force); | |
137 | ||
138 | return ret; | |
139 | } | |
140 | ||
141 | static void omap_connector_destroy(struct drm_connector *connector) | |
142 | { | |
143 | struct omap_connector *omap_connector = to_omap_connector(connector); | |
144 | struct omap_dss_device *dssdev = omap_connector->dssdev; | |
145 | ||
cd5351f4 | 146 | DBG("%s", omap_connector->dssdev->name); |
34ea3d38 | 147 | drm_connector_unregister(connector); |
cd5351f4 RC |
148 | drm_connector_cleanup(connector); |
149 | kfree(omap_connector); | |
150 | ||
151 | omap_dss_put_device(dssdev); | |
152 | } | |
153 | ||
154 | #define MAX_EDID 512 | |
155 | ||
156 | static int omap_connector_get_modes(struct drm_connector *connector) | |
157 | { | |
158 | struct omap_connector *omap_connector = to_omap_connector(connector); | |
159 | struct omap_dss_device *dssdev = omap_connector->dssdev; | |
160 | struct omap_dss_driver *dssdrv = dssdev->driver; | |
161 | struct drm_device *dev = connector->dev; | |
162 | int n = 0; | |
163 | ||
164 | DBG("%s", omap_connector->dssdev->name); | |
165 | ||
166 | /* if display exposes EDID, then we parse that in the normal way to | |
167 | * build table of supported modes.. otherwise (ie. fixed resolution | |
168 | * LCD panels) we just return a single mode corresponding to the | |
169 | * currently configured timings: | |
170 | */ | |
171 | if (dssdrv->read_edid) { | |
172 | void *edid = kzalloc(MAX_EDID, GFP_KERNEL); | |
173 | ||
174 | if ((dssdrv->read_edid(dssdev, edid, MAX_EDID) > 0) && | |
175 | drm_edid_is_valid(edid)) { | |
176 | drm_mode_connector_update_edid_property( | |
177 | connector, edid); | |
178 | n = drm_add_edid_modes(connector, edid); | |
4f930c0f TV |
179 | |
180 | omap_connector->hdmi_mode = | |
181 | drm_detect_hdmi_monitor(edid); | |
cd5351f4 RC |
182 | } else { |
183 | drm_mode_connector_update_edid_property( | |
184 | connector, NULL); | |
cd5351f4 | 185 | } |
4f930c0f | 186 | |
451023dc | 187 | kfree(edid); |
cd5351f4 RC |
188 | } else { |
189 | struct drm_display_mode *mode = drm_mode_create(dev); | |
0b0d7b62 | 190 | struct omap_video_timings timings = {0}; |
cd5351f4 RC |
191 | |
192 | dssdrv->get_timings(dssdev, &timings); | |
193 | ||
194 | copy_timings_omap_to_drm(mode, &timings); | |
195 | ||
196 | mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; | |
197 | drm_mode_set_name(mode); | |
198 | drm_mode_probed_add(connector, mode); | |
199 | ||
200 | n = 1; | |
201 | } | |
202 | ||
203 | return n; | |
204 | } | |
205 | ||
206 | static int omap_connector_mode_valid(struct drm_connector *connector, | |
207 | struct drm_display_mode *mode) | |
208 | { | |
209 | struct omap_connector *omap_connector = to_omap_connector(connector); | |
210 | struct omap_dss_device *dssdev = omap_connector->dssdev; | |
211 | struct omap_dss_driver *dssdrv = dssdev->driver; | |
212 | struct omap_video_timings timings = {0}; | |
213 | struct drm_device *dev = connector->dev; | |
214 | struct drm_display_mode *new_mode; | |
bddabbe1 | 215 | int r, ret = MODE_BAD; |
cd5351f4 RC |
216 | |
217 | copy_timings_drm_to_omap(&timings, mode); | |
218 | mode->vrefresh = drm_mode_vrefresh(mode); | |
219 | ||
bddabbe1 AT |
220 | /* |
221 | * if the panel driver doesn't have a check_timings, it's most likely | |
222 | * a fixed resolution panel, check if the timings match with the | |
223 | * panel's timings | |
224 | */ | |
225 | if (dssdrv->check_timings) { | |
226 | r = dssdrv->check_timings(dssdev, &timings); | |
227 | } else { | |
228 | struct omap_video_timings t = {0}; | |
229 | ||
230 | dssdrv->get_timings(dssdev, &t); | |
231 | ||
232 | if (memcmp(&timings, &t, sizeof(struct omap_video_timings))) | |
233 | r = -EINVAL; | |
234 | else | |
235 | r = 0; | |
236 | } | |
237 | ||
238 | if (!r) { | |
cd5351f4 RC |
239 | /* check if vrefresh is still valid */ |
240 | new_mode = drm_mode_duplicate(dev, mode); | |
d8d78941 | 241 | new_mode->clock = timings.pixelclock / 1000; |
cd5351f4 RC |
242 | new_mode->vrefresh = 0; |
243 | if (mode->vrefresh == drm_mode_vrefresh(new_mode)) | |
244 | ret = MODE_OK; | |
245 | drm_mode_destroy(dev, new_mode); | |
246 | } | |
247 | ||
248 | DBG("connector: mode %s: " | |
249 | "%d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x", | |
250 | (ret == MODE_OK) ? "valid" : "invalid", | |
251 | mode->base.id, mode->name, mode->vrefresh, mode->clock, | |
252 | mode->hdisplay, mode->hsync_start, | |
253 | mode->hsync_end, mode->htotal, | |
254 | mode->vdisplay, mode->vsync_start, | |
255 | mode->vsync_end, mode->vtotal, mode->type, mode->flags); | |
256 | ||
257 | return ret; | |
258 | } | |
259 | ||
cd5351f4 | 260 | static const struct drm_connector_funcs omap_connector_funcs = { |
aea3cab1 | 261 | .dpms = drm_atomic_helper_connector_dpms, |
69a12263 | 262 | .reset = drm_atomic_helper_connector_reset, |
cd5351f4 RC |
263 | .detect = omap_connector_detect, |
264 | .fill_modes = drm_helper_probe_single_connector_modes, | |
265 | .destroy = omap_connector_destroy, | |
69a12263 LP |
266 | .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, |
267 | .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, | |
cd5351f4 RC |
268 | }; |
269 | ||
270 | static const struct drm_connector_helper_funcs omap_connector_helper_funcs = { | |
271 | .get_modes = omap_connector_get_modes, | |
272 | .mode_valid = omap_connector_mode_valid, | |
cd5351f4 RC |
273 | }; |
274 | ||
cd5351f4 RC |
275 | /* initialize connector */ |
276 | struct drm_connector *omap_connector_init(struct drm_device *dev, | |
f5f9454c RC |
277 | int connector_type, struct omap_dss_device *dssdev, |
278 | struct drm_encoder *encoder) | |
cd5351f4 RC |
279 | { |
280 | struct drm_connector *connector = NULL; | |
281 | struct omap_connector *omap_connector; | |
282 | ||
283 | DBG("%s", dssdev->name); | |
284 | ||
285 | omap_dss_get_device(dssdev); | |
286 | ||
287 | omap_connector = kzalloc(sizeof(struct omap_connector), GFP_KERNEL); | |
78110bb8 | 288 | if (!omap_connector) |
cd5351f4 | 289 | goto fail; |
cd5351f4 RC |
290 | |
291 | omap_connector->dssdev = dssdev; | |
f5f9454c | 292 | |
cd5351f4 RC |
293 | connector = &omap_connector->base; |
294 | ||
295 | drm_connector_init(dev, connector, &omap_connector_funcs, | |
296 | connector_type); | |
297 | drm_connector_helper_add(connector, &omap_connector_helper_funcs); | |
298 | ||
299 | #if 0 /* enable when dss2 supports hotplug */ | |
300 | if (dssdev->caps & OMAP_DSS_DISPLAY_CAP_HPD) | |
301 | connector->polled = 0; | |
302 | else | |
303 | #endif | |
304 | connector->polled = DRM_CONNECTOR_POLL_CONNECT | | |
305 | DRM_CONNECTOR_POLL_DISCONNECT; | |
306 | ||
307 | connector->interlace_allowed = 1; | |
308 | connector->doublescan_allowed = 0; | |
309 | ||
34ea3d38 | 310 | drm_connector_register(connector); |
cd5351f4 RC |
311 | |
312 | return connector; | |
313 | ||
314 | fail: | |
fdbf20b3 | 315 | if (connector) |
cd5351f4 | 316 | omap_connector_destroy(connector); |
cd5351f4 RC |
317 | |
318 | return NULL; | |
319 | } |