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drm/omap: fix TILER on OMAP5
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bb5c2d9a 1/*
8bb0daff 2 * drivers/gpu/drm/omapdrm/omap_plane.c
bb5c2d9a
RC
3 *
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob.clark@linaro.org>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
5833bd2f 20#include "drm_flip_work.h"
b33f34d3 21
bb5c2d9a 22#include "omap_drv.h"
3c810c61 23#include "omap_dmm_tiler.h"
bb5c2d9a
RC
24
25/* some hackery because omapdss has an 'enum omap_plane' (which would be
26 * better named omap_plane_id).. and compiler seems unhappy about having
27 * both a 'struct omap_plane' and 'enum omap_plane'
28 */
29#define omap_plane _omap_plane
30
31/*
32 * plane funcs
33 */
34
72d0c336
RC
35struct callback {
36 void (*fxn)(void *);
37 void *arg;
38};
39
bb5c2d9a
RC
40#define to_omap_plane(x) container_of(x, struct omap_plane, base)
41
42struct omap_plane {
43 struct drm_plane base;
f5f9454c
RC
44 int id; /* TODO rename omap_plane -> omap_plane_id in omapdss so I can use the enum */
45 const char *name;
bb5c2d9a 46 struct omap_overlay_info info;
f5f9454c 47 struct omap_drm_apply apply;
bb5c2d9a 48
3c810c61
RC
49 /* position/orientation of scanout within the fb: */
50 struct omap_drm_window win;
f5f9454c 51 bool enabled;
9a0774e0
RC
52
53 /* last fb that we pinned: */
54 struct drm_framebuffer *pinned_fb;
bb5c2d9a 55
a890e662
RC
56 uint32_t nformats;
57 uint32_t formats[32];
b33f34d3 58
f5f9454c 59 struct omap_drm_irq error_irq;
b33f34d3 60
5833bd2f
RC
61 /* for deferring bo unpin's until next post_apply(): */
62 struct drm_flip_work unpin_work;
b33f34d3 63
f5f9454c
RC
64 // XXX maybe get rid of this and handle vblank in crtc too?
65 struct callback apply_done_cb;
a890e662 66};
bb5c2d9a 67
2a438c5b 68static void omap_plane_unpin_worker(struct drm_flip_work *work, void *val)
b33f34d3 69{
5833bd2f
RC
70 struct omap_plane *omap_plane =
71 container_of(work, struct omap_plane, unpin_work);
72 struct drm_device *dev = omap_plane->base.dev;
b33f34d3 73
f7c5f5d9
TV
74 /*
75 * omap_framebuffer_pin/unpin are always called from priv->wq,
76 * so there's no need for locking here.
77 */
5833bd2f
RC
78 omap_framebuffer_unpin(val);
79 mutex_lock(&dev->mode_config.mutex);
80 drm_framebuffer_unreference(val);
81 mutex_unlock(&dev->mode_config.mutex);
b33f34d3
RC
82}
83
9a0774e0 84/* update which fb (if any) is pinned for scanout */
2a438c5b
LP
85static int omap_plane_update_pin(struct drm_plane *plane,
86 struct drm_framebuffer *fb)
9a0774e0
RC
87{
88 struct omap_plane *omap_plane = to_omap_plane(plane);
b33f34d3
RC
89 struct drm_framebuffer *pinned_fb = omap_plane->pinned_fb;
90
91 if (pinned_fb != fb) {
5833bd2f 92 int ret = 0;
b33f34d3
RC
93
94 DBG("%p -> %p", pinned_fb, fb);
95
5833bd2f 96 if (fb) {
f5f9454c 97 drm_framebuffer_reference(fb);
5833bd2f
RC
98 ret = omap_framebuffer_pin(fb);
99 }
f5f9454c
RC
100
101 if (pinned_fb)
5833bd2f 102 drm_flip_work_queue(&omap_plane->unpin_work, pinned_fb);
b33f34d3
RC
103
104 if (ret) {
105 dev_err(plane->dev->dev, "could not swap %p -> %p\n",
106 omap_plane->pinned_fb, fb);
5833bd2f 107 drm_framebuffer_unreference(fb);
b33f34d3
RC
108 omap_plane->pinned_fb = NULL;
109 return ret;
110 }
9a0774e0 111
9a0774e0 112 omap_plane->pinned_fb = fb;
9a0774e0
RC
113 }
114
b33f34d3 115 return 0;
9a0774e0
RC
116}
117
f5f9454c 118static void omap_plane_pre_apply(struct omap_drm_apply *apply)
bb5c2d9a 119{
f5f9454c
RC
120 struct omap_plane *omap_plane =
121 container_of(apply, struct omap_plane, apply);
3c810c61 122 struct omap_drm_window *win = &omap_plane->win;
f5f9454c
RC
123 struct drm_plane *plane = &omap_plane->base;
124 struct drm_device *dev = plane->dev;
125 struct omap_overlay_info *info = &omap_plane->info;
126 struct drm_crtc *crtc = plane->crtc;
127 enum omap_channel channel;
128 bool enabled = omap_plane->enabled && crtc;
9a0774e0 129 int ret;
bb5c2d9a 130
f5f9454c
RC
131 DBG("%s, enabled=%d", omap_plane->name, enabled);
132
133 /* if fb has changed, pin new fb: */
2a438c5b 134 omap_plane_update_pin(plane, enabled ? plane->fb : NULL);
f5f9454c
RC
135
136 if (!enabled) {
137 dispc_ovl_enable(omap_plane->id, false);
2f53700d 138 return;
9a0774e0 139 }
bb5c2d9a 140
f5f9454c
RC
141 channel = omap_crtc_channel(crtc);
142
143 /* update scanout: */
3c810c61 144 omap_framebuffer_update_scanout(plane->fb, win, info);
bb5c2d9a 145
f5f9454c
RC
146 DBG("%dx%d -> %dx%d (%d)", info->width, info->height,
147 info->out_width, info->out_height,
9a0774e0 148 info->screen_width);
2d31ca3a
RK
149 DBG("%d,%d %pad %pad", info->pos_x, info->pos_y,
150 &info->paddr, &info->p_uv_addr);
f5f9454c 151
f5f9454c 152 /* and finally, update omapdss: */
9c660b7c
LP
153 ret = dispc_ovl_setup(omap_plane->id, info, false,
154 omap_crtc_timings(crtc), false);
f5f9454c
RC
155 if (ret) {
156 dev_err(dev->dev, "dispc_ovl_setup failed: %d\n", ret);
157 return;
158 }
159
160 dispc_ovl_enable(omap_plane->id, true);
161 dispc_ovl_set_channel_out(omap_plane->id, channel);
162}
163
164static void omap_plane_post_apply(struct omap_drm_apply *apply)
165{
166 struct omap_plane *omap_plane =
167 container_of(apply, struct omap_plane, apply);
168 struct drm_plane *plane = &omap_plane->base;
5833bd2f 169 struct omap_drm_private *priv = plane->dev->dev_private;
f5f9454c
RC
170 struct callback cb;
171
172 cb = omap_plane->apply_done_cb;
173 omap_plane->apply_done_cb.fxn = NULL;
174
5833bd2f 175 drm_flip_work_commit(&omap_plane->unpin_work, priv->wq);
f5f9454c
RC
176
177 if (cb.fxn)
178 cb.fxn(cb.arg);
f5f9454c
RC
179}
180
2a438c5b 181static int omap_plane_apply(struct drm_plane *plane)
f5f9454c
RC
182{
183 if (plane->crtc) {
184 struct omap_plane *omap_plane = to_omap_plane(plane);
185 return omap_crtc_apply(plane->crtc, &omap_plane->apply);
186 }
187 return 0;
bb5c2d9a
RC
188}
189
2f53700d 190int omap_plane_mode_set(struct drm_plane *plane,
a350da8b
LP
191 struct drm_crtc *crtc, struct drm_framebuffer *fb,
192 int crtc_x, int crtc_y,
193 unsigned int crtc_w, unsigned int crtc_h,
194 unsigned int src_x, unsigned int src_y,
195 unsigned int src_w, unsigned int src_h,
196 void (*fxn)(void *), void *arg)
bb5c2d9a
RC
197{
198 struct omap_plane *omap_plane = to_omap_plane(plane);
3c810c61
RC
199 struct omap_drm_window *win = &omap_plane->win;
200
201 win->crtc_x = crtc_x;
202 win->crtc_y = crtc_y;
203 win->crtc_w = crtc_w;
204 win->crtc_h = crtc_h;
bb5c2d9a 205
a350da8b
LP
206 win->src_x = src_x;
207 win->src_y = src_y;
208 win->src_w = src_w;
209 win->src_h = src_h;
bb5c2d9a 210
f5f9454c
RC
211 if (fxn) {
212 /* omap_crtc should ensure that a new page flip
213 * isn't permitted while there is one pending:
214 */
215 BUG_ON(omap_plane->apply_done_cb.fxn);
216
217 omap_plane->apply_done_cb.fxn = fxn;
218 omap_plane->apply_done_cb.arg = arg;
219 }
220
2a438c5b 221 return omap_plane_apply(plane);
bb5c2d9a
RC
222}
223
2f53700d
RC
224static int omap_plane_update(struct drm_plane *plane,
225 struct drm_crtc *crtc, struct drm_framebuffer *fb,
226 int crtc_x, int crtc_y,
227 unsigned int crtc_w, unsigned int crtc_h,
228 uint32_t src_x, uint32_t src_y,
229 uint32_t src_w, uint32_t src_h)
230{
f5f9454c
RC
231 struct omap_plane *omap_plane = to_omap_plane(plane);
232 omap_plane->enabled = true;
b03e14fd 233
d4586604
GI
234 /* omap_plane_mode_set() takes adjusted src */
235 switch (omap_plane->win.rotation & 0xf) {
236 case BIT(DRM_ROTATE_90):
237 case BIT(DRM_ROTATE_270):
238 swap(src_w, src_h);
239 break;
240 }
241
ef6b0e02
LP
242 /*
243 * We don't need to take a reference to the framebuffer as the DRM core
244 * has already done so for the purpose of setting plane->fb.
245 */
246 plane->fb = fb;
247 plane->crtc = crtc;
248
a350da8b 249 /* src values are in Q16 fixed point, convert to integer: */
f5f9454c
RC
250 return omap_plane_mode_set(plane, crtc, fb,
251 crtc_x, crtc_y, crtc_w, crtc_h,
a350da8b 252 src_x >> 16, src_y >> 16, src_w >> 16, src_h >> 16,
f5f9454c 253 NULL, NULL);
2f53700d
RC
254}
255
bb5c2d9a
RC
256static int omap_plane_disable(struct drm_plane *plane)
257{
3c810c61 258 struct omap_plane *omap_plane = to_omap_plane(plane);
2debab97 259
3c810c61 260 omap_plane->win.rotation = BIT(DRM_ROTATE_0);
82e58855
LP
261 omap_plane->info.zorder = plane->type == DRM_PLANE_TYPE_PRIMARY
262 ? 0 : omap_plane->id;
263
2debab97 264 return omap_plane_set_enable(plane, false);
bb5c2d9a
RC
265}
266
267static void omap_plane_destroy(struct drm_plane *plane)
268{
269 struct omap_plane *omap_plane = to_omap_plane(plane);
f5f9454c
RC
270
271 DBG("%s", omap_plane->name);
272
273 omap_irq_unregister(plane->dev, &omap_plane->error_irq);
274
bb5c2d9a 275 drm_plane_cleanup(plane);
f5f9454c 276
5833bd2f 277 drm_flip_work_cleanup(&omap_plane->unpin_work);
f5f9454c 278
bb5c2d9a
RC
279 kfree(omap_plane);
280}
281
2debab97 282int omap_plane_set_enable(struct drm_plane *plane, bool enable)
bb5c2d9a
RC
283{
284 struct omap_plane *omap_plane = to_omap_plane(plane);
285
2debab97
LP
286 if (enable == omap_plane->enabled)
287 return 0;
bb5c2d9a 288
2debab97 289 omap_plane->enabled = enable;
2a438c5b 290 return omap_plane_apply(plane);
72d0c336
RC
291}
292
3c810c61
RC
293/* helper to install properties which are common to planes and crtcs */
294void omap_plane_install_properties(struct drm_plane *plane,
295 struct drm_mode_object *obj)
296{
297 struct drm_device *dev = plane->dev;
298 struct omap_drm_private *priv = dev->dev_private;
299 struct drm_property *prop;
300
c2a6a552
RC
301 if (priv->has_dmm) {
302 prop = priv->rotation_prop;
303 if (!prop) {
a4969dd7
VS
304 prop = drm_mode_create_rotation_property(dev,
305 BIT(DRM_ROTATE_0) |
306 BIT(DRM_ROTATE_90) |
307 BIT(DRM_ROTATE_180) |
308 BIT(DRM_ROTATE_270) |
309 BIT(DRM_REFLECT_X) |
310 BIT(DRM_REFLECT_Y));
c2a6a552
RC
311 if (prop == NULL)
312 return;
313 priv->rotation_prop = prop;
314 }
315 drm_object_attach_property(obj, prop, 0);
3c810c61 316 }
8451b5ad 317
c17d37df
YT
318 prop = priv->zorder_prop;
319 if (!prop) {
8451b5ad
AR
320 prop = drm_property_create_range(dev, 0, "zorder", 0, 3);
321 if (prop == NULL)
322 return;
323 priv->zorder_prop = prop;
324 }
325 drm_object_attach_property(obj, prop, 0);
3c810c61
RC
326}
327
328int omap_plane_set_property(struct drm_plane *plane,
329 struct drm_property *property, uint64_t val)
330{
331 struct omap_plane *omap_plane = to_omap_plane(plane);
332 struct omap_drm_private *priv = plane->dev->dev_private;
333 int ret = -EINVAL;
334
335 if (property == priv->rotation_prop) {
f5f9454c 336 DBG("%s: rotation: %02x", omap_plane->name, (uint32_t)val);
3c810c61 337 omap_plane->win.rotation = val;
2a438c5b 338 ret = omap_plane_apply(plane);
8451b5ad 339 } else if (property == priv->zorder_prop) {
f5f9454c 340 DBG("%s: zorder: %02x", omap_plane->name, (uint32_t)val);
8451b5ad 341 omap_plane->info.zorder = val;
2a438c5b 342 ret = omap_plane_apply(plane);
3c810c61
RC
343 }
344
345 return ret;
346}
347
bb5c2d9a 348static const struct drm_plane_funcs omap_plane_funcs = {
222025e4
LP
349 .update_plane = omap_plane_update,
350 .disable_plane = omap_plane_disable,
351 .destroy = omap_plane_destroy,
352 .set_property = omap_plane_set_property,
bb5c2d9a
RC
353};
354
f5f9454c
RC
355static void omap_plane_error_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
356{
357 struct omap_plane *omap_plane =
358 container_of(irq, struct omap_plane, error_irq);
359 DRM_ERROR("%s: errors: %08x\n", omap_plane->name, irqstatus);
360}
361
362static const char *plane_names[] = {
222025e4
LP
363 [OMAP_DSS_GFX] = "gfx",
364 [OMAP_DSS_VIDEO1] = "vid1",
365 [OMAP_DSS_VIDEO2] = "vid2",
366 [OMAP_DSS_VIDEO3] = "vid3",
f5f9454c
RC
367};
368
369static const uint32_t error_irqs[] = {
222025e4
LP
370 [OMAP_DSS_GFX] = DISPC_IRQ_GFX_FIFO_UNDERFLOW,
371 [OMAP_DSS_VIDEO1] = DISPC_IRQ_VID1_FIFO_UNDERFLOW,
372 [OMAP_DSS_VIDEO2] = DISPC_IRQ_VID2_FIFO_UNDERFLOW,
373 [OMAP_DSS_VIDEO3] = DISPC_IRQ_VID3_FIFO_UNDERFLOW,
f5f9454c
RC
374};
375
bb5c2d9a
RC
376/* initialize plane */
377struct drm_plane *omap_plane_init(struct drm_device *dev,
ef6b0e02 378 int id, enum drm_plane_type type)
bb5c2d9a 379{
f5f9454c 380 struct omap_drm_private *priv = dev->dev_private;
ef6b0e02 381 struct drm_plane *plane;
bb5c2d9a 382 struct omap_plane *omap_plane;
f5f9454c 383 struct omap_overlay_info *info;
ef6b0e02 384 int ret;
bb5c2d9a 385
ef6b0e02 386 DBG("%s: type=%d", plane_names[id], type);
b33f34d3 387
bb5c2d9a 388 omap_plane = kzalloc(sizeof(*omap_plane), GFP_KERNEL);
78110bb8 389 if (!omap_plane)
fb9a35f8 390 return ERR_PTR(-ENOMEM);
bb5c2d9a 391
d7f8db53 392 drm_flip_work_init(&omap_plane->unpin_work,
2a438c5b 393 "unpin", omap_plane_unpin_worker);
b33f34d3 394
a890e662
RC
395 omap_plane->nformats = omap_framebuffer_get_formats(
396 omap_plane->formats, ARRAY_SIZE(omap_plane->formats),
f5f9454c
RC
397 dss_feat_get_supported_color_modes(id));
398 omap_plane->id = id;
399 omap_plane->name = plane_names[id];
400
bb5c2d9a
RC
401 plane = &omap_plane->base;
402
f5f9454c
RC
403 omap_plane->apply.pre_apply = omap_plane_pre_apply;
404 omap_plane->apply.post_apply = omap_plane_post_apply;
405
406 omap_plane->error_irq.irqmask = error_irqs[id];
407 omap_plane->error_irq.irq = omap_plane_error_irq;
408 omap_irq_register(dev, &omap_plane->error_irq);
409
ef6b0e02
LP
410 ret = drm_universal_plane_init(dev, plane, (1 << priv->num_crtcs) - 1,
411 &omap_plane_funcs, omap_plane->formats,
412 omap_plane->nformats, type);
413 if (ret < 0)
414 goto error;
bb5c2d9a 415
3c810c61
RC
416 omap_plane_install_properties(plane, &plane->base);
417
bb5c2d9a
RC
418 /* get our starting configuration, set defaults for parameters
419 * we don't currently use, etc:
420 */
f5f9454c
RC
421 info = &omap_plane->info;
422 info->rotation_type = OMAP_DSS_ROT_DMA;
423 info->rotation = OMAP_DSS_ROT_0;
424 info->global_alpha = 0xff;
425 info->mirror = 0;
bb5c2d9a
RC
426
427 /* Set defaults depending on whether we are a CRTC or overlay
428 * layer.
429 * TODO add ioctl to give userspace an API to change this.. this
430 * will come in a subsequent patch.
431 */
ef6b0e02 432 if (type == DRM_PLANE_TYPE_PRIMARY)
bb5c2d9a
RC
433 omap_plane->info.zorder = 0;
434 else
f5f9454c 435 omap_plane->info.zorder = id;
bb5c2d9a
RC
436
437 return plane;
ef6b0e02
LP
438
439error:
440 omap_irq_unregister(plane->dev, &omap_plane->error_irq);
441 kfree(omap_plane);
442 return NULL;
bb5c2d9a 443}