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f64122c1 DA |
1 | /* |
2 | * Copyright 2013 Red Hat Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: Dave Airlie | |
23 | * Alon Levy | |
24 | */ | |
25 | ||
c5416d66 | 26 | #include <linux/crc32.h> |
edaf492c | 27 | #include <drm/drm_crtc_helper.h> |
3cb9ae4f | 28 | #include <drm/drm_plane_helper.h> |
1277eed5 | 29 | #include <drm/drm_atomic_helper.h> |
10a0bd89 | 30 | #include <drm/drm_atomic.h> |
f64122c1 | 31 | |
edaf492c MY |
32 | #include "qxl_drv.h" |
33 | #include "qxl_object.h" | |
34 | ||
07f8d9bd DA |
35 | static bool qxl_head_enabled(struct qxl_head *head) |
36 | { | |
37 | return head->width && head->height; | |
38 | } | |
39 | ||
e4a76442 | 40 | static void qxl_alloc_client_monitors_config(struct qxl_device *qdev, unsigned count) |
f64122c1 DA |
41 | { |
42 | if (qdev->client_monitors_config && | |
43 | count > qdev->client_monitors_config->count) { | |
44 | kfree(qdev->client_monitors_config); | |
62c8ba7c | 45 | qdev->client_monitors_config = NULL; |
f64122c1 DA |
46 | } |
47 | if (!qdev->client_monitors_config) { | |
48 | qdev->client_monitors_config = kzalloc( | |
49 | sizeof(struct qxl_monitors_config) + | |
50 | sizeof(struct qxl_head) * count, GFP_KERNEL); | |
51 | if (!qdev->client_monitors_config) { | |
52 | qxl_io_log(qdev, | |
53 | "%s: allocation failure for %u heads\n", | |
54 | __func__, count); | |
55 | return; | |
56 | } | |
57 | } | |
58 | qdev->client_monitors_config->count = count; | |
59 | } | |
60 | ||
9e3b3178 CF |
61 | enum { |
62 | MONITORS_CONFIG_MODIFIED, | |
63 | MONITORS_CONFIG_UNCHANGED, | |
64 | MONITORS_CONFIG_BAD_CRC, | |
65 | }; | |
66 | ||
f64122c1 DA |
67 | static int qxl_display_copy_rom_client_monitors_config(struct qxl_device *qdev) |
68 | { | |
69 | int i; | |
70 | int num_monitors; | |
71 | uint32_t crc; | |
9e3b3178 | 72 | int status = MONITORS_CONFIG_UNCHANGED; |
f64122c1 | 73 | |
f64122c1 DA |
74 | num_monitors = qdev->rom->client_monitors_config.count; |
75 | crc = crc32(0, (const uint8_t *)&qdev->rom->client_monitors_config, | |
76 | sizeof(qdev->rom->client_monitors_config)); | |
77 | if (crc != qdev->rom->client_monitors_config_crc) { | |
72ec5650 | 78 | qxl_io_log(qdev, "crc mismatch: have %X (%zd) != %X\n", crc, |
f64122c1 DA |
79 | sizeof(qdev->rom->client_monitors_config), |
80 | qdev->rom->client_monitors_config_crc); | |
9e3b3178 | 81 | return MONITORS_CONFIG_BAD_CRC; |
f64122c1 | 82 | } |
c50fad8f GH |
83 | if (!num_monitors) { |
84 | DRM_DEBUG_KMS("no client monitors configured\n"); | |
85 | return status; | |
86 | } | |
f64122c1 | 87 | if (num_monitors > qdev->monitors_config->max_allowed) { |
5b8788c1 DA |
88 | DRM_DEBUG_KMS("client monitors list will be truncated: %d < %d\n", |
89 | qdev->monitors_config->max_allowed, num_monitors); | |
f64122c1 DA |
90 | num_monitors = qdev->monitors_config->max_allowed; |
91 | } else { | |
92 | num_monitors = qdev->rom->client_monitors_config.count; | |
93 | } | |
9e3b3178 CF |
94 | if (qdev->client_monitors_config |
95 | && (num_monitors != qdev->client_monitors_config->count)) { | |
96 | status = MONITORS_CONFIG_MODIFIED; | |
97 | } | |
f64122c1 DA |
98 | qxl_alloc_client_monitors_config(qdev, num_monitors); |
99 | /* we copy max from the client but it isn't used */ | |
100 | qdev->client_monitors_config->max_allowed = | |
101 | qdev->monitors_config->max_allowed; | |
102 | for (i = 0 ; i < qdev->client_monitors_config->count ; ++i) { | |
103 | struct qxl_urect *c_rect = | |
104 | &qdev->rom->client_monitors_config.heads[i]; | |
105 | struct qxl_head *client_head = | |
106 | &qdev->client_monitors_config->heads[i]; | |
9e3b3178 CF |
107 | if (client_head->x != c_rect->left) { |
108 | client_head->x = c_rect->left; | |
109 | status = MONITORS_CONFIG_MODIFIED; | |
110 | } | |
111 | if (client_head->y != c_rect->top) { | |
112 | client_head->y = c_rect->top; | |
113 | status = MONITORS_CONFIG_MODIFIED; | |
114 | } | |
115 | if (client_head->width != c_rect->right - c_rect->left) { | |
116 | client_head->width = c_rect->right - c_rect->left; | |
117 | status = MONITORS_CONFIG_MODIFIED; | |
118 | } | |
119 | if (client_head->height != c_rect->bottom - c_rect->top) { | |
120 | client_head->height = c_rect->bottom - c_rect->top; | |
121 | status = MONITORS_CONFIG_MODIFIED; | |
122 | } | |
123 | if (client_head->surface_id != 0) { | |
124 | client_head->surface_id = 0; | |
125 | status = MONITORS_CONFIG_MODIFIED; | |
126 | } | |
127 | if (client_head->id != i) { | |
128 | client_head->id = i; | |
129 | status = MONITORS_CONFIG_MODIFIED; | |
130 | } | |
131 | if (client_head->flags != 0) { | |
132 | client_head->flags = 0; | |
133 | status = MONITORS_CONFIG_MODIFIED; | |
134 | } | |
07f8d9bd DA |
135 | DRM_DEBUG_KMS("read %dx%d+%d+%d\n", client_head->width, client_head->height, |
136 | client_head->x, client_head->y); | |
f64122c1 | 137 | } |
9e3b3178 CF |
138 | |
139 | return status; | |
f64122c1 DA |
140 | } |
141 | ||
7dea0941 DA |
142 | static void qxl_update_offset_props(struct qxl_device *qdev) |
143 | { | |
cbdded7f | 144 | struct drm_device *dev = &qdev->ddev; |
7dea0941 DA |
145 | struct drm_connector *connector; |
146 | struct qxl_output *output; | |
147 | struct qxl_head *head; | |
148 | ||
149 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
150 | output = drm_connector_to_qxl_output(connector); | |
151 | ||
152 | head = &qdev->client_monitors_config->heads[output->index]; | |
153 | ||
154 | drm_object_property_set_value(&connector->base, | |
155 | dev->mode_config.suggested_x_property, head->x); | |
156 | drm_object_property_set_value(&connector->base, | |
157 | dev->mode_config.suggested_y_property, head->y); | |
158 | } | |
159 | } | |
160 | ||
f64122c1 DA |
161 | void qxl_display_read_client_monitors_config(struct qxl_device *qdev) |
162 | { | |
cbdded7f | 163 | struct drm_device *dev = &qdev->ddev; |
9062155d | 164 | int status, retries; |
9e3b3178 | 165 | |
9062155d | 166 | for (retries = 0; retries < 10; retries++) { |
9e3b3178 | 167 | status = qxl_display_copy_rom_client_monitors_config(qdev); |
9062155d GH |
168 | if (status != MONITORS_CONFIG_BAD_CRC) |
169 | break; | |
170 | udelay(5); | |
171 | } | |
172 | if (status == MONITORS_CONFIG_BAD_CRC) { | |
173 | qxl_io_log(qdev, "config: bad crc\n"); | |
174 | DRM_DEBUG_KMS("ignoring client monitors config: bad crc"); | |
175 | return; | |
9e3b3178 CF |
176 | } |
177 | if (status == MONITORS_CONFIG_UNCHANGED) { | |
9062155d GH |
178 | qxl_io_log(qdev, "config: unchanged\n"); |
179 | DRM_DEBUG_KMS("ignoring client monitors config: unchanged"); | |
9e3b3178 | 180 | return; |
f64122c1 | 181 | } |
4fdb0869 | 182 | |
7dea0941 DA |
183 | drm_modeset_lock_all(dev); |
184 | qxl_update_offset_props(qdev); | |
185 | drm_modeset_unlock_all(dev); | |
cbdded7f | 186 | if (!drm_helper_hpd_irq_event(dev)) { |
4fdb0869 MAL |
187 | /* notify that the monitor configuration changed, to |
188 | adjust at the arbitrary resolution */ | |
cbdded7f | 189 | drm_kms_helper_hotplug_event(dev); |
4fdb0869 | 190 | } |
f64122c1 DA |
191 | } |
192 | ||
b0807423 MAL |
193 | static int qxl_add_monitors_config_modes(struct drm_connector *connector, |
194 | unsigned *pwidth, | |
195 | unsigned *pheight) | |
f64122c1 DA |
196 | { |
197 | struct drm_device *dev = connector->dev; | |
198 | struct qxl_device *qdev = dev->dev_private; | |
199 | struct qxl_output *output = drm_connector_to_qxl_output(connector); | |
200 | int h = output->index; | |
201 | struct drm_display_mode *mode = NULL; | |
202 | struct qxl_head *head; | |
203 | ||
2d856f94 GH |
204 | if (!qdev->monitors_config) |
205 | return 0; | |
206 | if (h >= qdev->monitors_config->max_allowed) | |
207 | return 0; | |
07f8d9bd | 208 | if (!qdev->client_monitors_config) |
f64122c1 | 209 | return 0; |
2d856f94 GH |
210 | if (h >= qdev->client_monitors_config->count) |
211 | return 0; | |
212 | ||
07f8d9bd | 213 | head = &qdev->client_monitors_config->heads[h]; |
2d856f94 | 214 | DRM_DEBUG_KMS("head %d is %dx%d\n", h, head->width, head->height); |
f64122c1 DA |
215 | |
216 | mode = drm_cvt_mode(dev, head->width, head->height, 60, false, false, | |
217 | false); | |
218 | mode->type |= DRM_MODE_TYPE_PREFERRED; | |
ff996e72 CF |
219 | mode->hdisplay = head->width; |
220 | mode->vdisplay = head->height; | |
221 | drm_mode_set_name(mode); | |
b0807423 MAL |
222 | *pwidth = head->width; |
223 | *pheight = head->height; | |
f64122c1 | 224 | drm_mode_probed_add(connector, mode); |
bd3e1c7c JJ |
225 | /* remember the last custom size for mode validation */ |
226 | qdev->monitors_config_width = mode->hdisplay; | |
227 | qdev->monitors_config_height = mode->vdisplay; | |
f64122c1 DA |
228 | return 1; |
229 | } | |
230 | ||
bd3e1c7c JJ |
231 | static struct mode_size { |
232 | int w; | |
233 | int h; | |
234 | } common_modes[] = { | |
235 | { 640, 480}, | |
236 | { 720, 480}, | |
237 | { 800, 600}, | |
238 | { 848, 480}, | |
239 | {1024, 768}, | |
240 | {1152, 768}, | |
241 | {1280, 720}, | |
242 | {1280, 800}, | |
243 | {1280, 854}, | |
244 | {1280, 960}, | |
245 | {1280, 1024}, | |
246 | {1440, 900}, | |
247 | {1400, 1050}, | |
248 | {1680, 1050}, | |
249 | {1600, 1200}, | |
250 | {1920, 1080}, | |
251 | {1920, 1200} | |
252 | }; | |
253 | ||
b0807423 MAL |
254 | static int qxl_add_common_modes(struct drm_connector *connector, |
255 | unsigned pwidth, | |
256 | unsigned pheight) | |
f64122c1 DA |
257 | { |
258 | struct drm_device *dev = connector->dev; | |
259 | struct drm_display_mode *mode = NULL; | |
260 | int i; | |
f64122c1 | 261 | for (i = 0; i < ARRAY_SIZE(common_modes); i++) { |
f64122c1 DA |
262 | mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, |
263 | 60, false, false, false); | |
b0807423 | 264 | if (common_modes[i].w == pwidth && common_modes[i].h == pheight) |
f64122c1 DA |
265 | mode->type |= DRM_MODE_TYPE_PREFERRED; |
266 | drm_mode_probed_add(connector, mode); | |
267 | } | |
268 | return i - 1; | |
269 | } | |
270 | ||
c2ff6632 GKB |
271 | static void qxl_crtc_atomic_flush(struct drm_crtc *crtc, |
272 | struct drm_crtc_state *old_crtc_state) | |
273 | { | |
274 | struct drm_device *dev = crtc->dev; | |
275 | struct drm_pending_vblank_event *event; | |
276 | unsigned long flags; | |
277 | ||
278 | if (crtc->state && crtc->state->event) { | |
279 | event = crtc->state->event; | |
280 | crtc->state->event = NULL; | |
281 | ||
282 | spin_lock_irqsave(&dev->event_lock, flags); | |
283 | drm_crtc_send_vblank_event(crtc, event); | |
284 | spin_unlock_irqrestore(&dev->event_lock, flags); | |
285 | } | |
286 | } | |
287 | ||
f64122c1 DA |
288 | static void qxl_crtc_destroy(struct drm_crtc *crtc) |
289 | { | |
290 | struct qxl_crtc *qxl_crtc = to_qxl_crtc(crtc); | |
291 | ||
cd363f03 | 292 | qxl_bo_unref(&qxl_crtc->cursor_bo); |
f64122c1 DA |
293 | drm_crtc_cleanup(crtc); |
294 | kfree(qxl_crtc); | |
295 | } | |
296 | ||
f64122c1 | 297 | static const struct drm_crtc_funcs qxl_crtc_funcs = { |
bc8a00d9 | 298 | .set_config = drm_atomic_helper_set_config, |
f64122c1 | 299 | .destroy = qxl_crtc_destroy, |
9973c879 | 300 | .page_flip = drm_atomic_helper_page_flip, |
9ade8b98 GKB |
301 | .reset = drm_atomic_helper_crtc_reset, |
302 | .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, | |
303 | .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, | |
f64122c1 DA |
304 | }; |
305 | ||
6819c3c2 | 306 | void qxl_user_framebuffer_destroy(struct drm_framebuffer *fb) |
f64122c1 DA |
307 | { |
308 | struct qxl_framebuffer *qxl_fb = to_qxl_framebuffer(fb); | |
62676d10 | 309 | struct qxl_bo *bo = gem_to_qxl_bo(qxl_fb->obj); |
f64122c1 | 310 | |
62676d10 | 311 | WARN_ON(bo->shadow); |
dc3583c8 | 312 | drm_gem_object_unreference_unlocked(qxl_fb->obj); |
f64122c1 DA |
313 | drm_framebuffer_cleanup(fb); |
314 | kfree(qxl_fb); | |
315 | } | |
316 | ||
6d01f1f5 DA |
317 | static int qxl_framebuffer_surface_dirty(struct drm_framebuffer *fb, |
318 | struct drm_file *file_priv, | |
319 | unsigned flags, unsigned color, | |
320 | struct drm_clip_rect *clips, | |
321 | unsigned num_clips) | |
f64122c1 DA |
322 | { |
323 | /* TODO: vmwgfx where this was cribbed from had locking. Why? */ | |
324 | struct qxl_framebuffer *qxl_fb = to_qxl_framebuffer(fb); | |
325 | struct qxl_device *qdev = qxl_fb->base.dev->dev_private; | |
326 | struct drm_clip_rect norect; | |
327 | struct qxl_bo *qobj; | |
328 | int inc = 1; | |
329 | ||
73e9efd4 VS |
330 | drm_modeset_lock_all(fb->dev); |
331 | ||
f64122c1 | 332 | qobj = gem_to_qxl_bo(qxl_fb->obj); |
b2b4465d | 333 | /* if we aren't primary surface ignore this */ |
73e9efd4 VS |
334 | if (!qobj->is_primary) { |
335 | drm_modeset_unlock_all(fb->dev); | |
b2b4465d | 336 | return 0; |
73e9efd4 | 337 | } |
b2b4465d | 338 | |
f64122c1 DA |
339 | if (!num_clips) { |
340 | num_clips = 1; | |
341 | clips = &norect; | |
342 | norect.x1 = norect.y1 = 0; | |
343 | norect.x2 = fb->width; | |
344 | norect.y2 = fb->height; | |
345 | } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) { | |
346 | num_clips /= 2; | |
347 | inc = 2; /* skip source rects */ | |
348 | } | |
349 | ||
350 | qxl_draw_dirty_fb(qdev, qxl_fb, qobj, flags, color, | |
351 | clips, num_clips, inc); | |
73e9efd4 VS |
352 | |
353 | drm_modeset_unlock_all(fb->dev); | |
354 | ||
f64122c1 DA |
355 | return 0; |
356 | } | |
357 | ||
358 | static const struct drm_framebuffer_funcs qxl_fb_funcs = { | |
359 | .destroy = qxl_user_framebuffer_destroy, | |
360 | .dirty = qxl_framebuffer_surface_dirty, | |
361 | /* TODO? | |
362 | * .create_handle = qxl_user_framebuffer_create_handle, */ | |
363 | }; | |
364 | ||
365 | int | |
366 | qxl_framebuffer_init(struct drm_device *dev, | |
367 | struct qxl_framebuffer *qfb, | |
1eb83451 | 368 | const struct drm_mode_fb_cmd2 *mode_cmd, |
6819c3c2 NT |
369 | struct drm_gem_object *obj, |
370 | const struct drm_framebuffer_funcs *funcs) | |
f64122c1 DA |
371 | { |
372 | int ret; | |
373 | ||
374 | qfb->obj = obj; | |
5360943f | 375 | drm_helper_mode_fill_fb_struct(dev, &qfb->base, mode_cmd); |
6819c3c2 | 376 | ret = drm_framebuffer_init(dev, &qfb->base, funcs); |
f64122c1 DA |
377 | if (ret) { |
378 | qfb->obj = NULL; | |
379 | return ret; | |
380 | } | |
f64122c1 DA |
381 | return 0; |
382 | } | |
383 | ||
f64122c1 DA |
384 | static bool qxl_crtc_mode_fixup(struct drm_crtc *crtc, |
385 | const struct drm_display_mode *mode, | |
386 | struct drm_display_mode *adjusted_mode) | |
387 | { | |
388 | struct drm_device *dev = crtc->dev; | |
389 | struct qxl_device *qdev = dev->dev_private; | |
390 | ||
391 | qxl_io_log(qdev, "%s: (%d,%d) => (%d,%d)\n", | |
392 | __func__, | |
393 | mode->hdisplay, mode->vdisplay, | |
394 | adjusted_mode->hdisplay, | |
395 | adjusted_mode->vdisplay); | |
396 | return true; | |
397 | } | |
398 | ||
e4a76442 | 399 | static void |
f64122c1 DA |
400 | qxl_send_monitors_config(struct qxl_device *qdev) |
401 | { | |
402 | int i; | |
403 | ||
404 | BUG_ON(!qdev->ram_header->monitors_config); | |
405 | ||
406 | if (qdev->monitors_config->count == 0) { | |
407 | qxl_io_log(qdev, "%s: 0 monitors??\n", __func__); | |
408 | return; | |
409 | } | |
410 | for (i = 0 ; i < qdev->monitors_config->count ; ++i) { | |
411 | struct qxl_head *head = &qdev->monitors_config->heads[i]; | |
412 | ||
07f8d9bd | 413 | if (head->y > 8192 || head->x > 8192 || |
f64122c1 DA |
414 | head->width > 8192 || head->height > 8192) { |
415 | DRM_ERROR("head %d wrong: %dx%d+%d+%d\n", | |
416 | i, head->width, head->height, | |
417 | head->x, head->y); | |
418 | return; | |
419 | } | |
420 | } | |
421 | qxl_io_monitors_config(qdev); | |
422 | } | |
423 | ||
07f8d9bd DA |
424 | static void qxl_monitors_config_set(struct qxl_device *qdev, |
425 | int index, | |
426 | unsigned x, unsigned y, | |
427 | unsigned width, unsigned height, | |
428 | unsigned surf_id) | |
f64122c1 | 429 | { |
07f8d9bd DA |
430 | DRM_DEBUG_KMS("%d:%dx%d+%d+%d\n", index, width, height, x, y); |
431 | qdev->monitors_config->heads[index].x = x; | |
432 | qdev->monitors_config->heads[index].y = y; | |
433 | qdev->monitors_config->heads[index].width = width; | |
434 | qdev->monitors_config->heads[index].height = height; | |
435 | qdev->monitors_config->heads[index].surface_id = surf_id; | |
436 | ||
f64122c1 DA |
437 | } |
438 | ||
45dfe577 | 439 | static void qxl_mode_set_nofb(struct drm_crtc *crtc) |
3538e80a GKB |
440 | { |
441 | struct qxl_device *qdev = crtc->dev->dev_private; | |
442 | struct qxl_crtc *qcrtc = to_qxl_crtc(crtc); | |
443 | struct drm_display_mode *mode = &crtc->mode; | |
444 | ||
445 | DRM_DEBUG("Mode set (%d,%d)\n", | |
446 | mode->hdisplay, mode->vdisplay); | |
447 | ||
448 | qxl_monitors_config_set(qdev, qcrtc->index, 0, 0, | |
449 | mode->hdisplay, mode->vdisplay, 0); | |
450 | ||
451 | } | |
452 | ||
0b20a0f8 LP |
453 | static void qxl_crtc_atomic_enable(struct drm_crtc *crtc, |
454 | struct drm_crtc_state *old_state) | |
f64122c1 DA |
455 | { |
456 | DRM_DEBUG("\n"); | |
457 | } | |
458 | ||
64581714 LP |
459 | static void qxl_crtc_atomic_disable(struct drm_crtc *crtc, |
460 | struct drm_crtc_state *old_state) | |
07f8d9bd DA |
461 | { |
462 | struct qxl_crtc *qcrtc = to_qxl_crtc(crtc); | |
37235451 | 463 | struct qxl_device *qdev = crtc->dev->dev_private; |
07f8d9bd DA |
464 | |
465 | qxl_monitors_config_set(qdev, qcrtc->index, 0, 0, 0, 0, 0); | |
466 | ||
467 | qxl_send_monitors_config(qdev); | |
468 | } | |
469 | ||
f64122c1 | 470 | static const struct drm_crtc_helper_funcs qxl_crtc_helper_funcs = { |
f64122c1 | 471 | .mode_fixup = qxl_crtc_mode_fixup, |
3538e80a | 472 | .mode_set_nofb = qxl_mode_set_nofb, |
c2ff6632 | 473 | .atomic_flush = qxl_crtc_atomic_flush, |
0b20a0f8 | 474 | .atomic_enable = qxl_crtc_atomic_enable, |
64581714 | 475 | .atomic_disable = qxl_crtc_atomic_disable, |
f64122c1 DA |
476 | }; |
477 | ||
45dfe577 GH |
478 | static int qxl_primary_atomic_check(struct drm_plane *plane, |
479 | struct drm_plane_state *state) | |
c2ff6632 GKB |
480 | { |
481 | struct qxl_device *qdev = plane->dev->dev_private; | |
482 | struct qxl_framebuffer *qfb; | |
483 | struct qxl_bo *bo; | |
484 | ||
485 | if (!state->crtc || !state->fb) | |
486 | return 0; | |
487 | ||
488 | qfb = to_qxl_framebuffer(state->fb); | |
489 | bo = gem_to_qxl_bo(qfb->obj); | |
490 | ||
491 | if (bo->surf.stride * bo->surf.height > qdev->vram_size) { | |
492 | DRM_ERROR("Mode doesn't fit in vram size (vgamem)"); | |
493 | return -EINVAL; | |
494 | } | |
495 | ||
496 | return 0; | |
497 | } | |
498 | ||
cd363f03 RS |
499 | static int qxl_primary_apply_cursor(struct drm_plane *plane) |
500 | { | |
501 | struct drm_device *dev = plane->dev; | |
502 | struct qxl_device *qdev = dev->dev_private; | |
503 | struct drm_framebuffer *fb = plane->state->fb; | |
504 | struct qxl_crtc *qcrtc = to_qxl_crtc(plane->state->crtc); | |
505 | struct qxl_cursor_cmd *cmd; | |
506 | struct qxl_release *release; | |
507 | int ret = 0; | |
508 | ||
509 | if (!qcrtc->cursor_bo) | |
510 | return 0; | |
511 | ||
512 | ret = qxl_alloc_release_reserved(qdev, sizeof(*cmd), | |
513 | QXL_RELEASE_CURSOR_CMD, | |
514 | &release, NULL); | |
515 | if (ret) | |
516 | return ret; | |
517 | ||
518 | ret = qxl_release_list_add(release, qcrtc->cursor_bo); | |
519 | if (ret) | |
520 | goto out_free_release; | |
521 | ||
522 | ret = qxl_release_reserve_list(release, false); | |
523 | if (ret) | |
524 | goto out_free_release; | |
525 | ||
526 | cmd = (struct qxl_cursor_cmd *)qxl_release_map(qdev, release); | |
527 | cmd->type = QXL_CURSOR_SET; | |
528 | cmd->u.set.position.x = plane->state->crtc_x + fb->hot_x; | |
529 | cmd->u.set.position.y = plane->state->crtc_y + fb->hot_y; | |
530 | ||
531 | cmd->u.set.shape = qxl_bo_physical_address(qdev, qcrtc->cursor_bo, 0); | |
532 | ||
533 | cmd->u.set.visible = 1; | |
534 | qxl_release_unmap(qdev, release, &cmd->release_info); | |
535 | ||
536 | qxl_push_cursor_ring_release(qdev, release, QXL_CMD_CURSOR, false); | |
537 | qxl_release_fence_buffer_objects(release); | |
538 | ||
539 | return ret; | |
540 | ||
541 | out_free_release: | |
542 | qxl_release_free(qdev, release); | |
543 | return ret; | |
544 | } | |
545 | ||
c2ff6632 GKB |
546 | static void qxl_primary_atomic_update(struct drm_plane *plane, |
547 | struct drm_plane_state *old_state) | |
548 | { | |
549 | struct qxl_device *qdev = plane->dev->dev_private; | |
550 | struct qxl_framebuffer *qfb = | |
551 | to_qxl_framebuffer(plane->state->fb); | |
552 | struct qxl_framebuffer *qfb_old; | |
553 | struct qxl_bo *bo = gem_to_qxl_bo(qfb->obj); | |
554 | struct qxl_bo *bo_old; | |
555 | struct drm_clip_rect norect = { | |
556 | .x1 = 0, | |
557 | .y1 = 0, | |
558 | .x2 = qfb->base.width, | |
559 | .y2 = qfb->base.height | |
560 | }; | |
cd363f03 | 561 | int ret; |
62676d10 | 562 | bool same_shadow = false; |
c2ff6632 | 563 | |
b0e07da3 GH |
564 | if (old_state->fb) { |
565 | qfb_old = to_qxl_framebuffer(old_state->fb); | |
566 | bo_old = gem_to_qxl_bo(qfb_old->obj); | |
567 | } else { | |
568 | bo_old = NULL; | |
569 | } | |
c2ff6632 | 570 | |
b0e07da3 | 571 | if (bo == bo_old) |
c2ff6632 GKB |
572 | return; |
573 | ||
62676d10 GH |
574 | if (bo_old && bo_old->shadow && bo->shadow && |
575 | bo_old->shadow == bo->shadow) { | |
576 | same_shadow = true; | |
577 | } | |
578 | ||
b0e07da3 | 579 | if (bo_old && bo_old->is_primary) { |
62676d10 GH |
580 | if (!same_shadow) |
581 | qxl_io_destroy_primary(qdev); | |
c2ff6632 | 582 | bo_old->is_primary = false; |
cd363f03 RS |
583 | |
584 | ret = qxl_primary_apply_cursor(plane); | |
585 | if (ret) | |
586 | DRM_ERROR( | |
587 | "could not set cursor after creating primary"); | |
c2ff6632 GKB |
588 | } |
589 | ||
b0e07da3 | 590 | if (!bo->is_primary) { |
62676d10 GH |
591 | if (!same_shadow) |
592 | qxl_io_create_primary(qdev, 0, bo); | |
b0e07da3 GH |
593 | bo->is_primary = true; |
594 | } | |
62676d10 | 595 | |
c2ff6632 GKB |
596 | qxl_draw_dirty_fb(qdev, qfb, bo, 0, 0, &norect, 1, 1); |
597 | } | |
598 | ||
599 | static void qxl_primary_atomic_disable(struct drm_plane *plane, | |
600 | struct drm_plane_state *old_state) | |
601 | { | |
602 | struct qxl_device *qdev = plane->dev->dev_private; | |
603 | ||
b0e07da3 GH |
604 | if (old_state->fb) { |
605 | struct qxl_framebuffer *qfb = | |
c2ff6632 GKB |
606 | to_qxl_framebuffer(old_state->fb); |
607 | struct qxl_bo *bo = gem_to_qxl_bo(qfb->obj); | |
608 | ||
b0e07da3 GH |
609 | if (bo->is_primary) { |
610 | qxl_io_destroy_primary(qdev); | |
611 | bo->is_primary = false; | |
612 | } | |
c2ff6632 GKB |
613 | } |
614 | } | |
615 | ||
45dfe577 GH |
616 | static int qxl_plane_atomic_check(struct drm_plane *plane, |
617 | struct drm_plane_state *state) | |
1277eed5 GKB |
618 | { |
619 | return 0; | |
620 | } | |
621 | ||
622 | static void qxl_cursor_atomic_update(struct drm_plane *plane, | |
623 | struct drm_plane_state *old_state) | |
624 | { | |
625 | struct drm_device *dev = plane->dev; | |
626 | struct qxl_device *qdev = dev->dev_private; | |
627 | struct drm_framebuffer *fb = plane->state->fb; | |
cd363f03 | 628 | struct qxl_crtc *qcrtc = to_qxl_crtc(plane->state->crtc); |
1277eed5 GKB |
629 | struct qxl_release *release; |
630 | struct qxl_cursor_cmd *cmd; | |
631 | struct qxl_cursor *cursor; | |
632 | struct drm_gem_object *obj; | |
cac36d94 | 633 | struct qxl_bo *cursor_bo = NULL, *user_bo = NULL, *old_cursor_bo = NULL; |
1277eed5 GKB |
634 | int ret; |
635 | void *user_ptr; | |
636 | int size = 64*64*4; | |
637 | ||
638 | ret = qxl_alloc_release_reserved(qdev, sizeof(*cmd), | |
639 | QXL_RELEASE_CURSOR_CMD, | |
640 | &release, NULL); | |
ee5cb7c4 DC |
641 | if (ret) |
642 | return; | |
1277eed5 | 643 | |
1277eed5 GKB |
644 | if (fb != old_state->fb) { |
645 | obj = to_qxl_framebuffer(fb)->obj; | |
646 | user_bo = gem_to_qxl_bo(obj); | |
647 | ||
648 | /* pinning is done in the prepare/cleanup framevbuffer */ | |
649 | ret = qxl_bo_kmap(user_bo, &user_ptr); | |
650 | if (ret) | |
651 | goto out_free_release; | |
652 | ||
653 | ret = qxl_alloc_bo_reserved(qdev, release, | |
654 | sizeof(struct qxl_cursor) + size, | |
655 | &cursor_bo); | |
656 | if (ret) | |
657 | goto out_kunmap; | |
658 | ||
659 | ret = qxl_release_reserve_list(release, true); | |
660 | if (ret) | |
661 | goto out_free_bo; | |
662 | ||
663 | ret = qxl_bo_kmap(cursor_bo, (void **)&cursor); | |
664 | if (ret) | |
665 | goto out_backoff; | |
666 | ||
667 | cursor->header.unique = 0; | |
668 | cursor->header.type = SPICE_CURSOR_TYPE_ALPHA; | |
669 | cursor->header.width = 64; | |
670 | cursor->header.height = 64; | |
671 | cursor->header.hot_spot_x = fb->hot_x; | |
672 | cursor->header.hot_spot_y = fb->hot_y; | |
673 | cursor->data_size = size; | |
674 | cursor->chunk.next_chunk = 0; | |
675 | cursor->chunk.prev_chunk = 0; | |
676 | cursor->chunk.data_size = size; | |
677 | memcpy(cursor->chunk.data, user_ptr, size); | |
678 | qxl_bo_kunmap(cursor_bo); | |
679 | qxl_bo_kunmap(user_bo); | |
680 | ||
429030bc | 681 | cmd = (struct qxl_cursor_cmd *) qxl_release_map(qdev, release); |
1277eed5 GKB |
682 | cmd->u.set.visible = 1; |
683 | cmd->u.set.shape = qxl_bo_physical_address(qdev, | |
684 | cursor_bo, 0); | |
685 | cmd->type = QXL_CURSOR_SET; | |
cd363f03 | 686 | |
cac36d94 | 687 | old_cursor_bo = qcrtc->cursor_bo; |
cd363f03 RS |
688 | qcrtc->cursor_bo = cursor_bo; |
689 | cursor_bo = NULL; | |
1277eed5 GKB |
690 | } else { |
691 | ||
692 | ret = qxl_release_reserve_list(release, true); | |
693 | if (ret) | |
694 | goto out_free_release; | |
695 | ||
429030bc | 696 | cmd = (struct qxl_cursor_cmd *) qxl_release_map(qdev, release); |
1277eed5 GKB |
697 | cmd->type = QXL_CURSOR_MOVE; |
698 | } | |
699 | ||
700 | cmd->u.position.x = plane->state->crtc_x + fb->hot_x; | |
701 | cmd->u.position.y = plane->state->crtc_y + fb->hot_y; | |
702 | ||
703 | qxl_release_unmap(qdev, release, &cmd->release_info); | |
704 | qxl_push_cursor_ring_release(qdev, release, QXL_CMD_CURSOR, false); | |
705 | qxl_release_fence_buffer_objects(release); | |
706 | ||
cac36d94 JC |
707 | if (old_cursor_bo) |
708 | qxl_bo_unref(&old_cursor_bo); | |
709 | ||
818976a3 RS |
710 | qxl_bo_unref(&cursor_bo); |
711 | ||
1277eed5 GKB |
712 | return; |
713 | ||
714 | out_backoff: | |
715 | qxl_release_backoff_reserve_list(release); | |
716 | out_free_bo: | |
717 | qxl_bo_unref(&cursor_bo); | |
718 | out_kunmap: | |
719 | qxl_bo_kunmap(user_bo); | |
720 | out_free_release: | |
721 | qxl_release_free(qdev, release); | |
722 | return; | |
723 | ||
724 | } | |
725 | ||
45dfe577 GH |
726 | static void qxl_cursor_atomic_disable(struct drm_plane *plane, |
727 | struct drm_plane_state *old_state) | |
1277eed5 GKB |
728 | { |
729 | struct qxl_device *qdev = plane->dev->dev_private; | |
730 | struct qxl_release *release; | |
731 | struct qxl_cursor_cmd *cmd; | |
732 | int ret; | |
733 | ||
734 | ret = qxl_alloc_release_reserved(qdev, sizeof(*cmd), | |
735 | QXL_RELEASE_CURSOR_CMD, | |
736 | &release, NULL); | |
737 | if (ret) | |
738 | return; | |
739 | ||
740 | ret = qxl_release_reserve_list(release, true); | |
741 | if (ret) { | |
742 | qxl_release_free(qdev, release); | |
743 | return; | |
744 | } | |
745 | ||
746 | cmd = (struct qxl_cursor_cmd *)qxl_release_map(qdev, release); | |
747 | cmd->type = QXL_CURSOR_HIDE; | |
748 | qxl_release_unmap(qdev, release, &cmd->release_info); | |
749 | ||
750 | qxl_push_cursor_ring_release(qdev, release, QXL_CMD_CURSOR, false); | |
751 | qxl_release_fence_buffer_objects(release); | |
752 | } | |
753 | ||
45dfe577 GH |
754 | static int qxl_plane_prepare_fb(struct drm_plane *plane, |
755 | struct drm_plane_state *new_state) | |
1277eed5 | 756 | { |
62676d10 | 757 | struct qxl_device *qdev = plane->dev->dev_private; |
1277eed5 | 758 | struct drm_gem_object *obj; |
62676d10 | 759 | struct qxl_bo *user_bo, *old_bo = NULL; |
1277eed5 GKB |
760 | int ret; |
761 | ||
762 | if (!new_state->fb) | |
763 | return 0; | |
764 | ||
765 | obj = to_qxl_framebuffer(new_state->fb)->obj; | |
766 | user_bo = gem_to_qxl_bo(obj); | |
767 | ||
62676d10 GH |
768 | if (plane->type == DRM_PLANE_TYPE_PRIMARY && |
769 | user_bo->is_dumb && !user_bo->shadow) { | |
770 | if (plane->state->fb) { | |
771 | obj = to_qxl_framebuffer(plane->state->fb)->obj; | |
772 | old_bo = gem_to_qxl_bo(obj); | |
773 | } | |
774 | if (old_bo && old_bo->shadow && | |
775 | user_bo->gem_base.size == old_bo->gem_base.size && | |
776 | plane->state->crtc == new_state->crtc && | |
777 | plane->state->crtc_w == new_state->crtc_w && | |
778 | plane->state->crtc_h == new_state->crtc_h && | |
779 | plane->state->src_x == new_state->src_x && | |
780 | plane->state->src_y == new_state->src_y && | |
781 | plane->state->src_w == new_state->src_w && | |
782 | plane->state->src_h == new_state->src_h && | |
783 | plane->state->rotation == new_state->rotation && | |
784 | plane->state->zpos == new_state->zpos) { | |
785 | drm_gem_object_get(&old_bo->shadow->gem_base); | |
786 | user_bo->shadow = old_bo->shadow; | |
787 | } else { | |
788 | qxl_bo_create(qdev, user_bo->gem_base.size, | |
789 | true, true, QXL_GEM_DOMAIN_VRAM, NULL, | |
790 | &user_bo->shadow); | |
791 | } | |
792 | } | |
793 | ||
1277eed5 GKB |
794 | ret = qxl_bo_pin(user_bo, QXL_GEM_DOMAIN_CPU, NULL); |
795 | if (ret) | |
796 | return ret; | |
797 | ||
798 | return 0; | |
799 | } | |
800 | ||
801 | static void qxl_plane_cleanup_fb(struct drm_plane *plane, | |
802 | struct drm_plane_state *old_state) | |
803 | { | |
804 | struct drm_gem_object *obj; | |
805 | struct qxl_bo *user_bo; | |
806 | ||
5f3d862a GH |
807 | if (!old_state->fb) { |
808 | /* | |
809 | * we never executed prepare_fb, so there's nothing to | |
1277eed5 GKB |
810 | * unpin. |
811 | */ | |
812 | return; | |
813 | } | |
814 | ||
5f3d862a | 815 | obj = to_qxl_framebuffer(old_state->fb)->obj; |
1277eed5 GKB |
816 | user_bo = gem_to_qxl_bo(obj); |
817 | qxl_bo_unpin(user_bo); | |
62676d10 GH |
818 | |
819 | if (user_bo->shadow && !user_bo->is_primary) { | |
820 | drm_gem_object_put_unlocked(&user_bo->shadow->gem_base); | |
821 | user_bo->shadow = NULL; | |
822 | } | |
1277eed5 GKB |
823 | } |
824 | ||
825 | static const uint32_t qxl_cursor_plane_formats[] = { | |
826 | DRM_FORMAT_ARGB8888, | |
827 | }; | |
828 | ||
829 | static const struct drm_plane_helper_funcs qxl_cursor_helper_funcs = { | |
830 | .atomic_check = qxl_plane_atomic_check, | |
831 | .atomic_update = qxl_cursor_atomic_update, | |
832 | .atomic_disable = qxl_cursor_atomic_disable, | |
833 | .prepare_fb = qxl_plane_prepare_fb, | |
834 | .cleanup_fb = qxl_plane_cleanup_fb, | |
835 | }; | |
836 | ||
837 | static const struct drm_plane_funcs qxl_cursor_plane_funcs = { | |
472e6d46 GKB |
838 | .update_plane = drm_atomic_helper_update_plane, |
839 | .disable_plane = drm_atomic_helper_disable_plane, | |
1277eed5 | 840 | .destroy = drm_primary_helper_destroy, |
9ade8b98 GKB |
841 | .reset = drm_atomic_helper_plane_reset, |
842 | .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state, | |
843 | .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, | |
1277eed5 GKB |
844 | }; |
845 | ||
d3e7e42d GKB |
846 | static const uint32_t qxl_primary_plane_formats[] = { |
847 | DRM_FORMAT_XRGB8888, | |
848 | DRM_FORMAT_ARGB8888, | |
849 | }; | |
850 | ||
c2ff6632 GKB |
851 | static const struct drm_plane_helper_funcs primary_helper_funcs = { |
852 | .atomic_check = qxl_primary_atomic_check, | |
853 | .atomic_update = qxl_primary_atomic_update, | |
854 | .atomic_disable = qxl_primary_atomic_disable, | |
855 | .prepare_fb = qxl_plane_prepare_fb, | |
856 | .cleanup_fb = qxl_plane_cleanup_fb, | |
857 | }; | |
858 | ||
d3e7e42d | 859 | static const struct drm_plane_funcs qxl_primary_plane_funcs = { |
472e6d46 GKB |
860 | .update_plane = drm_atomic_helper_update_plane, |
861 | .disable_plane = drm_atomic_helper_disable_plane, | |
d3e7e42d | 862 | .destroy = drm_primary_helper_destroy, |
9ade8b98 GKB |
863 | .reset = drm_atomic_helper_plane_reset, |
864 | .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state, | |
865 | .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, | |
d3e7e42d GKB |
866 | }; |
867 | ||
868 | static struct drm_plane *qxl_create_plane(struct qxl_device *qdev, | |
869 | unsigned int possible_crtcs, | |
870 | enum drm_plane_type type) | |
871 | { | |
872 | const struct drm_plane_helper_funcs *helper_funcs = NULL; | |
873 | struct drm_plane *plane; | |
874 | const struct drm_plane_funcs *funcs; | |
875 | const uint32_t *formats; | |
876 | int num_formats; | |
877 | int err; | |
878 | ||
879 | if (type == DRM_PLANE_TYPE_PRIMARY) { | |
880 | funcs = &qxl_primary_plane_funcs; | |
881 | formats = qxl_primary_plane_formats; | |
882 | num_formats = ARRAY_SIZE(qxl_primary_plane_formats); | |
c2ff6632 | 883 | helper_funcs = &primary_helper_funcs; |
1277eed5 GKB |
884 | } else if (type == DRM_PLANE_TYPE_CURSOR) { |
885 | funcs = &qxl_cursor_plane_funcs; | |
886 | formats = qxl_cursor_plane_formats; | |
887 | helper_funcs = &qxl_cursor_helper_funcs; | |
888 | num_formats = ARRAY_SIZE(qxl_cursor_plane_formats); | |
d3e7e42d GKB |
889 | } else { |
890 | return ERR_PTR(-EINVAL); | |
891 | } | |
892 | ||
893 | plane = kzalloc(sizeof(*plane), GFP_KERNEL); | |
894 | if (!plane) | |
895 | return ERR_PTR(-ENOMEM); | |
896 | ||
897 | err = drm_universal_plane_init(&qdev->ddev, plane, possible_crtcs, | |
898 | funcs, formats, num_formats, | |
e6fc3b68 | 899 | NULL, type, NULL); |
d3e7e42d GKB |
900 | if (err) |
901 | goto free_plane; | |
902 | ||
903 | drm_plane_helper_add(plane, helper_funcs); | |
904 | ||
905 | return plane; | |
906 | ||
907 | free_plane: | |
908 | kfree(plane); | |
909 | return ERR_PTR(-EINVAL); | |
910 | } | |
911 | ||
07f8d9bd | 912 | static int qdev_crtc_init(struct drm_device *dev, int crtc_id) |
f64122c1 DA |
913 | { |
914 | struct qxl_crtc *qxl_crtc; | |
1277eed5 | 915 | struct drm_plane *primary, *cursor; |
d3e7e42d GKB |
916 | struct qxl_device *qdev = dev->dev_private; |
917 | int r; | |
f64122c1 DA |
918 | |
919 | qxl_crtc = kzalloc(sizeof(struct qxl_crtc), GFP_KERNEL); | |
920 | if (!qxl_crtc) | |
921 | return -ENOMEM; | |
922 | ||
d3e7e42d GKB |
923 | primary = qxl_create_plane(qdev, 1 << crtc_id, DRM_PLANE_TYPE_PRIMARY); |
924 | if (IS_ERR(primary)) { | |
925 | r = -ENOMEM; | |
926 | goto free_mem; | |
927 | } | |
928 | ||
1277eed5 GKB |
929 | cursor = qxl_create_plane(qdev, 1 << crtc_id, DRM_PLANE_TYPE_CURSOR); |
930 | if (IS_ERR(cursor)) { | |
931 | r = -ENOMEM; | |
932 | goto clean_primary; | |
933 | } | |
934 | ||
935 | r = drm_crtc_init_with_planes(dev, &qxl_crtc->base, primary, cursor, | |
d3e7e42d GKB |
936 | &qxl_crtc_funcs, NULL); |
937 | if (r) | |
1277eed5 | 938 | goto clean_cursor; |
d3e7e42d | 939 | |
07f8d9bd | 940 | qxl_crtc->index = crtc_id; |
f64122c1 DA |
941 | drm_crtc_helper_add(&qxl_crtc->base, &qxl_crtc_helper_funcs); |
942 | return 0; | |
d3e7e42d | 943 | |
1277eed5 GKB |
944 | clean_cursor: |
945 | drm_plane_cleanup(cursor); | |
946 | kfree(cursor); | |
d3e7e42d GKB |
947 | clean_primary: |
948 | drm_plane_cleanup(primary); | |
949 | kfree(primary); | |
950 | free_mem: | |
951 | kfree(qxl_crtc); | |
952 | return r; | |
f64122c1 DA |
953 | } |
954 | ||
955 | static void qxl_enc_dpms(struct drm_encoder *encoder, int mode) | |
956 | { | |
957 | DRM_DEBUG("\n"); | |
958 | } | |
959 | ||
f64122c1 DA |
960 | static void qxl_enc_prepare(struct drm_encoder *encoder) |
961 | { | |
962 | DRM_DEBUG("\n"); | |
963 | } | |
964 | ||
965 | static void qxl_write_monitors_config_for_encoder(struct qxl_device *qdev, | |
966 | struct drm_encoder *encoder) | |
967 | { | |
968 | int i; | |
07f8d9bd | 969 | struct qxl_output *output = drm_encoder_to_qxl_output(encoder); |
f64122c1 DA |
970 | struct qxl_head *head; |
971 | struct drm_display_mode *mode; | |
972 | ||
973 | BUG_ON(!encoder); | |
974 | /* TODO: ugly, do better */ | |
07f8d9bd | 975 | i = output->index; |
f64122c1 DA |
976 | if (!qdev->monitors_config || |
977 | qdev->monitors_config->max_allowed <= i) { | |
978 | DRM_ERROR( | |
979 | "head number too large or missing monitors config: %p, %d", | |
980 | qdev->monitors_config, | |
981 | qdev->monitors_config ? | |
982 | qdev->monitors_config->max_allowed : -1); | |
983 | return; | |
984 | } | |
985 | if (!encoder->crtc) { | |
986 | DRM_ERROR("missing crtc on encoder %p\n", encoder); | |
987 | return; | |
988 | } | |
989 | if (i != 0) | |
990 | DRM_DEBUG("missing for multiple monitors: no head holes\n"); | |
991 | head = &qdev->monitors_config->heads[i]; | |
992 | head->id = i; | |
f64122c1 DA |
993 | if (encoder->crtc->enabled) { |
994 | mode = &encoder->crtc->mode; | |
995 | head->width = mode->hdisplay; | |
996 | head->height = mode->vdisplay; | |
997 | head->x = encoder->crtc->x; | |
998 | head->y = encoder->crtc->y; | |
999 | if (qdev->monitors_config->count < i + 1) | |
1000 | qdev->monitors_config->count = i + 1; | |
1001 | } else { | |
1002 | head->width = 0; | |
1003 | head->height = 0; | |
1004 | head->x = 0; | |
1005 | head->y = 0; | |
1006 | } | |
07f8d9bd DA |
1007 | DRM_DEBUG_KMS("setting head %d to +%d+%d %dx%d out of %d\n", |
1008 | i, head->x, head->y, head->width, head->height, qdev->monitors_config->count); | |
f64122c1 DA |
1009 | head->flags = 0; |
1010 | /* TODO - somewhere else to call this for multiple monitors | |
1011 | * (config_commit?) */ | |
1012 | qxl_send_monitors_config(qdev); | |
1013 | } | |
1014 | ||
1015 | static void qxl_enc_commit(struct drm_encoder *encoder) | |
1016 | { | |
1017 | struct qxl_device *qdev = encoder->dev->dev_private; | |
1018 | ||
1019 | qxl_write_monitors_config_for_encoder(qdev, encoder); | |
1020 | DRM_DEBUG("\n"); | |
1021 | } | |
1022 | ||
1023 | static void qxl_enc_mode_set(struct drm_encoder *encoder, | |
1024 | struct drm_display_mode *mode, | |
1025 | struct drm_display_mode *adjusted_mode) | |
1026 | { | |
1027 | DRM_DEBUG("\n"); | |
1028 | } | |
1029 | ||
1030 | static int qxl_conn_get_modes(struct drm_connector *connector) | |
1031 | { | |
b0807423 MAL |
1032 | unsigned pwidth = 1024; |
1033 | unsigned pheight = 768; | |
2d856f94 | 1034 | int ret = 0; |
f64122c1 | 1035 | |
2d856f94 GH |
1036 | ret = qxl_add_monitors_config_modes(connector, &pwidth, &pheight); |
1037 | if (ret < 0) | |
1038 | return ret; | |
b0807423 | 1039 | ret += qxl_add_common_modes(connector, pwidth, pheight); |
f64122c1 DA |
1040 | return ret; |
1041 | } | |
1042 | ||
1043 | static int qxl_conn_mode_valid(struct drm_connector *connector, | |
1044 | struct drm_display_mode *mode) | |
1045 | { | |
bd3e1c7c JJ |
1046 | struct drm_device *ddev = connector->dev; |
1047 | struct qxl_device *qdev = ddev->dev_private; | |
1048 | int i; | |
1049 | ||
f64122c1 DA |
1050 | /* TODO: is this called for user defined modes? (xrandr --add-mode) |
1051 | * TODO: check that the mode fits in the framebuffer */ | |
bd3e1c7c JJ |
1052 | |
1053 | if(qdev->monitors_config_width == mode->hdisplay && | |
1054 | qdev->monitors_config_height == mode->vdisplay) | |
1055 | return MODE_OK; | |
1056 | ||
1057 | for (i = 0; i < ARRAY_SIZE(common_modes); i++) { | |
1058 | if (common_modes[i].w == mode->hdisplay && common_modes[i].h == mode->vdisplay) | |
1059 | return MODE_OK; | |
1060 | } | |
1061 | return MODE_BAD; | |
f64122c1 DA |
1062 | } |
1063 | ||
6d01f1f5 | 1064 | static struct drm_encoder *qxl_best_encoder(struct drm_connector *connector) |
f64122c1 DA |
1065 | { |
1066 | struct qxl_output *qxl_output = | |
1067 | drm_connector_to_qxl_output(connector); | |
1068 | ||
1069 | DRM_DEBUG("\n"); | |
1070 | return &qxl_output->enc; | |
1071 | } | |
1072 | ||
1073 | ||
1074 | static const struct drm_encoder_helper_funcs qxl_enc_helper_funcs = { | |
1075 | .dpms = qxl_enc_dpms, | |
f64122c1 DA |
1076 | .prepare = qxl_enc_prepare, |
1077 | .mode_set = qxl_enc_mode_set, | |
1078 | .commit = qxl_enc_commit, | |
1079 | }; | |
1080 | ||
1081 | static const struct drm_connector_helper_funcs qxl_connector_helper_funcs = { | |
1082 | .get_modes = qxl_conn_get_modes, | |
1083 | .mode_valid = qxl_conn_mode_valid, | |
1084 | .best_encoder = qxl_best_encoder, | |
1085 | }; | |
1086 | ||
f64122c1 DA |
1087 | static enum drm_connector_status qxl_conn_detect( |
1088 | struct drm_connector *connector, | |
1089 | bool force) | |
1090 | { | |
1091 | struct qxl_output *output = | |
1092 | drm_connector_to_qxl_output(connector); | |
1093 | struct drm_device *ddev = connector->dev; | |
1094 | struct qxl_device *qdev = ddev->dev_private; | |
69e5d3f8 | 1095 | bool connected = false; |
f64122c1 DA |
1096 | |
1097 | /* The first monitor is always connected */ | |
69e5d3f8 DA |
1098 | if (!qdev->client_monitors_config) { |
1099 | if (output->index == 0) | |
1100 | connected = true; | |
1101 | } else | |
1102 | connected = qdev->client_monitors_config->count > output->index && | |
1103 | qxl_head_enabled(&qdev->client_monitors_config->heads[output->index]); | |
f64122c1 | 1104 | |
5cab51cb MAL |
1105 | DRM_DEBUG("#%d connected: %d\n", output->index, connected); |
1106 | if (!connected) | |
1107 | qxl_monitors_config_set(qdev, output->index, 0, 0, 0, 0, 0); | |
1108 | ||
f64122c1 DA |
1109 | return connected ? connector_status_connected |
1110 | : connector_status_disconnected; | |
1111 | } | |
1112 | ||
1113 | static int qxl_conn_set_property(struct drm_connector *connector, | |
1114 | struct drm_property *property, | |
1115 | uint64_t value) | |
1116 | { | |
1117 | DRM_DEBUG("\n"); | |
1118 | return 0; | |
1119 | } | |
1120 | ||
1121 | static void qxl_conn_destroy(struct drm_connector *connector) | |
1122 | { | |
1123 | struct qxl_output *qxl_output = | |
1124 | drm_connector_to_qxl_output(connector); | |
1125 | ||
34ea3d38 | 1126 | drm_connector_unregister(connector); |
f64122c1 DA |
1127 | drm_connector_cleanup(connector); |
1128 | kfree(qxl_output); | |
1129 | } | |
1130 | ||
1131 | static const struct drm_connector_funcs qxl_connector_funcs = { | |
1132 | .dpms = drm_helper_connector_dpms, | |
f64122c1 | 1133 | .detect = qxl_conn_detect, |
6af3e656 | 1134 | .fill_modes = drm_helper_probe_single_connector_modes, |
f64122c1 DA |
1135 | .set_property = qxl_conn_set_property, |
1136 | .destroy = qxl_conn_destroy, | |
9ade8b98 GKB |
1137 | .reset = drm_atomic_helper_connector_reset, |
1138 | .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, | |
1139 | .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, | |
f64122c1 DA |
1140 | }; |
1141 | ||
1142 | static void qxl_enc_destroy(struct drm_encoder *encoder) | |
1143 | { | |
1144 | drm_encoder_cleanup(encoder); | |
1145 | } | |
1146 | ||
1147 | static const struct drm_encoder_funcs qxl_enc_funcs = { | |
1148 | .destroy = qxl_enc_destroy, | |
1149 | }; | |
1150 | ||
4695b039 DA |
1151 | static int qxl_mode_create_hotplug_mode_update_property(struct qxl_device *qdev) |
1152 | { | |
1153 | if (qdev->hotplug_mode_update_property) | |
1154 | return 0; | |
1155 | ||
1156 | qdev->hotplug_mode_update_property = | |
cbdded7f | 1157 | drm_property_create_range(&qdev->ddev, DRM_MODE_PROP_IMMUTABLE, |
4695b039 DA |
1158 | "hotplug_mode_update", 0, 1); |
1159 | ||
1160 | return 0; | |
1161 | } | |
1162 | ||
6d01f1f5 | 1163 | static int qdev_output_init(struct drm_device *dev, int num_output) |
f64122c1 | 1164 | { |
4695b039 | 1165 | struct qxl_device *qdev = dev->dev_private; |
f64122c1 DA |
1166 | struct qxl_output *qxl_output; |
1167 | struct drm_connector *connector; | |
1168 | struct drm_encoder *encoder; | |
1169 | ||
1170 | qxl_output = kzalloc(sizeof(struct qxl_output), GFP_KERNEL); | |
1171 | if (!qxl_output) | |
1172 | return -ENOMEM; | |
1173 | ||
1174 | qxl_output->index = num_output; | |
1175 | ||
1176 | connector = &qxl_output->base; | |
1177 | encoder = &qxl_output->enc; | |
1178 | drm_connector_init(dev, &qxl_output->base, | |
1179 | &qxl_connector_funcs, DRM_MODE_CONNECTOR_VIRTUAL); | |
1180 | ||
1181 | drm_encoder_init(dev, &qxl_output->enc, &qxl_enc_funcs, | |
13a3d91f | 1182 | DRM_MODE_ENCODER_VIRTUAL, NULL); |
f64122c1 | 1183 | |
5ff91e44 DA |
1184 | /* we get HPD via client monitors config */ |
1185 | connector->polled = DRM_CONNECTOR_POLL_HPD; | |
f64122c1 DA |
1186 | encoder->possible_crtcs = 1 << num_output; |
1187 | drm_mode_connector_attach_encoder(&qxl_output->base, | |
1188 | &qxl_output->enc); | |
1189 | drm_encoder_helper_add(encoder, &qxl_enc_helper_funcs); | |
1190 | drm_connector_helper_add(connector, &qxl_connector_helper_funcs); | |
1191 | ||
4695b039 DA |
1192 | drm_object_attach_property(&connector->base, |
1193 | qdev->hotplug_mode_update_property, 0); | |
7dea0941 DA |
1194 | drm_object_attach_property(&connector->base, |
1195 | dev->mode_config.suggested_x_property, 0); | |
1196 | drm_object_attach_property(&connector->base, | |
1197 | dev->mode_config.suggested_y_property, 0); | |
f64122c1 DA |
1198 | return 0; |
1199 | } | |
1200 | ||
1201 | static struct drm_framebuffer * | |
1202 | qxl_user_framebuffer_create(struct drm_device *dev, | |
1203 | struct drm_file *file_priv, | |
1eb83451 | 1204 | const struct drm_mode_fb_cmd2 *mode_cmd) |
f64122c1 DA |
1205 | { |
1206 | struct drm_gem_object *obj; | |
1207 | struct qxl_framebuffer *qxl_fb; | |
f64122c1 DA |
1208 | int ret; |
1209 | ||
a8ad0bd8 CW |
1210 | obj = drm_gem_object_lookup(file_priv, mode_cmd->handles[0]); |
1211 | if (!obj) | |
1212 | return NULL; | |
f64122c1 DA |
1213 | |
1214 | qxl_fb = kzalloc(sizeof(*qxl_fb), GFP_KERNEL); | |
1215 | if (qxl_fb == NULL) | |
1216 | return NULL; | |
1217 | ||
6819c3c2 | 1218 | ret = qxl_framebuffer_init(dev, qxl_fb, mode_cmd, obj, &qxl_fb_funcs); |
f64122c1 DA |
1219 | if (ret) { |
1220 | kfree(qxl_fb); | |
1221 | drm_gem_object_unreference_unlocked(obj); | |
1222 | return NULL; | |
1223 | } | |
1224 | ||
f64122c1 DA |
1225 | return &qxl_fb->base; |
1226 | } | |
1227 | ||
1228 | static const struct drm_mode_config_funcs qxl_mode_funcs = { | |
1229 | .fb_create = qxl_user_framebuffer_create, | |
472e6d46 GKB |
1230 | .atomic_check = drm_atomic_helper_check, |
1231 | .atomic_commit = drm_atomic_helper_commit, | |
f64122c1 DA |
1232 | }; |
1233 | ||
2bd6ce84 | 1234 | int qxl_create_monitors_object(struct qxl_device *qdev) |
f64122c1 | 1235 | { |
f64122c1 DA |
1236 | int ret; |
1237 | struct drm_gem_object *gobj; | |
07f8d9bd | 1238 | int max_allowed = qxl_num_crtc; |
f64122c1 | 1239 | int monitors_config_size = sizeof(struct qxl_monitors_config) + |
2bd6ce84 | 1240 | max_allowed * sizeof(struct qxl_head); |
f64122c1 | 1241 | |
f64122c1 DA |
1242 | ret = qxl_gem_object_create(qdev, monitors_config_size, 0, |
1243 | QXL_GEM_DOMAIN_VRAM, | |
1244 | false, false, NULL, &gobj); | |
1245 | if (ret) { | |
1246 | DRM_ERROR("%s: failed to create gem ret=%d\n", __func__, ret); | |
1247 | return -ENOMEM; | |
1248 | } | |
1249 | qdev->monitors_config_bo = gem_to_qxl_bo(gobj); | |
2bd6ce84 | 1250 | |
2bd6ce84 | 1251 | ret = qxl_bo_pin(qdev->monitors_config_bo, QXL_GEM_DOMAIN_VRAM, NULL); |
715a11fa | 1252 | if (ret) |
2bd6ce84 | 1253 | return ret; |
2bd6ce84 | 1254 | |
f64122c1 | 1255 | qxl_bo_kmap(qdev->monitors_config_bo, NULL); |
2bd6ce84 | 1256 | |
f64122c1 DA |
1257 | qdev->monitors_config = qdev->monitors_config_bo->kptr; |
1258 | qdev->ram_header->monitors_config = | |
1259 | qxl_bo_physical_address(qdev, qdev->monitors_config_bo, 0); | |
1260 | ||
1261 | memset(qdev->monitors_config, 0, monitors_config_size); | |
1262 | qdev->monitors_config->max_allowed = max_allowed; | |
2bd6ce84 DA |
1263 | return 0; |
1264 | } | |
1265 | ||
1266 | int qxl_destroy_monitors_object(struct qxl_device *qdev) | |
1267 | { | |
1268 | int ret; | |
1269 | ||
1270 | qdev->monitors_config = NULL; | |
1271 | qdev->ram_header->monitors_config = 0; | |
1272 | ||
1273 | qxl_bo_kunmap(qdev->monitors_config_bo); | |
715a11fa | 1274 | ret = qxl_bo_unpin(qdev->monitors_config_bo); |
2bd6ce84 DA |
1275 | if (ret) |
1276 | return ret; | |
1277 | ||
2bd6ce84 DA |
1278 | qxl_bo_unref(&qdev->monitors_config_bo); |
1279 | return 0; | |
1280 | } | |
1281 | ||
1282 | int qxl_modeset_init(struct qxl_device *qdev) | |
1283 | { | |
1284 | int i; | |
1285 | int ret; | |
1286 | ||
cbdded7f | 1287 | drm_mode_config_init(&qdev->ddev); |
2bd6ce84 DA |
1288 | |
1289 | ret = qxl_create_monitors_object(qdev); | |
1290 | if (ret) | |
1291 | return ret; | |
f64122c1 | 1292 | |
cbdded7f | 1293 | qdev->ddev.mode_config.funcs = (void *)&qxl_mode_funcs; |
f64122c1 DA |
1294 | |
1295 | /* modes will be validated against the framebuffer size */ | |
1277eed5 GKB |
1296 | qdev->ddev.mode_config.min_width = 0; |
1297 | qdev->ddev.mode_config.min_height = 0; | |
cbdded7f GKB |
1298 | qdev->ddev.mode_config.max_width = 8192; |
1299 | qdev->ddev.mode_config.max_height = 8192; | |
f64122c1 | 1300 | |
cbdded7f | 1301 | qdev->ddev.mode_config.fb_base = qdev->vram_base; |
4695b039 | 1302 | |
cbdded7f | 1303 | drm_mode_create_suggested_offset_properties(&qdev->ddev); |
4695b039 DA |
1304 | qxl_mode_create_hotplug_mode_update_property(qdev); |
1305 | ||
07f8d9bd | 1306 | for (i = 0 ; i < qxl_num_crtc; ++i) { |
cbdded7f GKB |
1307 | qdev_crtc_init(&qdev->ddev, i); |
1308 | qdev_output_init(&qdev->ddev, i); | |
f64122c1 DA |
1309 | } |
1310 | ||
c50fad8f | 1311 | qxl_display_read_client_monitors_config(qdev); |
f64122c1 DA |
1312 | qdev->mode_info.mode_config_initialized = true; |
1313 | ||
9ade8b98 GKB |
1314 | drm_mode_config_reset(&qdev->ddev); |
1315 | ||
f64122c1 DA |
1316 | /* primary surface must be created by this point, to allow |
1317 | * issuing command queue commands and having them read by | |
1318 | * spice server. */ | |
1319 | qxl_fbdev_init(qdev); | |
1320 | return 0; | |
1321 | } | |
1322 | ||
1323 | void qxl_modeset_fini(struct qxl_device *qdev) | |
1324 | { | |
1325 | qxl_fbdev_fini(qdev); | |
2bd6ce84 DA |
1326 | |
1327 | qxl_destroy_monitors_object(qdev); | |
f64122c1 | 1328 | if (qdev->mode_info.mode_config_initialized) { |
cbdded7f | 1329 | drm_mode_config_cleanup(&qdev->ddev); |
f64122c1 DA |
1330 | qdev->mode_info.mode_config_initialized = false; |
1331 | } | |
1332 | } |