[mirror_ubuntu-focal-kernel.git] / drivers / gpu / drm / qxl / qxl_release.c

/*
 * Copyright 2011 Red Hat, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * on the rights to use, copy, modify, merge, publish, distribute, sub
 * license, and/or sell copies of the Software, and to permit persons to whom
 * the Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 */
#include "qxl_drv.h"
#include "qxl_object.h"
#include <trace/events/dma_fence.h>

/*
 * drawable cmd cache - allocate a bunch of VRAM pages, suballocate
 * into 256 byte chunks for now - gives 16 cmds per page.
 *
 * use an ida to index into the chunks?
 */
/* manage releaseables */
/* stack them 16 high for now -drawable object is 191 */
#define RELEASE_SIZE 256
#define RELEASES_PER_BO (4096 / RELEASE_SIZE)
/* put an alloc/dealloc surface cmd into one bo and round up to 128 */
#define SURFACE_RELEASE_SIZE 128
#define SURFACE_RELEASES_PER_BO (4096 / SURFACE_RELEASE_SIZE)

static const int release_size_per_bo[] = { RELEASE_SIZE, SURFACE_RELEASE_SIZE, RELEASE_SIZE };
static const int releases_per_bo[] = { RELEASES_PER_BO, SURFACE_RELEASES_PER_BO, RELEASES_PER_BO };

static const char *qxl_get_driver_name(struct dma_fence *fence)
{
	return "qxl";
}

static const char *qxl_get_timeline_name(struct dma_fence *fence)
{
	return "release";
}

static bool qxl_nop_signaling(struct dma_fence *fence)
{
	/* fences are always automatically signaled, so just pretend we did this.. */
	return true;
}

static long qxl_fence_wait(struct dma_fence *fence, bool intr,
			   signed long timeout)
{
	struct qxl_device *qdev;
	struct qxl_release *release;
	int count = 0, sc = 0;
	bool have_drawable_releases;
	unsigned long cur, end = jiffies + timeout;

	qdev = container_of(fence->lock, struct qxl_device, release_lock);
	release = container_of(fence, struct qxl_release, base);
	have_drawable_releases = release->type == QXL_RELEASE_DRAWABLE;

retry:
	sc++;

	if (dma_fence_is_signaled(fence))
		goto signaled;

	qxl_io_notify_oom(qdev);

	for (count = 0; count < 11; count++) {
		if (!qxl_queue_garbage_collect(qdev, true))
			break;

		if (dma_fence_is_signaled(fence))
			goto signaled;
	}

	if (dma_fence_is_signaled(fence))
		goto signaled;

	if (have_drawable_releases || sc < 4) {
		if (sc > 2)
			/* back off */
			usleep_range(500, 1000);

		if (time_after(jiffies, end))
			return 0;

		if (have_drawable_releases && sc > 300) {
			DMA_FENCE_WARN(fence, "failed to wait on release %llu "
				       "after spincount %d\n",
				       fence->context & ~0xf0000000, sc);
			goto signaled;
		}
		goto retry;
	}
	/*
	 * yeah, original sync_obj_wait gave up after 3 spins when
	 * have_drawable_releases is not set.
	 */

signaled:
	cur = jiffies;
	if (time_after(cur, end))
		return 0;
	return end - cur;
}

static const struct dma_fence_ops qxl_fence_ops = {
	.get_driver_name = qxl_get_driver_name,
	.get_timeline_name = qxl_get_timeline_name,
	.enable_signaling = qxl_nop_signaling,
	.wait = qxl_fence_wait,
};

static int
qxl_release_alloc(struct qxl_device *qdev, int type,
		  struct qxl_release **ret)
{
	struct qxl_release *release;
	int handle;
	size_t size = sizeof(*release);

	release = kmalloc(size, GFP_KERNEL);
	if (!release) {
		DRM_ERROR("Out of memory\n");
		return 0;
	}
	release->base.ops = NULL;
	release->type = type;
	release->release_offset = 0;
	release->surface_release_id = 0;
	INIT_LIST_HEAD(&release->bos);

	idr_preload(GFP_KERNEL);
	spin_lock(&qdev->release_idr_lock);
	handle = idr_alloc(&qdev->release_idr, release, 1, 0, GFP_NOWAIT);
	release->base.seqno = ++qdev->release_seqno;
	spin_unlock(&qdev->release_idr_lock);
	idr_preload_end();
	if (handle < 0) {
		kfree(release);
		*ret = NULL;
		return handle;
	}
	*ret = release;
	QXL_INFO(qdev, "allocated release %d\n", handle);
	release->id = handle;
	return handle;
}

static void
qxl_release_free_list(struct qxl_release *release)
{
	while (!list_empty(&release->bos)) {
		struct qxl_bo_list *entry;
		struct qxl_bo *bo;

		entry = container_of(release->bos.next,
				     struct qxl_bo_list, tv.head);
		bo = to_qxl_bo(entry->tv.bo);
		qxl_bo_unref(&bo);
		list_del(&entry->tv.head);
		kfree(entry);
	}
}

void
qxl_release_free(struct qxl_device *qdev,
		 struct qxl_release *release)
{
	QXL_INFO(qdev, "release %d, type %d\n", release->id,
		 release->type);

	if (release->surface_release_id)
		qxl_surface_id_dealloc(qdev, release->surface_release_id);

	spin_lock(&qdev->release_idr_lock);
	idr_remove(&qdev->release_idr, release->id);
	spin_unlock(&qdev->release_idr_lock);

	if (release->base.ops) {
		WARN_ON(list_empty(&release->bos));
		qxl_release_free_list(release);

		dma_fence_signal(&release->base);
		dma_fence_put(&release->base);
	} else {
		qxl_release_free_list(release);
		kfree(release);
	}
}

static int qxl_release_bo_alloc(struct qxl_device *qdev,
				struct qxl_bo **bo)
{
	/* pin releases bo's they are too messy to evict */
	return qxl_bo_create(qdev, PAGE_SIZE, false, true,
			     QXL_GEM_DOMAIN_VRAM, NULL, bo);
}

int qxl_release_list_add(struct qxl_release *release, struct qxl_bo *bo)
{
	struct qxl_bo_list *entry;

	list_for_each_entry(entry, &release->bos, tv.head) {
		if (entry->tv.bo == &bo->tbo)
			return 0;
	}

	entry = kmalloc(sizeof(struct qxl_bo_list), GFP_KERNEL);
	if (!entry)
		return -ENOMEM;

	qxl_bo_ref(bo);
	entry->tv.bo = &bo->tbo;
	entry->tv.shared = false;
	list_add_tail(&entry->tv.head, &release->bos);
	return 0;
}

static int qxl_release_validate_bo(struct qxl_bo *bo)
{
	int ret;

	if (!bo->pin_count) {
		qxl_ttm_placement_from_domain(bo, bo->type, false);
		ret = ttm_bo_validate(&bo->tbo, &bo->placement,
				      true, false);
		if (ret)
			return ret;
	}

	ret = reservation_object_reserve_shared(bo->tbo.resv);
	if (ret)
		return ret;

	/* allocate a surface for reserved + validated buffers */
	ret = qxl_bo_check_id(bo->gem_base.dev->dev_private, bo);
	if (ret)
		return ret;
	return 0;
}

int qxl_release_reserve_list(struct qxl_release *release, bool no_intr)
{
	int ret;
	struct qxl_bo_list *entry;

	/* if only one object on the release its the release itself
	   since these objects are pinned no need to reserve */
	if (list_is_singular(&release->bos))
		return 0;

	ret = ttm_eu_reserve_buffers(&release->ticket, &release->bos,
				     !no_intr, NULL);
	if (ret)
		return ret;

	list_for_each_entry(entry, &release->bos, tv.head) {
		struct qxl_bo *bo = to_qxl_bo(entry->tv.bo);

		ret = qxl_release_validate_bo(bo);
		if (ret) {
			ttm_eu_backoff_reservation(&release->ticket, &release->bos);
			return ret;
		}
	}
	return 0;
}

void qxl_release_backoff_reserve_list(struct qxl_release *release)
{
	/* if only one object on the release its the release itself
	   since these objects are pinned no need to reserve */
	if (list_is_singular(&release->bos))
		return;

	ttm_eu_backoff_reservation(&release->ticket, &release->bos);
}


int qxl_alloc_surface_release_reserved(struct qxl_device *qdev,
				       enum qxl_surface_cmd_type surface_cmd_type,
				       struct qxl_release *create_rel,
				       struct qxl_release **release)
{
	if (surface_cmd_type == QXL_SURFACE_CMD_DESTROY && create_rel) {
		int idr_ret;
		struct qxl_bo_list *entry = list_first_entry(&create_rel->bos, struct qxl_bo_list, tv.head);
		struct qxl_bo *bo;
		union qxl_release_info *info;

		/* stash the release after the create command */
		idr_ret = qxl_release_alloc(qdev, QXL_RELEASE_SURFACE_CMD, release);
		if (idr_ret < 0)
			return idr_ret;
		bo = to_qxl_bo(entry->tv.bo);

		(*release)->release_offset = create_rel->release_offset + 64;

		qxl_release_list_add(*release, bo);

		info = qxl_release_map(qdev, *release);
		info->id = idr_ret;
		qxl_release_unmap(qdev, *release, info);
		return 0;
	}

	return qxl_alloc_release_reserved(qdev, sizeof(struct qxl_surface_cmd),
					 QXL_RELEASE_SURFACE_CMD, release, NULL);
}

int qxl_alloc_release_reserved(struct qxl_device *qdev, unsigned long size,
				       int type, struct qxl_release **release,
				       struct qxl_bo **rbo)
{
	struct qxl_bo *bo;
	int idr_ret;
	int ret = 0;
	union qxl_release_info *info;
	int cur_idx;

	if (type == QXL_RELEASE_DRAWABLE)
		cur_idx = 0;
	else if (type == QXL_RELEASE_SURFACE_CMD)
		cur_idx = 1;
	else if (type == QXL_RELEASE_CURSOR_CMD)
		cur_idx = 2;
	else {
		DRM_ERROR("got illegal type: %d\n", type);
		return -EINVAL;
	}

	idr_ret = qxl_release_alloc(qdev, type, release);
	if (idr_ret < 0) {
		if (rbo)
			*rbo = NULL;
		return idr_ret;
	}

	mutex_lock(&qdev->release_mutex);
	if (qdev->current_release_bo_offset[cur_idx] + 1 >= releases_per_bo[cur_idx]) {
		qxl_bo_unref(&qdev->current_release_bo[cur_idx]);
		qdev->current_release_bo_offset[cur_idx] = 0;
		qdev->current_release_bo[cur_idx] = NULL;
	}
	if (!qdev->current_release_bo[cur_idx]) {
		ret = qxl_release_bo_alloc(qdev, &qdev->current_release_bo[cur_idx]);
		if (ret) {
			mutex_unlock(&qdev->release_mutex);
			qxl_release_free(qdev, *release);
			return ret;
		}
	}

	bo = qxl_bo_ref(qdev->current_release_bo[cur_idx]);

	(*release)->release_offset = qdev->current_release_bo_offset[cur_idx] * release_size_per_bo[cur_idx];
	qdev->current_release_bo_offset[cur_idx]++;

	if (rbo)
		*rbo = bo;

	mutex_unlock(&qdev->release_mutex);

	ret = qxl_release_list_add(*release, bo);
	qxl_bo_unref(&bo);
	if (ret) {
		qxl_release_free(qdev, *release);
		return ret;
	}

	info = qxl_release_map(qdev, *release);
	info->id = idr_ret;
	qxl_release_unmap(qdev, *release, info);

	return ret;
}

struct qxl_release *qxl_release_from_id_locked(struct qxl_device *qdev,
						   uint64_t id)
{
	struct qxl_release *release;

	spin_lock(&qdev->release_idr_lock);
	release = idr_find(&qdev->release_idr, id);
	spin_unlock(&qdev->release_idr_lock);
	if (!release) {
		DRM_ERROR("failed to find id in release_idr\n");
		return NULL;
	}

	return release;
}

union qxl_release_info *qxl_release_map(struct qxl_device *qdev,
					struct qxl_release *release)
{
	void *ptr;
	union qxl_release_info *info;
	struct qxl_bo_list *entry = list_first_entry(&release->bos, struct qxl_bo_list, tv.head);
	struct qxl_bo *bo = to_qxl_bo(entry->tv.bo);

	ptr = qxl_bo_kmap_atomic_page(qdev, bo, release->release_offset & PAGE_SIZE);
	if (!ptr)
		return NULL;
	info = ptr + (release->release_offset & ~PAGE_SIZE);
	return info;
}

void qxl_release_unmap(struct qxl_device *qdev,
		       struct qxl_release *release,
		       union qxl_release_info *info)
{
	struct qxl_bo_list *entry = list_first_entry(&release->bos, struct qxl_bo_list, tv.head);
	struct qxl_bo *bo = to_qxl_bo(entry->tv.bo);
	void *ptr;

	ptr = ((void *)info) - (release->release_offset & ~PAGE_SIZE);
	qxl_bo_kunmap_atomic_page(qdev, bo, ptr);
}

void qxl_release_fence_buffer_objects(struct qxl_release *release)
{
	struct ttm_buffer_object *bo;
	struct ttm_bo_global *glob;
	struct ttm_bo_device *bdev;
	struct ttm_bo_driver *driver;
	struct qxl_bo *qbo;
	struct ttm_validate_buffer *entry;
	struct qxl_device *qdev;

	/* if only one object on the release its the release itself
	   since these objects are pinned no need to reserve */
	if (list_is_singular(&release->bos) || list_empty(&release->bos))
		return;

	bo = list_first_entry(&release->bos, struct ttm_validate_buffer, head)->bo;
	bdev = bo->bdev;
	qdev = container_of(bdev, struct qxl_device, mman.bdev);

	/*
	 * Since we never really allocated a context and we don't want to conflict,
	 * set the highest bits. This will break if we really allow exporting of dma-bufs.
	 */
	dma_fence_init(&release->base, &qxl_fence_ops, &qdev->release_lock,
		       release->id | 0xf0000000, release->base.seqno);
	trace_dma_fence_emit(&release->base);

	driver = bdev->driver;
	glob = bo->glob;

	spin_lock(&glob->lru_lock);

	list_for_each_entry(entry, &release->bos, head) {
		bo = entry->bo;
		qbo = to_qxl_bo(bo);

		reservation_object_add_shared_fence(bo->resv, &release->base);
		ttm_bo_add_to_lru(bo);
		__ttm_bo_unreserve(bo);
	}
	spin_unlock(&glob->lru_lock);
	ww_acquire_fini(&release->ticket);
}
Commit	Line	Data
f64122c1 DA	1	/*
	2	* Copyright 2011 Red Hat, Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* on the rights to use, copy, modify, merge, publish, distribute, sub
	8	* license, and/or sell copies of the Software, and to permit persons to whom
	9	* the Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice (including the next
	12	* paragraph) shall be included in all copies or substantial portions of the
	13	* Software.
	14	*
	15	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	16	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	17	* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
	18	* THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
	19	* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	20	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
	21	*/
	22	#include "qxl_drv.h"
	23	#include "qxl_object.h"
f54d1867	24	#include <trace/events/dma_fence.h>
f64122c1 DA	25
	26	/*
	27	* drawable cmd cache - allocate a bunch of VRAM pages, suballocate
	28	* into 256 byte chunks for now - gives 16 cmds per page.
	29	*
	30	* use an ida to index into the chunks?
	31	*/
	32	/* manage releaseables */
	33	/* stack them 16 high for now -drawable object is 191 */
	34	#define RELEASE_SIZE 256
	35	#define RELEASES_PER_BO (4096 / RELEASE_SIZE)
	36	/* put an alloc/dealloc surface cmd into one bo and round up to 128 */
	37	#define SURFACE_RELEASE_SIZE 128
	38	#define SURFACE_RELEASES_PER_BO (4096 / SURFACE_RELEASE_SIZE)
	39
	40	static const int release_size_per_bo[] = { RELEASE_SIZE, SURFACE_RELEASE_SIZE, RELEASE_SIZE };
	41	static const int releases_per_bo[] = { RELEASES_PER_BO, SURFACE_RELEASES_PER_BO, RELEASES_PER_BO };
8002db63	42
f54d1867	43	static const char qxl_get_driver_name(struct dma_fence fence)
2f453ed4 ML	44	{
	45	return "qxl";
	46	}
	47
f54d1867	48	static const char qxl_get_timeline_name(struct dma_fence fence)
2f453ed4 ML	49	{
	50	return "release";
	51	}
	52
f54d1867	53	static bool qxl_nop_signaling(struct dma_fence *fence)
2f453ed4 ML	54	{
	55	/* fences are always automatically signaled, so just pretend we did this.. */
	56	return true;
	57	}
	58
f54d1867 CW	59	static long qxl_fence_wait(struct dma_fence *fence, bool intr,
f54d1867 CW	60	signed long timeout)
2f453ed4 ML	61	{
	62	struct qxl_device *qdev;
	63	struct qxl_release *release;
	64	int count = 0, sc = 0;
	65	bool have_drawable_releases;
	66	unsigned long cur, end = jiffies + timeout;
	67
	68	qdev = container_of(fence->lock, struct qxl_device, release_lock);
	69	release = container_of(fence, struct qxl_release, base);
	70	have_drawable_releases = release->type == QXL_RELEASE_DRAWABLE;
	71
	72	retry:
	73	sc++;
	74
f54d1867	75	if (dma_fence_is_signaled(fence))
2f453ed4 ML	76	goto signaled;
	77
	78	qxl_io_notify_oom(qdev);
	79
	80	for (count = 0; count < 11; count++) {
	81	if (!qxl_queue_garbage_collect(qdev, true))
	82	break;
	83
f54d1867	84	if (dma_fence_is_signaled(fence))
2f453ed4 ML	85	goto signaled;
	86	}
	87
f54d1867	88	if (dma_fence_is_signaled(fence))
2f453ed4 ML	89	goto signaled;
	90
	91	if (have_drawable_releases \|\| sc < 4) {
	92	if (sc > 2)
	93	/* back off */
	94	usleep_range(500, 1000);
	95
	96	if (time_after(jiffies, end))
	97	return 0;
	98
	99	if (have_drawable_releases && sc > 300) {
f54d1867 CW	100	DMA_FENCE_WARN(fence, "failed to wait on release %llu "
	101	"after spincount %d\n",
	102	fence->context & ~0xf0000000, sc);
2f453ed4 ML	103	goto signaled;
	104	}
	105	goto retry;
	106	}
	107	/*
	108	* yeah, original sync_obj_wait gave up after 3 spins when
	109	* have_drawable_releases is not set.
	110	*/
	111
	112	signaled:
	113	cur = jiffies;
	114	if (time_after(cur, end))
	115	return 0;
	116	return end - cur;
	117	}
	118
f54d1867	119	static const struct dma_fence_ops qxl_fence_ops = {
2f453ed4 ML	120	.get_driver_name = qxl_get_driver_name,
	121	.get_timeline_name = qxl_get_timeline_name,
	122	.enable_signaling = qxl_nop_signaling,
	123	.wait = qxl_fence_wait,
	124	};
	125
6ecf5c2b	126	static int
f64122c1 DA	127	qxl_release_alloc(struct qxl_device *qdev, int type,
	128	struct qxl_release **ret)
	129	{
	130	struct qxl_release *release;
307b9c02	131	int handle;
f64122c1	132	size_t size = sizeof(*release);
f64122c1 DA	133
	134	release = kmalloc(size, GFP_KERNEL);
	135	if (!release) {
	136	DRM_ERROR("Out of memory\n");
	137	return 0;
	138	}
2f453ed4	139	release->base.ops = NULL;
f64122c1	140	release->type = type;
f64122c1 DA	141	release->release_offset = 0;
f64122c1 DA	142	release->surface_release_id = 0;
8002db63	143	INIT_LIST_HEAD(&release->bos);
307b9c02 DA	144
307b9c02 DA	145	idr_preload(GFP_KERNEL);
f64122c1	146	spin_lock(&qdev->release_idr_lock);
2f453ed4 ML	147	handle = idr_alloc(&qdev->release_idr, release, 1, 0, GFP_NOWAIT);
2f453ed4 ML	148	release->base.seqno = ++qdev->release_seqno;
f64122c1	149	spin_unlock(&qdev->release_idr_lock);
307b9c02	150	idr_preload_end();
2f453ed4 ML	151	if (handle < 0) {
	152	kfree(release);
	153	*ret = NULL;
	154	return handle;
	155	}
307b9c02	156	*ret = release;
72ec5650	157	QXL_INFO(qdev, "allocated release %d\n", handle);
f64122c1	158	release->id = handle;
f64122c1 DA	159	return handle;
	160	}
	161
2f453ed4 ML	162	static void
	163	qxl_release_free_list(struct qxl_release *release)
	164	{
	165	while (!list_empty(&release->bos)) {
b75402c9 ML	166	struct qxl_bo_list *entry;
b75402c9 ML	167	struct qxl_bo *bo;
2f453ed4 ML	168
2f453ed4 ML	169	entry = container_of(release->bos.next,
b75402c9 ML	170	struct qxl_bo_list, tv.head);
	171	bo = to_qxl_bo(entry->tv.bo);
	172	qxl_bo_unref(&bo);
	173	list_del(&entry->tv.head);
2f453ed4 ML	174	kfree(entry);
	175	}
	176	}
	177
f64122c1 DA	178	void
	179	qxl_release_free(struct qxl_device *qdev,
	180	struct qxl_release *release)
	181	{
8002db63 DA	182	QXL_INFO(qdev, "release %d, type %d\n", release->id,
8002db63 DA	183	release->type);
f64122c1 DA	184
	185	if (release->surface_release_id)
	186	qxl_surface_id_dealloc(qdev, release->surface_release_id);
	187
f64122c1 DA	188	spin_lock(&qdev->release_idr_lock);
	189	idr_remove(&qdev->release_idr, release->id);
	190	spin_unlock(&qdev->release_idr_lock);
2f453ed4 ML	191
	192	if (release->base.ops) {
	193	WARN_ON(list_empty(&release->bos));
	194	qxl_release_free_list(release);
	195
f54d1867 CW	196	dma_fence_signal(&release->base);
f54d1867 CW	197	dma_fence_put(&release->base);
2f453ed4 ML	198	} else {
	199	qxl_release_free_list(release);
	200	kfree(release);
	201	}
f64122c1 DA	202	}
f64122c1 DA	203
6d01f1f5 DA	204	static int qxl_release_bo_alloc(struct qxl_device *qdev,
6d01f1f5 DA	205	struct qxl_bo **bo)
f64122c1	206	{
4f49ec92	207	/* pin releases bo's they are too messy to evict */
96c594ba MY	208	return qxl_bo_create(qdev, PAGE_SIZE, false, true,
96c594ba MY	209	QXL_GEM_DOMAIN_VRAM, NULL, bo);
f64122c1 DA	210	}
f64122c1 DA	211
8002db63 DA	212	int qxl_release_list_add(struct qxl_release release, struct qxl_bo bo)
	213	{
	214	struct qxl_bo_list *entry;
	215
	216	list_for_each_entry(entry, &release->bos, tv.head) {
	217	if (entry->tv.bo == &bo->tbo)
	218	return 0;
	219	}
	220
	221	entry = kmalloc(sizeof(struct qxl_bo_list), GFP_KERNEL);
	222	if (!entry)
	223	return -ENOMEM;
	224
	225	qxl_bo_ref(bo);
	226	entry->tv.bo = &bo->tbo;
ae9c0af2	227	entry->tv.shared = false;
8002db63 DA	228	list_add_tail(&entry->tv.head, &release->bos);
	229	return 0;
	230	}
	231
	232	static int qxl_release_validate_bo(struct qxl_bo *bo)
f64122c1 DA	233	{
f64122c1 DA	234	int ret;
8002db63 DA	235
	236	if (!bo->pin_count) {
	237	qxl_ttm_placement_from_domain(bo, bo->type, false);
	238	ret = ttm_bo_validate(&bo->tbo, &bo->placement,
	239	true, false);
f64122c1 DA	240	if (ret)
	241	return ret;
	242	}
8002db63	243
2f453ed4 ML	244	ret = reservation_object_reserve_shared(bo->tbo.resv);
	245	if (ret)
	246	return ret;
	247
8002db63 DA	248	/* allocate a surface for reserved + validated buffers */
	249	ret = qxl_bo_check_id(bo->gem_base.dev->dev_private, bo);
	250	if (ret)
	251	return ret;
f64122c1 DA	252	return 0;
	253	}
	254
8002db63	255	int qxl_release_reserve_list(struct qxl_release *release, bool no_intr)
f64122c1	256	{
8002db63 DA	257	int ret;
	258	struct qxl_bo_list *entry;
	259
	260	/* if only one object on the release its the release itself
	261	since these objects are pinned no need to reserve */
	262	if (list_is_singular(&release->bos))
	263	return 0;
	264
aa35071c CK	265	ret = ttm_eu_reserve_buffers(&release->ticket, &release->bos,
aa35071c CK	266	!no_intr, NULL);
8002db63 DA	267	if (ret)
	268	return ret;
	269
	270	list_for_each_entry(entry, &release->bos, tv.head) {
	271	struct qxl_bo *bo = to_qxl_bo(entry->tv.bo);
	272
	273	ret = qxl_release_validate_bo(bo);
	274	if (ret) {
	275	ttm_eu_backoff_reservation(&release->ticket, &release->bos);
	276	return ret;
	277	}
	278	}
f64122c1 DA	279	return 0;
	280	}
	281
8002db63	282	void qxl_release_backoff_reserve_list(struct qxl_release *release)
f64122c1	283	{
8002db63 DA	284	/* if only one object on the release its the release itself
	285	since these objects are pinned no need to reserve */
	286	if (list_is_singular(&release->bos))
	287	return;
	288
	289	ttm_eu_backoff_reservation(&release->ticket, &release->bos);
f64122c1 DA	290	}
f64122c1 DA	291
8002db63	292
f64122c1 DA	293	int qxl_alloc_surface_release_reserved(struct qxl_device *qdev,
	294	enum qxl_surface_cmd_type surface_cmd_type,
	295	struct qxl_release *create_rel,
	296	struct qxl_release **release)
	297	{
f64122c1 DA	298	if (surface_cmd_type == QXL_SURFACE_CMD_DESTROY && create_rel) {
f64122c1 DA	299	int idr_ret;
8002db63	300	struct qxl_bo_list *entry = list_first_entry(&create_rel->bos, struct qxl_bo_list, tv.head);
f64122c1 DA	301	struct qxl_bo *bo;
	302	union qxl_release_info *info;
	303
	304	/* stash the release after the create command */
	305	idr_ret = qxl_release_alloc(qdev, QXL_RELEASE_SURFACE_CMD, release);
2f453ed4 ML	306	if (idr_ret < 0)
2f453ed4 ML	307	return idr_ret;
266424b5	308	bo = to_qxl_bo(entry->tv.bo);
f64122c1 DA	309
	310	(*release)->release_offset = create_rel->release_offset + 64;
	311
8002db63	312	qxl_release_list_add(*release, bo);
f64122c1	313
f64122c1 DA	314	info = qxl_release_map(qdev, *release);
	315	info->id = idr_ret;
	316	qxl_release_unmap(qdev, *release, info);
8002db63	317	return 0;
f64122c1 DA	318	}
	319
	320	return qxl_alloc_release_reserved(qdev, sizeof(struct qxl_surface_cmd),
	321	QXL_RELEASE_SURFACE_CMD, release, NULL);
	322	}
	323
	324	int qxl_alloc_release_reserved(struct qxl_device *qdev, unsigned long size,
	325	int type, struct qxl_release **release,
	326	struct qxl_bo **rbo)
	327	{
	328	struct qxl_bo *bo;
	329	int idr_ret;
8002db63	330	int ret = 0;
f64122c1 DA	331	union qxl_release_info *info;
	332	int cur_idx;
	333
	334	if (type == QXL_RELEASE_DRAWABLE)
	335	cur_idx = 0;
	336	else if (type == QXL_RELEASE_SURFACE_CMD)
	337	cur_idx = 1;
	338	else if (type == QXL_RELEASE_CURSOR_CMD)
	339	cur_idx = 2;
	340	else {
	341	DRM_ERROR("got illegal type: %d\n", type);
	342	return -EINVAL;
	343	}
	344
	345	idr_ret = qxl_release_alloc(qdev, type, release);
2f453ed4 ML	346	if (idr_ret < 0) {
	347	if (rbo)
	348	*rbo = NULL;
	349	return idr_ret;
	350	}
f64122c1 DA	351
	352	mutex_lock(&qdev->release_mutex);
	353	if (qdev->current_release_bo_offset[cur_idx] + 1 >= releases_per_bo[cur_idx]) {
	354	qxl_bo_unref(&qdev->current_release_bo[cur_idx]);
	355	qdev->current_release_bo_offset[cur_idx] = 0;
	356	qdev->current_release_bo[cur_idx] = NULL;
	357	}
	358	if (!qdev->current_release_bo[cur_idx]) {
	359	ret = qxl_release_bo_alloc(qdev, &qdev->current_release_bo[cur_idx]);
	360	if (ret) {
	361	mutex_unlock(&qdev->release_mutex);
de0b523a	362	qxl_release_free(qdev, *release);
f64122c1 DA	363	return ret;
f64122c1 DA	364	}
f64122c1 DA	365	}
	366
	367	bo = qxl_bo_ref(qdev->current_release_bo[cur_idx]);
	368
	369	(release)->release_offset = qdev->current_release_bo_offset[cur_idx] release_size_per_bo[cur_idx];
	370	qdev->current_release_bo_offset[cur_idx]++;
	371
	372	if (rbo)
	373	*rbo = bo;
	374
f64122c1	375	mutex_unlock(&qdev->release_mutex);
8002db63	376
de0b523a FZ	377	ret = qxl_release_list_add(*release, bo);
	378	qxl_bo_unref(&bo);
	379	if (ret) {
	380	qxl_release_free(qdev, *release);
	381	return ret;
	382	}
f64122c1 DA	383
	384	info = qxl_release_map(qdev, *release);
	385	info->id = idr_ret;
	386	qxl_release_unmap(qdev, *release, info);
	387
f64122c1 DA	388	return ret;
	389	}
	390
f64122c1 DA	391	struct qxl_release qxl_release_from_id_locked(struct qxl_device qdev,
	392	uint64_t id)
	393	{
	394	struct qxl_release *release;
	395
	396	spin_lock(&qdev->release_idr_lock);
	397	release = idr_find(&qdev->release_idr, id);
	398	spin_unlock(&qdev->release_idr_lock);
	399	if (!release) {
	400	DRM_ERROR("failed to find id in release_idr\n");
	401	return NULL;
	402	}
8002db63	403
f64122c1 DA	404	return release;
	405	}
	406
	407	union qxl_release_info qxl_release_map(struct qxl_device qdev,
	408	struct qxl_release *release)
	409	{
	410	void *ptr;
	411	union qxl_release_info *info;
8002db63 DA	412	struct qxl_bo_list *entry = list_first_entry(&release->bos, struct qxl_bo_list, tv.head);
8002db63 DA	413	struct qxl_bo *bo = to_qxl_bo(entry->tv.bo);
f64122c1 DA	414
f64122c1 DA	415	ptr = qxl_bo_kmap_atomic_page(qdev, bo, release->release_offset & PAGE_SIZE);
8002db63 DA	416	if (!ptr)
8002db63 DA	417	return NULL;
f64122c1 DA	418	info = ptr + (release->release_offset & ~PAGE_SIZE);
	419	return info;
	420	}
	421
	422	void qxl_release_unmap(struct qxl_device *qdev,
	423	struct qxl_release *release,
	424	union qxl_release_info *info)
	425	{
8002db63 DA	426	struct qxl_bo_list *entry = list_first_entry(&release->bos, struct qxl_bo_list, tv.head);
8002db63 DA	427	struct qxl_bo *bo = to_qxl_bo(entry->tv.bo);
f64122c1 DA	428	void *ptr;
	429
	430	ptr = ((void *)info) - (release->release_offset & ~PAGE_SIZE);
	431	qxl_bo_kunmap_atomic_page(qdev, bo, ptr);
	432	}
8002db63 DA	433
	434	void qxl_release_fence_buffer_objects(struct qxl_release *release)
	435	{
8002db63 DA	436	struct ttm_buffer_object *bo;
	437	struct ttm_bo_global *glob;
	438	struct ttm_bo_device *bdev;
	439	struct ttm_bo_driver *driver;
	440	struct qxl_bo *qbo;
2f453ed4 ML	441	struct ttm_validate_buffer *entry;
2f453ed4 ML	442	struct qxl_device *qdev;
8002db63 DA	443
	444	/* if only one object on the release its the release itself
	445	since these objects are pinned no need to reserve */
58b21c22	446	if (list_is_singular(&release->bos) \|\| list_empty(&release->bos))
8002db63 DA	447	return;
	448
	449	bo = list_first_entry(&release->bos, struct ttm_validate_buffer, head)->bo;
	450	bdev = bo->bdev;
2f453ed4 ML	451	qdev = container_of(bdev, struct qxl_device, mman.bdev);
	452
	453	/*
	454	* Since we never really allocated a context and we don't want to conflict,
	455	* set the highest bits. This will break if we really allow exporting of dma-bufs.
	456	*/
f54d1867 CW	457	dma_fence_init(&release->base, &qxl_fence_ops, &qdev->release_lock,
	458	release->id \| 0xf0000000, release->base.seqno);
	459	trace_dma_fence_emit(&release->base);
2f453ed4	460
8002db63 DA	461	driver = bdev->driver;
	462	glob = bo->glob;
	463
	464	spin_lock(&glob->lru_lock);
8002db63 DA	465
	466	list_for_each_entry(entry, &release->bos, head) {
	467	bo = entry->bo;
	468	qbo = to_qxl_bo(bo);
	469
2f453ed4	470	reservation_object_add_shared_fence(bo->resv, &release->base);
8002db63	471	ttm_bo_add_to_lru(bo);
c7523083	472	__ttm_bo_unreserve(bo);
8002db63	473	}
8002db63 DA	474	spin_unlock(&glob->lru_lock);
	475	ww_acquire_fini(&release->ticket);
	476	}
	477