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f64122c1 DA |
1 | /* |
2 | * Copyright 2013 Red Hat Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: Dave Airlie | |
23 | * Alon Levy | |
24 | */ | |
25 | ||
edaf492c MY |
26 | #include <drm/ttm/ttm_bo_api.h> |
27 | #include <drm/ttm/ttm_bo_driver.h> | |
28 | #include <drm/ttm/ttm_placement.h> | |
29 | #include <drm/ttm/ttm_page_alloc.h> | |
30 | #include <drm/ttm/ttm_module.h> | |
f64122c1 DA |
31 | #include <drm/drmP.h> |
32 | #include <drm/drm.h> | |
33 | #include <drm/qxl_drm.h> | |
34 | #include "qxl_drv.h" | |
35 | #include "qxl_object.h" | |
36 | ||
37 | #include <linux/delay.h> | |
f64122c1 DA |
38 | |
39 | static struct qxl_device *qxl_get_qdev(struct ttm_bo_device *bdev) | |
40 | { | |
41 | struct qxl_mman *mman; | |
42 | struct qxl_device *qdev; | |
43 | ||
44 | mman = container_of(bdev, struct qxl_mman, bdev); | |
45 | qdev = container_of(mman, struct qxl_device, mman); | |
46 | return qdev; | |
47 | } | |
48 | ||
49 | static int qxl_ttm_mem_global_init(struct drm_global_reference *ref) | |
50 | { | |
51 | return ttm_mem_global_init(ref->object); | |
52 | } | |
53 | ||
54 | static void qxl_ttm_mem_global_release(struct drm_global_reference *ref) | |
55 | { | |
56 | ttm_mem_global_release(ref->object); | |
57 | } | |
58 | ||
59 | static int qxl_ttm_global_init(struct qxl_device *qdev) | |
60 | { | |
61 | struct drm_global_reference *global_ref; | |
62 | int r; | |
63 | ||
64 | qdev->mman.mem_global_referenced = false; | |
65 | global_ref = &qdev->mman.mem_global_ref; | |
66 | global_ref->global_type = DRM_GLOBAL_TTM_MEM; | |
67 | global_ref->size = sizeof(struct ttm_mem_global); | |
68 | global_ref->init = &qxl_ttm_mem_global_init; | |
69 | global_ref->release = &qxl_ttm_mem_global_release; | |
70 | ||
71 | r = drm_global_item_ref(global_ref); | |
72 | if (r != 0) { | |
73 | DRM_ERROR("Failed setting up TTM memory accounting " | |
74 | "subsystem.\n"); | |
75 | return r; | |
76 | } | |
77 | ||
78 | qdev->mman.bo_global_ref.mem_glob = | |
79 | qdev->mman.mem_global_ref.object; | |
80 | global_ref = &qdev->mman.bo_global_ref.ref; | |
81 | global_ref->global_type = DRM_GLOBAL_TTM_BO; | |
82 | global_ref->size = sizeof(struct ttm_bo_global); | |
83 | global_ref->init = &ttm_bo_global_init; | |
84 | global_ref->release = &ttm_bo_global_release; | |
85 | r = drm_global_item_ref(global_ref); | |
86 | if (r != 0) { | |
87 | DRM_ERROR("Failed setting up TTM BO subsystem.\n"); | |
88 | drm_global_item_unref(&qdev->mman.mem_global_ref); | |
89 | return r; | |
90 | } | |
91 | ||
92 | qdev->mman.mem_global_referenced = true; | |
93 | return 0; | |
94 | } | |
95 | ||
96 | static void qxl_ttm_global_fini(struct qxl_device *qdev) | |
97 | { | |
98 | if (qdev->mman.mem_global_referenced) { | |
99 | drm_global_item_unref(&qdev->mman.bo_global_ref.ref); | |
100 | drm_global_item_unref(&qdev->mman.mem_global_ref); | |
101 | qdev->mman.mem_global_referenced = false; | |
102 | } | |
103 | } | |
104 | ||
105 | static struct vm_operations_struct qxl_ttm_vm_ops; | |
106 | static const struct vm_operations_struct *ttm_vm_ops; | |
107 | ||
11bac800 | 108 | static int qxl_ttm_fault(struct vm_fault *vmf) |
f64122c1 DA |
109 | { |
110 | struct ttm_buffer_object *bo; | |
f64122c1 DA |
111 | int r; |
112 | ||
11bac800 | 113 | bo = (struct ttm_buffer_object *)vmf->vma->vm_private_data; |
f64122c1 DA |
114 | if (bo == NULL) |
115 | return VM_FAULT_NOPAGE; | |
11bac800 | 116 | r = ttm_vm_ops->fault(vmf); |
f64122c1 DA |
117 | return r; |
118 | } | |
119 | ||
120 | int qxl_mmap(struct file *filp, struct vm_area_struct *vma) | |
121 | { | |
122 | struct drm_file *file_priv; | |
123 | struct qxl_device *qdev; | |
124 | int r; | |
125 | ||
126 | if (unlikely(vma->vm_pgoff < DRM_FILE_PAGE_OFFSET)) { | |
127 | pr_info("%s: vma->vm_pgoff (%ld) < DRM_FILE_PAGE_OFFSET\n", | |
128 | __func__, vma->vm_pgoff); | |
884c6dab | 129 | return -EINVAL; |
f64122c1 DA |
130 | } |
131 | ||
132 | file_priv = filp->private_data; | |
133 | qdev = file_priv->minor->dev->dev_private; | |
134 | if (qdev == NULL) { | |
135 | DRM_ERROR( | |
136 | "filp->private_data->minor->dev->dev_private == NULL\n"); | |
137 | return -EINVAL; | |
138 | } | |
139 | QXL_INFO(qdev, "%s: filp->private_data = 0x%p, vma->vm_pgoff = %lx\n", | |
140 | __func__, filp->private_data, vma->vm_pgoff); | |
141 | ||
142 | r = ttm_bo_mmap(filp, vma, &qdev->mman.bdev); | |
143 | if (unlikely(r != 0)) | |
144 | return r; | |
145 | if (unlikely(ttm_vm_ops == NULL)) { | |
146 | ttm_vm_ops = vma->vm_ops; | |
147 | qxl_ttm_vm_ops = *ttm_vm_ops; | |
148 | qxl_ttm_vm_ops.fault = &qxl_ttm_fault; | |
149 | } | |
150 | vma->vm_ops = &qxl_ttm_vm_ops; | |
151 | return 0; | |
152 | } | |
153 | ||
154 | static int qxl_invalidate_caches(struct ttm_bo_device *bdev, uint32_t flags) | |
155 | { | |
156 | return 0; | |
157 | } | |
158 | ||
159 | static int qxl_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, | |
160 | struct ttm_mem_type_manager *man) | |
161 | { | |
f64122c1 DA |
162 | switch (type) { |
163 | case TTM_PL_SYSTEM: | |
164 | /* System memory */ | |
165 | man->flags = TTM_MEMTYPE_FLAG_MAPPABLE; | |
166 | man->available_caching = TTM_PL_MASK_CACHING; | |
167 | man->default_caching = TTM_PL_FLAG_CACHED; | |
168 | break; | |
169 | case TTM_PL_VRAM: | |
283cde69 | 170 | case TTM_PL_PRIV: |
f64122c1 DA |
171 | /* "On-card" video ram */ |
172 | man->func = &ttm_bo_manager_func; | |
173 | man->gpu_offset = 0; | |
174 | man->flags = TTM_MEMTYPE_FLAG_FIXED | | |
175 | TTM_MEMTYPE_FLAG_MAPPABLE; | |
176 | man->available_caching = TTM_PL_MASK_CACHING; | |
177 | man->default_caching = TTM_PL_FLAG_CACHED; | |
178 | break; | |
179 | default: | |
180 | DRM_ERROR("Unsupported memory type %u\n", (unsigned)type); | |
181 | return -EINVAL; | |
182 | } | |
183 | return 0; | |
184 | } | |
185 | ||
186 | static void qxl_evict_flags(struct ttm_buffer_object *bo, | |
187 | struct ttm_placement *placement) | |
188 | { | |
189 | struct qxl_bo *qbo; | |
f1217ed0 CK |
190 | static struct ttm_place placements = { |
191 | .fpfn = 0, | |
192 | .lpfn = 0, | |
193 | .flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM | |
194 | }; | |
f64122c1 DA |
195 | |
196 | if (!qxl_ttm_bo_is_qxl_bo(bo)) { | |
f64122c1 DA |
197 | placement->placement = &placements; |
198 | placement->busy_placement = &placements; | |
199 | placement->num_placement = 1; | |
200 | placement->num_busy_placement = 1; | |
201 | return; | |
202 | } | |
3ebf1c6d | 203 | qbo = to_qxl_bo(bo); |
4f49ec92 | 204 | qxl_ttm_placement_from_domain(qbo, QXL_GEM_DOMAIN_CPU, false); |
f64122c1 DA |
205 | *placement = qbo->placement; |
206 | } | |
207 | ||
208 | static int qxl_verify_access(struct ttm_buffer_object *bo, struct file *filp) | |
209 | { | |
acb46527 DH |
210 | struct qxl_bo *qbo = to_qxl_bo(bo); |
211 | ||
d9a1f0b4 DH |
212 | return drm_vma_node_verify_access(&qbo->gem_base.vma_node, |
213 | filp->private_data); | |
f64122c1 DA |
214 | } |
215 | ||
216 | static int qxl_ttm_io_mem_reserve(struct ttm_bo_device *bdev, | |
217 | struct ttm_mem_reg *mem) | |
218 | { | |
219 | struct ttm_mem_type_manager *man = &bdev->man[mem->mem_type]; | |
220 | struct qxl_device *qdev = qxl_get_qdev(bdev); | |
221 | ||
222 | mem->bus.addr = NULL; | |
223 | mem->bus.offset = 0; | |
224 | mem->bus.size = mem->num_pages << PAGE_SHIFT; | |
225 | mem->bus.base = 0; | |
226 | mem->bus.is_iomem = false; | |
227 | if (!(man->flags & TTM_MEMTYPE_FLAG_MAPPABLE)) | |
228 | return -EINVAL; | |
229 | switch (mem->mem_type) { | |
230 | case TTM_PL_SYSTEM: | |
231 | /* system memory */ | |
232 | return 0; | |
233 | case TTM_PL_VRAM: | |
234 | mem->bus.is_iomem = true; | |
235 | mem->bus.base = qdev->vram_base; | |
236 | mem->bus.offset = mem->start << PAGE_SHIFT; | |
237 | break; | |
283cde69 | 238 | case TTM_PL_PRIV: |
f64122c1 DA |
239 | mem->bus.is_iomem = true; |
240 | mem->bus.base = qdev->surfaceram_base; | |
241 | mem->bus.offset = mem->start << PAGE_SHIFT; | |
242 | break; | |
243 | default: | |
244 | return -EINVAL; | |
245 | } | |
246 | return 0; | |
247 | } | |
248 | ||
249 | static void qxl_ttm_io_mem_free(struct ttm_bo_device *bdev, | |
250 | struct ttm_mem_reg *mem) | |
251 | { | |
252 | } | |
253 | ||
254 | /* | |
255 | * TTM backend functions. | |
256 | */ | |
257 | struct qxl_ttm_tt { | |
258 | struct ttm_dma_tt ttm; | |
259 | struct qxl_device *qdev; | |
260 | u64 offset; | |
261 | }; | |
262 | ||
263 | static int qxl_ttm_backend_bind(struct ttm_tt *ttm, | |
264 | struct ttm_mem_reg *bo_mem) | |
265 | { | |
266 | struct qxl_ttm_tt *gtt = (void *)ttm; | |
267 | ||
268 | gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT); | |
269 | if (!ttm->num_pages) { | |
270 | WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n", | |
271 | ttm->num_pages, bo_mem, ttm); | |
272 | } | |
273 | /* Not implemented */ | |
274 | return -1; | |
275 | } | |
276 | ||
277 | static int qxl_ttm_backend_unbind(struct ttm_tt *ttm) | |
278 | { | |
279 | /* Not implemented */ | |
280 | return -1; | |
281 | } | |
282 | ||
283 | static void qxl_ttm_backend_destroy(struct ttm_tt *ttm) | |
284 | { | |
285 | struct qxl_ttm_tt *gtt = (void *)ttm; | |
286 | ||
287 | ttm_dma_tt_fini(>t->ttm); | |
288 | kfree(gtt); | |
289 | } | |
290 | ||
291 | static struct ttm_backend_func qxl_backend_func = { | |
292 | .bind = &qxl_ttm_backend_bind, | |
293 | .unbind = &qxl_ttm_backend_unbind, | |
294 | .destroy = &qxl_ttm_backend_destroy, | |
295 | }; | |
296 | ||
297 | static int qxl_ttm_tt_populate(struct ttm_tt *ttm) | |
298 | { | |
299 | int r; | |
300 | ||
301 | if (ttm->state != tt_unpopulated) | |
302 | return 0; | |
303 | ||
304 | r = ttm_pool_populate(ttm); | |
305 | if (r) | |
306 | return r; | |
307 | ||
308 | return 0; | |
309 | } | |
310 | ||
311 | static void qxl_ttm_tt_unpopulate(struct ttm_tt *ttm) | |
312 | { | |
313 | ttm_pool_unpopulate(ttm); | |
314 | } | |
315 | ||
6d01f1f5 DA |
316 | static struct ttm_tt *qxl_ttm_tt_create(struct ttm_bo_device *bdev, |
317 | unsigned long size, uint32_t page_flags, | |
318 | struct page *dummy_read_page) | |
f64122c1 DA |
319 | { |
320 | struct qxl_device *qdev; | |
321 | struct qxl_ttm_tt *gtt; | |
322 | ||
323 | qdev = qxl_get_qdev(bdev); | |
324 | gtt = kzalloc(sizeof(struct qxl_ttm_tt), GFP_KERNEL); | |
325 | if (gtt == NULL) | |
326 | return NULL; | |
327 | gtt->ttm.ttm.func = &qxl_backend_func; | |
328 | gtt->qdev = qdev; | |
329 | if (ttm_dma_tt_init(>t->ttm, bdev, size, page_flags, | |
330 | dummy_read_page)) { | |
331 | kfree(gtt); | |
332 | return NULL; | |
333 | } | |
334 | return >t->ttm.ttm; | |
335 | } | |
336 | ||
337 | static void qxl_move_null(struct ttm_buffer_object *bo, | |
338 | struct ttm_mem_reg *new_mem) | |
339 | { | |
340 | struct ttm_mem_reg *old_mem = &bo->mem; | |
341 | ||
342 | BUG_ON(old_mem->mm_node != NULL); | |
343 | *old_mem = *new_mem; | |
344 | new_mem->mm_node = NULL; | |
345 | } | |
346 | ||
347 | static int qxl_bo_move(struct ttm_buffer_object *bo, | |
348 | bool evict, bool interruptible, | |
349 | bool no_wait_gpu, | |
350 | struct ttm_mem_reg *new_mem) | |
351 | { | |
352 | struct ttm_mem_reg *old_mem = &bo->mem; | |
88932a7b CK |
353 | int ret; |
354 | ||
355 | ret = ttm_bo_wait(bo, interruptible, no_wait_gpu); | |
356 | if (ret) | |
357 | return ret; | |
358 | ||
359 | ||
f64122c1 DA |
360 | if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) { |
361 | qxl_move_null(bo, new_mem); | |
362 | return 0; | |
363 | } | |
4499f2ac MD |
364 | return ttm_bo_move_memcpy(bo, interruptible, no_wait_gpu, |
365 | new_mem); | |
f64122c1 DA |
366 | } |
367 | ||
f64122c1 | 368 | static void qxl_bo_move_notify(struct ttm_buffer_object *bo, |
66257db7 | 369 | bool evict, |
f64122c1 DA |
370 | struct ttm_mem_reg *new_mem) |
371 | { | |
372 | struct qxl_bo *qbo; | |
373 | struct qxl_device *qdev; | |
374 | ||
375 | if (!qxl_ttm_bo_is_qxl_bo(bo)) | |
376 | return; | |
3ebf1c6d | 377 | qbo = to_qxl_bo(bo); |
f64122c1 DA |
378 | qdev = qbo->gem_base.dev->dev_private; |
379 | ||
283cde69 | 380 | if (bo->mem.mem_type == TTM_PL_PRIV && qbo->surface_id) |
f64122c1 DA |
381 | qxl_surface_evict(qdev, qbo, new_mem ? true : false); |
382 | } | |
383 | ||
384 | static struct ttm_bo_driver qxl_bo_driver = { | |
385 | .ttm_tt_create = &qxl_ttm_tt_create, | |
386 | .ttm_tt_populate = &qxl_ttm_tt_populate, | |
387 | .ttm_tt_unpopulate = &qxl_ttm_tt_unpopulate, | |
388 | .invalidate_caches = &qxl_invalidate_caches, | |
389 | .init_mem_type = &qxl_init_mem_type, | |
a2ab19fe | 390 | .eviction_valuable = ttm_bo_eviction_valuable, |
f64122c1 DA |
391 | .evict_flags = &qxl_evict_flags, |
392 | .move = &qxl_bo_move, | |
393 | .verify_access = &qxl_verify_access, | |
394 | .io_mem_reserve = &qxl_ttm_io_mem_reserve, | |
395 | .io_mem_free = &qxl_ttm_io_mem_free, | |
ea642c32 | 396 | .io_mem_pfn = ttm_bo_default_io_mem_pfn, |
f64122c1 DA |
397 | .move_notify = &qxl_bo_move_notify, |
398 | }; | |
399 | ||
f64122c1 DA |
400 | int qxl_ttm_init(struct qxl_device *qdev) |
401 | { | |
402 | int r; | |
403 | int num_io_pages; /* != rom->num_io_pages, we include surface0 */ | |
404 | ||
405 | r = qxl_ttm_global_init(qdev); | |
406 | if (r) | |
407 | return r; | |
408 | /* No others user of address space so set it to 0 */ | |
409 | r = ttm_bo_device_init(&qdev->mman.bdev, | |
410 | qdev->mman.bo_global_ref.ref.object, | |
44d847b7 | 411 | &qxl_bo_driver, |
cbdded7f | 412 | qdev->ddev.anon_inode->i_mapping, |
44d847b7 | 413 | DRM_FILE_PAGE_OFFSET, 0); |
f64122c1 DA |
414 | if (r) { |
415 | DRM_ERROR("failed initializing buffer object driver(%d).\n", r); | |
416 | return r; | |
417 | } | |
418 | /* NOTE: this includes the framebuffer (aka surface 0) */ | |
419 | num_io_pages = qdev->rom->ram_header_offset / PAGE_SIZE; | |
420 | r = ttm_bo_init_mm(&qdev->mman.bdev, TTM_PL_VRAM, | |
421 | num_io_pages); | |
422 | if (r) { | |
423 | DRM_ERROR("Failed initializing VRAM heap.\n"); | |
424 | return r; | |
425 | } | |
283cde69 | 426 | r = ttm_bo_init_mm(&qdev->mman.bdev, TTM_PL_PRIV, |
f64122c1 DA |
427 | qdev->surfaceram_size / PAGE_SIZE); |
428 | if (r) { | |
429 | DRM_ERROR("Failed initializing Surfaces heap.\n"); | |
430 | return r; | |
431 | } | |
432 | DRM_INFO("qxl: %uM of VRAM memory size\n", | |
433 | (unsigned)qdev->vram_size / (1024 * 1024)); | |
434 | DRM_INFO("qxl: %luM of IO pages memory ready (VRAM domain)\n", | |
435 | ((unsigned)num_io_pages * PAGE_SIZE) / (1024 * 1024)); | |
d9bbf189 GH |
436 | DRM_INFO("qxl: %uM of Surface memory size\n", |
437 | (unsigned)qdev->surfaceram_size / (1024 * 1024)); | |
f64122c1 DA |
438 | return 0; |
439 | } | |
440 | ||
441 | void qxl_ttm_fini(struct qxl_device *qdev) | |
442 | { | |
443 | ttm_bo_clean_mm(&qdev->mman.bdev, TTM_PL_VRAM); | |
283cde69 | 444 | ttm_bo_clean_mm(&qdev->mman.bdev, TTM_PL_PRIV); |
f64122c1 DA |
445 | ttm_bo_device_release(&qdev->mman.bdev); |
446 | qxl_ttm_global_fini(qdev); | |
447 | DRM_INFO("qxl: ttm finalized\n"); | |
448 | } | |
449 | ||
450 | ||
451 | #define QXL_DEBUGFS_MEM_TYPES 2 | |
452 | ||
453 | #if defined(CONFIG_DEBUG_FS) | |
454 | static int qxl_mm_dump_table(struct seq_file *m, void *data) | |
455 | { | |
456 | struct drm_info_node *node = (struct drm_info_node *)m->private; | |
457 | struct drm_mm *mm = (struct drm_mm *)node->info_ent->data; | |
458 | struct drm_device *dev = node->minor->dev; | |
459 | struct qxl_device *rdev = dev->dev_private; | |
f64122c1 | 460 | struct ttm_bo_global *glob = rdev->mman.bdev.glob; |
b5c3714f | 461 | struct drm_printer p = drm_seq_file_printer(m); |
f64122c1 DA |
462 | |
463 | spin_lock(&glob->lru_lock); | |
b5c3714f | 464 | drm_mm_print(mm, &p); |
f64122c1 | 465 | spin_unlock(&glob->lru_lock); |
b5c3714f | 466 | return 0; |
f64122c1 DA |
467 | } |
468 | #endif | |
469 | ||
2b65d567 | 470 | int qxl_ttm_debugfs_init(struct qxl_device *qdev) |
f64122c1 | 471 | { |
e1adc78c | 472 | #if defined(CONFIG_DEBUG_FS) |
f64122c1 DA |
473 | static struct drm_info_list qxl_mem_types_list[QXL_DEBUGFS_MEM_TYPES]; |
474 | static char qxl_mem_types_names[QXL_DEBUGFS_MEM_TYPES][32]; | |
475 | unsigned i; | |
476 | ||
477 | for (i = 0; i < QXL_DEBUGFS_MEM_TYPES; i++) { | |
478 | if (i == 0) | |
479 | sprintf(qxl_mem_types_names[i], "qxl_mem_mm"); | |
480 | else | |
481 | sprintf(qxl_mem_types_names[i], "qxl_surf_mm"); | |
482 | qxl_mem_types_list[i].name = qxl_mem_types_names[i]; | |
483 | qxl_mem_types_list[i].show = &qxl_mm_dump_table; | |
484 | qxl_mem_types_list[i].driver_features = 0; | |
485 | if (i == 0) | |
486 | qxl_mem_types_list[i].data = qdev->mman.bdev.man[TTM_PL_VRAM].priv; | |
487 | else | |
283cde69 | 488 | qxl_mem_types_list[i].data = qdev->mman.bdev.man[TTM_PL_PRIV].priv; |
f64122c1 DA |
489 | |
490 | } | |
491 | return qxl_debugfs_add_files(qdev, qxl_mem_types_list, i); | |
e1adc78c DA |
492 | #else |
493 | return 0; | |
494 | #endif | |
f64122c1 | 495 | } |