]>
Commit | Line | Data |
---|---|---|
771fe6b9 JG |
1 | /* |
2 | * Copyright 2007-8 Advanced Micro Devices, Inc. | |
3 | * Copyright 2008 Red Hat Inc. | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the "Software"), | |
7 | * to deal in the Software without restriction, including without limitation | |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
9 | * and/or sell copies of the Software, and to permit persons to whom the | |
10 | * Software is furnished to do so, subject to the following conditions: | |
11 | * | |
12 | * The above copyright notice and this permission notice shall be included in | |
13 | * all copies or substantial portions of the Software. | |
14 | * | |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
18 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
19 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
20 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
21 | * OTHER DEALINGS IN THE SOFTWARE. | |
22 | * | |
23 | * Authors: Dave Airlie | |
24 | * Alex Deucher | |
25 | */ | |
26 | #include "drmP.h" | |
27 | #include "drm_edid.h" | |
28 | #include "drm_crtc_helper.h" | |
d50ba256 | 29 | #include "drm_fb_helper.h" |
771fe6b9 JG |
30 | #include "radeon_drm.h" |
31 | #include "radeon.h" | |
923f6848 | 32 | #include "atom.h" |
771fe6b9 JG |
33 | |
34 | extern void | |
35 | radeon_combios_connected_scratch_regs(struct drm_connector *connector, | |
36 | struct drm_encoder *encoder, | |
37 | bool connected); | |
38 | extern void | |
39 | radeon_atombios_connected_scratch_regs(struct drm_connector *connector, | |
40 | struct drm_encoder *encoder, | |
41 | bool connected); | |
42 | ||
63ec0119 MD |
43 | extern void |
44 | radeon_legacy_backlight_init(struct radeon_encoder *radeon_encoder, | |
45 | struct drm_connector *drm_connector); | |
46 | ||
d4877cf2 AD |
47 | void radeon_connector_hotplug(struct drm_connector *connector) |
48 | { | |
49 | struct drm_device *dev = connector->dev; | |
50 | struct radeon_device *rdev = dev->dev_private; | |
51 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
52 | ||
53 | if (radeon_connector->hpd.hpd != RADEON_HPD_NONE) | |
54 | radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd); | |
55 | ||
196c58d2 AD |
56 | if ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) || |
57 | (connector->connector_type == DRM_MODE_CONNECTOR_eDP)) { | |
58 | if ((radeon_dp_getsinktype(radeon_connector) == CONNECTOR_OBJECT_ID_DISPLAYPORT) || | |
59 | (radeon_dp_getsinktype(radeon_connector) == CONNECTOR_OBJECT_ID_eDP)) { | |
d4877cf2 AD |
60 | if (radeon_dp_needs_link_train(radeon_connector)) { |
61 | if (connector->encoder) | |
224d94b1 | 62 | radeon_dp_link_train(connector->encoder, connector); |
d4877cf2 AD |
63 | } |
64 | } | |
65 | } | |
66 | ||
67 | } | |
68 | ||
445282db DA |
69 | static void radeon_property_change_mode(struct drm_encoder *encoder) |
70 | { | |
71 | struct drm_crtc *crtc = encoder->crtc; | |
72 | ||
73 | if (crtc && crtc->enabled) { | |
74 | drm_crtc_helper_set_mode(crtc, &crtc->mode, | |
75 | crtc->x, crtc->y, crtc->fb); | |
76 | } | |
77 | } | |
771fe6b9 JG |
78 | static void |
79 | radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status) | |
80 | { | |
81 | struct drm_device *dev = connector->dev; | |
82 | struct radeon_device *rdev = dev->dev_private; | |
83 | struct drm_encoder *best_encoder = NULL; | |
84 | struct drm_encoder *encoder = NULL; | |
85 | struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; | |
86 | struct drm_mode_object *obj; | |
87 | bool connected; | |
88 | int i; | |
89 | ||
90 | best_encoder = connector_funcs->best_encoder(connector); | |
91 | ||
92 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
93 | if (connector->encoder_ids[i] == 0) | |
94 | break; | |
95 | ||
96 | obj = drm_mode_object_find(connector->dev, | |
97 | connector->encoder_ids[i], | |
98 | DRM_MODE_OBJECT_ENCODER); | |
99 | if (!obj) | |
100 | continue; | |
101 | ||
102 | encoder = obj_to_encoder(obj); | |
103 | ||
104 | if ((encoder == best_encoder) && (status == connector_status_connected)) | |
105 | connected = true; | |
106 | else | |
107 | connected = false; | |
108 | ||
109 | if (rdev->is_atom_bios) | |
110 | radeon_atombios_connected_scratch_regs(connector, encoder, connected); | |
111 | else | |
112 | radeon_combios_connected_scratch_regs(connector, encoder, connected); | |
113 | ||
114 | } | |
115 | } | |
116 | ||
445282db DA |
117 | struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type) |
118 | { | |
119 | struct drm_mode_object *obj; | |
120 | struct drm_encoder *encoder; | |
121 | int i; | |
122 | ||
123 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
124 | if (connector->encoder_ids[i] == 0) | |
125 | break; | |
126 | ||
127 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
128 | if (!obj) | |
129 | continue; | |
130 | ||
131 | encoder = obj_to_encoder(obj); | |
132 | if (encoder->encoder_type == encoder_type) | |
133 | return encoder; | |
134 | } | |
135 | return NULL; | |
136 | } | |
137 | ||
771fe6b9 JG |
138 | struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector) |
139 | { | |
140 | int enc_id = connector->encoder_ids[0]; | |
141 | struct drm_mode_object *obj; | |
142 | struct drm_encoder *encoder; | |
143 | ||
144 | /* pick the encoder ids */ | |
145 | if (enc_id) { | |
146 | obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER); | |
147 | if (!obj) | |
148 | return NULL; | |
149 | encoder = obj_to_encoder(obj); | |
150 | return encoder; | |
151 | } | |
152 | return NULL; | |
153 | } | |
154 | ||
4ce001ab DA |
155 | /* |
156 | * radeon_connector_analog_encoder_conflict_solve | |
157 | * - search for other connectors sharing this encoder | |
158 | * if priority is true, then set them disconnected if this is connected | |
159 | * if priority is false, set us disconnected if they are connected | |
160 | */ | |
161 | static enum drm_connector_status | |
162 | radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector, | |
163 | struct drm_encoder *encoder, | |
164 | enum drm_connector_status current_status, | |
165 | bool priority) | |
166 | { | |
167 | struct drm_device *dev = connector->dev; | |
168 | struct drm_connector *conflict; | |
08d07511 | 169 | struct radeon_connector *radeon_conflict; |
4ce001ab DA |
170 | int i; |
171 | ||
172 | list_for_each_entry(conflict, &dev->mode_config.connector_list, head) { | |
173 | if (conflict == connector) | |
174 | continue; | |
175 | ||
08d07511 | 176 | radeon_conflict = to_radeon_connector(conflict); |
4ce001ab DA |
177 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { |
178 | if (conflict->encoder_ids[i] == 0) | |
179 | break; | |
180 | ||
181 | /* if the IDs match */ | |
182 | if (conflict->encoder_ids[i] == encoder->base.id) { | |
183 | if (conflict->status != connector_status_connected) | |
184 | continue; | |
08d07511 AD |
185 | |
186 | if (radeon_conflict->use_digital) | |
187 | continue; | |
4ce001ab DA |
188 | |
189 | if (priority == true) { | |
c5d46b4e AD |
190 | DRM_DEBUG_KMS("1: conflicting encoders switching off %s\n", drm_get_connector_name(conflict)); |
191 | DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(connector)); | |
4ce001ab DA |
192 | conflict->status = connector_status_disconnected; |
193 | radeon_connector_update_scratch_regs(conflict, connector_status_disconnected); | |
194 | } else { | |
c5d46b4e AD |
195 | DRM_DEBUG_KMS("2: conflicting encoders switching off %s\n", drm_get_connector_name(connector)); |
196 | DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(conflict)); | |
4ce001ab DA |
197 | current_status = connector_status_disconnected; |
198 | } | |
199 | break; | |
200 | } | |
201 | } | |
202 | } | |
203 | return current_status; | |
204 | ||
205 | } | |
206 | ||
771fe6b9 JG |
207 | static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder) |
208 | { | |
209 | struct drm_device *dev = encoder->dev; | |
210 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
211 | struct drm_display_mode *mode = NULL; | |
de2103e4 | 212 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
771fe6b9 | 213 | |
de2103e4 AD |
214 | if (native_mode->hdisplay != 0 && |
215 | native_mode->vdisplay != 0 && | |
216 | native_mode->clock != 0) { | |
fb06ca8f | 217 | mode = drm_mode_duplicate(dev, native_mode); |
771fe6b9 JG |
218 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; |
219 | drm_mode_set_name(mode); | |
220 | ||
d9fdaafb | 221 | DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name); |
d2efdf6d AD |
222 | } else if (native_mode->hdisplay != 0 && |
223 | native_mode->vdisplay != 0) { | |
224 | /* mac laptops without an edid */ | |
225 | /* Note that this is not necessarily the exact panel mode, | |
226 | * but an approximation based on the cvt formula. For these | |
227 | * systems we should ideally read the mode info out of the | |
228 | * registers or add a mode table, but this works and is much | |
229 | * simpler. | |
230 | */ | |
231 | mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false); | |
232 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; | |
d9fdaafb | 233 | DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name); |
771fe6b9 JG |
234 | } |
235 | return mode; | |
236 | } | |
237 | ||
923f6848 AD |
238 | static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector) |
239 | { | |
240 | struct drm_device *dev = encoder->dev; | |
241 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
242 | struct drm_display_mode *mode = NULL; | |
de2103e4 | 243 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
923f6848 AD |
244 | int i; |
245 | struct mode_size { | |
246 | int w; | |
247 | int h; | |
248 | } common_modes[17] = { | |
249 | { 640, 480}, | |
250 | { 720, 480}, | |
251 | { 800, 600}, | |
252 | { 848, 480}, | |
253 | {1024, 768}, | |
254 | {1152, 768}, | |
255 | {1280, 720}, | |
256 | {1280, 800}, | |
257 | {1280, 854}, | |
258 | {1280, 960}, | |
259 | {1280, 1024}, | |
260 | {1440, 900}, | |
261 | {1400, 1050}, | |
262 | {1680, 1050}, | |
263 | {1600, 1200}, | |
264 | {1920, 1080}, | |
265 | {1920, 1200} | |
266 | }; | |
267 | ||
268 | for (i = 0; i < 17; i++) { | |
dfdd6467 AD |
269 | if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) { |
270 | if (common_modes[i].w > 1024 || | |
271 | common_modes[i].h > 768) | |
272 | continue; | |
273 | } | |
923f6848 | 274 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { |
de2103e4 AD |
275 | if (common_modes[i].w > native_mode->hdisplay || |
276 | common_modes[i].h > native_mode->vdisplay || | |
277 | (common_modes[i].w == native_mode->hdisplay && | |
278 | common_modes[i].h == native_mode->vdisplay)) | |
923f6848 AD |
279 | continue; |
280 | } | |
281 | if (common_modes[i].w < 320 || common_modes[i].h < 200) | |
282 | continue; | |
283 | ||
d50ba256 | 284 | mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false); |
923f6848 AD |
285 | drm_mode_probed_add(connector, mode); |
286 | } | |
287 | } | |
288 | ||
771fe6b9 JG |
289 | int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property, |
290 | uint64_t val) | |
291 | { | |
445282db DA |
292 | struct drm_device *dev = connector->dev; |
293 | struct radeon_device *rdev = dev->dev_private; | |
294 | struct drm_encoder *encoder; | |
295 | struct radeon_encoder *radeon_encoder; | |
296 | ||
297 | if (property == rdev->mode_info.coherent_mode_property) { | |
298 | struct radeon_encoder_atom_dig *dig; | |
ce227c41 | 299 | bool new_coherent_mode; |
445282db DA |
300 | |
301 | /* need to find digital encoder on connector */ | |
302 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
303 | if (!encoder) | |
304 | return 0; | |
305 | ||
306 | radeon_encoder = to_radeon_encoder(encoder); | |
307 | ||
308 | if (!radeon_encoder->enc_priv) | |
309 | return 0; | |
310 | ||
311 | dig = radeon_encoder->enc_priv; | |
ce227c41 DA |
312 | new_coherent_mode = val ? true : false; |
313 | if (dig->coherent_mode != new_coherent_mode) { | |
314 | dig->coherent_mode = new_coherent_mode; | |
315 | radeon_property_change_mode(&radeon_encoder->base); | |
316 | } | |
445282db DA |
317 | } |
318 | ||
5b1714d3 AD |
319 | if (property == rdev->mode_info.underscan_property) { |
320 | /* need to find digital encoder on connector */ | |
321 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
322 | if (!encoder) | |
323 | return 0; | |
324 | ||
325 | radeon_encoder = to_radeon_encoder(encoder); | |
326 | ||
327 | if (radeon_encoder->underscan_type != val) { | |
328 | radeon_encoder->underscan_type = val; | |
329 | radeon_property_change_mode(&radeon_encoder->base); | |
330 | } | |
331 | } | |
332 | ||
5bccf5e3 MG |
333 | if (property == rdev->mode_info.underscan_hborder_property) { |
334 | /* need to find digital encoder on connector */ | |
335 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
336 | if (!encoder) | |
337 | return 0; | |
338 | ||
339 | radeon_encoder = to_radeon_encoder(encoder); | |
340 | ||
341 | if (radeon_encoder->underscan_hborder != val) { | |
342 | radeon_encoder->underscan_hborder = val; | |
343 | radeon_property_change_mode(&radeon_encoder->base); | |
344 | } | |
345 | } | |
346 | ||
347 | if (property == rdev->mode_info.underscan_vborder_property) { | |
348 | /* need to find digital encoder on connector */ | |
349 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
350 | if (!encoder) | |
351 | return 0; | |
352 | ||
353 | radeon_encoder = to_radeon_encoder(encoder); | |
354 | ||
355 | if (radeon_encoder->underscan_vborder != val) { | |
356 | radeon_encoder->underscan_vborder = val; | |
357 | radeon_property_change_mode(&radeon_encoder->base); | |
358 | } | |
359 | } | |
360 | ||
445282db DA |
361 | if (property == rdev->mode_info.tv_std_property) { |
362 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC); | |
363 | if (!encoder) { | |
364 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC); | |
365 | } | |
366 | ||
367 | if (!encoder) | |
368 | return 0; | |
369 | ||
370 | radeon_encoder = to_radeon_encoder(encoder); | |
371 | if (!radeon_encoder->enc_priv) | |
372 | return 0; | |
643acacf | 373 | if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) { |
445282db DA |
374 | struct radeon_encoder_atom_dac *dac_int; |
375 | dac_int = radeon_encoder->enc_priv; | |
376 | dac_int->tv_std = val; | |
377 | } else { | |
378 | struct radeon_encoder_tv_dac *dac_int; | |
379 | dac_int = radeon_encoder->enc_priv; | |
380 | dac_int->tv_std = val; | |
381 | } | |
382 | radeon_property_change_mode(&radeon_encoder->base); | |
383 | } | |
384 | ||
385 | if (property == rdev->mode_info.load_detect_property) { | |
386 | struct radeon_connector *radeon_connector = | |
387 | to_radeon_connector(connector); | |
388 | ||
389 | if (val == 0) | |
390 | radeon_connector->dac_load_detect = false; | |
391 | else | |
392 | radeon_connector->dac_load_detect = true; | |
393 | } | |
394 | ||
395 | if (property == rdev->mode_info.tmds_pll_property) { | |
396 | struct radeon_encoder_int_tmds *tmds = NULL; | |
397 | bool ret = false; | |
398 | /* need to find digital encoder on connector */ | |
399 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
400 | if (!encoder) | |
401 | return 0; | |
402 | ||
403 | radeon_encoder = to_radeon_encoder(encoder); | |
404 | ||
405 | tmds = radeon_encoder->enc_priv; | |
406 | if (!tmds) | |
407 | return 0; | |
408 | ||
409 | if (val == 0) { | |
410 | if (rdev->is_atom_bios) | |
411 | ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds); | |
412 | else | |
413 | ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds); | |
414 | } | |
415 | if (val == 1 || ret == false) { | |
416 | radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds); | |
417 | } | |
418 | radeon_property_change_mode(&radeon_encoder->base); | |
419 | } | |
420 | ||
771fe6b9 JG |
421 | return 0; |
422 | } | |
423 | ||
8dfaa8a7 MD |
424 | static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder, |
425 | struct drm_connector *connector) | |
426 | { | |
427 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
de2103e4 | 428 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
8dfaa8a7 MD |
429 | |
430 | /* Try to get native mode details from EDID if necessary */ | |
de2103e4 | 431 | if (!native_mode->clock) { |
8dfaa8a7 MD |
432 | struct drm_display_mode *t, *mode; |
433 | ||
434 | list_for_each_entry_safe(mode, t, &connector->probed_modes, head) { | |
de2103e4 AD |
435 | if (mode->hdisplay == native_mode->hdisplay && |
436 | mode->vdisplay == native_mode->vdisplay) { | |
437 | *native_mode = *mode; | |
438 | drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V); | |
c5d46b4e | 439 | DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n"); |
8dfaa8a7 MD |
440 | break; |
441 | } | |
442 | } | |
443 | } | |
de2103e4 | 444 | if (!native_mode->clock) { |
c5d46b4e | 445 | DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n"); |
8dfaa8a7 MD |
446 | radeon_encoder->rmx_type = RMX_OFF; |
447 | } | |
448 | } | |
771fe6b9 JG |
449 | |
450 | static int radeon_lvds_get_modes(struct drm_connector *connector) | |
451 | { | |
452 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
453 | struct drm_encoder *encoder; | |
454 | int ret = 0; | |
455 | struct drm_display_mode *mode; | |
456 | ||
457 | if (radeon_connector->ddc_bus) { | |
458 | ret = radeon_ddc_get_modes(radeon_connector); | |
459 | if (ret > 0) { | |
7747b713 | 460 | encoder = radeon_best_single_encoder(connector); |
8dfaa8a7 MD |
461 | if (encoder) { |
462 | radeon_fixup_lvds_native_mode(encoder, connector); | |
7747b713 AD |
463 | /* add scaled modes */ |
464 | radeon_add_common_modes(encoder, connector); | |
8dfaa8a7 | 465 | } |
771fe6b9 JG |
466 | return ret; |
467 | } | |
468 | } | |
469 | ||
470 | encoder = radeon_best_single_encoder(connector); | |
471 | if (!encoder) | |
472 | return 0; | |
473 | ||
474 | /* we have no EDID modes */ | |
475 | mode = radeon_fp_native_mode(encoder); | |
476 | if (mode) { | |
477 | ret = 1; | |
478 | drm_mode_probed_add(connector, mode); | |
7a868e18 AD |
479 | /* add the width/height from vbios tables if available */ |
480 | connector->display_info.width_mm = mode->width_mm; | |
481 | connector->display_info.height_mm = mode->height_mm; | |
7747b713 AD |
482 | /* add scaled modes */ |
483 | radeon_add_common_modes(encoder, connector); | |
771fe6b9 | 484 | } |
923f6848 | 485 | |
771fe6b9 JG |
486 | return ret; |
487 | } | |
488 | ||
489 | static int radeon_lvds_mode_valid(struct drm_connector *connector, | |
490 | struct drm_display_mode *mode) | |
491 | { | |
a3fa6320 AD |
492 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
493 | ||
494 | if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) | |
495 | return MODE_PANEL; | |
496 | ||
497 | if (encoder) { | |
498 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
499 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | |
500 | ||
501 | /* AVIVO hardware supports downscaling modes larger than the panel | |
502 | * to the panel size, but I'm not sure this is desirable. | |
503 | */ | |
504 | if ((mode->hdisplay > native_mode->hdisplay) || | |
505 | (mode->vdisplay > native_mode->vdisplay)) | |
506 | return MODE_PANEL; | |
507 | ||
508 | /* if scaling is disabled, block non-native modes */ | |
509 | if (radeon_encoder->rmx_type == RMX_OFF) { | |
510 | if ((mode->hdisplay != native_mode->hdisplay) || | |
511 | (mode->vdisplay != native_mode->vdisplay)) | |
512 | return MODE_PANEL; | |
513 | } | |
514 | } | |
515 | ||
771fe6b9 JG |
516 | return MODE_OK; |
517 | } | |
518 | ||
7b334fcb | 519 | static enum drm_connector_status |
930a9e28 | 520 | radeon_lvds_detect(struct drm_connector *connector, bool force) |
771fe6b9 | 521 | { |
0549a061 | 522 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
2ffb8429 | 523 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
0549a061 | 524 | enum drm_connector_status ret = connector_status_disconnected; |
2ffb8429 AD |
525 | |
526 | if (encoder) { | |
527 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
de2103e4 | 528 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
2ffb8429 AD |
529 | |
530 | /* check if panel is valid */ | |
de2103e4 | 531 | if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) |
2ffb8429 AD |
532 | ret = connector_status_connected; |
533 | ||
534 | } | |
0549a061 AD |
535 | |
536 | /* check for edid as well */ | |
0294cf4f AD |
537 | if (radeon_connector->edid) |
538 | ret = connector_status_connected; | |
539 | else { | |
540 | if (radeon_connector->ddc_bus) { | |
0294cf4f AD |
541 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, |
542 | &radeon_connector->ddc_bus->adapter); | |
0294cf4f AD |
543 | if (radeon_connector->edid) |
544 | ret = connector_status_connected; | |
545 | } | |
0549a061 | 546 | } |
771fe6b9 | 547 | /* check acpi lid status ??? */ |
2ffb8429 | 548 | |
771fe6b9 JG |
549 | radeon_connector_update_scratch_regs(connector, ret); |
550 | return ret; | |
551 | } | |
552 | ||
553 | static void radeon_connector_destroy(struct drm_connector *connector) | |
554 | { | |
555 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
556 | ||
0294cf4f AD |
557 | if (radeon_connector->edid) |
558 | kfree(radeon_connector->edid); | |
771fe6b9 JG |
559 | kfree(radeon_connector->con_priv); |
560 | drm_sysfs_connector_remove(connector); | |
561 | drm_connector_cleanup(connector); | |
562 | kfree(connector); | |
563 | } | |
564 | ||
445282db DA |
565 | static int radeon_lvds_set_property(struct drm_connector *connector, |
566 | struct drm_property *property, | |
567 | uint64_t value) | |
568 | { | |
569 | struct drm_device *dev = connector->dev; | |
570 | struct radeon_encoder *radeon_encoder; | |
571 | enum radeon_rmx_type rmx_type; | |
572 | ||
d9fdaafb | 573 | DRM_DEBUG_KMS("\n"); |
445282db DA |
574 | if (property != dev->mode_config.scaling_mode_property) |
575 | return 0; | |
576 | ||
577 | if (connector->encoder) | |
578 | radeon_encoder = to_radeon_encoder(connector->encoder); | |
579 | else { | |
580 | struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; | |
581 | radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector)); | |
582 | } | |
583 | ||
584 | switch (value) { | |
585 | case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break; | |
586 | case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break; | |
587 | case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break; | |
588 | default: | |
589 | case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break; | |
590 | } | |
591 | if (radeon_encoder->rmx_type == rmx_type) | |
592 | return 0; | |
593 | ||
594 | radeon_encoder->rmx_type = rmx_type; | |
595 | ||
596 | radeon_property_change_mode(&radeon_encoder->base); | |
597 | return 0; | |
598 | } | |
599 | ||
600 | ||
771fe6b9 JG |
601 | struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = { |
602 | .get_modes = radeon_lvds_get_modes, | |
603 | .mode_valid = radeon_lvds_mode_valid, | |
604 | .best_encoder = radeon_best_single_encoder, | |
605 | }; | |
606 | ||
607 | struct drm_connector_funcs radeon_lvds_connector_funcs = { | |
608 | .dpms = drm_helper_connector_dpms, | |
609 | .detect = radeon_lvds_detect, | |
610 | .fill_modes = drm_helper_probe_single_connector_modes, | |
611 | .destroy = radeon_connector_destroy, | |
445282db | 612 | .set_property = radeon_lvds_set_property, |
771fe6b9 JG |
613 | }; |
614 | ||
615 | static int radeon_vga_get_modes(struct drm_connector *connector) | |
616 | { | |
617 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
618 | int ret; | |
619 | ||
620 | ret = radeon_ddc_get_modes(radeon_connector); | |
621 | ||
622 | return ret; | |
623 | } | |
624 | ||
625 | static int radeon_vga_mode_valid(struct drm_connector *connector, | |
626 | struct drm_display_mode *mode) | |
627 | { | |
a3fa6320 AD |
628 | /* XXX check mode bandwidth */ |
629 | /* XXX verify against max DAC output frequency */ | |
771fe6b9 JG |
630 | return MODE_OK; |
631 | } | |
632 | ||
7b334fcb | 633 | static enum drm_connector_status |
930a9e28 | 634 | radeon_vga_detect(struct drm_connector *connector, bool force) |
771fe6b9 | 635 | { |
fafcf94e AD |
636 | struct drm_device *dev = connector->dev; |
637 | struct radeon_device *rdev = dev->dev_private; | |
771fe6b9 JG |
638 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
639 | struct drm_encoder *encoder; | |
640 | struct drm_encoder_helper_funcs *encoder_funcs; | |
4b9d2a21 | 641 | bool dret = false; |
771fe6b9 JG |
642 | enum drm_connector_status ret = connector_status_disconnected; |
643 | ||
4ce001ab DA |
644 | encoder = radeon_best_single_encoder(connector); |
645 | if (!encoder) | |
646 | ret = connector_status_disconnected; | |
647 | ||
eb6b6d7c | 648 | if (radeon_connector->ddc_bus) |
4b9d2a21 | 649 | dret = radeon_ddc_probe(radeon_connector); |
0294cf4f AD |
650 | if (dret) { |
651 | if (radeon_connector->edid) { | |
652 | kfree(radeon_connector->edid); | |
653 | radeon_connector->edid = NULL; | |
654 | } | |
0294cf4f | 655 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); |
0294cf4f AD |
656 | |
657 | if (!radeon_connector->edid) { | |
f82f5f3a JG |
658 | DRM_ERROR("%s: probed a monitor but no|invalid EDID\n", |
659 | drm_get_connector_name(connector)); | |
660 | ret = connector_status_connected; | |
0294cf4f AD |
661 | } else { |
662 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | |
663 | ||
664 | /* some oems have boards with separate digital and analog connectors | |
665 | * with a shared ddc line (often vga + hdmi) | |
666 | */ | |
667 | if (radeon_connector->use_digital && radeon_connector->shared_ddc) { | |
668 | kfree(radeon_connector->edid); | |
669 | radeon_connector->edid = NULL; | |
670 | ret = connector_status_disconnected; | |
671 | } else | |
672 | ret = connector_status_connected; | |
673 | } | |
674 | } else { | |
c3cceedd DA |
675 | |
676 | /* if we aren't forcing don't do destructive polling */ | |
677 | if (!force) | |
678 | return connector->status; | |
679 | ||
d8a7f792 | 680 | if (radeon_connector->dac_load_detect && encoder) { |
445282db DA |
681 | encoder_funcs = encoder->helper_private; |
682 | ret = encoder_funcs->detect(encoder, connector); | |
683 | } | |
771fe6b9 JG |
684 | } |
685 | ||
4ce001ab DA |
686 | if (ret == connector_status_connected) |
687 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true); | |
fafcf94e AD |
688 | |
689 | /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the | |
690 | * vbios to deal with KVMs. If we have one and are not able to detect a monitor | |
691 | * by other means, assume the CRT is connected and use that EDID. | |
692 | */ | |
693 | if ((!rdev->is_atom_bios) && | |
694 | (ret == connector_status_disconnected) && | |
695 | rdev->mode_info.bios_hardcoded_edid_size) { | |
696 | ret = connector_status_connected; | |
697 | } | |
698 | ||
771fe6b9 JG |
699 | radeon_connector_update_scratch_regs(connector, ret); |
700 | return ret; | |
701 | } | |
702 | ||
703 | struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = { | |
704 | .get_modes = radeon_vga_get_modes, | |
705 | .mode_valid = radeon_vga_mode_valid, | |
706 | .best_encoder = radeon_best_single_encoder, | |
707 | }; | |
708 | ||
709 | struct drm_connector_funcs radeon_vga_connector_funcs = { | |
710 | .dpms = drm_helper_connector_dpms, | |
711 | .detect = radeon_vga_detect, | |
712 | .fill_modes = drm_helper_probe_single_connector_modes, | |
713 | .destroy = radeon_connector_destroy, | |
714 | .set_property = radeon_connector_set_property, | |
715 | }; | |
716 | ||
4ce001ab DA |
717 | static int radeon_tv_get_modes(struct drm_connector *connector) |
718 | { | |
719 | struct drm_device *dev = connector->dev; | |
923f6848 | 720 | struct radeon_device *rdev = dev->dev_private; |
4ce001ab | 721 | struct drm_display_mode *tv_mode; |
923f6848 | 722 | struct drm_encoder *encoder; |
4ce001ab | 723 | |
923f6848 AD |
724 | encoder = radeon_best_single_encoder(connector); |
725 | if (!encoder) | |
726 | return 0; | |
4ce001ab | 727 | |
923f6848 AD |
728 | /* avivo chips can scale any mode */ |
729 | if (rdev->family >= CHIP_RS600) | |
730 | /* add scaled modes */ | |
731 | radeon_add_common_modes(encoder, connector); | |
732 | else { | |
733 | /* only 800x600 is supported right now on pre-avivo chips */ | |
d50ba256 | 734 | tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false); |
923f6848 AD |
735 | tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; |
736 | drm_mode_probed_add(connector, tv_mode); | |
737 | } | |
4ce001ab DA |
738 | return 1; |
739 | } | |
740 | ||
741 | static int radeon_tv_mode_valid(struct drm_connector *connector, | |
742 | struct drm_display_mode *mode) | |
743 | { | |
a3fa6320 AD |
744 | if ((mode->hdisplay > 1024) || (mode->vdisplay > 768)) |
745 | return MODE_CLOCK_RANGE; | |
4ce001ab DA |
746 | return MODE_OK; |
747 | } | |
748 | ||
7b334fcb | 749 | static enum drm_connector_status |
930a9e28 | 750 | radeon_tv_detect(struct drm_connector *connector, bool force) |
4ce001ab DA |
751 | { |
752 | struct drm_encoder *encoder; | |
753 | struct drm_encoder_helper_funcs *encoder_funcs; | |
445282db DA |
754 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
755 | enum drm_connector_status ret = connector_status_disconnected; | |
756 | ||
757 | if (!radeon_connector->dac_load_detect) | |
758 | return ret; | |
4ce001ab DA |
759 | |
760 | encoder = radeon_best_single_encoder(connector); | |
761 | if (!encoder) | |
762 | ret = connector_status_disconnected; | |
763 | else { | |
764 | encoder_funcs = encoder->helper_private; | |
765 | ret = encoder_funcs->detect(encoder, connector); | |
766 | } | |
767 | if (ret == connector_status_connected) | |
768 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false); | |
769 | radeon_connector_update_scratch_regs(connector, ret); | |
770 | return ret; | |
771 | } | |
772 | ||
773 | struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = { | |
774 | .get_modes = radeon_tv_get_modes, | |
775 | .mode_valid = radeon_tv_mode_valid, | |
776 | .best_encoder = radeon_best_single_encoder, | |
777 | }; | |
778 | ||
779 | struct drm_connector_funcs radeon_tv_connector_funcs = { | |
780 | .dpms = drm_helper_connector_dpms, | |
781 | .detect = radeon_tv_detect, | |
782 | .fill_modes = drm_helper_probe_single_connector_modes, | |
783 | .destroy = radeon_connector_destroy, | |
784 | .set_property = radeon_connector_set_property, | |
785 | }; | |
786 | ||
771fe6b9 JG |
787 | static int radeon_dvi_get_modes(struct drm_connector *connector) |
788 | { | |
789 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
790 | int ret; | |
791 | ||
792 | ret = radeon_ddc_get_modes(radeon_connector); | |
771fe6b9 JG |
793 | return ret; |
794 | } | |
795 | ||
4ce001ab DA |
796 | /* |
797 | * DVI is complicated | |
798 | * Do a DDC probe, if DDC probe passes, get the full EDID so | |
799 | * we can do analog/digital monitor detection at this point. | |
800 | * If the monitor is an analog monitor or we got no DDC, | |
801 | * we need to find the DAC encoder object for this connector. | |
802 | * If we got no DDC, we do load detection on the DAC encoder object. | |
803 | * If we got analog DDC or load detection passes on the DAC encoder | |
804 | * we have to check if this analog encoder is shared with anyone else (TV) | |
805 | * if its shared we have to set the other connector to disconnected. | |
806 | */ | |
7b334fcb | 807 | static enum drm_connector_status |
930a9e28 | 808 | radeon_dvi_detect(struct drm_connector *connector, bool force) |
771fe6b9 | 809 | { |
fafcf94e AD |
810 | struct drm_device *dev = connector->dev; |
811 | struct radeon_device *rdev = dev->dev_private; | |
771fe6b9 | 812 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
4ce001ab | 813 | struct drm_encoder *encoder = NULL; |
771fe6b9 JG |
814 | struct drm_encoder_helper_funcs *encoder_funcs; |
815 | struct drm_mode_object *obj; | |
816 | int i; | |
817 | enum drm_connector_status ret = connector_status_disconnected; | |
4b9d2a21 | 818 | bool dret = false; |
771fe6b9 | 819 | |
eb6b6d7c | 820 | if (radeon_connector->ddc_bus) |
4b9d2a21 | 821 | dret = radeon_ddc_probe(radeon_connector); |
4ce001ab | 822 | if (dret) { |
0294cf4f AD |
823 | if (radeon_connector->edid) { |
824 | kfree(radeon_connector->edid); | |
825 | radeon_connector->edid = NULL; | |
826 | } | |
4ce001ab | 827 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); |
4ce001ab DA |
828 | |
829 | if (!radeon_connector->edid) { | |
f82f5f3a JG |
830 | DRM_ERROR("%s: probed a monitor but no|invalid EDID\n", |
831 | drm_get_connector_name(connector)); | |
4ce001ab DA |
832 | } else { |
833 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | |
834 | ||
0294cf4f AD |
835 | /* some oems have boards with separate digital and analog connectors |
836 | * with a shared ddc line (often vga + hdmi) | |
837 | */ | |
838 | if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) { | |
839 | kfree(radeon_connector->edid); | |
840 | radeon_connector->edid = NULL; | |
841 | ret = connector_status_disconnected; | |
842 | } else | |
843 | ret = connector_status_connected; | |
71407c46 | 844 | |
42f14c4b AD |
845 | /* This gets complicated. We have boards with VGA + HDMI with a |
846 | * shared DDC line and we have boards with DVI-D + HDMI with a shared | |
847 | * DDC line. The latter is more complex because with DVI<->HDMI adapters | |
848 | * you don't really know what's connected to which port as both are digital. | |
71407c46 | 849 | */ |
d3932d6c | 850 | if (radeon_connector->shared_ddc && (ret == connector_status_connected)) { |
71407c46 AD |
851 | struct drm_connector *list_connector; |
852 | struct radeon_connector *list_radeon_connector; | |
853 | list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) { | |
854 | if (connector == list_connector) | |
855 | continue; | |
856 | list_radeon_connector = to_radeon_connector(list_connector); | |
b2ea4aa6 AD |
857 | if (list_radeon_connector->shared_ddc && |
858 | (list_radeon_connector->ddc_bus->rec.i2c_id == | |
859 | radeon_connector->ddc_bus->rec.i2c_id)) { | |
42f14c4b AD |
860 | /* cases where both connectors are digital */ |
861 | if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) { | |
862 | /* hpd is our only option in this case */ | |
863 | if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { | |
71407c46 AD |
864 | kfree(radeon_connector->edid); |
865 | radeon_connector->edid = NULL; | |
866 | ret = connector_status_disconnected; | |
867 | } | |
868 | } | |
869 | } | |
870 | } | |
871 | } | |
4ce001ab DA |
872 | } |
873 | } | |
874 | ||
875 | if ((ret == connector_status_connected) && (radeon_connector->use_digital == true)) | |
876 | goto out; | |
877 | ||
c3cceedd DA |
878 | if (!force) { |
879 | ret = connector->status; | |
880 | goto out; | |
881 | } | |
882 | ||
4ce001ab | 883 | /* find analog encoder */ |
445282db DA |
884 | if (radeon_connector->dac_load_detect) { |
885 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
886 | if (connector->encoder_ids[i] == 0) | |
887 | break; | |
771fe6b9 | 888 | |
445282db DA |
889 | obj = drm_mode_object_find(connector->dev, |
890 | connector->encoder_ids[i], | |
891 | DRM_MODE_OBJECT_ENCODER); | |
892 | if (!obj) | |
893 | continue; | |
771fe6b9 | 894 | |
445282db | 895 | encoder = obj_to_encoder(obj); |
771fe6b9 | 896 | |
445282db DA |
897 | encoder_funcs = encoder->helper_private; |
898 | if (encoder_funcs->detect) { | |
899 | if (ret != connector_status_connected) { | |
900 | ret = encoder_funcs->detect(encoder, connector); | |
901 | if (ret == connector_status_connected) { | |
902 | radeon_connector->use_digital = false; | |
903 | } | |
771fe6b9 | 904 | } |
445282db | 905 | break; |
771fe6b9 JG |
906 | } |
907 | } | |
908 | } | |
909 | ||
4ce001ab DA |
910 | if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) && |
911 | encoder) { | |
912 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true); | |
913 | } | |
914 | ||
fafcf94e AD |
915 | /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the |
916 | * vbios to deal with KVMs. If we have one and are not able to detect a monitor | |
917 | * by other means, assume the DFP is connected and use that EDID. In most | |
918 | * cases the DVI port is actually a virtual KVM port connected to the service | |
919 | * processor. | |
920 | */ | |
921 | if ((!rdev->is_atom_bios) && | |
922 | (ret == connector_status_disconnected) && | |
923 | rdev->mode_info.bios_hardcoded_edid_size) { | |
924 | radeon_connector->use_digital = true; | |
925 | ret = connector_status_connected; | |
926 | } | |
927 | ||
4ce001ab | 928 | out: |
771fe6b9 JG |
929 | /* updated in get modes as well since we need to know if it's analog or digital */ |
930 | radeon_connector_update_scratch_regs(connector, ret); | |
931 | return ret; | |
932 | } | |
933 | ||
934 | /* okay need to be smart in here about which encoder to pick */ | |
935 | struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector) | |
936 | { | |
937 | int enc_id = connector->encoder_ids[0]; | |
938 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
939 | struct drm_mode_object *obj; | |
940 | struct drm_encoder *encoder; | |
941 | int i; | |
942 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
943 | if (connector->encoder_ids[i] == 0) | |
944 | break; | |
945 | ||
946 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
947 | if (!obj) | |
948 | continue; | |
949 | ||
950 | encoder = obj_to_encoder(obj); | |
951 | ||
4ce001ab | 952 | if (radeon_connector->use_digital == true) { |
771fe6b9 JG |
953 | if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS) |
954 | return encoder; | |
955 | } else { | |
956 | if (encoder->encoder_type == DRM_MODE_ENCODER_DAC || | |
957 | encoder->encoder_type == DRM_MODE_ENCODER_TVDAC) | |
958 | return encoder; | |
959 | } | |
960 | } | |
961 | ||
962 | /* see if we have a default encoder TODO */ | |
963 | ||
964 | /* then check use digitial */ | |
965 | /* pick the first one */ | |
966 | if (enc_id) { | |
967 | obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER); | |
968 | if (!obj) | |
969 | return NULL; | |
970 | encoder = obj_to_encoder(obj); | |
971 | return encoder; | |
972 | } | |
973 | return NULL; | |
974 | } | |
975 | ||
d50ba256 DA |
976 | static void radeon_dvi_force(struct drm_connector *connector) |
977 | { | |
978 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
979 | if (connector->force == DRM_FORCE_ON) | |
980 | radeon_connector->use_digital = false; | |
981 | if (connector->force == DRM_FORCE_ON_DIGITAL) | |
982 | radeon_connector->use_digital = true; | |
983 | } | |
984 | ||
a3fa6320 AD |
985 | static int radeon_dvi_mode_valid(struct drm_connector *connector, |
986 | struct drm_display_mode *mode) | |
987 | { | |
1b24203e AD |
988 | struct drm_device *dev = connector->dev; |
989 | struct radeon_device *rdev = dev->dev_private; | |
a3fa6320 AD |
990 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
991 | ||
992 | /* XXX check mode bandwidth */ | |
993 | ||
1b24203e AD |
994 | /* clocks over 135 MHz have heat issues with DVI on RV100 */ |
995 | if (radeon_connector->use_digital && | |
996 | (rdev->family == CHIP_RV100) && | |
997 | (mode->clock > 135000)) | |
998 | return MODE_CLOCK_HIGH; | |
999 | ||
a3fa6320 AD |
1000 | if (radeon_connector->use_digital && (mode->clock > 165000)) { |
1001 | if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) || | |
1002 | (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) || | |
1003 | (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B)) | |
1004 | return MODE_OK; | |
e1e84017 AD |
1005 | else if (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_A) { |
1006 | if (ASIC_IS_DCE3(rdev)) { | |
1007 | /* HDMI 1.3+ supports max clock of 340 Mhz */ | |
1008 | if (mode->clock > 340000) | |
1009 | return MODE_CLOCK_HIGH; | |
1010 | else | |
1011 | return MODE_OK; | |
1012 | } else | |
1013 | return MODE_CLOCK_HIGH; | |
1014 | } else | |
a3fa6320 AD |
1015 | return MODE_CLOCK_HIGH; |
1016 | } | |
1017 | return MODE_OK; | |
1018 | } | |
1019 | ||
771fe6b9 JG |
1020 | struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = { |
1021 | .get_modes = radeon_dvi_get_modes, | |
a3fa6320 | 1022 | .mode_valid = radeon_dvi_mode_valid, |
771fe6b9 JG |
1023 | .best_encoder = radeon_dvi_encoder, |
1024 | }; | |
1025 | ||
1026 | struct drm_connector_funcs radeon_dvi_connector_funcs = { | |
1027 | .dpms = drm_helper_connector_dpms, | |
1028 | .detect = radeon_dvi_detect, | |
1029 | .fill_modes = drm_helper_probe_single_connector_modes, | |
1030 | .set_property = radeon_connector_set_property, | |
1031 | .destroy = radeon_connector_destroy, | |
d50ba256 | 1032 | .force = radeon_dvi_force, |
771fe6b9 JG |
1033 | }; |
1034 | ||
ffd09c64 AD |
1035 | static void radeon_dp_connector_destroy(struct drm_connector *connector) |
1036 | { | |
1037 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1038 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; | |
1039 | ||
ffd09c64 AD |
1040 | if (radeon_connector->edid) |
1041 | kfree(radeon_connector->edid); | |
1042 | if (radeon_dig_connector->dp_i2c_bus) | |
ac1aade6 | 1043 | radeon_i2c_destroy(radeon_dig_connector->dp_i2c_bus); |
ffd09c64 AD |
1044 | kfree(radeon_connector->con_priv); |
1045 | drm_sysfs_connector_remove(connector); | |
1046 | drm_connector_cleanup(connector); | |
1047 | kfree(connector); | |
1048 | } | |
1049 | ||
746c1aa4 DA |
1050 | static int radeon_dp_get_modes(struct drm_connector *connector) |
1051 | { | |
1052 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
8b834852 | 1053 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; |
746c1aa4 DA |
1054 | int ret; |
1055 | ||
8b834852 AD |
1056 | if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { |
1057 | if (!radeon_dig_connector->edp_on) | |
1058 | atombios_set_edp_panel_power(connector, | |
1059 | ATOM_TRANSMITTER_ACTION_POWER_ON); | |
1060 | } | |
746c1aa4 | 1061 | ret = radeon_ddc_get_modes(radeon_connector); |
8b834852 AD |
1062 | if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { |
1063 | if (!radeon_dig_connector->edp_on) | |
1064 | atombios_set_edp_panel_power(connector, | |
1065 | ATOM_TRANSMITTER_ACTION_POWER_OFF); | |
1066 | } | |
1067 | ||
746c1aa4 DA |
1068 | return ret; |
1069 | } | |
1070 | ||
d7fa8bb3 AD |
1071 | bool radeon_connector_encoder_is_dp_bridge(struct drm_connector *connector) |
1072 | { | |
1073 | struct drm_mode_object *obj; | |
1074 | struct drm_encoder *encoder; | |
1075 | struct radeon_encoder *radeon_encoder; | |
1076 | int i; | |
1077 | bool found = false; | |
1078 | ||
1079 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
1080 | if (connector->encoder_ids[i] == 0) | |
1081 | break; | |
1082 | ||
1083 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
1084 | if (!obj) | |
1085 | continue; | |
1086 | ||
1087 | encoder = obj_to_encoder(obj); | |
1088 | radeon_encoder = to_radeon_encoder(encoder); | |
1089 | ||
1090 | switch (radeon_encoder->encoder_id) { | |
1091 | case ENCODER_OBJECT_ID_TRAVIS: | |
1092 | case ENCODER_OBJECT_ID_NUTMEG: | |
1093 | found = true; | |
1094 | break; | |
1095 | default: | |
1096 | break; | |
1097 | } | |
1098 | } | |
1099 | ||
1100 | return found; | |
1101 | } | |
1102 | ||
1103 | bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector) | |
1104 | { | |
1105 | struct drm_mode_object *obj; | |
1106 | struct drm_encoder *encoder; | |
1107 | struct radeon_encoder *radeon_encoder; | |
1108 | int i; | |
1109 | bool found = false; | |
1110 | ||
1111 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
1112 | if (connector->encoder_ids[i] == 0) | |
1113 | break; | |
1114 | ||
1115 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
1116 | if (!obj) | |
1117 | continue; | |
1118 | ||
1119 | encoder = obj_to_encoder(obj); | |
1120 | radeon_encoder = to_radeon_encoder(encoder); | |
1121 | if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2) | |
1122 | found = true; | |
1123 | } | |
1124 | ||
1125 | return found; | |
1126 | } | |
1127 | ||
1128 | bool radeon_connector_is_dp12_capable(struct drm_connector *connector) | |
1129 | { | |
1130 | struct drm_device *dev = connector->dev; | |
1131 | struct radeon_device *rdev = dev->dev_private; | |
1132 | ||
1133 | if (ASIC_IS_DCE5(rdev) && | |
1134 | (rdev->clock.dp_extclk >= 53900) && | |
1135 | radeon_connector_encoder_is_hbr2(connector)) { | |
1136 | return true; | |
1137 | } | |
1138 | ||
1139 | return false; | |
1140 | } | |
1141 | ||
7b334fcb | 1142 | static enum drm_connector_status |
930a9e28 | 1143 | radeon_dp_detect(struct drm_connector *connector, bool force) |
746c1aa4 | 1144 | { |
f8d0edde AD |
1145 | struct drm_device *dev = connector->dev; |
1146 | struct radeon_device *rdev = dev->dev_private; | |
746c1aa4 | 1147 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
746c1aa4 | 1148 | enum drm_connector_status ret = connector_status_disconnected; |
4143e919 | 1149 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; |
746c1aa4 DA |
1150 | |
1151 | if (radeon_connector->edid) { | |
1152 | kfree(radeon_connector->edid); | |
1153 | radeon_connector->edid = NULL; | |
1154 | } | |
1155 | ||
6f50eae7 AD |
1156 | if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { |
1157 | /* eDP is always DP */ | |
1158 | radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT; | |
8b834852 AD |
1159 | if (!radeon_dig_connector->edp_on) |
1160 | atombios_set_edp_panel_power(connector, | |
1161 | ATOM_TRANSMITTER_ACTION_POWER_ON); | |
6f50eae7 | 1162 | if (radeon_dp_getdpcd(radeon_connector)) |
9fa05c98 | 1163 | ret = connector_status_connected; |
8b834852 AD |
1164 | if (!radeon_dig_connector->edp_on) |
1165 | atombios_set_edp_panel_power(connector, | |
1166 | ATOM_TRANSMITTER_ACTION_POWER_OFF); | |
4143e919 | 1167 | } else { |
6f50eae7 | 1168 | radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector); |
f8d0edde AD |
1169 | if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { |
1170 | ret = connector_status_connected; | |
1171 | if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) | |
1172 | radeon_dp_getdpcd(radeon_connector); | |
6f50eae7 | 1173 | } else { |
f8d0edde AD |
1174 | if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) { |
1175 | if (radeon_dp_getdpcd(radeon_connector)) | |
1176 | ret = connector_status_connected; | |
1177 | } else { | |
1178 | if (radeon_ddc_probe(radeon_connector)) | |
1179 | ret = connector_status_connected; | |
1180 | } | |
4143e919 | 1181 | } |
746c1aa4 | 1182 | } |
4143e919 | 1183 | |
30f44372 | 1184 | radeon_connector_update_scratch_regs(connector, ret); |
746c1aa4 DA |
1185 | return ret; |
1186 | } | |
1187 | ||
5801ead6 AD |
1188 | static int radeon_dp_mode_valid(struct drm_connector *connector, |
1189 | struct drm_display_mode *mode) | |
1190 | { | |
1191 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1192 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; | |
1193 | ||
1194 | /* XXX check mode bandwidth */ | |
1195 | ||
196c58d2 AD |
1196 | if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || |
1197 | (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) | |
224d94b1 | 1198 | return radeon_dp_mode_valid_helper(connector, mode); |
5801ead6 AD |
1199 | else |
1200 | return MODE_OK; | |
1201 | } | |
1202 | ||
746c1aa4 DA |
1203 | struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = { |
1204 | .get_modes = radeon_dp_get_modes, | |
5801ead6 | 1205 | .mode_valid = radeon_dp_mode_valid, |
746c1aa4 DA |
1206 | .best_encoder = radeon_dvi_encoder, |
1207 | }; | |
1208 | ||
1209 | struct drm_connector_funcs radeon_dp_connector_funcs = { | |
1210 | .dpms = drm_helper_connector_dpms, | |
1211 | .detect = radeon_dp_detect, | |
1212 | .fill_modes = drm_helper_probe_single_connector_modes, | |
1213 | .set_property = radeon_connector_set_property, | |
ffd09c64 | 1214 | .destroy = radeon_dp_connector_destroy, |
746c1aa4 DA |
1215 | .force = radeon_dvi_force, |
1216 | }; | |
1217 | ||
771fe6b9 JG |
1218 | void |
1219 | radeon_add_atom_connector(struct drm_device *dev, | |
1220 | uint32_t connector_id, | |
1221 | uint32_t supported_device, | |
1222 | int connector_type, | |
1223 | struct radeon_i2c_bus_rec *i2c_bus, | |
b75fad06 | 1224 | uint32_t igp_lane_info, |
eed45b30 | 1225 | uint16_t connector_object_id, |
26b5bc98 AD |
1226 | struct radeon_hpd *hpd, |
1227 | struct radeon_router *router) | |
771fe6b9 | 1228 | { |
445282db | 1229 | struct radeon_device *rdev = dev->dev_private; |
771fe6b9 JG |
1230 | struct drm_connector *connector; |
1231 | struct radeon_connector *radeon_connector; | |
1232 | struct radeon_connector_atom_dig *radeon_dig_connector; | |
eac4dff6 AD |
1233 | struct drm_encoder *encoder; |
1234 | struct radeon_encoder *radeon_encoder; | |
771fe6b9 | 1235 | uint32_t subpixel_order = SubPixelNone; |
0294cf4f | 1236 | bool shared_ddc = false; |
eac4dff6 | 1237 | bool is_dp_bridge = false; |
771fe6b9 | 1238 | |
4ce001ab | 1239 | if (connector_type == DRM_MODE_CONNECTOR_Unknown) |
771fe6b9 JG |
1240 | return; |
1241 | ||
cf4c12f9 AD |
1242 | /* if the user selected tv=0 don't try and add the connector */ |
1243 | if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) || | |
1244 | (connector_type == DRM_MODE_CONNECTOR_Composite) || | |
1245 | (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) && | |
1246 | (radeon_tv == 0)) | |
1247 | return; | |
1248 | ||
771fe6b9 JG |
1249 | /* see if we already added it */ |
1250 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
1251 | radeon_connector = to_radeon_connector(connector); | |
1252 | if (radeon_connector->connector_id == connector_id) { | |
1253 | radeon_connector->devices |= supported_device; | |
1254 | return; | |
1255 | } | |
0294cf4f | 1256 | if (radeon_connector->ddc_bus && i2c_bus->valid) { |
d3932d6c | 1257 | if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) { |
0294cf4f AD |
1258 | radeon_connector->shared_ddc = true; |
1259 | shared_ddc = true; | |
1260 | } | |
fb939dfc | 1261 | if (radeon_connector->router_bus && router->ddc_valid && |
26b5bc98 AD |
1262 | (radeon_connector->router.router_id == router->router_id)) { |
1263 | radeon_connector->shared_ddc = false; | |
1264 | shared_ddc = false; | |
1265 | } | |
0294cf4f | 1266 | } |
771fe6b9 JG |
1267 | } |
1268 | ||
eac4dff6 AD |
1269 | /* check if it's a dp bridge */ |
1270 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { | |
1271 | radeon_encoder = to_radeon_encoder(encoder); | |
1272 | if (radeon_encoder->devices & supported_device) { | |
1273 | switch (radeon_encoder->encoder_id) { | |
1274 | case ENCODER_OBJECT_ID_TRAVIS: | |
1275 | case ENCODER_OBJECT_ID_NUTMEG: | |
1276 | is_dp_bridge = true; | |
1277 | break; | |
1278 | default: | |
1279 | break; | |
1280 | } | |
1281 | } | |
1282 | } | |
1283 | ||
771fe6b9 JG |
1284 | radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); |
1285 | if (!radeon_connector) | |
1286 | return; | |
1287 | ||
1288 | connector = &radeon_connector->base; | |
1289 | ||
1290 | radeon_connector->connector_id = connector_id; | |
1291 | radeon_connector->devices = supported_device; | |
0294cf4f | 1292 | radeon_connector->shared_ddc = shared_ddc; |
b75fad06 | 1293 | radeon_connector->connector_object_id = connector_object_id; |
eed45b30 | 1294 | radeon_connector->hpd = *hpd; |
26b5bc98 | 1295 | radeon_connector->router = *router; |
fb939dfc | 1296 | if (router->ddc_valid || router->cd_valid) { |
26b5bc98 AD |
1297 | radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info); |
1298 | if (!radeon_connector->router_bus) | |
a70882aa | 1299 | DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n"); |
26b5bc98 | 1300 | } |
eac4dff6 AD |
1301 | |
1302 | if (is_dp_bridge) { | |
771fe6b9 JG |
1303 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); |
1304 | if (!radeon_dig_connector) | |
1305 | goto failed; | |
771fe6b9 JG |
1306 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
1307 | radeon_connector->con_priv = radeon_dig_connector; | |
eac4dff6 AD |
1308 | drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); |
1309 | drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); | |
771fe6b9 | 1310 | if (i2c_bus->valid) { |
eac4dff6 AD |
1311 | /* add DP i2c bus */ |
1312 | if (connector_type == DRM_MODE_CONNECTOR_eDP) | |
1313 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch"); | |
1314 | else | |
1315 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch"); | |
1316 | if (!radeon_dig_connector->dp_i2c_bus) | |
1317 | DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n"); | |
f376b94f | 1318 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1319 | if (!radeon_connector->ddc_bus) |
eac4dff6 | 1320 | DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 1321 | } |
eac4dff6 AD |
1322 | switch (connector_type) { |
1323 | case DRM_MODE_CONNECTOR_VGA: | |
1324 | case DRM_MODE_CONNECTOR_DVIA: | |
1325 | default: | |
1326 | connector->interlace_allowed = true; | |
1327 | connector->doublescan_allowed = true; | |
1328 | break; | |
1329 | case DRM_MODE_CONNECTOR_DVII: | |
1330 | case DRM_MODE_CONNECTOR_DVID: | |
1331 | case DRM_MODE_CONNECTOR_HDMIA: | |
1332 | case DRM_MODE_CONNECTOR_HDMIB: | |
1333 | case DRM_MODE_CONNECTOR_DisplayPort: | |
430f70d5 AD |
1334 | drm_connector_attach_property(&radeon_connector->base, |
1335 | rdev->mode_info.underscan_property, | |
56bec7c0 | 1336 | UNDERSCAN_OFF); |
5bccf5e3 MG |
1337 | drm_connector_attach_property(&radeon_connector->base, |
1338 | rdev->mode_info.underscan_hborder_property, | |
1339 | 0); | |
1340 | drm_connector_attach_property(&radeon_connector->base, | |
1341 | rdev->mode_info.underscan_vborder_property, | |
1342 | 0); | |
eac4dff6 AD |
1343 | subpixel_order = SubPixelHorizontalRGB; |
1344 | connector->interlace_allowed = true; | |
1345 | if (connector_type == DRM_MODE_CONNECTOR_HDMIB) | |
1346 | connector->doublescan_allowed = true; | |
1347 | else | |
1348 | connector->doublescan_allowed = false; | |
1349 | break; | |
1350 | case DRM_MODE_CONNECTOR_LVDS: | |
1351 | case DRM_MODE_CONNECTOR_eDP: | |
1352 | drm_connector_attach_property(&radeon_connector->base, | |
1353 | dev->mode_config.scaling_mode_property, | |
1354 | DRM_MODE_SCALE_FULLSCREEN); | |
1355 | subpixel_order = SubPixelHorizontalRGB; | |
1356 | connector->interlace_allowed = false; | |
1357 | connector->doublescan_allowed = false; | |
1358 | break; | |
5bccf5e3 | 1359 | } |
eac4dff6 AD |
1360 | } else { |
1361 | switch (connector_type) { | |
1362 | case DRM_MODE_CONNECTOR_VGA: | |
1363 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
1364 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); | |
1365 | if (i2c_bus->valid) { | |
1366 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1367 | if (!radeon_connector->ddc_bus) | |
1368 | DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1369 | } | |
390d0bbe AD |
1370 | radeon_connector->dac_load_detect = true; |
1371 | drm_connector_attach_property(&radeon_connector->base, | |
1372 | rdev->mode_info.load_detect_property, | |
1373 | 1); | |
eac4dff6 AD |
1374 | /* no HPD on analog connectors */ |
1375 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
1376 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | |
1377 | connector->interlace_allowed = true; | |
c49948f4 | 1378 | connector->doublescan_allowed = true; |
eac4dff6 AD |
1379 | break; |
1380 | case DRM_MODE_CONNECTOR_DVIA: | |
1381 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
1382 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); | |
1383 | if (i2c_bus->valid) { | |
1384 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1385 | if (!radeon_connector->ddc_bus) | |
1386 | DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1387 | } | |
1388 | radeon_connector->dac_load_detect = true; | |
430f70d5 | 1389 | drm_connector_attach_property(&radeon_connector->base, |
eac4dff6 AD |
1390 | rdev->mode_info.load_detect_property, |
1391 | 1); | |
1392 | /* no HPD on analog connectors */ | |
1393 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
1394 | connector->interlace_allowed = true; | |
1395 | connector->doublescan_allowed = true; | |
1396 | break; | |
1397 | case DRM_MODE_CONNECTOR_DVII: | |
1398 | case DRM_MODE_CONNECTOR_DVID: | |
1399 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1400 | if (!radeon_dig_connector) | |
1401 | goto failed; | |
1402 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1403 | radeon_connector->con_priv = radeon_dig_connector; | |
1404 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
1405 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); | |
1406 | if (i2c_bus->valid) { | |
1407 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1408 | if (!radeon_connector->ddc_bus) | |
1409 | DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1410 | } | |
1411 | subpixel_order = SubPixelHorizontalRGB; | |
5bccf5e3 | 1412 | drm_connector_attach_property(&radeon_connector->base, |
eac4dff6 AD |
1413 | rdev->mode_info.coherent_mode_property, |
1414 | 1); | |
1415 | if (ASIC_IS_AVIVO(rdev)) { | |
1416 | drm_connector_attach_property(&radeon_connector->base, | |
1417 | rdev->mode_info.underscan_property, | |
1418 | UNDERSCAN_OFF); | |
1419 | drm_connector_attach_property(&radeon_connector->base, | |
1420 | rdev->mode_info.underscan_hborder_property, | |
1421 | 0); | |
1422 | drm_connector_attach_property(&radeon_connector->base, | |
1423 | rdev->mode_info.underscan_vborder_property, | |
1424 | 0); | |
1425 | } | |
1426 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { | |
1427 | radeon_connector->dac_load_detect = true; | |
1428 | drm_connector_attach_property(&radeon_connector->base, | |
1429 | rdev->mode_info.load_detect_property, | |
1430 | 1); | |
1431 | } | |
1432 | connector->interlace_allowed = true; | |
1433 | if (connector_type == DRM_MODE_CONNECTOR_DVII) | |
1434 | connector->doublescan_allowed = true; | |
1435 | else | |
1436 | connector->doublescan_allowed = false; | |
1437 | break; | |
1438 | case DRM_MODE_CONNECTOR_HDMIA: | |
1439 | case DRM_MODE_CONNECTOR_HDMIB: | |
1440 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1441 | if (!radeon_dig_connector) | |
1442 | goto failed; | |
1443 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1444 | radeon_connector->con_priv = radeon_dig_connector; | |
1445 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
1446 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); | |
1447 | if (i2c_bus->valid) { | |
1448 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1449 | if (!radeon_connector->ddc_bus) | |
1450 | DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1451 | } | |
5bccf5e3 | 1452 | drm_connector_attach_property(&radeon_connector->base, |
eac4dff6 AD |
1453 | rdev->mode_info.coherent_mode_property, |
1454 | 1); | |
1455 | if (ASIC_IS_AVIVO(rdev)) { | |
1456 | drm_connector_attach_property(&radeon_connector->base, | |
1457 | rdev->mode_info.underscan_property, | |
1458 | UNDERSCAN_OFF); | |
1459 | drm_connector_attach_property(&radeon_connector->base, | |
1460 | rdev->mode_info.underscan_hborder_property, | |
1461 | 0); | |
1462 | drm_connector_attach_property(&radeon_connector->base, | |
1463 | rdev->mode_info.underscan_vborder_property, | |
1464 | 0); | |
1465 | } | |
1466 | subpixel_order = SubPixelHorizontalRGB; | |
1467 | connector->interlace_allowed = true; | |
1468 | if (connector_type == DRM_MODE_CONNECTOR_HDMIB) | |
1469 | connector->doublescan_allowed = true; | |
1470 | else | |
1471 | connector->doublescan_allowed = false; | |
1472 | break; | |
1473 | case DRM_MODE_CONNECTOR_DisplayPort: | |
1474 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1475 | if (!radeon_dig_connector) | |
1476 | goto failed; | |
1477 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1478 | radeon_connector->con_priv = radeon_dig_connector; | |
1479 | drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); | |
1480 | drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); | |
1481 | if (i2c_bus->valid) { | |
1482 | /* add DP i2c bus */ | |
1483 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch"); | |
1484 | if (!radeon_dig_connector->dp_i2c_bus) | |
1485 | DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n"); | |
1486 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1487 | if (!radeon_connector->ddc_bus) | |
1488 | DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1489 | } | |
1490 | subpixel_order = SubPixelHorizontalRGB; | |
1491 | drm_connector_attach_property(&radeon_connector->base, | |
1492 | rdev->mode_info.coherent_mode_property, | |
1493 | 1); | |
1494 | if (ASIC_IS_AVIVO(rdev)) { | |
1495 | drm_connector_attach_property(&radeon_connector->base, | |
1496 | rdev->mode_info.underscan_property, | |
1497 | UNDERSCAN_OFF); | |
1498 | drm_connector_attach_property(&radeon_connector->base, | |
1499 | rdev->mode_info.underscan_hborder_property, | |
1500 | 0); | |
1501 | drm_connector_attach_property(&radeon_connector->base, | |
1502 | rdev->mode_info.underscan_vborder_property, | |
1503 | 0); | |
1504 | } | |
1505 | connector->interlace_allowed = true; | |
1506 | /* in theory with a DP to VGA converter... */ | |
c49948f4 | 1507 | connector->doublescan_allowed = false; |
eac4dff6 AD |
1508 | break; |
1509 | case DRM_MODE_CONNECTOR_eDP: | |
1510 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1511 | if (!radeon_dig_connector) | |
1512 | goto failed; | |
1513 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1514 | radeon_connector->con_priv = radeon_dig_connector; | |
1515 | drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); | |
1516 | drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); | |
1517 | if (i2c_bus->valid) { | |
1518 | /* add DP i2c bus */ | |
1519 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch"); | |
1520 | if (!radeon_dig_connector->dp_i2c_bus) | |
1521 | DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n"); | |
1522 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1523 | if (!radeon_connector->ddc_bus) | |
1524 | DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1525 | } | |
430f70d5 | 1526 | drm_connector_attach_property(&radeon_connector->base, |
eac4dff6 AD |
1527 | dev->mode_config.scaling_mode_property, |
1528 | DRM_MODE_SCALE_FULLSCREEN); | |
1529 | subpixel_order = SubPixelHorizontalRGB; | |
1530 | connector->interlace_allowed = false; | |
1531 | connector->doublescan_allowed = false; | |
1532 | break; | |
1533 | case DRM_MODE_CONNECTOR_SVIDEO: | |
1534 | case DRM_MODE_CONNECTOR_Composite: | |
1535 | case DRM_MODE_CONNECTOR_9PinDIN: | |
1536 | drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type); | |
1537 | drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs); | |
1538 | radeon_connector->dac_load_detect = true; | |
5bccf5e3 | 1539 | drm_connector_attach_property(&radeon_connector->base, |
eac4dff6 AD |
1540 | rdev->mode_info.load_detect_property, |
1541 | 1); | |
5bccf5e3 | 1542 | drm_connector_attach_property(&radeon_connector->base, |
eac4dff6 AD |
1543 | rdev->mode_info.tv_std_property, |
1544 | radeon_atombios_get_tv_info(rdev)); | |
1545 | /* no HPD on analog connectors */ | |
1546 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
1547 | connector->interlace_allowed = false; | |
1548 | connector->doublescan_allowed = false; | |
1549 | break; | |
1550 | case DRM_MODE_CONNECTOR_LVDS: | |
1551 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1552 | if (!radeon_dig_connector) | |
1553 | goto failed; | |
1554 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1555 | radeon_connector->con_priv = radeon_dig_connector; | |
1556 | drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); | |
1557 | drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); | |
1558 | if (i2c_bus->valid) { | |
1559 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1560 | if (!radeon_connector->ddc_bus) | |
1561 | DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1562 | } | |
1563 | drm_connector_attach_property(&radeon_connector->base, | |
1564 | dev->mode_config.scaling_mode_property, | |
1565 | DRM_MODE_SCALE_FULLSCREEN); | |
1566 | subpixel_order = SubPixelHorizontalRGB; | |
1567 | connector->interlace_allowed = false; | |
1568 | connector->doublescan_allowed = false; | |
1569 | break; | |
771fe6b9 | 1570 | } |
771fe6b9 JG |
1571 | } |
1572 | ||
2581afcc | 1573 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { |
eb1f8e4f DA |
1574 | if (i2c_bus->valid) |
1575 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | |
1576 | } else | |
1577 | connector->polled = DRM_CONNECTOR_POLL_HPD; | |
1578 | ||
771fe6b9 JG |
1579 | connector->display_info.subpixel_order = subpixel_order; |
1580 | drm_sysfs_connector_add(connector); | |
1581 | return; | |
1582 | ||
1583 | failed: | |
771fe6b9 JG |
1584 | drm_connector_cleanup(connector); |
1585 | kfree(connector); | |
1586 | } | |
1587 | ||
1588 | void | |
1589 | radeon_add_legacy_connector(struct drm_device *dev, | |
1590 | uint32_t connector_id, | |
1591 | uint32_t supported_device, | |
1592 | int connector_type, | |
b75fad06 | 1593 | struct radeon_i2c_bus_rec *i2c_bus, |
eed45b30 AD |
1594 | uint16_t connector_object_id, |
1595 | struct radeon_hpd *hpd) | |
771fe6b9 | 1596 | { |
445282db | 1597 | struct radeon_device *rdev = dev->dev_private; |
771fe6b9 JG |
1598 | struct drm_connector *connector; |
1599 | struct radeon_connector *radeon_connector; | |
1600 | uint32_t subpixel_order = SubPixelNone; | |
1601 | ||
4ce001ab | 1602 | if (connector_type == DRM_MODE_CONNECTOR_Unknown) |
771fe6b9 JG |
1603 | return; |
1604 | ||
cf4c12f9 AD |
1605 | /* if the user selected tv=0 don't try and add the connector */ |
1606 | if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) || | |
1607 | (connector_type == DRM_MODE_CONNECTOR_Composite) || | |
1608 | (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) && | |
1609 | (radeon_tv == 0)) | |
1610 | return; | |
1611 | ||
771fe6b9 JG |
1612 | /* see if we already added it */ |
1613 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
1614 | radeon_connector = to_radeon_connector(connector); | |
1615 | if (radeon_connector->connector_id == connector_id) { | |
1616 | radeon_connector->devices |= supported_device; | |
1617 | return; | |
1618 | } | |
1619 | } | |
1620 | ||
1621 | radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); | |
1622 | if (!radeon_connector) | |
1623 | return; | |
1624 | ||
1625 | connector = &radeon_connector->base; | |
1626 | ||
1627 | radeon_connector->connector_id = connector_id; | |
1628 | radeon_connector->devices = supported_device; | |
b75fad06 | 1629 | radeon_connector->connector_object_id = connector_object_id; |
eed45b30 | 1630 | radeon_connector->hpd = *hpd; |
771fe6b9 JG |
1631 | switch (connector_type) { |
1632 | case DRM_MODE_CONNECTOR_VGA: | |
1633 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
0b4c0f3f | 1634 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
771fe6b9 | 1635 | if (i2c_bus->valid) { |
f376b94f | 1636 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1637 | if (!radeon_connector->ddc_bus) |
a70882aa | 1638 | DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 1639 | } |
35e4b7af | 1640 | radeon_connector->dac_load_detect = true; |
445282db DA |
1641 | drm_connector_attach_property(&radeon_connector->base, |
1642 | rdev->mode_info.load_detect_property, | |
1643 | 1); | |
2581afcc AD |
1644 | /* no HPD on analog connectors */ |
1645 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
eb1f8e4f | 1646 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; |
c49948f4 AD |
1647 | connector->interlace_allowed = true; |
1648 | connector->doublescan_allowed = true; | |
771fe6b9 JG |
1649 | break; |
1650 | case DRM_MODE_CONNECTOR_DVIA: | |
1651 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
0b4c0f3f | 1652 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
771fe6b9 | 1653 | if (i2c_bus->valid) { |
f376b94f | 1654 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1655 | if (!radeon_connector->ddc_bus) |
a70882aa | 1656 | DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 1657 | } |
35e4b7af | 1658 | radeon_connector->dac_load_detect = true; |
445282db DA |
1659 | drm_connector_attach_property(&radeon_connector->base, |
1660 | rdev->mode_info.load_detect_property, | |
1661 | 1); | |
2581afcc AD |
1662 | /* no HPD on analog connectors */ |
1663 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
c49948f4 AD |
1664 | connector->interlace_allowed = true; |
1665 | connector->doublescan_allowed = true; | |
771fe6b9 JG |
1666 | break; |
1667 | case DRM_MODE_CONNECTOR_DVII: | |
1668 | case DRM_MODE_CONNECTOR_DVID: | |
1669 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
0b4c0f3f | 1670 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); |
771fe6b9 | 1671 | if (i2c_bus->valid) { |
f376b94f | 1672 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1673 | if (!radeon_connector->ddc_bus) |
a70882aa | 1674 | DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
68b3adb4 AD |
1675 | } |
1676 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { | |
35e4b7af | 1677 | radeon_connector->dac_load_detect = true; |
445282db DA |
1678 | drm_connector_attach_property(&radeon_connector->base, |
1679 | rdev->mode_info.load_detect_property, | |
1680 | 1); | |
771fe6b9 JG |
1681 | } |
1682 | subpixel_order = SubPixelHorizontalRGB; | |
c49948f4 AD |
1683 | connector->interlace_allowed = true; |
1684 | if (connector_type == DRM_MODE_CONNECTOR_DVII) | |
1685 | connector->doublescan_allowed = true; | |
1686 | else | |
1687 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
1688 | break; |
1689 | case DRM_MODE_CONNECTOR_SVIDEO: | |
1690 | case DRM_MODE_CONNECTOR_Composite: | |
1691 | case DRM_MODE_CONNECTOR_9PinDIN: | |
cf4c12f9 AD |
1692 | drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type); |
1693 | drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs); | |
1694 | radeon_connector->dac_load_detect = true; | |
1695 | /* RS400,RC410,RS480 chipset seems to report a lot | |
1696 | * of false positive on load detect, we haven't yet | |
1697 | * found a way to make load detect reliable on those | |
1698 | * chipset, thus just disable it for TV. | |
1699 | */ | |
1700 | if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480) | |
1701 | radeon_connector->dac_load_detect = false; | |
1702 | drm_connector_attach_property(&radeon_connector->base, | |
1703 | rdev->mode_info.load_detect_property, | |
1704 | radeon_connector->dac_load_detect); | |
1705 | drm_connector_attach_property(&radeon_connector->base, | |
1706 | rdev->mode_info.tv_std_property, | |
1707 | radeon_combios_get_tv_info(rdev)); | |
1708 | /* no HPD on analog connectors */ | |
1709 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
c49948f4 AD |
1710 | connector->interlace_allowed = false; |
1711 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
1712 | break; |
1713 | case DRM_MODE_CONNECTOR_LVDS: | |
1714 | drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); | |
0b4c0f3f | 1715 | drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); |
771fe6b9 | 1716 | if (i2c_bus->valid) { |
f376b94f | 1717 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1718 | if (!radeon_connector->ddc_bus) |
a70882aa | 1719 | DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 1720 | } |
445282db DA |
1721 | drm_connector_attach_property(&radeon_connector->base, |
1722 | dev->mode_config.scaling_mode_property, | |
1723 | DRM_MODE_SCALE_FULLSCREEN); | |
771fe6b9 | 1724 | subpixel_order = SubPixelHorizontalRGB; |
c49948f4 AD |
1725 | connector->interlace_allowed = false; |
1726 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
1727 | break; |
1728 | } | |
1729 | ||
2581afcc | 1730 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { |
eb1f8e4f DA |
1731 | if (i2c_bus->valid) |
1732 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | |
1733 | } else | |
1734 | connector->polled = DRM_CONNECTOR_POLL_HPD; | |
771fe6b9 JG |
1735 | connector->display_info.subpixel_order = subpixel_order; |
1736 | drm_sysfs_connector_add(connector); | |
63ec0119 MD |
1737 | if (connector_type == DRM_MODE_CONNECTOR_LVDS) { |
1738 | struct drm_encoder *drm_encoder; | |
1739 | ||
1740 | list_for_each_entry(drm_encoder, &dev->mode_config.encoder_list, head) { | |
1741 | struct radeon_encoder *radeon_encoder; | |
1742 | ||
1743 | radeon_encoder = to_radeon_encoder(drm_encoder); | |
1744 | if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_LVDS) | |
1745 | radeon_legacy_backlight_init(radeon_encoder, connector); | |
1746 | } | |
1747 | } | |
771fe6b9 | 1748 | } |