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Commit | Line | Data |
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771fe6b9 JG |
1 | /* |
2 | * Copyright 2007-8 Advanced Micro Devices, Inc. | |
3 | * Copyright 2008 Red Hat Inc. | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the "Software"), | |
7 | * to deal in the Software without restriction, including without limitation | |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
9 | * and/or sell copies of the Software, and to permit persons to whom the | |
10 | * Software is furnished to do so, subject to the following conditions: | |
11 | * | |
12 | * The above copyright notice and this permission notice shall be included in | |
13 | * all copies or substantial portions of the Software. | |
14 | * | |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
18 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
19 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
20 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
21 | * OTHER DEALINGS IN THE SOFTWARE. | |
22 | * | |
23 | * Authors: Dave Airlie | |
24 | * Alex Deucher | |
25 | */ | |
26 | #include "drmP.h" | |
27 | #include "drm_edid.h" | |
28 | #include "drm_crtc_helper.h" | |
d50ba256 | 29 | #include "drm_fb_helper.h" |
771fe6b9 JG |
30 | #include "radeon_drm.h" |
31 | #include "radeon.h" | |
923f6848 | 32 | #include "atom.h" |
771fe6b9 JG |
33 | |
34 | extern void | |
35 | radeon_combios_connected_scratch_regs(struct drm_connector *connector, | |
36 | struct drm_encoder *encoder, | |
37 | bool connected); | |
38 | extern void | |
39 | radeon_atombios_connected_scratch_regs(struct drm_connector *connector, | |
40 | struct drm_encoder *encoder, | |
41 | bool connected); | |
42 | ||
63ec0119 MD |
43 | extern void |
44 | radeon_legacy_backlight_init(struct radeon_encoder *radeon_encoder, | |
45 | struct drm_connector *drm_connector); | |
46 | ||
d4877cf2 AD |
47 | void radeon_connector_hotplug(struct drm_connector *connector) |
48 | { | |
49 | struct drm_device *dev = connector->dev; | |
50 | struct radeon_device *rdev = dev->dev_private; | |
51 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
52 | ||
cbac9543 AD |
53 | /* bail if the connector does not have hpd pin, e.g., |
54 | * VGA, TV, etc. | |
55 | */ | |
56 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) | |
57 | return; | |
58 | ||
1e85e1d0 | 59 | radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd); |
d4877cf2 | 60 | |
73104b5c AD |
61 | /* if the connector is already off, don't turn it back on */ |
62 | if (connector->dpms != DRM_MODE_DPMS_ON) | |
63 | return; | |
64 | ||
d5811e87 AD |
65 | /* just deal with DP (not eDP) here. */ |
66 | if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) { | |
266dcba5 JG |
67 | struct radeon_connector_atom_dig *dig_connector = |
68 | radeon_connector->con_priv; | |
7c3ed0fd | 69 | |
266dcba5 JG |
70 | /* if existing sink type was not DP no need to retrain */ |
71 | if (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT) | |
72 | return; | |
73 | ||
74 | /* first get sink type as it may be reset after (un)plug */ | |
75 | dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector); | |
76 | /* don't do anything if sink is not display port, i.e., | |
77 | * passive dp->(dvi|hdmi) adaptor | |
78 | */ | |
79 | if (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) { | |
80 | int saved_dpms = connector->dpms; | |
81 | /* Only turn off the display if it's physically disconnected */ | |
82 | if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) | |
83 | drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF); | |
84 | else if (radeon_dp_needs_link_train(radeon_connector)) | |
85 | drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON); | |
86 | connector->dpms = saved_dpms; | |
87 | } | |
d4877cf2 | 88 | } |
d4877cf2 AD |
89 | } |
90 | ||
445282db DA |
91 | static void radeon_property_change_mode(struct drm_encoder *encoder) |
92 | { | |
93 | struct drm_crtc *crtc = encoder->crtc; | |
94 | ||
95 | if (crtc && crtc->enabled) { | |
96 | drm_crtc_helper_set_mode(crtc, &crtc->mode, | |
97 | crtc->x, crtc->y, crtc->fb); | |
98 | } | |
99 | } | |
eccea792 AD |
100 | |
101 | int radeon_get_monitor_bpc(struct drm_connector *connector) | |
102 | { | |
103 | struct drm_device *dev = connector->dev; | |
104 | struct radeon_device *rdev = dev->dev_private; | |
105 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
106 | struct radeon_connector_atom_dig *dig_connector; | |
107 | int bpc = 8; | |
108 | ||
109 | switch (connector->connector_type) { | |
110 | case DRM_MODE_CONNECTOR_DVII: | |
111 | case DRM_MODE_CONNECTOR_HDMIB: | |
112 | if (radeon_connector->use_digital) { | |
113 | if (drm_detect_hdmi_monitor(radeon_connector->edid)) { | |
114 | if (connector->display_info.bpc) | |
115 | bpc = connector->display_info.bpc; | |
116 | } | |
117 | } | |
118 | break; | |
119 | case DRM_MODE_CONNECTOR_DVID: | |
120 | case DRM_MODE_CONNECTOR_HDMIA: | |
121 | if (drm_detect_hdmi_monitor(radeon_connector->edid)) { | |
122 | if (connector->display_info.bpc) | |
123 | bpc = connector->display_info.bpc; | |
124 | } | |
125 | break; | |
126 | case DRM_MODE_CONNECTOR_DisplayPort: | |
127 | dig_connector = radeon_connector->con_priv; | |
128 | if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || | |
129 | (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) || | |
130 | drm_detect_hdmi_monitor(radeon_connector->edid)) { | |
131 | if (connector->display_info.bpc) | |
132 | bpc = connector->display_info.bpc; | |
133 | } | |
134 | break; | |
135 | case DRM_MODE_CONNECTOR_eDP: | |
136 | case DRM_MODE_CONNECTOR_LVDS: | |
137 | if (connector->display_info.bpc) | |
138 | bpc = connector->display_info.bpc; | |
139 | else if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) { | |
140 | struct drm_connector_helper_funcs *connector_funcs = | |
141 | connector->helper_private; | |
142 | struct drm_encoder *encoder = connector_funcs->best_encoder(connector); | |
143 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
144 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; | |
145 | ||
146 | if (dig->lcd_misc & ATOM_PANEL_MISC_V13_6BIT_PER_COLOR) | |
147 | bpc = 6; | |
148 | else if (dig->lcd_misc & ATOM_PANEL_MISC_V13_8BIT_PER_COLOR) | |
149 | bpc = 8; | |
150 | } | |
151 | break; | |
152 | } | |
153 | return bpc; | |
154 | } | |
155 | ||
771fe6b9 JG |
156 | static void |
157 | radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status) | |
158 | { | |
159 | struct drm_device *dev = connector->dev; | |
160 | struct radeon_device *rdev = dev->dev_private; | |
161 | struct drm_encoder *best_encoder = NULL; | |
162 | struct drm_encoder *encoder = NULL; | |
163 | struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; | |
164 | struct drm_mode_object *obj; | |
165 | bool connected; | |
166 | int i; | |
167 | ||
168 | best_encoder = connector_funcs->best_encoder(connector); | |
169 | ||
170 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
171 | if (connector->encoder_ids[i] == 0) | |
172 | break; | |
173 | ||
174 | obj = drm_mode_object_find(connector->dev, | |
175 | connector->encoder_ids[i], | |
176 | DRM_MODE_OBJECT_ENCODER); | |
177 | if (!obj) | |
178 | continue; | |
179 | ||
180 | encoder = obj_to_encoder(obj); | |
181 | ||
182 | if ((encoder == best_encoder) && (status == connector_status_connected)) | |
183 | connected = true; | |
184 | else | |
185 | connected = false; | |
186 | ||
187 | if (rdev->is_atom_bios) | |
188 | radeon_atombios_connected_scratch_regs(connector, encoder, connected); | |
189 | else | |
190 | radeon_combios_connected_scratch_regs(connector, encoder, connected); | |
191 | ||
192 | } | |
193 | } | |
194 | ||
445282db DA |
195 | struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type) |
196 | { | |
197 | struct drm_mode_object *obj; | |
198 | struct drm_encoder *encoder; | |
199 | int i; | |
200 | ||
201 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
202 | if (connector->encoder_ids[i] == 0) | |
203 | break; | |
204 | ||
205 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
206 | if (!obj) | |
207 | continue; | |
208 | ||
209 | encoder = obj_to_encoder(obj); | |
210 | if (encoder->encoder_type == encoder_type) | |
211 | return encoder; | |
212 | } | |
213 | return NULL; | |
214 | } | |
215 | ||
771fe6b9 JG |
216 | struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector) |
217 | { | |
218 | int enc_id = connector->encoder_ids[0]; | |
219 | struct drm_mode_object *obj; | |
220 | struct drm_encoder *encoder; | |
221 | ||
222 | /* pick the encoder ids */ | |
223 | if (enc_id) { | |
224 | obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER); | |
225 | if (!obj) | |
226 | return NULL; | |
227 | encoder = obj_to_encoder(obj); | |
228 | return encoder; | |
229 | } | |
230 | return NULL; | |
231 | } | |
232 | ||
4ce001ab DA |
233 | /* |
234 | * radeon_connector_analog_encoder_conflict_solve | |
235 | * - search for other connectors sharing this encoder | |
236 | * if priority is true, then set them disconnected if this is connected | |
237 | * if priority is false, set us disconnected if they are connected | |
238 | */ | |
239 | static enum drm_connector_status | |
240 | radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector, | |
241 | struct drm_encoder *encoder, | |
242 | enum drm_connector_status current_status, | |
243 | bool priority) | |
244 | { | |
245 | struct drm_device *dev = connector->dev; | |
246 | struct drm_connector *conflict; | |
08d07511 | 247 | struct radeon_connector *radeon_conflict; |
4ce001ab DA |
248 | int i; |
249 | ||
250 | list_for_each_entry(conflict, &dev->mode_config.connector_list, head) { | |
251 | if (conflict == connector) | |
252 | continue; | |
253 | ||
08d07511 | 254 | radeon_conflict = to_radeon_connector(conflict); |
4ce001ab DA |
255 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { |
256 | if (conflict->encoder_ids[i] == 0) | |
257 | break; | |
258 | ||
259 | /* if the IDs match */ | |
260 | if (conflict->encoder_ids[i] == encoder->base.id) { | |
261 | if (conflict->status != connector_status_connected) | |
262 | continue; | |
08d07511 AD |
263 | |
264 | if (radeon_conflict->use_digital) | |
265 | continue; | |
4ce001ab DA |
266 | |
267 | if (priority == true) { | |
c5d46b4e AD |
268 | DRM_DEBUG_KMS("1: conflicting encoders switching off %s\n", drm_get_connector_name(conflict)); |
269 | DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(connector)); | |
4ce001ab DA |
270 | conflict->status = connector_status_disconnected; |
271 | radeon_connector_update_scratch_regs(conflict, connector_status_disconnected); | |
272 | } else { | |
c5d46b4e AD |
273 | DRM_DEBUG_KMS("2: conflicting encoders switching off %s\n", drm_get_connector_name(connector)); |
274 | DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(conflict)); | |
4ce001ab DA |
275 | current_status = connector_status_disconnected; |
276 | } | |
277 | break; | |
278 | } | |
279 | } | |
280 | } | |
281 | return current_status; | |
282 | ||
283 | } | |
284 | ||
771fe6b9 JG |
285 | static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder) |
286 | { | |
287 | struct drm_device *dev = encoder->dev; | |
288 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
289 | struct drm_display_mode *mode = NULL; | |
de2103e4 | 290 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
771fe6b9 | 291 | |
de2103e4 AD |
292 | if (native_mode->hdisplay != 0 && |
293 | native_mode->vdisplay != 0 && | |
294 | native_mode->clock != 0) { | |
fb06ca8f | 295 | mode = drm_mode_duplicate(dev, native_mode); |
771fe6b9 JG |
296 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; |
297 | drm_mode_set_name(mode); | |
298 | ||
d9fdaafb | 299 | DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name); |
d2efdf6d AD |
300 | } else if (native_mode->hdisplay != 0 && |
301 | native_mode->vdisplay != 0) { | |
302 | /* mac laptops without an edid */ | |
303 | /* Note that this is not necessarily the exact panel mode, | |
304 | * but an approximation based on the cvt formula. For these | |
305 | * systems we should ideally read the mode info out of the | |
306 | * registers or add a mode table, but this works and is much | |
307 | * simpler. | |
308 | */ | |
309 | mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false); | |
310 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; | |
d9fdaafb | 311 | DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name); |
771fe6b9 JG |
312 | } |
313 | return mode; | |
314 | } | |
315 | ||
923f6848 AD |
316 | static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector) |
317 | { | |
318 | struct drm_device *dev = encoder->dev; | |
319 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
320 | struct drm_display_mode *mode = NULL; | |
de2103e4 | 321 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
923f6848 AD |
322 | int i; |
323 | struct mode_size { | |
324 | int w; | |
325 | int h; | |
326 | } common_modes[17] = { | |
327 | { 640, 480}, | |
328 | { 720, 480}, | |
329 | { 800, 600}, | |
330 | { 848, 480}, | |
331 | {1024, 768}, | |
332 | {1152, 768}, | |
333 | {1280, 720}, | |
334 | {1280, 800}, | |
335 | {1280, 854}, | |
336 | {1280, 960}, | |
337 | {1280, 1024}, | |
338 | {1440, 900}, | |
339 | {1400, 1050}, | |
340 | {1680, 1050}, | |
341 | {1600, 1200}, | |
342 | {1920, 1080}, | |
343 | {1920, 1200} | |
344 | }; | |
345 | ||
346 | for (i = 0; i < 17; i++) { | |
dfdd6467 AD |
347 | if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) { |
348 | if (common_modes[i].w > 1024 || | |
349 | common_modes[i].h > 768) | |
350 | continue; | |
351 | } | |
923f6848 | 352 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { |
de2103e4 AD |
353 | if (common_modes[i].w > native_mode->hdisplay || |
354 | common_modes[i].h > native_mode->vdisplay || | |
355 | (common_modes[i].w == native_mode->hdisplay && | |
356 | common_modes[i].h == native_mode->vdisplay)) | |
923f6848 AD |
357 | continue; |
358 | } | |
359 | if (common_modes[i].w < 320 || common_modes[i].h < 200) | |
360 | continue; | |
361 | ||
d50ba256 | 362 | mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false); |
923f6848 AD |
363 | drm_mode_probed_add(connector, mode); |
364 | } | |
365 | } | |
366 | ||
771fe6b9 JG |
367 | int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property, |
368 | uint64_t val) | |
369 | { | |
445282db DA |
370 | struct drm_device *dev = connector->dev; |
371 | struct radeon_device *rdev = dev->dev_private; | |
372 | struct drm_encoder *encoder; | |
373 | struct radeon_encoder *radeon_encoder; | |
374 | ||
375 | if (property == rdev->mode_info.coherent_mode_property) { | |
376 | struct radeon_encoder_atom_dig *dig; | |
ce227c41 | 377 | bool new_coherent_mode; |
445282db DA |
378 | |
379 | /* need to find digital encoder on connector */ | |
380 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
381 | if (!encoder) | |
382 | return 0; | |
383 | ||
384 | radeon_encoder = to_radeon_encoder(encoder); | |
385 | ||
386 | if (!radeon_encoder->enc_priv) | |
387 | return 0; | |
388 | ||
389 | dig = radeon_encoder->enc_priv; | |
ce227c41 DA |
390 | new_coherent_mode = val ? true : false; |
391 | if (dig->coherent_mode != new_coherent_mode) { | |
392 | dig->coherent_mode = new_coherent_mode; | |
393 | radeon_property_change_mode(&radeon_encoder->base); | |
394 | } | |
445282db DA |
395 | } |
396 | ||
5b1714d3 AD |
397 | if (property == rdev->mode_info.underscan_property) { |
398 | /* need to find digital encoder on connector */ | |
399 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
400 | if (!encoder) | |
401 | return 0; | |
402 | ||
403 | radeon_encoder = to_radeon_encoder(encoder); | |
404 | ||
405 | if (radeon_encoder->underscan_type != val) { | |
406 | radeon_encoder->underscan_type = val; | |
407 | radeon_property_change_mode(&radeon_encoder->base); | |
408 | } | |
409 | } | |
410 | ||
5bccf5e3 MG |
411 | if (property == rdev->mode_info.underscan_hborder_property) { |
412 | /* need to find digital encoder on connector */ | |
413 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
414 | if (!encoder) | |
415 | return 0; | |
416 | ||
417 | radeon_encoder = to_radeon_encoder(encoder); | |
418 | ||
419 | if (radeon_encoder->underscan_hborder != val) { | |
420 | radeon_encoder->underscan_hborder = val; | |
421 | radeon_property_change_mode(&radeon_encoder->base); | |
422 | } | |
423 | } | |
424 | ||
425 | if (property == rdev->mode_info.underscan_vborder_property) { | |
426 | /* need to find digital encoder on connector */ | |
427 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
428 | if (!encoder) | |
429 | return 0; | |
430 | ||
431 | radeon_encoder = to_radeon_encoder(encoder); | |
432 | ||
433 | if (radeon_encoder->underscan_vborder != val) { | |
434 | radeon_encoder->underscan_vborder = val; | |
435 | radeon_property_change_mode(&radeon_encoder->base); | |
436 | } | |
437 | } | |
438 | ||
445282db DA |
439 | if (property == rdev->mode_info.tv_std_property) { |
440 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC); | |
441 | if (!encoder) { | |
442 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC); | |
443 | } | |
444 | ||
445 | if (!encoder) | |
446 | return 0; | |
447 | ||
448 | radeon_encoder = to_radeon_encoder(encoder); | |
449 | if (!radeon_encoder->enc_priv) | |
450 | return 0; | |
643acacf | 451 | if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) { |
445282db DA |
452 | struct radeon_encoder_atom_dac *dac_int; |
453 | dac_int = radeon_encoder->enc_priv; | |
454 | dac_int->tv_std = val; | |
455 | } else { | |
456 | struct radeon_encoder_tv_dac *dac_int; | |
457 | dac_int = radeon_encoder->enc_priv; | |
458 | dac_int->tv_std = val; | |
459 | } | |
460 | radeon_property_change_mode(&radeon_encoder->base); | |
461 | } | |
462 | ||
463 | if (property == rdev->mode_info.load_detect_property) { | |
464 | struct radeon_connector *radeon_connector = | |
465 | to_radeon_connector(connector); | |
466 | ||
467 | if (val == 0) | |
468 | radeon_connector->dac_load_detect = false; | |
469 | else | |
470 | radeon_connector->dac_load_detect = true; | |
471 | } | |
472 | ||
473 | if (property == rdev->mode_info.tmds_pll_property) { | |
474 | struct radeon_encoder_int_tmds *tmds = NULL; | |
475 | bool ret = false; | |
476 | /* need to find digital encoder on connector */ | |
477 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
478 | if (!encoder) | |
479 | return 0; | |
480 | ||
481 | radeon_encoder = to_radeon_encoder(encoder); | |
482 | ||
483 | tmds = radeon_encoder->enc_priv; | |
484 | if (!tmds) | |
485 | return 0; | |
486 | ||
487 | if (val == 0) { | |
488 | if (rdev->is_atom_bios) | |
489 | ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds); | |
490 | else | |
491 | ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds); | |
492 | } | |
493 | if (val == 1 || ret == false) { | |
494 | radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds); | |
495 | } | |
496 | radeon_property_change_mode(&radeon_encoder->base); | |
497 | } | |
498 | ||
771fe6b9 JG |
499 | return 0; |
500 | } | |
501 | ||
8dfaa8a7 MD |
502 | static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder, |
503 | struct drm_connector *connector) | |
504 | { | |
505 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
de2103e4 | 506 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
13bb9430 MG |
507 | struct drm_display_mode *t, *mode; |
508 | ||
509 | /* If the EDID preferred mode doesn't match the native mode, use it */ | |
510 | list_for_each_entry_safe(mode, t, &connector->probed_modes, head) { | |
511 | if (mode->type & DRM_MODE_TYPE_PREFERRED) { | |
512 | if (mode->hdisplay != native_mode->hdisplay || | |
513 | mode->vdisplay != native_mode->vdisplay) | |
514 | memcpy(native_mode, mode, sizeof(*mode)); | |
515 | } | |
516 | } | |
8dfaa8a7 MD |
517 | |
518 | /* Try to get native mode details from EDID if necessary */ | |
de2103e4 | 519 | if (!native_mode->clock) { |
8dfaa8a7 | 520 | list_for_each_entry_safe(mode, t, &connector->probed_modes, head) { |
de2103e4 AD |
521 | if (mode->hdisplay == native_mode->hdisplay && |
522 | mode->vdisplay == native_mode->vdisplay) { | |
523 | *native_mode = *mode; | |
524 | drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V); | |
c5d46b4e | 525 | DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n"); |
8dfaa8a7 MD |
526 | break; |
527 | } | |
528 | } | |
529 | } | |
13bb9430 | 530 | |
de2103e4 | 531 | if (!native_mode->clock) { |
c5d46b4e | 532 | DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n"); |
8dfaa8a7 MD |
533 | radeon_encoder->rmx_type = RMX_OFF; |
534 | } | |
535 | } | |
771fe6b9 JG |
536 | |
537 | static int radeon_lvds_get_modes(struct drm_connector *connector) | |
538 | { | |
539 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
540 | struct drm_encoder *encoder; | |
541 | int ret = 0; | |
542 | struct drm_display_mode *mode; | |
543 | ||
544 | if (radeon_connector->ddc_bus) { | |
545 | ret = radeon_ddc_get_modes(radeon_connector); | |
546 | if (ret > 0) { | |
7747b713 | 547 | encoder = radeon_best_single_encoder(connector); |
8dfaa8a7 MD |
548 | if (encoder) { |
549 | radeon_fixup_lvds_native_mode(encoder, connector); | |
7747b713 AD |
550 | /* add scaled modes */ |
551 | radeon_add_common_modes(encoder, connector); | |
8dfaa8a7 | 552 | } |
771fe6b9 JG |
553 | return ret; |
554 | } | |
555 | } | |
556 | ||
557 | encoder = radeon_best_single_encoder(connector); | |
558 | if (!encoder) | |
559 | return 0; | |
560 | ||
561 | /* we have no EDID modes */ | |
562 | mode = radeon_fp_native_mode(encoder); | |
563 | if (mode) { | |
564 | ret = 1; | |
565 | drm_mode_probed_add(connector, mode); | |
7a868e18 AD |
566 | /* add the width/height from vbios tables if available */ |
567 | connector->display_info.width_mm = mode->width_mm; | |
568 | connector->display_info.height_mm = mode->height_mm; | |
7747b713 AD |
569 | /* add scaled modes */ |
570 | radeon_add_common_modes(encoder, connector); | |
771fe6b9 | 571 | } |
923f6848 | 572 | |
771fe6b9 JG |
573 | return ret; |
574 | } | |
575 | ||
576 | static int radeon_lvds_mode_valid(struct drm_connector *connector, | |
577 | struct drm_display_mode *mode) | |
578 | { | |
a3fa6320 AD |
579 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
580 | ||
581 | if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) | |
582 | return MODE_PANEL; | |
583 | ||
584 | if (encoder) { | |
585 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
586 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | |
587 | ||
588 | /* AVIVO hardware supports downscaling modes larger than the panel | |
589 | * to the panel size, but I'm not sure this is desirable. | |
590 | */ | |
591 | if ((mode->hdisplay > native_mode->hdisplay) || | |
592 | (mode->vdisplay > native_mode->vdisplay)) | |
593 | return MODE_PANEL; | |
594 | ||
595 | /* if scaling is disabled, block non-native modes */ | |
596 | if (radeon_encoder->rmx_type == RMX_OFF) { | |
597 | if ((mode->hdisplay != native_mode->hdisplay) || | |
598 | (mode->vdisplay != native_mode->vdisplay)) | |
599 | return MODE_PANEL; | |
600 | } | |
601 | } | |
602 | ||
771fe6b9 JG |
603 | return MODE_OK; |
604 | } | |
605 | ||
7b334fcb | 606 | static enum drm_connector_status |
930a9e28 | 607 | radeon_lvds_detect(struct drm_connector *connector, bool force) |
771fe6b9 | 608 | { |
0549a061 | 609 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
2ffb8429 | 610 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
0549a061 | 611 | enum drm_connector_status ret = connector_status_disconnected; |
2ffb8429 AD |
612 | |
613 | if (encoder) { | |
614 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
de2103e4 | 615 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
2ffb8429 AD |
616 | |
617 | /* check if panel is valid */ | |
de2103e4 | 618 | if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) |
2ffb8429 AD |
619 | ret = connector_status_connected; |
620 | ||
621 | } | |
0549a061 AD |
622 | |
623 | /* check for edid as well */ | |
0294cf4f AD |
624 | if (radeon_connector->edid) |
625 | ret = connector_status_connected; | |
626 | else { | |
627 | if (radeon_connector->ddc_bus) { | |
0294cf4f AD |
628 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, |
629 | &radeon_connector->ddc_bus->adapter); | |
0294cf4f AD |
630 | if (radeon_connector->edid) |
631 | ret = connector_status_connected; | |
632 | } | |
0549a061 | 633 | } |
771fe6b9 | 634 | /* check acpi lid status ??? */ |
2ffb8429 | 635 | |
771fe6b9 JG |
636 | radeon_connector_update_scratch_regs(connector, ret); |
637 | return ret; | |
638 | } | |
639 | ||
640 | static void radeon_connector_destroy(struct drm_connector *connector) | |
641 | { | |
642 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
643 | ||
0294cf4f AD |
644 | if (radeon_connector->edid) |
645 | kfree(radeon_connector->edid); | |
771fe6b9 JG |
646 | kfree(radeon_connector->con_priv); |
647 | drm_sysfs_connector_remove(connector); | |
648 | drm_connector_cleanup(connector); | |
649 | kfree(connector); | |
650 | } | |
651 | ||
445282db DA |
652 | static int radeon_lvds_set_property(struct drm_connector *connector, |
653 | struct drm_property *property, | |
654 | uint64_t value) | |
655 | { | |
656 | struct drm_device *dev = connector->dev; | |
657 | struct radeon_encoder *radeon_encoder; | |
658 | enum radeon_rmx_type rmx_type; | |
659 | ||
d9fdaafb | 660 | DRM_DEBUG_KMS("\n"); |
445282db DA |
661 | if (property != dev->mode_config.scaling_mode_property) |
662 | return 0; | |
663 | ||
664 | if (connector->encoder) | |
665 | radeon_encoder = to_radeon_encoder(connector->encoder); | |
666 | else { | |
667 | struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; | |
668 | radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector)); | |
669 | } | |
670 | ||
671 | switch (value) { | |
672 | case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break; | |
673 | case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break; | |
674 | case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break; | |
675 | default: | |
676 | case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break; | |
677 | } | |
678 | if (radeon_encoder->rmx_type == rmx_type) | |
679 | return 0; | |
680 | ||
681 | radeon_encoder->rmx_type = rmx_type; | |
682 | ||
683 | radeon_property_change_mode(&radeon_encoder->base); | |
684 | return 0; | |
685 | } | |
686 | ||
687 | ||
771fe6b9 JG |
688 | struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = { |
689 | .get_modes = radeon_lvds_get_modes, | |
690 | .mode_valid = radeon_lvds_mode_valid, | |
691 | .best_encoder = radeon_best_single_encoder, | |
692 | }; | |
693 | ||
694 | struct drm_connector_funcs radeon_lvds_connector_funcs = { | |
695 | .dpms = drm_helper_connector_dpms, | |
696 | .detect = radeon_lvds_detect, | |
697 | .fill_modes = drm_helper_probe_single_connector_modes, | |
698 | .destroy = radeon_connector_destroy, | |
445282db | 699 | .set_property = radeon_lvds_set_property, |
771fe6b9 JG |
700 | }; |
701 | ||
702 | static int radeon_vga_get_modes(struct drm_connector *connector) | |
703 | { | |
704 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
705 | int ret; | |
706 | ||
707 | ret = radeon_ddc_get_modes(radeon_connector); | |
708 | ||
709 | return ret; | |
710 | } | |
711 | ||
712 | static int radeon_vga_mode_valid(struct drm_connector *connector, | |
713 | struct drm_display_mode *mode) | |
714 | { | |
b20f9bef AD |
715 | struct drm_device *dev = connector->dev; |
716 | struct radeon_device *rdev = dev->dev_private; | |
717 | ||
a3fa6320 | 718 | /* XXX check mode bandwidth */ |
b20f9bef AD |
719 | |
720 | if ((mode->clock / 10) > rdev->clock.max_pixel_clock) | |
721 | return MODE_CLOCK_HIGH; | |
722 | ||
771fe6b9 JG |
723 | return MODE_OK; |
724 | } | |
725 | ||
7b334fcb | 726 | static enum drm_connector_status |
930a9e28 | 727 | radeon_vga_detect(struct drm_connector *connector, bool force) |
771fe6b9 | 728 | { |
fafcf94e AD |
729 | struct drm_device *dev = connector->dev; |
730 | struct radeon_device *rdev = dev->dev_private; | |
771fe6b9 JG |
731 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
732 | struct drm_encoder *encoder; | |
733 | struct drm_encoder_helper_funcs *encoder_funcs; | |
4b9d2a21 | 734 | bool dret = false; |
771fe6b9 JG |
735 | enum drm_connector_status ret = connector_status_disconnected; |
736 | ||
4ce001ab DA |
737 | encoder = radeon_best_single_encoder(connector); |
738 | if (!encoder) | |
739 | ret = connector_status_disconnected; | |
740 | ||
eb6b6d7c | 741 | if (radeon_connector->ddc_bus) |
bc1c4dc3 | 742 | dret = radeon_ddc_probe(radeon_connector); |
0294cf4f | 743 | if (dret) { |
d0d0a225 | 744 | radeon_connector->detected_by_load = false; |
0294cf4f AD |
745 | if (radeon_connector->edid) { |
746 | kfree(radeon_connector->edid); | |
747 | radeon_connector->edid = NULL; | |
748 | } | |
0294cf4f | 749 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); |
0294cf4f AD |
750 | |
751 | if (!radeon_connector->edid) { | |
f82f5f3a JG |
752 | DRM_ERROR("%s: probed a monitor but no|invalid EDID\n", |
753 | drm_get_connector_name(connector)); | |
754 | ret = connector_status_connected; | |
0294cf4f AD |
755 | } else { |
756 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | |
757 | ||
758 | /* some oems have boards with separate digital and analog connectors | |
759 | * with a shared ddc line (often vga + hdmi) | |
760 | */ | |
761 | if (radeon_connector->use_digital && radeon_connector->shared_ddc) { | |
762 | kfree(radeon_connector->edid); | |
763 | radeon_connector->edid = NULL; | |
764 | ret = connector_status_disconnected; | |
765 | } else | |
766 | ret = connector_status_connected; | |
767 | } | |
768 | } else { | |
c3cceedd DA |
769 | |
770 | /* if we aren't forcing don't do destructive polling */ | |
d0d0a225 AD |
771 | if (!force) { |
772 | /* only return the previous status if we last | |
773 | * detected a monitor via load. | |
774 | */ | |
775 | if (radeon_connector->detected_by_load) | |
776 | return connector->status; | |
777 | else | |
778 | return ret; | |
779 | } | |
c3cceedd | 780 | |
d8a7f792 | 781 | if (radeon_connector->dac_load_detect && encoder) { |
445282db DA |
782 | encoder_funcs = encoder->helper_private; |
783 | ret = encoder_funcs->detect(encoder, connector); | |
34076446 | 784 | if (ret != connector_status_disconnected) |
d0d0a225 | 785 | radeon_connector->detected_by_load = true; |
445282db | 786 | } |
771fe6b9 JG |
787 | } |
788 | ||
4ce001ab DA |
789 | if (ret == connector_status_connected) |
790 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true); | |
fafcf94e AD |
791 | |
792 | /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the | |
793 | * vbios to deal with KVMs. If we have one and are not able to detect a monitor | |
794 | * by other means, assume the CRT is connected and use that EDID. | |
795 | */ | |
796 | if ((!rdev->is_atom_bios) && | |
797 | (ret == connector_status_disconnected) && | |
798 | rdev->mode_info.bios_hardcoded_edid_size) { | |
799 | ret = connector_status_connected; | |
800 | } | |
801 | ||
771fe6b9 JG |
802 | radeon_connector_update_scratch_regs(connector, ret); |
803 | return ret; | |
804 | } | |
805 | ||
806 | struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = { | |
807 | .get_modes = radeon_vga_get_modes, | |
808 | .mode_valid = radeon_vga_mode_valid, | |
809 | .best_encoder = radeon_best_single_encoder, | |
810 | }; | |
811 | ||
812 | struct drm_connector_funcs radeon_vga_connector_funcs = { | |
813 | .dpms = drm_helper_connector_dpms, | |
814 | .detect = radeon_vga_detect, | |
815 | .fill_modes = drm_helper_probe_single_connector_modes, | |
816 | .destroy = radeon_connector_destroy, | |
817 | .set_property = radeon_connector_set_property, | |
818 | }; | |
819 | ||
4ce001ab DA |
820 | static int radeon_tv_get_modes(struct drm_connector *connector) |
821 | { | |
822 | struct drm_device *dev = connector->dev; | |
923f6848 | 823 | struct radeon_device *rdev = dev->dev_private; |
4ce001ab | 824 | struct drm_display_mode *tv_mode; |
923f6848 | 825 | struct drm_encoder *encoder; |
4ce001ab | 826 | |
923f6848 AD |
827 | encoder = radeon_best_single_encoder(connector); |
828 | if (!encoder) | |
829 | return 0; | |
4ce001ab | 830 | |
923f6848 AD |
831 | /* avivo chips can scale any mode */ |
832 | if (rdev->family >= CHIP_RS600) | |
833 | /* add scaled modes */ | |
834 | radeon_add_common_modes(encoder, connector); | |
835 | else { | |
836 | /* only 800x600 is supported right now on pre-avivo chips */ | |
d50ba256 | 837 | tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false); |
923f6848 AD |
838 | tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; |
839 | drm_mode_probed_add(connector, tv_mode); | |
840 | } | |
4ce001ab DA |
841 | return 1; |
842 | } | |
843 | ||
844 | static int radeon_tv_mode_valid(struct drm_connector *connector, | |
845 | struct drm_display_mode *mode) | |
846 | { | |
a3fa6320 AD |
847 | if ((mode->hdisplay > 1024) || (mode->vdisplay > 768)) |
848 | return MODE_CLOCK_RANGE; | |
4ce001ab DA |
849 | return MODE_OK; |
850 | } | |
851 | ||
7b334fcb | 852 | static enum drm_connector_status |
930a9e28 | 853 | radeon_tv_detect(struct drm_connector *connector, bool force) |
4ce001ab DA |
854 | { |
855 | struct drm_encoder *encoder; | |
856 | struct drm_encoder_helper_funcs *encoder_funcs; | |
445282db DA |
857 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
858 | enum drm_connector_status ret = connector_status_disconnected; | |
859 | ||
860 | if (!radeon_connector->dac_load_detect) | |
861 | return ret; | |
4ce001ab DA |
862 | |
863 | encoder = radeon_best_single_encoder(connector); | |
864 | if (!encoder) | |
865 | ret = connector_status_disconnected; | |
866 | else { | |
867 | encoder_funcs = encoder->helper_private; | |
868 | ret = encoder_funcs->detect(encoder, connector); | |
869 | } | |
870 | if (ret == connector_status_connected) | |
871 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false); | |
872 | radeon_connector_update_scratch_regs(connector, ret); | |
873 | return ret; | |
874 | } | |
875 | ||
876 | struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = { | |
877 | .get_modes = radeon_tv_get_modes, | |
878 | .mode_valid = radeon_tv_mode_valid, | |
879 | .best_encoder = radeon_best_single_encoder, | |
880 | }; | |
881 | ||
882 | struct drm_connector_funcs radeon_tv_connector_funcs = { | |
883 | .dpms = drm_helper_connector_dpms, | |
884 | .detect = radeon_tv_detect, | |
885 | .fill_modes = drm_helper_probe_single_connector_modes, | |
886 | .destroy = radeon_connector_destroy, | |
887 | .set_property = radeon_connector_set_property, | |
888 | }; | |
889 | ||
771fe6b9 JG |
890 | static int radeon_dvi_get_modes(struct drm_connector *connector) |
891 | { | |
892 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
893 | int ret; | |
894 | ||
895 | ret = radeon_ddc_get_modes(radeon_connector); | |
771fe6b9 JG |
896 | return ret; |
897 | } | |
898 | ||
11fe1266 TU |
899 | static bool radeon_check_hpd_status_unchanged(struct drm_connector *connector) |
900 | { | |
901 | struct drm_device *dev = connector->dev; | |
902 | struct radeon_device *rdev = dev->dev_private; | |
903 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
904 | enum drm_connector_status status; | |
905 | ||
906 | /* We only trust HPD on R600 and newer ASICS. */ | |
907 | if (rdev->family >= CHIP_R600 | |
908 | && radeon_connector->hpd.hpd != RADEON_HPD_NONE) { | |
909 | if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) | |
910 | status = connector_status_connected; | |
911 | else | |
912 | status = connector_status_disconnected; | |
913 | if (connector->status == status) | |
914 | return true; | |
915 | } | |
916 | ||
917 | return false; | |
918 | } | |
919 | ||
4ce001ab DA |
920 | /* |
921 | * DVI is complicated | |
922 | * Do a DDC probe, if DDC probe passes, get the full EDID so | |
923 | * we can do analog/digital monitor detection at this point. | |
924 | * If the monitor is an analog monitor or we got no DDC, | |
925 | * we need to find the DAC encoder object for this connector. | |
926 | * If we got no DDC, we do load detection on the DAC encoder object. | |
927 | * If we got analog DDC or load detection passes on the DAC encoder | |
928 | * we have to check if this analog encoder is shared with anyone else (TV) | |
929 | * if its shared we have to set the other connector to disconnected. | |
930 | */ | |
7b334fcb | 931 | static enum drm_connector_status |
930a9e28 | 932 | radeon_dvi_detect(struct drm_connector *connector, bool force) |
771fe6b9 | 933 | { |
fafcf94e AD |
934 | struct drm_device *dev = connector->dev; |
935 | struct radeon_device *rdev = dev->dev_private; | |
771fe6b9 | 936 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
4ce001ab | 937 | struct drm_encoder *encoder = NULL; |
771fe6b9 JG |
938 | struct drm_encoder_helper_funcs *encoder_funcs; |
939 | struct drm_mode_object *obj; | |
940 | int i; | |
941 | enum drm_connector_status ret = connector_status_disconnected; | |
4b9d2a21 | 942 | bool dret = false; |
771fe6b9 | 943 | |
11fe1266 TU |
944 | if (!force && radeon_check_hpd_status_unchanged(connector)) |
945 | return connector->status; | |
946 | ||
eb6b6d7c | 947 | if (radeon_connector->ddc_bus) |
bc1c4dc3 | 948 | dret = radeon_ddc_probe(radeon_connector); |
4ce001ab | 949 | if (dret) { |
d0d0a225 | 950 | radeon_connector->detected_by_load = false; |
0294cf4f AD |
951 | if (radeon_connector->edid) { |
952 | kfree(radeon_connector->edid); | |
953 | radeon_connector->edid = NULL; | |
954 | } | |
4ce001ab | 955 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); |
4ce001ab DA |
956 | |
957 | if (!radeon_connector->edid) { | |
f82f5f3a JG |
958 | DRM_ERROR("%s: probed a monitor but no|invalid EDID\n", |
959 | drm_get_connector_name(connector)); | |
4a9a8b71 DA |
960 | /* rs690 seems to have a problem with connectors not existing and always |
961 | * return a block of 0's. If we see this just stop polling on this output */ | |
962 | if ((rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) && radeon_connector->base.null_edid_counter) { | |
963 | ret = connector_status_disconnected; | |
964 | DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n", drm_get_connector_name(connector)); | |
965 | radeon_connector->ddc_bus = NULL; | |
966 | } | |
4ce001ab DA |
967 | } else { |
968 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | |
969 | ||
0294cf4f AD |
970 | /* some oems have boards with separate digital and analog connectors |
971 | * with a shared ddc line (often vga + hdmi) | |
972 | */ | |
973 | if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) { | |
974 | kfree(radeon_connector->edid); | |
975 | radeon_connector->edid = NULL; | |
976 | ret = connector_status_disconnected; | |
977 | } else | |
978 | ret = connector_status_connected; | |
71407c46 | 979 | |
42f14c4b AD |
980 | /* This gets complicated. We have boards with VGA + HDMI with a |
981 | * shared DDC line and we have boards with DVI-D + HDMI with a shared | |
982 | * DDC line. The latter is more complex because with DVI<->HDMI adapters | |
983 | * you don't really know what's connected to which port as both are digital. | |
71407c46 | 984 | */ |
d3932d6c | 985 | if (radeon_connector->shared_ddc && (ret == connector_status_connected)) { |
71407c46 AD |
986 | struct drm_connector *list_connector; |
987 | struct radeon_connector *list_radeon_connector; | |
988 | list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) { | |
989 | if (connector == list_connector) | |
990 | continue; | |
991 | list_radeon_connector = to_radeon_connector(list_connector); | |
b2ea4aa6 AD |
992 | if (list_radeon_connector->shared_ddc && |
993 | (list_radeon_connector->ddc_bus->rec.i2c_id == | |
994 | radeon_connector->ddc_bus->rec.i2c_id)) { | |
42f14c4b AD |
995 | /* cases where both connectors are digital */ |
996 | if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) { | |
997 | /* hpd is our only option in this case */ | |
998 | if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { | |
71407c46 AD |
999 | kfree(radeon_connector->edid); |
1000 | radeon_connector->edid = NULL; | |
1001 | ret = connector_status_disconnected; | |
1002 | } | |
1003 | } | |
1004 | } | |
1005 | } | |
1006 | } | |
4ce001ab DA |
1007 | } |
1008 | } | |
1009 | ||
1010 | if ((ret == connector_status_connected) && (radeon_connector->use_digital == true)) | |
1011 | goto out; | |
1012 | ||
5f0a2612 AD |
1013 | /* DVI-D and HDMI-A are digital only */ |
1014 | if ((connector->connector_type == DRM_MODE_CONNECTOR_DVID) || | |
1015 | (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA)) | |
1016 | goto out; | |
1017 | ||
d0d0a225 | 1018 | /* if we aren't forcing don't do destructive polling */ |
c3cceedd | 1019 | if (!force) { |
d0d0a225 AD |
1020 | /* only return the previous status if we last |
1021 | * detected a monitor via load. | |
1022 | */ | |
1023 | if (radeon_connector->detected_by_load) | |
1024 | ret = connector->status; | |
c3cceedd DA |
1025 | goto out; |
1026 | } | |
1027 | ||
4ce001ab | 1028 | /* find analog encoder */ |
445282db DA |
1029 | if (radeon_connector->dac_load_detect) { |
1030 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
1031 | if (connector->encoder_ids[i] == 0) | |
1032 | break; | |
771fe6b9 | 1033 | |
445282db DA |
1034 | obj = drm_mode_object_find(connector->dev, |
1035 | connector->encoder_ids[i], | |
1036 | DRM_MODE_OBJECT_ENCODER); | |
1037 | if (!obj) | |
1038 | continue; | |
771fe6b9 | 1039 | |
445282db | 1040 | encoder = obj_to_encoder(obj); |
771fe6b9 | 1041 | |
e3632507 | 1042 | if (encoder->encoder_type != DRM_MODE_ENCODER_DAC && |
e00e8b5e AD |
1043 | encoder->encoder_type != DRM_MODE_ENCODER_TVDAC) |
1044 | continue; | |
1045 | ||
445282db DA |
1046 | encoder_funcs = encoder->helper_private; |
1047 | if (encoder_funcs->detect) { | |
1048 | if (ret != connector_status_connected) { | |
1049 | ret = encoder_funcs->detect(encoder, connector); | |
1050 | if (ret == connector_status_connected) { | |
1051 | radeon_connector->use_digital = false; | |
1052 | } | |
34076446 JG |
1053 | if (ret != connector_status_disconnected) |
1054 | radeon_connector->detected_by_load = true; | |
771fe6b9 | 1055 | } |
445282db | 1056 | break; |
771fe6b9 JG |
1057 | } |
1058 | } | |
1059 | } | |
1060 | ||
4ce001ab DA |
1061 | if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) && |
1062 | encoder) { | |
1063 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true); | |
1064 | } | |
1065 | ||
fafcf94e AD |
1066 | /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the |
1067 | * vbios to deal with KVMs. If we have one and are not able to detect a monitor | |
1068 | * by other means, assume the DFP is connected and use that EDID. In most | |
1069 | * cases the DVI port is actually a virtual KVM port connected to the service | |
1070 | * processor. | |
1071 | */ | |
a09d431f | 1072 | out: |
fafcf94e AD |
1073 | if ((!rdev->is_atom_bios) && |
1074 | (ret == connector_status_disconnected) && | |
1075 | rdev->mode_info.bios_hardcoded_edid_size) { | |
1076 | radeon_connector->use_digital = true; | |
1077 | ret = connector_status_connected; | |
1078 | } | |
1079 | ||
771fe6b9 JG |
1080 | /* updated in get modes as well since we need to know if it's analog or digital */ |
1081 | radeon_connector_update_scratch_regs(connector, ret); | |
1082 | return ret; | |
1083 | } | |
1084 | ||
1085 | /* okay need to be smart in here about which encoder to pick */ | |
1086 | struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector) | |
1087 | { | |
1088 | int enc_id = connector->encoder_ids[0]; | |
1089 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1090 | struct drm_mode_object *obj; | |
1091 | struct drm_encoder *encoder; | |
1092 | int i; | |
1093 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
1094 | if (connector->encoder_ids[i] == 0) | |
1095 | break; | |
1096 | ||
1097 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
1098 | if (!obj) | |
1099 | continue; | |
1100 | ||
1101 | encoder = obj_to_encoder(obj); | |
1102 | ||
4ce001ab | 1103 | if (radeon_connector->use_digital == true) { |
771fe6b9 JG |
1104 | if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS) |
1105 | return encoder; | |
1106 | } else { | |
1107 | if (encoder->encoder_type == DRM_MODE_ENCODER_DAC || | |
1108 | encoder->encoder_type == DRM_MODE_ENCODER_TVDAC) | |
1109 | return encoder; | |
1110 | } | |
1111 | } | |
1112 | ||
1113 | /* see if we have a default encoder TODO */ | |
1114 | ||
1115 | /* then check use digitial */ | |
1116 | /* pick the first one */ | |
1117 | if (enc_id) { | |
1118 | obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER); | |
1119 | if (!obj) | |
1120 | return NULL; | |
1121 | encoder = obj_to_encoder(obj); | |
1122 | return encoder; | |
1123 | } | |
1124 | return NULL; | |
1125 | } | |
1126 | ||
d50ba256 DA |
1127 | static void radeon_dvi_force(struct drm_connector *connector) |
1128 | { | |
1129 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1130 | if (connector->force == DRM_FORCE_ON) | |
1131 | radeon_connector->use_digital = false; | |
1132 | if (connector->force == DRM_FORCE_ON_DIGITAL) | |
1133 | radeon_connector->use_digital = true; | |
1134 | } | |
1135 | ||
a3fa6320 AD |
1136 | static int radeon_dvi_mode_valid(struct drm_connector *connector, |
1137 | struct drm_display_mode *mode) | |
1138 | { | |
1b24203e AD |
1139 | struct drm_device *dev = connector->dev; |
1140 | struct radeon_device *rdev = dev->dev_private; | |
a3fa6320 AD |
1141 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
1142 | ||
1143 | /* XXX check mode bandwidth */ | |
1144 | ||
1b24203e AD |
1145 | /* clocks over 135 MHz have heat issues with DVI on RV100 */ |
1146 | if (radeon_connector->use_digital && | |
1147 | (rdev->family == CHIP_RV100) && | |
1148 | (mode->clock > 135000)) | |
1149 | return MODE_CLOCK_HIGH; | |
1150 | ||
a3fa6320 AD |
1151 | if (radeon_connector->use_digital && (mode->clock > 165000)) { |
1152 | if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) || | |
1153 | (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) || | |
1154 | (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B)) | |
1155 | return MODE_OK; | |
e1e84017 | 1156 | else if (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_A) { |
1b2681ba | 1157 | if (ASIC_IS_DCE6(rdev)) { |
e1e84017 AD |
1158 | /* HDMI 1.3+ supports max clock of 340 Mhz */ |
1159 | if (mode->clock > 340000) | |
1160 | return MODE_CLOCK_HIGH; | |
1161 | else | |
1162 | return MODE_OK; | |
1163 | } else | |
1164 | return MODE_CLOCK_HIGH; | |
1165 | } else | |
a3fa6320 AD |
1166 | return MODE_CLOCK_HIGH; |
1167 | } | |
b20f9bef AD |
1168 | |
1169 | /* check against the max pixel clock */ | |
1170 | if ((mode->clock / 10) > rdev->clock.max_pixel_clock) | |
1171 | return MODE_CLOCK_HIGH; | |
1172 | ||
a3fa6320 AD |
1173 | return MODE_OK; |
1174 | } | |
1175 | ||
771fe6b9 JG |
1176 | struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = { |
1177 | .get_modes = radeon_dvi_get_modes, | |
a3fa6320 | 1178 | .mode_valid = radeon_dvi_mode_valid, |
771fe6b9 JG |
1179 | .best_encoder = radeon_dvi_encoder, |
1180 | }; | |
1181 | ||
1182 | struct drm_connector_funcs radeon_dvi_connector_funcs = { | |
1183 | .dpms = drm_helper_connector_dpms, | |
1184 | .detect = radeon_dvi_detect, | |
1185 | .fill_modes = drm_helper_probe_single_connector_modes, | |
1186 | .set_property = radeon_connector_set_property, | |
1187 | .destroy = radeon_connector_destroy, | |
d50ba256 | 1188 | .force = radeon_dvi_force, |
771fe6b9 JG |
1189 | }; |
1190 | ||
ffd09c64 AD |
1191 | static void radeon_dp_connector_destroy(struct drm_connector *connector) |
1192 | { | |
1193 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1194 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; | |
1195 | ||
ffd09c64 AD |
1196 | if (radeon_connector->edid) |
1197 | kfree(radeon_connector->edid); | |
1198 | if (radeon_dig_connector->dp_i2c_bus) | |
ac1aade6 | 1199 | radeon_i2c_destroy(radeon_dig_connector->dp_i2c_bus); |
ffd09c64 AD |
1200 | kfree(radeon_connector->con_priv); |
1201 | drm_sysfs_connector_remove(connector); | |
1202 | drm_connector_cleanup(connector); | |
1203 | kfree(connector); | |
1204 | } | |
1205 | ||
746c1aa4 DA |
1206 | static int radeon_dp_get_modes(struct drm_connector *connector) |
1207 | { | |
1208 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
8b834852 | 1209 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; |
591a10e1 | 1210 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
746c1aa4 DA |
1211 | int ret; |
1212 | ||
f89931f3 AD |
1213 | if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) || |
1214 | (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) { | |
d291767b AD |
1215 | struct drm_display_mode *mode; |
1216 | ||
2b69ffb9 AD |
1217 | if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { |
1218 | if (!radeon_dig_connector->edp_on) | |
1219 | atombios_set_edp_panel_power(connector, | |
1220 | ATOM_TRANSMITTER_ACTION_POWER_ON); | |
1221 | ret = radeon_ddc_get_modes(radeon_connector); | |
1222 | if (!radeon_dig_connector->edp_on) | |
1223 | atombios_set_edp_panel_power(connector, | |
1224 | ATOM_TRANSMITTER_ACTION_POWER_OFF); | |
1225 | } else { | |
1226 | /* need to setup ddc on the bridge */ | |
1227 | if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) != | |
1228 | ENCODER_OBJECT_ID_NONE) { | |
1229 | if (encoder) | |
1230 | radeon_atom_ext_encoder_setup_ddc(encoder); | |
1231 | } | |
1232 | ret = radeon_ddc_get_modes(radeon_connector); | |
1233 | } | |
d291767b AD |
1234 | |
1235 | if (ret > 0) { | |
d291767b AD |
1236 | if (encoder) { |
1237 | radeon_fixup_lvds_native_mode(encoder, connector); | |
1238 | /* add scaled modes */ | |
1239 | radeon_add_common_modes(encoder, connector); | |
1240 | } | |
1241 | return ret; | |
1242 | } | |
1243 | ||
d291767b AD |
1244 | if (!encoder) |
1245 | return 0; | |
1246 | ||
1247 | /* we have no EDID modes */ | |
1248 | mode = radeon_fp_native_mode(encoder); | |
1249 | if (mode) { | |
1250 | ret = 1; | |
1251 | drm_mode_probed_add(connector, mode); | |
1252 | /* add the width/height from vbios tables if available */ | |
1253 | connector->display_info.width_mm = mode->width_mm; | |
1254 | connector->display_info.height_mm = mode->height_mm; | |
1255 | /* add scaled modes */ | |
1256 | radeon_add_common_modes(encoder, connector); | |
1257 | } | |
591a10e1 AD |
1258 | } else { |
1259 | /* need to setup ddc on the bridge */ | |
1d33e1fc AD |
1260 | if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) != |
1261 | ENCODER_OBJECT_ID_NONE) { | |
591a10e1 AD |
1262 | if (encoder) |
1263 | radeon_atom_ext_encoder_setup_ddc(encoder); | |
1264 | } | |
d291767b | 1265 | ret = radeon_ddc_get_modes(radeon_connector); |
591a10e1 | 1266 | } |
8b834852 | 1267 | |
746c1aa4 DA |
1268 | return ret; |
1269 | } | |
1270 | ||
1d33e1fc | 1271 | u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector) |
d7fa8bb3 AD |
1272 | { |
1273 | struct drm_mode_object *obj; | |
1274 | struct drm_encoder *encoder; | |
1275 | struct radeon_encoder *radeon_encoder; | |
1276 | int i; | |
d7fa8bb3 AD |
1277 | |
1278 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
1279 | if (connector->encoder_ids[i] == 0) | |
1280 | break; | |
1281 | ||
1282 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
1283 | if (!obj) | |
1284 | continue; | |
1285 | ||
1286 | encoder = obj_to_encoder(obj); | |
1287 | radeon_encoder = to_radeon_encoder(encoder); | |
1288 | ||
1289 | switch (radeon_encoder->encoder_id) { | |
1290 | case ENCODER_OBJECT_ID_TRAVIS: | |
1291 | case ENCODER_OBJECT_ID_NUTMEG: | |
1d33e1fc | 1292 | return radeon_encoder->encoder_id; |
d7fa8bb3 AD |
1293 | default: |
1294 | break; | |
1295 | } | |
1296 | } | |
1297 | ||
1d33e1fc | 1298 | return ENCODER_OBJECT_ID_NONE; |
d7fa8bb3 AD |
1299 | } |
1300 | ||
1301 | bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector) | |
1302 | { | |
1303 | struct drm_mode_object *obj; | |
1304 | struct drm_encoder *encoder; | |
1305 | struct radeon_encoder *radeon_encoder; | |
1306 | int i; | |
1307 | bool found = false; | |
1308 | ||
1309 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
1310 | if (connector->encoder_ids[i] == 0) | |
1311 | break; | |
1312 | ||
1313 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
1314 | if (!obj) | |
1315 | continue; | |
1316 | ||
1317 | encoder = obj_to_encoder(obj); | |
1318 | radeon_encoder = to_radeon_encoder(encoder); | |
1319 | if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2) | |
1320 | found = true; | |
1321 | } | |
1322 | ||
1323 | return found; | |
1324 | } | |
1325 | ||
1326 | bool radeon_connector_is_dp12_capable(struct drm_connector *connector) | |
1327 | { | |
1328 | struct drm_device *dev = connector->dev; | |
1329 | struct radeon_device *rdev = dev->dev_private; | |
1330 | ||
1331 | if (ASIC_IS_DCE5(rdev) && | |
1332 | (rdev->clock.dp_extclk >= 53900) && | |
1333 | radeon_connector_encoder_is_hbr2(connector)) { | |
1334 | return true; | |
1335 | } | |
1336 | ||
1337 | return false; | |
1338 | } | |
1339 | ||
7b334fcb | 1340 | static enum drm_connector_status |
930a9e28 | 1341 | radeon_dp_detect(struct drm_connector *connector, bool force) |
746c1aa4 | 1342 | { |
f8d0edde AD |
1343 | struct drm_device *dev = connector->dev; |
1344 | struct radeon_device *rdev = dev->dev_private; | |
746c1aa4 | 1345 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
746c1aa4 | 1346 | enum drm_connector_status ret = connector_status_disconnected; |
4143e919 | 1347 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; |
591a10e1 | 1348 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
746c1aa4 | 1349 | |
11fe1266 TU |
1350 | if (!force && radeon_check_hpd_status_unchanged(connector)) |
1351 | return connector->status; | |
1352 | ||
746c1aa4 DA |
1353 | if (radeon_connector->edid) { |
1354 | kfree(radeon_connector->edid); | |
1355 | radeon_connector->edid = NULL; | |
1356 | } | |
1357 | ||
f89931f3 AD |
1358 | if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) || |
1359 | (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) { | |
d291767b AD |
1360 | if (encoder) { |
1361 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
1362 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | |
1363 | ||
1364 | /* check if panel is valid */ | |
1365 | if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) | |
1366 | ret = connector_status_connected; | |
1367 | } | |
6f50eae7 AD |
1368 | /* eDP is always DP */ |
1369 | radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT; | |
8b834852 AD |
1370 | if (!radeon_dig_connector->edp_on) |
1371 | atombios_set_edp_panel_power(connector, | |
1372 | ATOM_TRANSMITTER_ACTION_POWER_ON); | |
6f50eae7 | 1373 | if (radeon_dp_getdpcd(radeon_connector)) |
9fa05c98 | 1374 | ret = connector_status_connected; |
8b834852 AD |
1375 | if (!radeon_dig_connector->edp_on) |
1376 | atombios_set_edp_panel_power(connector, | |
1377 | ATOM_TRANSMITTER_ACTION_POWER_OFF); | |
1d33e1fc AD |
1378 | } else if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) != |
1379 | ENCODER_OBJECT_ID_NONE) { | |
b06947b5 AD |
1380 | /* DP bridges are always DP */ |
1381 | radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT; | |
1382 | /* get the DPCD from the bridge */ | |
1383 | radeon_dp_getdpcd(radeon_connector); | |
1384 | ||
6777a4f6 AD |
1385 | if (encoder) { |
1386 | /* setup ddc on the bridge */ | |
1387 | radeon_atom_ext_encoder_setup_ddc(encoder); | |
bc1c4dc3 | 1388 | if (radeon_ddc_probe(radeon_connector)) /* try DDC */ |
b06947b5 | 1389 | ret = connector_status_connected; |
6777a4f6 AD |
1390 | else if (radeon_connector->dac_load_detect) { /* try load detection */ |
1391 | struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private; | |
b06947b5 AD |
1392 | ret = encoder_funcs->detect(encoder, connector); |
1393 | } | |
591a10e1 | 1394 | } |
b06947b5 | 1395 | } else { |
6f50eae7 | 1396 | radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector); |
f8d0edde AD |
1397 | if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { |
1398 | ret = connector_status_connected; | |
1399 | if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) | |
1400 | radeon_dp_getdpcd(radeon_connector); | |
6f50eae7 | 1401 | } else { |
f8d0edde AD |
1402 | if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) { |
1403 | if (radeon_dp_getdpcd(radeon_connector)) | |
1404 | ret = connector_status_connected; | |
1405 | } else { | |
bc1c4dc3 | 1406 | if (radeon_ddc_probe(radeon_connector)) |
f8d0edde AD |
1407 | ret = connector_status_connected; |
1408 | } | |
4143e919 | 1409 | } |
746c1aa4 | 1410 | } |
4143e919 | 1411 | |
30f44372 | 1412 | radeon_connector_update_scratch_regs(connector, ret); |
746c1aa4 DA |
1413 | return ret; |
1414 | } | |
1415 | ||
5801ead6 AD |
1416 | static int radeon_dp_mode_valid(struct drm_connector *connector, |
1417 | struct drm_display_mode *mode) | |
1418 | { | |
1419 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1420 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; | |
1421 | ||
1422 | /* XXX check mode bandwidth */ | |
1423 | ||
f89931f3 AD |
1424 | if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) || |
1425 | (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) { | |
d291767b AD |
1426 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
1427 | ||
1428 | if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) | |
1429 | return MODE_PANEL; | |
1430 | ||
1431 | if (encoder) { | |
1432 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
1433 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | |
1434 | ||
f89931f3 | 1435 | /* AVIVO hardware supports downscaling modes larger than the panel |
d291767b AD |
1436 | * to the panel size, but I'm not sure this is desirable. |
1437 | */ | |
1438 | if ((mode->hdisplay > native_mode->hdisplay) || | |
1439 | (mode->vdisplay > native_mode->vdisplay)) | |
1440 | return MODE_PANEL; | |
1441 | ||
1442 | /* if scaling is disabled, block non-native modes */ | |
1443 | if (radeon_encoder->rmx_type == RMX_OFF) { | |
1444 | if ((mode->hdisplay != native_mode->hdisplay) || | |
1445 | (mode->vdisplay != native_mode->vdisplay)) | |
1446 | return MODE_PANEL; | |
1447 | } | |
1448 | } | |
5801ead6 | 1449 | return MODE_OK; |
d291767b AD |
1450 | } else { |
1451 | if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || | |
1452 | (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) | |
1453 | return radeon_dp_mode_valid_helper(connector, mode); | |
1454 | else | |
1455 | return MODE_OK; | |
1456 | } | |
5801ead6 AD |
1457 | } |
1458 | ||
746c1aa4 DA |
1459 | struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = { |
1460 | .get_modes = radeon_dp_get_modes, | |
5801ead6 | 1461 | .mode_valid = radeon_dp_mode_valid, |
746c1aa4 DA |
1462 | .best_encoder = radeon_dvi_encoder, |
1463 | }; | |
1464 | ||
1465 | struct drm_connector_funcs radeon_dp_connector_funcs = { | |
1466 | .dpms = drm_helper_connector_dpms, | |
1467 | .detect = radeon_dp_detect, | |
1468 | .fill_modes = drm_helper_probe_single_connector_modes, | |
1469 | .set_property = radeon_connector_set_property, | |
ffd09c64 | 1470 | .destroy = radeon_dp_connector_destroy, |
746c1aa4 DA |
1471 | .force = radeon_dvi_force, |
1472 | }; | |
1473 | ||
771fe6b9 JG |
1474 | void |
1475 | radeon_add_atom_connector(struct drm_device *dev, | |
1476 | uint32_t connector_id, | |
1477 | uint32_t supported_device, | |
1478 | int connector_type, | |
1479 | struct radeon_i2c_bus_rec *i2c_bus, | |
b75fad06 | 1480 | uint32_t igp_lane_info, |
eed45b30 | 1481 | uint16_t connector_object_id, |
26b5bc98 AD |
1482 | struct radeon_hpd *hpd, |
1483 | struct radeon_router *router) | |
771fe6b9 | 1484 | { |
445282db | 1485 | struct radeon_device *rdev = dev->dev_private; |
771fe6b9 JG |
1486 | struct drm_connector *connector; |
1487 | struct radeon_connector *radeon_connector; | |
1488 | struct radeon_connector_atom_dig *radeon_dig_connector; | |
eac4dff6 AD |
1489 | struct drm_encoder *encoder; |
1490 | struct radeon_encoder *radeon_encoder; | |
771fe6b9 | 1491 | uint32_t subpixel_order = SubPixelNone; |
0294cf4f | 1492 | bool shared_ddc = false; |
eac4dff6 | 1493 | bool is_dp_bridge = false; |
771fe6b9 | 1494 | |
4ce001ab | 1495 | if (connector_type == DRM_MODE_CONNECTOR_Unknown) |
771fe6b9 JG |
1496 | return; |
1497 | ||
cf4c12f9 AD |
1498 | /* if the user selected tv=0 don't try and add the connector */ |
1499 | if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) || | |
1500 | (connector_type == DRM_MODE_CONNECTOR_Composite) || | |
1501 | (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) && | |
1502 | (radeon_tv == 0)) | |
1503 | return; | |
1504 | ||
771fe6b9 JG |
1505 | /* see if we already added it */ |
1506 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
1507 | radeon_connector = to_radeon_connector(connector); | |
1508 | if (radeon_connector->connector_id == connector_id) { | |
1509 | radeon_connector->devices |= supported_device; | |
1510 | return; | |
1511 | } | |
0294cf4f | 1512 | if (radeon_connector->ddc_bus && i2c_bus->valid) { |
d3932d6c | 1513 | if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) { |
0294cf4f AD |
1514 | radeon_connector->shared_ddc = true; |
1515 | shared_ddc = true; | |
1516 | } | |
fb939dfc | 1517 | if (radeon_connector->router_bus && router->ddc_valid && |
26b5bc98 AD |
1518 | (radeon_connector->router.router_id == router->router_id)) { |
1519 | radeon_connector->shared_ddc = false; | |
1520 | shared_ddc = false; | |
1521 | } | |
0294cf4f | 1522 | } |
771fe6b9 JG |
1523 | } |
1524 | ||
eac4dff6 AD |
1525 | /* check if it's a dp bridge */ |
1526 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { | |
1527 | radeon_encoder = to_radeon_encoder(encoder); | |
1528 | if (radeon_encoder->devices & supported_device) { | |
1529 | switch (radeon_encoder->encoder_id) { | |
1530 | case ENCODER_OBJECT_ID_TRAVIS: | |
1531 | case ENCODER_OBJECT_ID_NUTMEG: | |
1532 | is_dp_bridge = true; | |
1533 | break; | |
1534 | default: | |
1535 | break; | |
1536 | } | |
1537 | } | |
1538 | } | |
1539 | ||
771fe6b9 JG |
1540 | radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); |
1541 | if (!radeon_connector) | |
1542 | return; | |
1543 | ||
1544 | connector = &radeon_connector->base; | |
1545 | ||
1546 | radeon_connector->connector_id = connector_id; | |
1547 | radeon_connector->devices = supported_device; | |
0294cf4f | 1548 | radeon_connector->shared_ddc = shared_ddc; |
b75fad06 | 1549 | radeon_connector->connector_object_id = connector_object_id; |
eed45b30 | 1550 | radeon_connector->hpd = *hpd; |
bc1c4dc3 | 1551 | |
26b5bc98 | 1552 | radeon_connector->router = *router; |
fb939dfc | 1553 | if (router->ddc_valid || router->cd_valid) { |
26b5bc98 AD |
1554 | radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info); |
1555 | if (!radeon_connector->router_bus) | |
a70882aa | 1556 | DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n"); |
26b5bc98 | 1557 | } |
eac4dff6 AD |
1558 | |
1559 | if (is_dp_bridge) { | |
771fe6b9 JG |
1560 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); |
1561 | if (!radeon_dig_connector) | |
1562 | goto failed; | |
771fe6b9 JG |
1563 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
1564 | radeon_connector->con_priv = radeon_dig_connector; | |
eac4dff6 AD |
1565 | drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); |
1566 | drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); | |
771fe6b9 | 1567 | if (i2c_bus->valid) { |
eac4dff6 AD |
1568 | /* add DP i2c bus */ |
1569 | if (connector_type == DRM_MODE_CONNECTOR_eDP) | |
1570 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch"); | |
1571 | else | |
1572 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch"); | |
1573 | if (!radeon_dig_connector->dp_i2c_bus) | |
1574 | DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n"); | |
f376b94f | 1575 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1576 | if (!radeon_connector->ddc_bus) |
eac4dff6 | 1577 | DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 1578 | } |
eac4dff6 AD |
1579 | switch (connector_type) { |
1580 | case DRM_MODE_CONNECTOR_VGA: | |
1581 | case DRM_MODE_CONNECTOR_DVIA: | |
1582 | default: | |
1583 | connector->interlace_allowed = true; | |
1584 | connector->doublescan_allowed = true; | |
d629a3ce AD |
1585 | radeon_connector->dac_load_detect = true; |
1586 | drm_connector_attach_property(&radeon_connector->base, | |
1587 | rdev->mode_info.load_detect_property, | |
1588 | 1); | |
eac4dff6 AD |
1589 | break; |
1590 | case DRM_MODE_CONNECTOR_DVII: | |
1591 | case DRM_MODE_CONNECTOR_DVID: | |
1592 | case DRM_MODE_CONNECTOR_HDMIA: | |
1593 | case DRM_MODE_CONNECTOR_HDMIB: | |
1594 | case DRM_MODE_CONNECTOR_DisplayPort: | |
430f70d5 AD |
1595 | drm_connector_attach_property(&radeon_connector->base, |
1596 | rdev->mode_info.underscan_property, | |
56bec7c0 | 1597 | UNDERSCAN_OFF); |
5bccf5e3 MG |
1598 | drm_connector_attach_property(&radeon_connector->base, |
1599 | rdev->mode_info.underscan_hborder_property, | |
1600 | 0); | |
1601 | drm_connector_attach_property(&radeon_connector->base, | |
1602 | rdev->mode_info.underscan_vborder_property, | |
1603 | 0); | |
eac4dff6 AD |
1604 | subpixel_order = SubPixelHorizontalRGB; |
1605 | connector->interlace_allowed = true; | |
1606 | if (connector_type == DRM_MODE_CONNECTOR_HDMIB) | |
1607 | connector->doublescan_allowed = true; | |
1608 | else | |
1609 | connector->doublescan_allowed = false; | |
d629a3ce AD |
1610 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { |
1611 | radeon_connector->dac_load_detect = true; | |
1612 | drm_connector_attach_property(&radeon_connector->base, | |
1613 | rdev->mode_info.load_detect_property, | |
1614 | 1); | |
1615 | } | |
eac4dff6 AD |
1616 | break; |
1617 | case DRM_MODE_CONNECTOR_LVDS: | |
1618 | case DRM_MODE_CONNECTOR_eDP: | |
1619 | drm_connector_attach_property(&radeon_connector->base, | |
1620 | dev->mode_config.scaling_mode_property, | |
1621 | DRM_MODE_SCALE_FULLSCREEN); | |
1622 | subpixel_order = SubPixelHorizontalRGB; | |
1623 | connector->interlace_allowed = false; | |
1624 | connector->doublescan_allowed = false; | |
1625 | break; | |
5bccf5e3 | 1626 | } |
eac4dff6 AD |
1627 | } else { |
1628 | switch (connector_type) { | |
1629 | case DRM_MODE_CONNECTOR_VGA: | |
1630 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
1631 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); | |
1632 | if (i2c_bus->valid) { | |
1633 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1634 | if (!radeon_connector->ddc_bus) | |
1635 | DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1636 | } | |
390d0bbe AD |
1637 | radeon_connector->dac_load_detect = true; |
1638 | drm_connector_attach_property(&radeon_connector->base, | |
1639 | rdev->mode_info.load_detect_property, | |
1640 | 1); | |
eac4dff6 AD |
1641 | /* no HPD on analog connectors */ |
1642 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
1643 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | |
1644 | connector->interlace_allowed = true; | |
c49948f4 | 1645 | connector->doublescan_allowed = true; |
eac4dff6 AD |
1646 | break; |
1647 | case DRM_MODE_CONNECTOR_DVIA: | |
1648 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
1649 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); | |
1650 | if (i2c_bus->valid) { | |
1651 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1652 | if (!radeon_connector->ddc_bus) | |
1653 | DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1654 | } | |
1655 | radeon_connector->dac_load_detect = true; | |
430f70d5 | 1656 | drm_connector_attach_property(&radeon_connector->base, |
eac4dff6 AD |
1657 | rdev->mode_info.load_detect_property, |
1658 | 1); | |
1659 | /* no HPD on analog connectors */ | |
1660 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
1661 | connector->interlace_allowed = true; | |
1662 | connector->doublescan_allowed = true; | |
1663 | break; | |
1664 | case DRM_MODE_CONNECTOR_DVII: | |
1665 | case DRM_MODE_CONNECTOR_DVID: | |
1666 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1667 | if (!radeon_dig_connector) | |
1668 | goto failed; | |
1669 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1670 | radeon_connector->con_priv = radeon_dig_connector; | |
1671 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
1672 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); | |
1673 | if (i2c_bus->valid) { | |
1674 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1675 | if (!radeon_connector->ddc_bus) | |
1676 | DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1677 | } | |
1678 | subpixel_order = SubPixelHorizontalRGB; | |
5bccf5e3 | 1679 | drm_connector_attach_property(&radeon_connector->base, |
eac4dff6 AD |
1680 | rdev->mode_info.coherent_mode_property, |
1681 | 1); | |
1682 | if (ASIC_IS_AVIVO(rdev)) { | |
1683 | drm_connector_attach_property(&radeon_connector->base, | |
1684 | rdev->mode_info.underscan_property, | |
1685 | UNDERSCAN_OFF); | |
1686 | drm_connector_attach_property(&radeon_connector->base, | |
1687 | rdev->mode_info.underscan_hborder_property, | |
1688 | 0); | |
1689 | drm_connector_attach_property(&radeon_connector->base, | |
1690 | rdev->mode_info.underscan_vborder_property, | |
1691 | 0); | |
1692 | } | |
1693 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { | |
1694 | radeon_connector->dac_load_detect = true; | |
1695 | drm_connector_attach_property(&radeon_connector->base, | |
1696 | rdev->mode_info.load_detect_property, | |
1697 | 1); | |
1698 | } | |
1699 | connector->interlace_allowed = true; | |
1700 | if (connector_type == DRM_MODE_CONNECTOR_DVII) | |
1701 | connector->doublescan_allowed = true; | |
1702 | else | |
1703 | connector->doublescan_allowed = false; | |
1704 | break; | |
1705 | case DRM_MODE_CONNECTOR_HDMIA: | |
1706 | case DRM_MODE_CONNECTOR_HDMIB: | |
1707 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1708 | if (!radeon_dig_connector) | |
1709 | goto failed; | |
1710 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1711 | radeon_connector->con_priv = radeon_dig_connector; | |
1712 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
1713 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); | |
1714 | if (i2c_bus->valid) { | |
1715 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1716 | if (!radeon_connector->ddc_bus) | |
1717 | DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1718 | } | |
5bccf5e3 | 1719 | drm_connector_attach_property(&radeon_connector->base, |
eac4dff6 AD |
1720 | rdev->mode_info.coherent_mode_property, |
1721 | 1); | |
1722 | if (ASIC_IS_AVIVO(rdev)) { | |
1723 | drm_connector_attach_property(&radeon_connector->base, | |
1724 | rdev->mode_info.underscan_property, | |
1725 | UNDERSCAN_OFF); | |
1726 | drm_connector_attach_property(&radeon_connector->base, | |
1727 | rdev->mode_info.underscan_hborder_property, | |
1728 | 0); | |
1729 | drm_connector_attach_property(&radeon_connector->base, | |
1730 | rdev->mode_info.underscan_vborder_property, | |
1731 | 0); | |
1732 | } | |
1733 | subpixel_order = SubPixelHorizontalRGB; | |
1734 | connector->interlace_allowed = true; | |
1735 | if (connector_type == DRM_MODE_CONNECTOR_HDMIB) | |
1736 | connector->doublescan_allowed = true; | |
1737 | else | |
1738 | connector->doublescan_allowed = false; | |
1739 | break; | |
1740 | case DRM_MODE_CONNECTOR_DisplayPort: | |
1741 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1742 | if (!radeon_dig_connector) | |
1743 | goto failed; | |
1744 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1745 | radeon_connector->con_priv = radeon_dig_connector; | |
1746 | drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); | |
1747 | drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); | |
1748 | if (i2c_bus->valid) { | |
1749 | /* add DP i2c bus */ | |
1750 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch"); | |
1751 | if (!radeon_dig_connector->dp_i2c_bus) | |
1752 | DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n"); | |
1753 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1754 | if (!radeon_connector->ddc_bus) | |
1755 | DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1756 | } | |
1757 | subpixel_order = SubPixelHorizontalRGB; | |
1758 | drm_connector_attach_property(&radeon_connector->base, | |
1759 | rdev->mode_info.coherent_mode_property, | |
1760 | 1); | |
1761 | if (ASIC_IS_AVIVO(rdev)) { | |
1762 | drm_connector_attach_property(&radeon_connector->base, | |
1763 | rdev->mode_info.underscan_property, | |
1764 | UNDERSCAN_OFF); | |
1765 | drm_connector_attach_property(&radeon_connector->base, | |
1766 | rdev->mode_info.underscan_hborder_property, | |
1767 | 0); | |
1768 | drm_connector_attach_property(&radeon_connector->base, | |
1769 | rdev->mode_info.underscan_vborder_property, | |
1770 | 0); | |
1771 | } | |
1772 | connector->interlace_allowed = true; | |
1773 | /* in theory with a DP to VGA converter... */ | |
c49948f4 | 1774 | connector->doublescan_allowed = false; |
eac4dff6 AD |
1775 | break; |
1776 | case DRM_MODE_CONNECTOR_eDP: | |
1777 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1778 | if (!radeon_dig_connector) | |
1779 | goto failed; | |
1780 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1781 | radeon_connector->con_priv = radeon_dig_connector; | |
1782 | drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); | |
1783 | drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); | |
1784 | if (i2c_bus->valid) { | |
1785 | /* add DP i2c bus */ | |
1786 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch"); | |
1787 | if (!radeon_dig_connector->dp_i2c_bus) | |
1788 | DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n"); | |
1789 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1790 | if (!radeon_connector->ddc_bus) | |
1791 | DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1792 | } | |
430f70d5 | 1793 | drm_connector_attach_property(&radeon_connector->base, |
eac4dff6 AD |
1794 | dev->mode_config.scaling_mode_property, |
1795 | DRM_MODE_SCALE_FULLSCREEN); | |
1796 | subpixel_order = SubPixelHorizontalRGB; | |
1797 | connector->interlace_allowed = false; | |
1798 | connector->doublescan_allowed = false; | |
1799 | break; | |
1800 | case DRM_MODE_CONNECTOR_SVIDEO: | |
1801 | case DRM_MODE_CONNECTOR_Composite: | |
1802 | case DRM_MODE_CONNECTOR_9PinDIN: | |
1803 | drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type); | |
1804 | drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs); | |
1805 | radeon_connector->dac_load_detect = true; | |
5bccf5e3 | 1806 | drm_connector_attach_property(&radeon_connector->base, |
eac4dff6 AD |
1807 | rdev->mode_info.load_detect_property, |
1808 | 1); | |
5bccf5e3 | 1809 | drm_connector_attach_property(&radeon_connector->base, |
eac4dff6 AD |
1810 | rdev->mode_info.tv_std_property, |
1811 | radeon_atombios_get_tv_info(rdev)); | |
1812 | /* no HPD on analog connectors */ | |
1813 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
1814 | connector->interlace_allowed = false; | |
1815 | connector->doublescan_allowed = false; | |
1816 | break; | |
1817 | case DRM_MODE_CONNECTOR_LVDS: | |
1818 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1819 | if (!radeon_dig_connector) | |
1820 | goto failed; | |
1821 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1822 | radeon_connector->con_priv = radeon_dig_connector; | |
1823 | drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); | |
1824 | drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); | |
1825 | if (i2c_bus->valid) { | |
1826 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1827 | if (!radeon_connector->ddc_bus) | |
1828 | DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1829 | } | |
1830 | drm_connector_attach_property(&radeon_connector->base, | |
1831 | dev->mode_config.scaling_mode_property, | |
1832 | DRM_MODE_SCALE_FULLSCREEN); | |
1833 | subpixel_order = SubPixelHorizontalRGB; | |
1834 | connector->interlace_allowed = false; | |
1835 | connector->doublescan_allowed = false; | |
1836 | break; | |
771fe6b9 | 1837 | } |
771fe6b9 JG |
1838 | } |
1839 | ||
2581afcc | 1840 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { |
eb1f8e4f DA |
1841 | if (i2c_bus->valid) |
1842 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | |
1843 | } else | |
1844 | connector->polled = DRM_CONNECTOR_POLL_HPD; | |
1845 | ||
771fe6b9 JG |
1846 | connector->display_info.subpixel_order = subpixel_order; |
1847 | drm_sysfs_connector_add(connector); | |
1848 | return; | |
1849 | ||
1850 | failed: | |
771fe6b9 JG |
1851 | drm_connector_cleanup(connector); |
1852 | kfree(connector); | |
1853 | } | |
1854 | ||
1855 | void | |
1856 | radeon_add_legacy_connector(struct drm_device *dev, | |
1857 | uint32_t connector_id, | |
1858 | uint32_t supported_device, | |
1859 | int connector_type, | |
b75fad06 | 1860 | struct radeon_i2c_bus_rec *i2c_bus, |
eed45b30 AD |
1861 | uint16_t connector_object_id, |
1862 | struct radeon_hpd *hpd) | |
771fe6b9 | 1863 | { |
445282db | 1864 | struct radeon_device *rdev = dev->dev_private; |
771fe6b9 JG |
1865 | struct drm_connector *connector; |
1866 | struct radeon_connector *radeon_connector; | |
1867 | uint32_t subpixel_order = SubPixelNone; | |
1868 | ||
4ce001ab | 1869 | if (connector_type == DRM_MODE_CONNECTOR_Unknown) |
771fe6b9 JG |
1870 | return; |
1871 | ||
cf4c12f9 AD |
1872 | /* if the user selected tv=0 don't try and add the connector */ |
1873 | if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) || | |
1874 | (connector_type == DRM_MODE_CONNECTOR_Composite) || | |
1875 | (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) && | |
1876 | (radeon_tv == 0)) | |
1877 | return; | |
1878 | ||
771fe6b9 JG |
1879 | /* see if we already added it */ |
1880 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
1881 | radeon_connector = to_radeon_connector(connector); | |
1882 | if (radeon_connector->connector_id == connector_id) { | |
1883 | radeon_connector->devices |= supported_device; | |
1884 | return; | |
1885 | } | |
1886 | } | |
1887 | ||
1888 | radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); | |
1889 | if (!radeon_connector) | |
1890 | return; | |
1891 | ||
1892 | connector = &radeon_connector->base; | |
1893 | ||
1894 | radeon_connector->connector_id = connector_id; | |
1895 | radeon_connector->devices = supported_device; | |
b75fad06 | 1896 | radeon_connector->connector_object_id = connector_object_id; |
eed45b30 | 1897 | radeon_connector->hpd = *hpd; |
bc1c4dc3 | 1898 | |
771fe6b9 JG |
1899 | switch (connector_type) { |
1900 | case DRM_MODE_CONNECTOR_VGA: | |
1901 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
0b4c0f3f | 1902 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
771fe6b9 | 1903 | if (i2c_bus->valid) { |
f376b94f | 1904 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1905 | if (!radeon_connector->ddc_bus) |
a70882aa | 1906 | DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 1907 | } |
35e4b7af | 1908 | radeon_connector->dac_load_detect = true; |
445282db DA |
1909 | drm_connector_attach_property(&radeon_connector->base, |
1910 | rdev->mode_info.load_detect_property, | |
1911 | 1); | |
2581afcc AD |
1912 | /* no HPD on analog connectors */ |
1913 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
eb1f8e4f | 1914 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; |
c49948f4 AD |
1915 | connector->interlace_allowed = true; |
1916 | connector->doublescan_allowed = true; | |
771fe6b9 JG |
1917 | break; |
1918 | case DRM_MODE_CONNECTOR_DVIA: | |
1919 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
0b4c0f3f | 1920 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
771fe6b9 | 1921 | if (i2c_bus->valid) { |
f376b94f | 1922 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1923 | if (!radeon_connector->ddc_bus) |
a70882aa | 1924 | DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 1925 | } |
35e4b7af | 1926 | radeon_connector->dac_load_detect = true; |
445282db DA |
1927 | drm_connector_attach_property(&radeon_connector->base, |
1928 | rdev->mode_info.load_detect_property, | |
1929 | 1); | |
2581afcc AD |
1930 | /* no HPD on analog connectors */ |
1931 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
c49948f4 AD |
1932 | connector->interlace_allowed = true; |
1933 | connector->doublescan_allowed = true; | |
771fe6b9 JG |
1934 | break; |
1935 | case DRM_MODE_CONNECTOR_DVII: | |
1936 | case DRM_MODE_CONNECTOR_DVID: | |
1937 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
0b4c0f3f | 1938 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); |
771fe6b9 | 1939 | if (i2c_bus->valid) { |
f376b94f | 1940 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1941 | if (!radeon_connector->ddc_bus) |
a70882aa | 1942 | DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
68b3adb4 AD |
1943 | } |
1944 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { | |
35e4b7af | 1945 | radeon_connector->dac_load_detect = true; |
445282db DA |
1946 | drm_connector_attach_property(&radeon_connector->base, |
1947 | rdev->mode_info.load_detect_property, | |
1948 | 1); | |
771fe6b9 JG |
1949 | } |
1950 | subpixel_order = SubPixelHorizontalRGB; | |
c49948f4 AD |
1951 | connector->interlace_allowed = true; |
1952 | if (connector_type == DRM_MODE_CONNECTOR_DVII) | |
1953 | connector->doublescan_allowed = true; | |
1954 | else | |
1955 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
1956 | break; |
1957 | case DRM_MODE_CONNECTOR_SVIDEO: | |
1958 | case DRM_MODE_CONNECTOR_Composite: | |
1959 | case DRM_MODE_CONNECTOR_9PinDIN: | |
cf4c12f9 AD |
1960 | drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type); |
1961 | drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs); | |
1962 | radeon_connector->dac_load_detect = true; | |
1963 | /* RS400,RC410,RS480 chipset seems to report a lot | |
1964 | * of false positive on load detect, we haven't yet | |
1965 | * found a way to make load detect reliable on those | |
1966 | * chipset, thus just disable it for TV. | |
1967 | */ | |
1968 | if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480) | |
1969 | radeon_connector->dac_load_detect = false; | |
1970 | drm_connector_attach_property(&radeon_connector->base, | |
1971 | rdev->mode_info.load_detect_property, | |
1972 | radeon_connector->dac_load_detect); | |
1973 | drm_connector_attach_property(&radeon_connector->base, | |
1974 | rdev->mode_info.tv_std_property, | |
1975 | radeon_combios_get_tv_info(rdev)); | |
1976 | /* no HPD on analog connectors */ | |
1977 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
c49948f4 AD |
1978 | connector->interlace_allowed = false; |
1979 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
1980 | break; |
1981 | case DRM_MODE_CONNECTOR_LVDS: | |
1982 | drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); | |
0b4c0f3f | 1983 | drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); |
771fe6b9 | 1984 | if (i2c_bus->valid) { |
f376b94f | 1985 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1986 | if (!radeon_connector->ddc_bus) |
a70882aa | 1987 | DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 1988 | } |
445282db DA |
1989 | drm_connector_attach_property(&radeon_connector->base, |
1990 | dev->mode_config.scaling_mode_property, | |
1991 | DRM_MODE_SCALE_FULLSCREEN); | |
771fe6b9 | 1992 | subpixel_order = SubPixelHorizontalRGB; |
c49948f4 AD |
1993 | connector->interlace_allowed = false; |
1994 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
1995 | break; |
1996 | } | |
1997 | ||
2581afcc | 1998 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { |
eb1f8e4f DA |
1999 | if (i2c_bus->valid) |
2000 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | |
2001 | } else | |
2002 | connector->polled = DRM_CONNECTOR_POLL_HPD; | |
771fe6b9 JG |
2003 | connector->display_info.subpixel_order = subpixel_order; |
2004 | drm_sysfs_connector_add(connector); | |
63ec0119 MD |
2005 | if (connector_type == DRM_MODE_CONNECTOR_LVDS) { |
2006 | struct drm_encoder *drm_encoder; | |
2007 | ||
2008 | list_for_each_entry(drm_encoder, &dev->mode_config.encoder_list, head) { | |
2009 | struct radeon_encoder *radeon_encoder; | |
2010 | ||
2011 | radeon_encoder = to_radeon_encoder(drm_encoder); | |
2012 | if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_LVDS) | |
2013 | radeon_legacy_backlight_init(radeon_encoder, connector); | |
2014 | } | |
2015 | } | |
771fe6b9 | 2016 | } |