]> git.proxmox.com Git - mirror_ubuntu-hirsute-kernel.git/blame - drivers/gpu/drm/radeon/radeon_connectors.c
drm/edid: Store all supported hdmi deep color modes in drm_display_info
[mirror_ubuntu-hirsute-kernel.git] / drivers / gpu / drm / radeon / radeon_connectors.c
CommitLineData
771fe6b9
JG
1/*
2 * Copyright 2007-8 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors: Dave Airlie
24 * Alex Deucher
25 */
760285e7
DH
26#include <drm/drmP.h>
27#include <drm/drm_edid.h>
28#include <drm/drm_crtc_helper.h>
29#include <drm/drm_fb_helper.h>
30#include <drm/radeon_drm.h>
771fe6b9 31#include "radeon.h"
923f6848 32#include "atom.h"
771fe6b9 33
10ebc0bc
DA
34#include <linux/pm_runtime.h>
35
d4877cf2
AD
36void radeon_connector_hotplug(struct drm_connector *connector)
37{
38 struct drm_device *dev = connector->dev;
39 struct radeon_device *rdev = dev->dev_private;
40 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
41
cbac9543
AD
42 /* bail if the connector does not have hpd pin, e.g.,
43 * VGA, TV, etc.
44 */
45 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE)
46 return;
47
1e85e1d0 48 radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
d4877cf2 49
73104b5c 50 /* if the connector is already off, don't turn it back on */
6e9f798d 51 /* FIXME: This access isn't protected by any locks. */
73104b5c
AD
52 if (connector->dpms != DRM_MODE_DPMS_ON)
53 return;
54
d5811e87
AD
55 /* just deal with DP (not eDP) here. */
56 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
266dcba5
JG
57 struct radeon_connector_atom_dig *dig_connector =
58 radeon_connector->con_priv;
7c3ed0fd 59
266dcba5
JG
60 /* if existing sink type was not DP no need to retrain */
61 if (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT)
62 return;
63
64 /* first get sink type as it may be reset after (un)plug */
65 dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
66 /* don't do anything if sink is not display port, i.e.,
67 * passive dp->(dvi|hdmi) adaptor
68 */
69 if (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
70 int saved_dpms = connector->dpms;
71 /* Only turn off the display if it's physically disconnected */
ca2ccde5 72 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
266dcba5 73 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
ca2ccde5
JG
74 } else if (radeon_dp_needs_link_train(radeon_connector)) {
75 /* set it to OFF so that drm_helper_connector_dpms()
76 * won't return immediately since the current state
77 * is ON at this point.
78 */
79 connector->dpms = DRM_MODE_DPMS_OFF;
266dcba5 80 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
ca2ccde5 81 }
266dcba5
JG
82 connector->dpms = saved_dpms;
83 }
d4877cf2 84 }
d4877cf2
AD
85}
86
445282db
DA
87static void radeon_property_change_mode(struct drm_encoder *encoder)
88{
89 struct drm_crtc *crtc = encoder->crtc;
90
91 if (crtc && crtc->enabled) {
92 drm_crtc_helper_set_mode(crtc, &crtc->mode,
f4510a27 93 crtc->x, crtc->y, crtc->primary->fb);
445282db
DA
94 }
95}
eccea792
AD
96
97int radeon_get_monitor_bpc(struct drm_connector *connector)
98{
99 struct drm_device *dev = connector->dev;
100 struct radeon_device *rdev = dev->dev_private;
101 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
102 struct radeon_connector_atom_dig *dig_connector;
103 int bpc = 8;
104
105 switch (connector->connector_type) {
106 case DRM_MODE_CONNECTOR_DVII:
107 case DRM_MODE_CONNECTOR_HDMIB:
108 if (radeon_connector->use_digital) {
109 if (drm_detect_hdmi_monitor(radeon_connector->edid)) {
110 if (connector->display_info.bpc)
111 bpc = connector->display_info.bpc;
112 }
113 }
114 break;
115 case DRM_MODE_CONNECTOR_DVID:
116 case DRM_MODE_CONNECTOR_HDMIA:
117 if (drm_detect_hdmi_monitor(radeon_connector->edid)) {
118 if (connector->display_info.bpc)
119 bpc = connector->display_info.bpc;
120 }
121 break;
122 case DRM_MODE_CONNECTOR_DisplayPort:
123 dig_connector = radeon_connector->con_priv;
124 if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
125 (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) ||
126 drm_detect_hdmi_monitor(radeon_connector->edid)) {
127 if (connector->display_info.bpc)
128 bpc = connector->display_info.bpc;
129 }
130 break;
131 case DRM_MODE_CONNECTOR_eDP:
132 case DRM_MODE_CONNECTOR_LVDS:
133 if (connector->display_info.bpc)
134 bpc = connector->display_info.bpc;
135 else if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) {
136 struct drm_connector_helper_funcs *connector_funcs =
137 connector->helper_private;
138 struct drm_encoder *encoder = connector_funcs->best_encoder(connector);
139 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
140 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
141
142 if (dig->lcd_misc & ATOM_PANEL_MISC_V13_6BIT_PER_COLOR)
143 bpc = 6;
144 else if (dig->lcd_misc & ATOM_PANEL_MISC_V13_8BIT_PER_COLOR)
145 bpc = 8;
146 }
147 break;
148 }
89b92339
MK
149
150 if (drm_detect_hdmi_monitor(radeon_connector->edid)) {
151 /* hdmi deep color only implemented on DCE4+ */
152 if ((bpc > 8) && !ASIC_IS_DCE4(rdev)) {
153 DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 8 bpc.\n",
72082093 154 connector->name, bpc);
89b92339
MK
155 bpc = 8;
156 }
157
158 /*
159 * Pre DCE-8 hw can't handle > 12 bpc, and more than 12 bpc doesn't make
160 * much sense without support for > 12 bpc framebuffers. RGB 4:4:4 at
161 * 12 bpc is always supported on hdmi deep color sinks, as this is
162 * required by the HDMI-1.3 spec. Clamp to a safe 12 bpc maximum.
163 */
164 if (bpc > 12) {
165 DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 12 bpc.\n",
72082093 166 connector->name, bpc);
89b92339
MK
167 bpc = 12;
168 }
169 }
170
171 DRM_DEBUG("%s: Display bpc=%d, returned bpc=%d\n",
72082093 172 connector->name, connector->display_info.bpc, bpc);
89b92339 173
eccea792
AD
174 return bpc;
175}
176
771fe6b9
JG
177static void
178radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status)
179{
180 struct drm_device *dev = connector->dev;
181 struct radeon_device *rdev = dev->dev_private;
182 struct drm_encoder *best_encoder = NULL;
183 struct drm_encoder *encoder = NULL;
184 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
185 struct drm_mode_object *obj;
186 bool connected;
187 int i;
188
189 best_encoder = connector_funcs->best_encoder(connector);
190
191 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
192 if (connector->encoder_ids[i] == 0)
193 break;
194
195 obj = drm_mode_object_find(connector->dev,
196 connector->encoder_ids[i],
197 DRM_MODE_OBJECT_ENCODER);
198 if (!obj)
199 continue;
200
201 encoder = obj_to_encoder(obj);
202
203 if ((encoder == best_encoder) && (status == connector_status_connected))
204 connected = true;
205 else
206 connected = false;
207
208 if (rdev->is_atom_bios)
209 radeon_atombios_connected_scratch_regs(connector, encoder, connected);
210 else
211 radeon_combios_connected_scratch_regs(connector, encoder, connected);
212
213 }
214}
215
1109ca09 216static struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type)
445282db
DA
217{
218 struct drm_mode_object *obj;
219 struct drm_encoder *encoder;
220 int i;
221
222 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
223 if (connector->encoder_ids[i] == 0)
224 break;
225
226 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
227 if (!obj)
228 continue;
229
230 encoder = obj_to_encoder(obj);
231 if (encoder->encoder_type == encoder_type)
232 return encoder;
233 }
234 return NULL;
235}
236
1109ca09 237static struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector)
771fe6b9
JG
238{
239 int enc_id = connector->encoder_ids[0];
240 struct drm_mode_object *obj;
241 struct drm_encoder *encoder;
242
243 /* pick the encoder ids */
244 if (enc_id) {
245 obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER);
246 if (!obj)
247 return NULL;
248 encoder = obj_to_encoder(obj);
249 return encoder;
250 }
251 return NULL;
252}
253
4ce001ab
DA
254/*
255 * radeon_connector_analog_encoder_conflict_solve
256 * - search for other connectors sharing this encoder
257 * if priority is true, then set them disconnected if this is connected
258 * if priority is false, set us disconnected if they are connected
259 */
260static enum drm_connector_status
261radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector,
262 struct drm_encoder *encoder,
263 enum drm_connector_status current_status,
264 bool priority)
265{
266 struct drm_device *dev = connector->dev;
267 struct drm_connector *conflict;
08d07511 268 struct radeon_connector *radeon_conflict;
4ce001ab
DA
269 int i;
270
271 list_for_each_entry(conflict, &dev->mode_config.connector_list, head) {
272 if (conflict == connector)
273 continue;
274
08d07511 275 radeon_conflict = to_radeon_connector(conflict);
4ce001ab
DA
276 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
277 if (conflict->encoder_ids[i] == 0)
278 break;
279
280 /* if the IDs match */
281 if (conflict->encoder_ids[i] == encoder->base.id) {
282 if (conflict->status != connector_status_connected)
283 continue;
08d07511
AD
284
285 if (radeon_conflict->use_digital)
286 continue;
4ce001ab
DA
287
288 if (priority == true) {
72082093
JN
289 DRM_DEBUG_KMS("1: conflicting encoders switching off %s\n",
290 conflict->name);
291 DRM_DEBUG_KMS("in favor of %s\n",
292 connector->name);
4ce001ab
DA
293 conflict->status = connector_status_disconnected;
294 radeon_connector_update_scratch_regs(conflict, connector_status_disconnected);
295 } else {
72082093
JN
296 DRM_DEBUG_KMS("2: conflicting encoders switching off %s\n",
297 connector->name);
298 DRM_DEBUG_KMS("in favor of %s\n",
299 conflict->name);
4ce001ab
DA
300 current_status = connector_status_disconnected;
301 }
302 break;
303 }
304 }
305 }
306 return current_status;
307
308}
309
771fe6b9
JG
310static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder)
311{
312 struct drm_device *dev = encoder->dev;
313 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
314 struct drm_display_mode *mode = NULL;
de2103e4 315 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
771fe6b9 316
de2103e4
AD
317 if (native_mode->hdisplay != 0 &&
318 native_mode->vdisplay != 0 &&
319 native_mode->clock != 0) {
fb06ca8f 320 mode = drm_mode_duplicate(dev, native_mode);
771fe6b9
JG
321 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
322 drm_mode_set_name(mode);
323
d9fdaafb 324 DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name);
d2efdf6d
AD
325 } else if (native_mode->hdisplay != 0 &&
326 native_mode->vdisplay != 0) {
327 /* mac laptops without an edid */
328 /* Note that this is not necessarily the exact panel mode,
329 * but an approximation based on the cvt formula. For these
330 * systems we should ideally read the mode info out of the
331 * registers or add a mode table, but this works and is much
332 * simpler.
333 */
334 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false);
335 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
d9fdaafb 336 DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name);
771fe6b9
JG
337 }
338 return mode;
339}
340
923f6848
AD
341static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector)
342{
343 struct drm_device *dev = encoder->dev;
344 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
345 struct drm_display_mode *mode = NULL;
de2103e4 346 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
923f6848
AD
347 int i;
348 struct mode_size {
349 int w;
350 int h;
351 } common_modes[17] = {
352 { 640, 480},
353 { 720, 480},
354 { 800, 600},
355 { 848, 480},
356 {1024, 768},
357 {1152, 768},
358 {1280, 720},
359 {1280, 800},
360 {1280, 854},
361 {1280, 960},
362 {1280, 1024},
363 {1440, 900},
364 {1400, 1050},
365 {1680, 1050},
366 {1600, 1200},
367 {1920, 1080},
368 {1920, 1200}
369 };
370
371 for (i = 0; i < 17; i++) {
dfdd6467
AD
372 if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) {
373 if (common_modes[i].w > 1024 ||
374 common_modes[i].h > 768)
375 continue;
376 }
923f6848 377 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
de2103e4
AD
378 if (common_modes[i].w > native_mode->hdisplay ||
379 common_modes[i].h > native_mode->vdisplay ||
380 (common_modes[i].w == native_mode->hdisplay &&
381 common_modes[i].h == native_mode->vdisplay))
923f6848
AD
382 continue;
383 }
384 if (common_modes[i].w < 320 || common_modes[i].h < 200)
385 continue;
386
d50ba256 387 mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
923f6848
AD
388 drm_mode_probed_add(connector, mode);
389 }
390}
391
1109ca09 392static int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property,
771fe6b9
JG
393 uint64_t val)
394{
445282db
DA
395 struct drm_device *dev = connector->dev;
396 struct radeon_device *rdev = dev->dev_private;
397 struct drm_encoder *encoder;
398 struct radeon_encoder *radeon_encoder;
399
400 if (property == rdev->mode_info.coherent_mode_property) {
401 struct radeon_encoder_atom_dig *dig;
ce227c41 402 bool new_coherent_mode;
445282db
DA
403
404 /* need to find digital encoder on connector */
405 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
406 if (!encoder)
407 return 0;
408
409 radeon_encoder = to_radeon_encoder(encoder);
410
411 if (!radeon_encoder->enc_priv)
412 return 0;
413
414 dig = radeon_encoder->enc_priv;
ce227c41
DA
415 new_coherent_mode = val ? true : false;
416 if (dig->coherent_mode != new_coherent_mode) {
417 dig->coherent_mode = new_coherent_mode;
418 radeon_property_change_mode(&radeon_encoder->base);
419 }
445282db
DA
420 }
421
8666c076
AD
422 if (property == rdev->mode_info.audio_property) {
423 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
424 /* need to find digital encoder on connector */
425 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
426 if (!encoder)
427 return 0;
428
429 radeon_encoder = to_radeon_encoder(encoder);
430
431 if (radeon_connector->audio != val) {
432 radeon_connector->audio = val;
433 radeon_property_change_mode(&radeon_encoder->base);
434 }
435 }
436
6214bb74
AD
437 if (property == rdev->mode_info.dither_property) {
438 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
439 /* need to find digital encoder on connector */
440 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
441 if (!encoder)
442 return 0;
443
444 radeon_encoder = to_radeon_encoder(encoder);
445
446 if (radeon_connector->dither != val) {
447 radeon_connector->dither = val;
448 radeon_property_change_mode(&radeon_encoder->base);
449 }
450 }
451
5b1714d3
AD
452 if (property == rdev->mode_info.underscan_property) {
453 /* need to find digital encoder on connector */
454 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
455 if (!encoder)
456 return 0;
457
458 radeon_encoder = to_radeon_encoder(encoder);
459
460 if (radeon_encoder->underscan_type != val) {
461 radeon_encoder->underscan_type = val;
462 radeon_property_change_mode(&radeon_encoder->base);
463 }
464 }
465
5bccf5e3
MG
466 if (property == rdev->mode_info.underscan_hborder_property) {
467 /* need to find digital encoder on connector */
468 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
469 if (!encoder)
470 return 0;
471
472 radeon_encoder = to_radeon_encoder(encoder);
473
474 if (radeon_encoder->underscan_hborder != val) {
475 radeon_encoder->underscan_hborder = val;
476 radeon_property_change_mode(&radeon_encoder->base);
477 }
478 }
479
480 if (property == rdev->mode_info.underscan_vborder_property) {
481 /* need to find digital encoder on connector */
482 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
483 if (!encoder)
484 return 0;
485
486 radeon_encoder = to_radeon_encoder(encoder);
487
488 if (radeon_encoder->underscan_vborder != val) {
489 radeon_encoder->underscan_vborder = val;
490 radeon_property_change_mode(&radeon_encoder->base);
491 }
492 }
493
445282db
DA
494 if (property == rdev->mode_info.tv_std_property) {
495 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC);
496 if (!encoder) {
497 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC);
498 }
499
500 if (!encoder)
501 return 0;
502
503 radeon_encoder = to_radeon_encoder(encoder);
504 if (!radeon_encoder->enc_priv)
505 return 0;
643acacf 506 if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) {
445282db
DA
507 struct radeon_encoder_atom_dac *dac_int;
508 dac_int = radeon_encoder->enc_priv;
509 dac_int->tv_std = val;
510 } else {
511 struct radeon_encoder_tv_dac *dac_int;
512 dac_int = radeon_encoder->enc_priv;
513 dac_int->tv_std = val;
514 }
515 radeon_property_change_mode(&radeon_encoder->base);
516 }
517
518 if (property == rdev->mode_info.load_detect_property) {
519 struct radeon_connector *radeon_connector =
520 to_radeon_connector(connector);
521
522 if (val == 0)
523 radeon_connector->dac_load_detect = false;
524 else
525 radeon_connector->dac_load_detect = true;
526 }
527
528 if (property == rdev->mode_info.tmds_pll_property) {
529 struct radeon_encoder_int_tmds *tmds = NULL;
530 bool ret = false;
531 /* need to find digital encoder on connector */
532 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
533 if (!encoder)
534 return 0;
535
536 radeon_encoder = to_radeon_encoder(encoder);
537
538 tmds = radeon_encoder->enc_priv;
539 if (!tmds)
540 return 0;
541
542 if (val == 0) {
543 if (rdev->is_atom_bios)
544 ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds);
545 else
546 ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds);
547 }
548 if (val == 1 || ret == false) {
549 radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds);
550 }
551 radeon_property_change_mode(&radeon_encoder->base);
552 }
553
771fe6b9
JG
554 return 0;
555}
556
8dfaa8a7
MD
557static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder,
558 struct drm_connector *connector)
559{
560 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 561 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
13bb9430
MG
562 struct drm_display_mode *t, *mode;
563
564 /* If the EDID preferred mode doesn't match the native mode, use it */
565 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
566 if (mode->type & DRM_MODE_TYPE_PREFERRED) {
567 if (mode->hdisplay != native_mode->hdisplay ||
568 mode->vdisplay != native_mode->vdisplay)
569 memcpy(native_mode, mode, sizeof(*mode));
570 }
571 }
8dfaa8a7
MD
572
573 /* Try to get native mode details from EDID if necessary */
de2103e4 574 if (!native_mode->clock) {
8dfaa8a7 575 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
de2103e4
AD
576 if (mode->hdisplay == native_mode->hdisplay &&
577 mode->vdisplay == native_mode->vdisplay) {
578 *native_mode = *mode;
579 drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V);
c5d46b4e 580 DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n");
8dfaa8a7
MD
581 break;
582 }
583 }
584 }
13bb9430 585
de2103e4 586 if (!native_mode->clock) {
c5d46b4e 587 DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n");
8dfaa8a7
MD
588 radeon_encoder->rmx_type = RMX_OFF;
589 }
590}
771fe6b9
JG
591
592static int radeon_lvds_get_modes(struct drm_connector *connector)
593{
594 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
595 struct drm_encoder *encoder;
596 int ret = 0;
597 struct drm_display_mode *mode;
598
599 if (radeon_connector->ddc_bus) {
600 ret = radeon_ddc_get_modes(radeon_connector);
601 if (ret > 0) {
7747b713 602 encoder = radeon_best_single_encoder(connector);
8dfaa8a7
MD
603 if (encoder) {
604 radeon_fixup_lvds_native_mode(encoder, connector);
7747b713
AD
605 /* add scaled modes */
606 radeon_add_common_modes(encoder, connector);
8dfaa8a7 607 }
771fe6b9
JG
608 return ret;
609 }
610 }
611
612 encoder = radeon_best_single_encoder(connector);
613 if (!encoder)
614 return 0;
615
616 /* we have no EDID modes */
617 mode = radeon_fp_native_mode(encoder);
618 if (mode) {
619 ret = 1;
620 drm_mode_probed_add(connector, mode);
7a868e18
AD
621 /* add the width/height from vbios tables if available */
622 connector->display_info.width_mm = mode->width_mm;
623 connector->display_info.height_mm = mode->height_mm;
7747b713
AD
624 /* add scaled modes */
625 radeon_add_common_modes(encoder, connector);
771fe6b9 626 }
923f6848 627
771fe6b9
JG
628 return ret;
629}
630
631static int radeon_lvds_mode_valid(struct drm_connector *connector,
632 struct drm_display_mode *mode)
633{
a3fa6320
AD
634 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
635
636 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
637 return MODE_PANEL;
638
639 if (encoder) {
640 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
641 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
642
643 /* AVIVO hardware supports downscaling modes larger than the panel
644 * to the panel size, but I'm not sure this is desirable.
645 */
646 if ((mode->hdisplay > native_mode->hdisplay) ||
647 (mode->vdisplay > native_mode->vdisplay))
648 return MODE_PANEL;
649
650 /* if scaling is disabled, block non-native modes */
651 if (radeon_encoder->rmx_type == RMX_OFF) {
652 if ((mode->hdisplay != native_mode->hdisplay) ||
653 (mode->vdisplay != native_mode->vdisplay))
654 return MODE_PANEL;
655 }
656 }
657
771fe6b9
JG
658 return MODE_OK;
659}
660
7b334fcb 661static enum drm_connector_status
930a9e28 662radeon_lvds_detect(struct drm_connector *connector, bool force)
771fe6b9 663{
0549a061 664 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
2ffb8429 665 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
0549a061 666 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc
DA
667 int r;
668
669 r = pm_runtime_get_sync(connector->dev->dev);
670 if (r < 0)
671 return connector_status_disconnected;
2ffb8429
AD
672
673 if (encoder) {
674 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 675 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
2ffb8429
AD
676
677 /* check if panel is valid */
de2103e4 678 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
2ffb8429
AD
679 ret = connector_status_connected;
680
681 }
0549a061
AD
682
683 /* check for edid as well */
0294cf4f
AD
684 if (radeon_connector->edid)
685 ret = connector_status_connected;
686 else {
687 if (radeon_connector->ddc_bus) {
0294cf4f
AD
688 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
689 &radeon_connector->ddc_bus->adapter);
0294cf4f
AD
690 if (radeon_connector->edid)
691 ret = connector_status_connected;
692 }
0549a061 693 }
771fe6b9 694 /* check acpi lid status ??? */
2ffb8429 695
771fe6b9 696 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA
697 pm_runtime_mark_last_busy(connector->dev->dev);
698 pm_runtime_put_autosuspend(connector->dev->dev);
771fe6b9
JG
699 return ret;
700}
701
702static void radeon_connector_destroy(struct drm_connector *connector)
703{
704 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
705
0294cf4f
AD
706 if (radeon_connector->edid)
707 kfree(radeon_connector->edid);
771fe6b9
JG
708 kfree(radeon_connector->con_priv);
709 drm_sysfs_connector_remove(connector);
710 drm_connector_cleanup(connector);
711 kfree(connector);
712}
713
445282db
DA
714static int radeon_lvds_set_property(struct drm_connector *connector,
715 struct drm_property *property,
716 uint64_t value)
717{
718 struct drm_device *dev = connector->dev;
719 struct radeon_encoder *radeon_encoder;
720 enum radeon_rmx_type rmx_type;
721
d9fdaafb 722 DRM_DEBUG_KMS("\n");
445282db
DA
723 if (property != dev->mode_config.scaling_mode_property)
724 return 0;
725
726 if (connector->encoder)
727 radeon_encoder = to_radeon_encoder(connector->encoder);
728 else {
729 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
730 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
731 }
732
733 switch (value) {
734 case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
735 case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
736 case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
737 default:
738 case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
739 }
740 if (radeon_encoder->rmx_type == rmx_type)
741 return 0;
742
743 radeon_encoder->rmx_type = rmx_type;
744
745 radeon_property_change_mode(&radeon_encoder->base);
746 return 0;
747}
748
749
1109ca09 750static const struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = {
771fe6b9
JG
751 .get_modes = radeon_lvds_get_modes,
752 .mode_valid = radeon_lvds_mode_valid,
753 .best_encoder = radeon_best_single_encoder,
754};
755
1109ca09 756static const struct drm_connector_funcs radeon_lvds_connector_funcs = {
771fe6b9
JG
757 .dpms = drm_helper_connector_dpms,
758 .detect = radeon_lvds_detect,
759 .fill_modes = drm_helper_probe_single_connector_modes,
760 .destroy = radeon_connector_destroy,
445282db 761 .set_property = radeon_lvds_set_property,
771fe6b9
JG
762};
763
764static int radeon_vga_get_modes(struct drm_connector *connector)
765{
766 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
767 int ret;
768
769 ret = radeon_ddc_get_modes(radeon_connector);
770
771 return ret;
772}
773
774static int radeon_vga_mode_valid(struct drm_connector *connector,
775 struct drm_display_mode *mode)
776{
b20f9bef
AD
777 struct drm_device *dev = connector->dev;
778 struct radeon_device *rdev = dev->dev_private;
779
a3fa6320 780 /* XXX check mode bandwidth */
b20f9bef
AD
781
782 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
783 return MODE_CLOCK_HIGH;
784
771fe6b9
JG
785 return MODE_OK;
786}
787
7b334fcb 788static enum drm_connector_status
930a9e28 789radeon_vga_detect(struct drm_connector *connector, bool force)
771fe6b9 790{
fafcf94e
AD
791 struct drm_device *dev = connector->dev;
792 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG
793 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
794 struct drm_encoder *encoder;
795 struct drm_encoder_helper_funcs *encoder_funcs;
4b9d2a21 796 bool dret = false;
771fe6b9 797 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc
DA
798 int r;
799
800 r = pm_runtime_get_sync(connector->dev->dev);
801 if (r < 0)
802 return connector_status_disconnected;
771fe6b9 803
4ce001ab
DA
804 encoder = radeon_best_single_encoder(connector);
805 if (!encoder)
806 ret = connector_status_disconnected;
807
eb6b6d7c 808 if (radeon_connector->ddc_bus)
0a9069d3 809 dret = radeon_ddc_probe(radeon_connector, false);
0294cf4f 810 if (dret) {
d0d0a225 811 radeon_connector->detected_by_load = false;
0294cf4f
AD
812 if (radeon_connector->edid) {
813 kfree(radeon_connector->edid);
814 radeon_connector->edid = NULL;
815 }
0294cf4f 816 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
0294cf4f
AD
817
818 if (!radeon_connector->edid) {
f82f5f3a 819 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
72082093 820 connector->name);
f82f5f3a 821 ret = connector_status_connected;
0294cf4f
AD
822 } else {
823 radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
824
825 /* some oems have boards with separate digital and analog connectors
826 * with a shared ddc line (often vga + hdmi)
827 */
828 if (radeon_connector->use_digital && radeon_connector->shared_ddc) {
829 kfree(radeon_connector->edid);
830 radeon_connector->edid = NULL;
831 ret = connector_status_disconnected;
832 } else
833 ret = connector_status_connected;
834 }
835 } else {
c3cceedd
DA
836
837 /* if we aren't forcing don't do destructive polling */
d0d0a225
AD
838 if (!force) {
839 /* only return the previous status if we last
840 * detected a monitor via load.
841 */
842 if (radeon_connector->detected_by_load)
10ebc0bc
DA
843 ret = connector->status;
844 goto out;
d0d0a225 845 }
c3cceedd 846
d8a7f792 847 if (radeon_connector->dac_load_detect && encoder) {
445282db
DA
848 encoder_funcs = encoder->helper_private;
849 ret = encoder_funcs->detect(encoder, connector);
34076446 850 if (ret != connector_status_disconnected)
d0d0a225 851 radeon_connector->detected_by_load = true;
445282db 852 }
771fe6b9
JG
853 }
854
4ce001ab
DA
855 if (ret == connector_status_connected)
856 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
fafcf94e
AD
857
858 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
859 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
860 * by other means, assume the CRT is connected and use that EDID.
861 */
862 if ((!rdev->is_atom_bios) &&
863 (ret == connector_status_disconnected) &&
864 rdev->mode_info.bios_hardcoded_edid_size) {
865 ret = connector_status_connected;
866 }
867
771fe6b9 868 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA
869
870out:
871 pm_runtime_mark_last_busy(connector->dev->dev);
872 pm_runtime_put_autosuspend(connector->dev->dev);
873
771fe6b9
JG
874 return ret;
875}
876
1109ca09 877static const struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = {
771fe6b9
JG
878 .get_modes = radeon_vga_get_modes,
879 .mode_valid = radeon_vga_mode_valid,
880 .best_encoder = radeon_best_single_encoder,
881};
882
1109ca09 883static const struct drm_connector_funcs radeon_vga_connector_funcs = {
771fe6b9
JG
884 .dpms = drm_helper_connector_dpms,
885 .detect = radeon_vga_detect,
886 .fill_modes = drm_helper_probe_single_connector_modes,
887 .destroy = radeon_connector_destroy,
888 .set_property = radeon_connector_set_property,
889};
890
4ce001ab
DA
891static int radeon_tv_get_modes(struct drm_connector *connector)
892{
893 struct drm_device *dev = connector->dev;
923f6848 894 struct radeon_device *rdev = dev->dev_private;
4ce001ab 895 struct drm_display_mode *tv_mode;
923f6848 896 struct drm_encoder *encoder;
4ce001ab 897
923f6848
AD
898 encoder = radeon_best_single_encoder(connector);
899 if (!encoder)
900 return 0;
4ce001ab 901
923f6848
AD
902 /* avivo chips can scale any mode */
903 if (rdev->family >= CHIP_RS600)
904 /* add scaled modes */
905 radeon_add_common_modes(encoder, connector);
906 else {
907 /* only 800x600 is supported right now on pre-avivo chips */
d50ba256 908 tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false);
923f6848
AD
909 tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
910 drm_mode_probed_add(connector, tv_mode);
911 }
4ce001ab
DA
912 return 1;
913}
914
915static int radeon_tv_mode_valid(struct drm_connector *connector,
916 struct drm_display_mode *mode)
917{
a3fa6320
AD
918 if ((mode->hdisplay > 1024) || (mode->vdisplay > 768))
919 return MODE_CLOCK_RANGE;
4ce001ab
DA
920 return MODE_OK;
921}
922
7b334fcb 923static enum drm_connector_status
930a9e28 924radeon_tv_detect(struct drm_connector *connector, bool force)
4ce001ab
DA
925{
926 struct drm_encoder *encoder;
927 struct drm_encoder_helper_funcs *encoder_funcs;
445282db
DA
928 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
929 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc 930 int r;
445282db
DA
931
932 if (!radeon_connector->dac_load_detect)
933 return ret;
4ce001ab 934
10ebc0bc
DA
935 r = pm_runtime_get_sync(connector->dev->dev);
936 if (r < 0)
937 return connector_status_disconnected;
938
4ce001ab
DA
939 encoder = radeon_best_single_encoder(connector);
940 if (!encoder)
941 ret = connector_status_disconnected;
942 else {
943 encoder_funcs = encoder->helper_private;
944 ret = encoder_funcs->detect(encoder, connector);
945 }
946 if (ret == connector_status_connected)
947 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false);
948 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA
949 pm_runtime_mark_last_busy(connector->dev->dev);
950 pm_runtime_put_autosuspend(connector->dev->dev);
4ce001ab
DA
951 return ret;
952}
953
1109ca09 954static const struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = {
4ce001ab
DA
955 .get_modes = radeon_tv_get_modes,
956 .mode_valid = radeon_tv_mode_valid,
957 .best_encoder = radeon_best_single_encoder,
958};
959
1109ca09 960static const struct drm_connector_funcs radeon_tv_connector_funcs = {
4ce001ab
DA
961 .dpms = drm_helper_connector_dpms,
962 .detect = radeon_tv_detect,
963 .fill_modes = drm_helper_probe_single_connector_modes,
964 .destroy = radeon_connector_destroy,
965 .set_property = radeon_connector_set_property,
966};
967
771fe6b9
JG
968static int radeon_dvi_get_modes(struct drm_connector *connector)
969{
970 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
971 int ret;
972
973 ret = radeon_ddc_get_modes(radeon_connector);
771fe6b9
JG
974 return ret;
975}
976
11fe1266
TU
977static bool radeon_check_hpd_status_unchanged(struct drm_connector *connector)
978{
979 struct drm_device *dev = connector->dev;
980 struct radeon_device *rdev = dev->dev_private;
981 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
982 enum drm_connector_status status;
983
984 /* We only trust HPD on R600 and newer ASICS. */
985 if (rdev->family >= CHIP_R600
986 && radeon_connector->hpd.hpd != RADEON_HPD_NONE) {
987 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd))
988 status = connector_status_connected;
989 else
990 status = connector_status_disconnected;
991 if (connector->status == status)
992 return true;
993 }
994
995 return false;
996}
997
4ce001ab
DA
998/*
999 * DVI is complicated
1000 * Do a DDC probe, if DDC probe passes, get the full EDID so
1001 * we can do analog/digital monitor detection at this point.
1002 * If the monitor is an analog monitor or we got no DDC,
1003 * we need to find the DAC encoder object for this connector.
1004 * If we got no DDC, we do load detection on the DAC encoder object.
1005 * If we got analog DDC or load detection passes on the DAC encoder
1006 * we have to check if this analog encoder is shared with anyone else (TV)
1007 * if its shared we have to set the other connector to disconnected.
1008 */
7b334fcb 1009static enum drm_connector_status
930a9e28 1010radeon_dvi_detect(struct drm_connector *connector, bool force)
771fe6b9 1011{
fafcf94e
AD
1012 struct drm_device *dev = connector->dev;
1013 struct radeon_device *rdev = dev->dev_private;
771fe6b9 1014 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
4ce001ab 1015 struct drm_encoder *encoder = NULL;
771fe6b9
JG
1016 struct drm_encoder_helper_funcs *encoder_funcs;
1017 struct drm_mode_object *obj;
10ebc0bc 1018 int i, r;
771fe6b9 1019 enum drm_connector_status ret = connector_status_disconnected;
fc87f13b 1020 bool dret = false, broken_edid = false;
771fe6b9 1021
10ebc0bc
DA
1022 r = pm_runtime_get_sync(connector->dev->dev);
1023 if (r < 0)
1024 return connector_status_disconnected;
1025
1026 if (!force && radeon_check_hpd_status_unchanged(connector)) {
1027 ret = connector->status;
1028 goto exit;
1029 }
11fe1266 1030
eb6b6d7c 1031 if (radeon_connector->ddc_bus)
0a9069d3 1032 dret = radeon_ddc_probe(radeon_connector, false);
4ce001ab 1033 if (dret) {
d0d0a225 1034 radeon_connector->detected_by_load = false;
0294cf4f
AD
1035 if (radeon_connector->edid) {
1036 kfree(radeon_connector->edid);
1037 radeon_connector->edid = NULL;
1038 }
4ce001ab 1039 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
4ce001ab
DA
1040
1041 if (!radeon_connector->edid) {
f82f5f3a 1042 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
72082093 1043 connector->name);
4a9a8b71
DA
1044 /* rs690 seems to have a problem with connectors not existing and always
1045 * return a block of 0's. If we see this just stop polling on this output */
1046 if ((rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) && radeon_connector->base.null_edid_counter) {
1047 ret = connector_status_disconnected;
72082093
JN
1048 DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n",
1049 connector->name);
4a9a8b71 1050 radeon_connector->ddc_bus = NULL;
fc87f13b
EE
1051 } else {
1052 ret = connector_status_connected;
1053 broken_edid = true; /* defer use_digital to later */
4a9a8b71 1054 }
4ce001ab
DA
1055 } else {
1056 radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
1057
0294cf4f
AD
1058 /* some oems have boards with separate digital and analog connectors
1059 * with a shared ddc line (often vga + hdmi)
1060 */
1061 if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) {
1062 kfree(radeon_connector->edid);
1063 radeon_connector->edid = NULL;
1064 ret = connector_status_disconnected;
1065 } else
1066 ret = connector_status_connected;
71407c46 1067
42f14c4b
AD
1068 /* This gets complicated. We have boards with VGA + HDMI with a
1069 * shared DDC line and we have boards with DVI-D + HDMI with a shared
1070 * DDC line. The latter is more complex because with DVI<->HDMI adapters
1071 * you don't really know what's connected to which port as both are digital.
71407c46 1072 */
d3932d6c 1073 if (radeon_connector->shared_ddc && (ret == connector_status_connected)) {
71407c46
AD
1074 struct drm_connector *list_connector;
1075 struct radeon_connector *list_radeon_connector;
1076 list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) {
1077 if (connector == list_connector)
1078 continue;
1079 list_radeon_connector = to_radeon_connector(list_connector);
b2ea4aa6
AD
1080 if (list_radeon_connector->shared_ddc &&
1081 (list_radeon_connector->ddc_bus->rec.i2c_id ==
1082 radeon_connector->ddc_bus->rec.i2c_id)) {
42f14c4b
AD
1083 /* cases where both connectors are digital */
1084 if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) {
1085 /* hpd is our only option in this case */
1086 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
71407c46
AD
1087 kfree(radeon_connector->edid);
1088 radeon_connector->edid = NULL;
1089 ret = connector_status_disconnected;
1090 }
1091 }
1092 }
1093 }
1094 }
4ce001ab
DA
1095 }
1096 }
1097
1098 if ((ret == connector_status_connected) && (radeon_connector->use_digital == true))
1099 goto out;
1100
5f0a2612
AD
1101 /* DVI-D and HDMI-A are digital only */
1102 if ((connector->connector_type == DRM_MODE_CONNECTOR_DVID) ||
1103 (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA))
1104 goto out;
1105
d0d0a225 1106 /* if we aren't forcing don't do destructive polling */
c3cceedd 1107 if (!force) {
d0d0a225
AD
1108 /* only return the previous status if we last
1109 * detected a monitor via load.
1110 */
1111 if (radeon_connector->detected_by_load)
1112 ret = connector->status;
c3cceedd
DA
1113 goto out;
1114 }
1115
4ce001ab 1116 /* find analog encoder */
445282db
DA
1117 if (radeon_connector->dac_load_detect) {
1118 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1119 if (connector->encoder_ids[i] == 0)
1120 break;
771fe6b9 1121
445282db
DA
1122 obj = drm_mode_object_find(connector->dev,
1123 connector->encoder_ids[i],
1124 DRM_MODE_OBJECT_ENCODER);
1125 if (!obj)
1126 continue;
771fe6b9 1127
445282db 1128 encoder = obj_to_encoder(obj);
771fe6b9 1129
e3632507 1130 if (encoder->encoder_type != DRM_MODE_ENCODER_DAC &&
e00e8b5e
AD
1131 encoder->encoder_type != DRM_MODE_ENCODER_TVDAC)
1132 continue;
1133
445282db
DA
1134 encoder_funcs = encoder->helper_private;
1135 if (encoder_funcs->detect) {
fc87f13b
EE
1136 if (!broken_edid) {
1137 if (ret != connector_status_connected) {
1138 /* deal with analog monitors without DDC */
1139 ret = encoder_funcs->detect(encoder, connector);
1140 if (ret == connector_status_connected) {
1141 radeon_connector->use_digital = false;
1142 }
1143 if (ret != connector_status_disconnected)
1144 radeon_connector->detected_by_load = true;
445282db 1145 }
fc87f13b
EE
1146 } else {
1147 enum drm_connector_status lret;
1148 /* assume digital unless load detected otherwise */
1149 radeon_connector->use_digital = true;
1150 lret = encoder_funcs->detect(encoder, connector);
1151 DRM_DEBUG_KMS("load_detect %x returned: %x\n",encoder->encoder_type,lret);
1152 if (lret == connector_status_connected)
1153 radeon_connector->use_digital = false;
771fe6b9 1154 }
445282db 1155 break;
771fe6b9
JG
1156 }
1157 }
1158 }
1159
4ce001ab
DA
1160 if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) &&
1161 encoder) {
1162 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
1163 }
1164
fafcf94e
AD
1165 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
1166 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
1167 * by other means, assume the DFP is connected and use that EDID. In most
1168 * cases the DVI port is actually a virtual KVM port connected to the service
1169 * processor.
1170 */
a09d431f 1171out:
fafcf94e
AD
1172 if ((!rdev->is_atom_bios) &&
1173 (ret == connector_status_disconnected) &&
1174 rdev->mode_info.bios_hardcoded_edid_size) {
1175 radeon_connector->use_digital = true;
1176 ret = connector_status_connected;
1177 }
1178
771fe6b9
JG
1179 /* updated in get modes as well since we need to know if it's analog or digital */
1180 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA
1181
1182exit:
1183 pm_runtime_mark_last_busy(connector->dev->dev);
1184 pm_runtime_put_autosuspend(connector->dev->dev);
1185
771fe6b9
JG
1186 return ret;
1187}
1188
1189/* okay need to be smart in here about which encoder to pick */
1109ca09 1190static struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector)
771fe6b9
JG
1191{
1192 int enc_id = connector->encoder_ids[0];
1193 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1194 struct drm_mode_object *obj;
1195 struct drm_encoder *encoder;
1196 int i;
1197 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1198 if (connector->encoder_ids[i] == 0)
1199 break;
1200
1201 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
1202 if (!obj)
1203 continue;
1204
1205 encoder = obj_to_encoder(obj);
1206
4ce001ab 1207 if (radeon_connector->use_digital == true) {
771fe6b9
JG
1208 if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)
1209 return encoder;
1210 } else {
1211 if (encoder->encoder_type == DRM_MODE_ENCODER_DAC ||
1212 encoder->encoder_type == DRM_MODE_ENCODER_TVDAC)
1213 return encoder;
1214 }
1215 }
1216
1217 /* see if we have a default encoder TODO */
1218
1219 /* then check use digitial */
1220 /* pick the first one */
1221 if (enc_id) {
1222 obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER);
1223 if (!obj)
1224 return NULL;
1225 encoder = obj_to_encoder(obj);
1226 return encoder;
1227 }
1228 return NULL;
1229}
1230
d50ba256
DA
1231static void radeon_dvi_force(struct drm_connector *connector)
1232{
1233 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1234 if (connector->force == DRM_FORCE_ON)
1235 radeon_connector->use_digital = false;
1236 if (connector->force == DRM_FORCE_ON_DIGITAL)
1237 radeon_connector->use_digital = true;
1238}
1239
a3fa6320
AD
1240static int radeon_dvi_mode_valid(struct drm_connector *connector,
1241 struct drm_display_mode *mode)
1242{
1b24203e
AD
1243 struct drm_device *dev = connector->dev;
1244 struct radeon_device *rdev = dev->dev_private;
a3fa6320
AD
1245 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1246
1247 /* XXX check mode bandwidth */
1248
1b24203e
AD
1249 /* clocks over 135 MHz have heat issues with DVI on RV100 */
1250 if (radeon_connector->use_digital &&
1251 (rdev->family == CHIP_RV100) &&
1252 (mode->clock > 135000))
1253 return MODE_CLOCK_HIGH;
1254
a3fa6320
AD
1255 if (radeon_connector->use_digital && (mode->clock > 165000)) {
1256 if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) ||
1257 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) ||
1258 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B))
1259 return MODE_OK;
e1e84017 1260 else if (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_A) {
1b2681ba 1261 if (ASIC_IS_DCE6(rdev)) {
e1e84017
AD
1262 /* HDMI 1.3+ supports max clock of 340 Mhz */
1263 if (mode->clock > 340000)
1264 return MODE_CLOCK_HIGH;
1265 else
1266 return MODE_OK;
1267 } else
1268 return MODE_CLOCK_HIGH;
1269 } else
a3fa6320
AD
1270 return MODE_CLOCK_HIGH;
1271 }
b20f9bef
AD
1272
1273 /* check against the max pixel clock */
1274 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
1275 return MODE_CLOCK_HIGH;
1276
a3fa6320
AD
1277 return MODE_OK;
1278}
1279
1109ca09 1280static const struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = {
771fe6b9 1281 .get_modes = radeon_dvi_get_modes,
a3fa6320 1282 .mode_valid = radeon_dvi_mode_valid,
771fe6b9
JG
1283 .best_encoder = radeon_dvi_encoder,
1284};
1285
1109ca09 1286static const struct drm_connector_funcs radeon_dvi_connector_funcs = {
771fe6b9
JG
1287 .dpms = drm_helper_connector_dpms,
1288 .detect = radeon_dvi_detect,
1289 .fill_modes = drm_helper_probe_single_connector_modes,
1290 .set_property = radeon_connector_set_property,
1291 .destroy = radeon_connector_destroy,
d50ba256 1292 .force = radeon_dvi_force,
771fe6b9
JG
1293};
1294
746c1aa4
DA
1295static int radeon_dp_get_modes(struct drm_connector *connector)
1296{
1297 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
8b834852 1298 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1299 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
746c1aa4
DA
1300 int ret;
1301
f89931f3
AD
1302 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1303 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD
1304 struct drm_display_mode *mode;
1305
2b69ffb9
AD
1306 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
1307 if (!radeon_dig_connector->edp_on)
1308 atombios_set_edp_panel_power(connector,
1309 ATOM_TRANSMITTER_ACTION_POWER_ON);
1310 ret = radeon_ddc_get_modes(radeon_connector);
1311 if (!radeon_dig_connector->edp_on)
1312 atombios_set_edp_panel_power(connector,
1313 ATOM_TRANSMITTER_ACTION_POWER_OFF);
1314 } else {
1315 /* need to setup ddc on the bridge */
1316 if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1317 ENCODER_OBJECT_ID_NONE) {
1318 if (encoder)
1319 radeon_atom_ext_encoder_setup_ddc(encoder);
1320 }
1321 ret = radeon_ddc_get_modes(radeon_connector);
1322 }
d291767b
AD
1323
1324 if (ret > 0) {
d291767b
AD
1325 if (encoder) {
1326 radeon_fixup_lvds_native_mode(encoder, connector);
1327 /* add scaled modes */
1328 radeon_add_common_modes(encoder, connector);
1329 }
1330 return ret;
1331 }
1332
d291767b
AD
1333 if (!encoder)
1334 return 0;
1335
1336 /* we have no EDID modes */
1337 mode = radeon_fp_native_mode(encoder);
1338 if (mode) {
1339 ret = 1;
1340 drm_mode_probed_add(connector, mode);
1341 /* add the width/height from vbios tables if available */
1342 connector->display_info.width_mm = mode->width_mm;
1343 connector->display_info.height_mm = mode->height_mm;
1344 /* add scaled modes */
1345 radeon_add_common_modes(encoder, connector);
1346 }
591a10e1
AD
1347 } else {
1348 /* need to setup ddc on the bridge */
1d33e1fc
AD
1349 if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1350 ENCODER_OBJECT_ID_NONE) {
591a10e1
AD
1351 if (encoder)
1352 radeon_atom_ext_encoder_setup_ddc(encoder);
1353 }
d291767b 1354 ret = radeon_ddc_get_modes(radeon_connector);
591a10e1 1355 }
8b834852 1356
746c1aa4
DA
1357 return ret;
1358}
1359
1d33e1fc 1360u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector)
d7fa8bb3
AD
1361{
1362 struct drm_mode_object *obj;
1363 struct drm_encoder *encoder;
1364 struct radeon_encoder *radeon_encoder;
1365 int i;
d7fa8bb3
AD
1366
1367 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1368 if (connector->encoder_ids[i] == 0)
1369 break;
1370
1371 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
1372 if (!obj)
1373 continue;
1374
1375 encoder = obj_to_encoder(obj);
1376 radeon_encoder = to_radeon_encoder(encoder);
1377
1378 switch (radeon_encoder->encoder_id) {
1379 case ENCODER_OBJECT_ID_TRAVIS:
1380 case ENCODER_OBJECT_ID_NUTMEG:
1d33e1fc 1381 return radeon_encoder->encoder_id;
d7fa8bb3
AD
1382 default:
1383 break;
1384 }
1385 }
1386
1d33e1fc 1387 return ENCODER_OBJECT_ID_NONE;
d7fa8bb3
AD
1388}
1389
1390bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector)
1391{
1392 struct drm_mode_object *obj;
1393 struct drm_encoder *encoder;
1394 struct radeon_encoder *radeon_encoder;
1395 int i;
1396 bool found = false;
1397
1398 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1399 if (connector->encoder_ids[i] == 0)
1400 break;
1401
1402 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
1403 if (!obj)
1404 continue;
1405
1406 encoder = obj_to_encoder(obj);
1407 radeon_encoder = to_radeon_encoder(encoder);
1408 if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2)
1409 found = true;
1410 }
1411
1412 return found;
1413}
1414
1415bool radeon_connector_is_dp12_capable(struct drm_connector *connector)
1416{
1417 struct drm_device *dev = connector->dev;
1418 struct radeon_device *rdev = dev->dev_private;
1419
1420 if (ASIC_IS_DCE5(rdev) &&
af5d3653 1421 (rdev->clock.default_dispclk >= 53900) &&
d7fa8bb3
AD
1422 radeon_connector_encoder_is_hbr2(connector)) {
1423 return true;
1424 }
1425
1426 return false;
1427}
1428
7b334fcb 1429static enum drm_connector_status
930a9e28 1430radeon_dp_detect(struct drm_connector *connector, bool force)
746c1aa4 1431{
f8d0edde
AD
1432 struct drm_device *dev = connector->dev;
1433 struct radeon_device *rdev = dev->dev_private;
746c1aa4 1434 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
746c1aa4 1435 enum drm_connector_status ret = connector_status_disconnected;
4143e919 1436 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1437 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
10ebc0bc 1438 int r;
746c1aa4 1439
10ebc0bc
DA
1440 r = pm_runtime_get_sync(connector->dev->dev);
1441 if (r < 0)
1442 return connector_status_disconnected;
1443
1444 if (!force && radeon_check_hpd_status_unchanged(connector)) {
1445 ret = connector->status;
1446 goto out;
1447 }
11fe1266 1448
746c1aa4
DA
1449 if (radeon_connector->edid) {
1450 kfree(radeon_connector->edid);
1451 radeon_connector->edid = NULL;
1452 }
1453
f89931f3
AD
1454 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1455 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD
1456 if (encoder) {
1457 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1458 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1459
1460 /* check if panel is valid */
1461 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
1462 ret = connector_status_connected;
1463 }
6f50eae7
AD
1464 /* eDP is always DP */
1465 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
8b834852
AD
1466 if (!radeon_dig_connector->edp_on)
1467 atombios_set_edp_panel_power(connector,
1468 ATOM_TRANSMITTER_ACTION_POWER_ON);
6f50eae7 1469 if (radeon_dp_getdpcd(radeon_connector))
9fa05c98 1470 ret = connector_status_connected;
8b834852
AD
1471 if (!radeon_dig_connector->edp_on)
1472 atombios_set_edp_panel_power(connector,
1473 ATOM_TRANSMITTER_ACTION_POWER_OFF);
1d33e1fc
AD
1474 } else if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1475 ENCODER_OBJECT_ID_NONE) {
b06947b5
AD
1476 /* DP bridges are always DP */
1477 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
1478 /* get the DPCD from the bridge */
1479 radeon_dp_getdpcd(radeon_connector);
1480
6777a4f6
AD
1481 if (encoder) {
1482 /* setup ddc on the bridge */
1483 radeon_atom_ext_encoder_setup_ddc(encoder);
0a9069d3
NOS
1484 /* bridge chips are always aux */
1485 if (radeon_ddc_probe(radeon_connector, true)) /* try DDC */
b06947b5 1486 ret = connector_status_connected;
6777a4f6
AD
1487 else if (radeon_connector->dac_load_detect) { /* try load detection */
1488 struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private;
b06947b5
AD
1489 ret = encoder_funcs->detect(encoder, connector);
1490 }
591a10e1 1491 }
b06947b5 1492 } else {
6f50eae7 1493 radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
f8d0edde
AD
1494 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
1495 ret = connector_status_connected;
1496 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
1497 radeon_dp_getdpcd(radeon_connector);
6f50eae7 1498 } else {
f8d0edde
AD
1499 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
1500 if (radeon_dp_getdpcd(radeon_connector))
1501 ret = connector_status_connected;
1502 } else {
d592fca9 1503 /* try non-aux ddc (DP to DVI/HDMI/etc. adapter) */
0a9069d3 1504 if (radeon_ddc_probe(radeon_connector, false))
f8d0edde
AD
1505 ret = connector_status_connected;
1506 }
4143e919 1507 }
746c1aa4 1508 }
4143e919 1509
30f44372 1510 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA
1511out:
1512 pm_runtime_mark_last_busy(connector->dev->dev);
1513 pm_runtime_put_autosuspend(connector->dev->dev);
1514
746c1aa4
DA
1515 return ret;
1516}
1517
5801ead6
AD
1518static int radeon_dp_mode_valid(struct drm_connector *connector,
1519 struct drm_display_mode *mode)
1520{
1521 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1522 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
1523
1524 /* XXX check mode bandwidth */
1525
f89931f3
AD
1526 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1527 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD
1528 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
1529
1530 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
1531 return MODE_PANEL;
1532
1533 if (encoder) {
1534 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1535 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1536
f89931f3 1537 /* AVIVO hardware supports downscaling modes larger than the panel
d291767b
AD
1538 * to the panel size, but I'm not sure this is desirable.
1539 */
1540 if ((mode->hdisplay > native_mode->hdisplay) ||
1541 (mode->vdisplay > native_mode->vdisplay))
1542 return MODE_PANEL;
1543
1544 /* if scaling is disabled, block non-native modes */
1545 if (radeon_encoder->rmx_type == RMX_OFF) {
1546 if ((mode->hdisplay != native_mode->hdisplay) ||
1547 (mode->vdisplay != native_mode->vdisplay))
1548 return MODE_PANEL;
1549 }
1550 }
5801ead6 1551 return MODE_OK;
d291767b
AD
1552 } else {
1553 if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
1554 (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
1555 return radeon_dp_mode_valid_helper(connector, mode);
1556 else
1557 return MODE_OK;
1558 }
5801ead6
AD
1559}
1560
1109ca09 1561static const struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = {
746c1aa4 1562 .get_modes = radeon_dp_get_modes,
5801ead6 1563 .mode_valid = radeon_dp_mode_valid,
746c1aa4
DA
1564 .best_encoder = radeon_dvi_encoder,
1565};
1566
1109ca09 1567static const struct drm_connector_funcs radeon_dp_connector_funcs = {
746c1aa4
DA
1568 .dpms = drm_helper_connector_dpms,
1569 .detect = radeon_dp_detect,
1570 .fill_modes = drm_helper_probe_single_connector_modes,
1571 .set_property = radeon_connector_set_property,
379dfc25 1572 .destroy = radeon_connector_destroy,
746c1aa4
DA
1573 .force = radeon_dvi_force,
1574};
1575
855f5f1d
AD
1576static const struct drm_connector_funcs radeon_edp_connector_funcs = {
1577 .dpms = drm_helper_connector_dpms,
1578 .detect = radeon_dp_detect,
1579 .fill_modes = drm_helper_probe_single_connector_modes,
1580 .set_property = radeon_lvds_set_property,
379dfc25 1581 .destroy = radeon_connector_destroy,
855f5f1d
AD
1582 .force = radeon_dvi_force,
1583};
1584
1585static const struct drm_connector_funcs radeon_lvds_bridge_connector_funcs = {
1586 .dpms = drm_helper_connector_dpms,
1587 .detect = radeon_dp_detect,
1588 .fill_modes = drm_helper_probe_single_connector_modes,
1589 .set_property = radeon_lvds_set_property,
379dfc25 1590 .destroy = radeon_connector_destroy,
855f5f1d
AD
1591 .force = radeon_dvi_force,
1592};
1593
771fe6b9
JG
1594void
1595radeon_add_atom_connector(struct drm_device *dev,
1596 uint32_t connector_id,
1597 uint32_t supported_device,
1598 int connector_type,
1599 struct radeon_i2c_bus_rec *i2c_bus,
b75fad06 1600 uint32_t igp_lane_info,
eed45b30 1601 uint16_t connector_object_id,
26b5bc98
AD
1602 struct radeon_hpd *hpd,
1603 struct radeon_router *router)
771fe6b9 1604{
445282db 1605 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG
1606 struct drm_connector *connector;
1607 struct radeon_connector *radeon_connector;
1608 struct radeon_connector_atom_dig *radeon_dig_connector;
eac4dff6
AD
1609 struct drm_encoder *encoder;
1610 struct radeon_encoder *radeon_encoder;
771fe6b9 1611 uint32_t subpixel_order = SubPixelNone;
0294cf4f 1612 bool shared_ddc = false;
eac4dff6 1613 bool is_dp_bridge = false;
496263bf 1614 bool has_aux = false;
771fe6b9 1615
4ce001ab 1616 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG
1617 return;
1618
cf4c12f9
AD
1619 /* if the user selected tv=0 don't try and add the connector */
1620 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
1621 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
1622 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
1623 (radeon_tv == 0))
1624 return;
1625
771fe6b9
JG
1626 /* see if we already added it */
1627 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1628 radeon_connector = to_radeon_connector(connector);
1629 if (radeon_connector->connector_id == connector_id) {
1630 radeon_connector->devices |= supported_device;
1631 return;
1632 }
0294cf4f 1633 if (radeon_connector->ddc_bus && i2c_bus->valid) {
d3932d6c 1634 if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) {
0294cf4f
AD
1635 radeon_connector->shared_ddc = true;
1636 shared_ddc = true;
1637 }
fb939dfc 1638 if (radeon_connector->router_bus && router->ddc_valid &&
26b5bc98
AD
1639 (radeon_connector->router.router_id == router->router_id)) {
1640 radeon_connector->shared_ddc = false;
1641 shared_ddc = false;
1642 }
0294cf4f 1643 }
771fe6b9
JG
1644 }
1645
eac4dff6
AD
1646 /* check if it's a dp bridge */
1647 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
1648 radeon_encoder = to_radeon_encoder(encoder);
1649 if (radeon_encoder->devices & supported_device) {
1650 switch (radeon_encoder->encoder_id) {
1651 case ENCODER_OBJECT_ID_TRAVIS:
1652 case ENCODER_OBJECT_ID_NUTMEG:
1653 is_dp_bridge = true;
1654 break;
1655 default:
1656 break;
1657 }
1658 }
1659 }
1660
771fe6b9
JG
1661 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
1662 if (!radeon_connector)
1663 return;
1664
1665 connector = &radeon_connector->base;
1666
1667 radeon_connector->connector_id = connector_id;
1668 radeon_connector->devices = supported_device;
0294cf4f 1669 radeon_connector->shared_ddc = shared_ddc;
b75fad06 1670 radeon_connector->connector_object_id = connector_object_id;
eed45b30 1671 radeon_connector->hpd = *hpd;
bc1c4dc3 1672
26b5bc98 1673 radeon_connector->router = *router;
fb939dfc 1674 if (router->ddc_valid || router->cd_valid) {
26b5bc98
AD
1675 radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info);
1676 if (!radeon_connector->router_bus)
a70882aa 1677 DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n");
26b5bc98 1678 }
eac4dff6
AD
1679
1680 if (is_dp_bridge) {
771fe6b9
JG
1681 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1682 if (!radeon_dig_connector)
1683 goto failed;
771fe6b9
JG
1684 radeon_dig_connector->igp_lane_info = igp_lane_info;
1685 radeon_connector->con_priv = radeon_dig_connector;
771fe6b9 1686 if (i2c_bus->valid) {
379dfc25
AD
1687 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1688 if (radeon_connector->ddc_bus)
496263bf
AD
1689 has_aux = true;
1690 else
eac4dff6 1691 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1692 }
eac4dff6
AD
1693 switch (connector_type) {
1694 case DRM_MODE_CONNECTOR_VGA:
1695 case DRM_MODE_CONNECTOR_DVIA:
1696 default:
855f5f1d
AD
1697 drm_connector_init(dev, &radeon_connector->base,
1698 &radeon_dp_connector_funcs, connector_type);
1699 drm_connector_helper_add(&radeon_connector->base,
1700 &radeon_dp_connector_helper_funcs);
eac4dff6
AD
1701 connector->interlace_allowed = true;
1702 connector->doublescan_allowed = true;
d629a3ce 1703 radeon_connector->dac_load_detect = true;
e35755fa 1704 drm_object_attach_property(&radeon_connector->base.base,
d629a3ce
AD
1705 rdev->mode_info.load_detect_property,
1706 1);
eac4dff6
AD
1707 break;
1708 case DRM_MODE_CONNECTOR_DVII:
1709 case DRM_MODE_CONNECTOR_DVID:
1710 case DRM_MODE_CONNECTOR_HDMIA:
1711 case DRM_MODE_CONNECTOR_HDMIB:
1712 case DRM_MODE_CONNECTOR_DisplayPort:
855f5f1d
AD
1713 drm_connector_init(dev, &radeon_connector->base,
1714 &radeon_dp_connector_funcs, connector_type);
1715 drm_connector_helper_add(&radeon_connector->base,
1716 &radeon_dp_connector_helper_funcs);
e35755fa 1717 drm_object_attach_property(&radeon_connector->base.base,
430f70d5 1718 rdev->mode_info.underscan_property,
56bec7c0 1719 UNDERSCAN_OFF);
e35755fa 1720 drm_object_attach_property(&radeon_connector->base.base,
5bccf5e3
MG
1721 rdev->mode_info.underscan_hborder_property,
1722 0);
e35755fa 1723 drm_object_attach_property(&radeon_connector->base.base,
5bccf5e3
MG
1724 rdev->mode_info.underscan_vborder_property,
1725 0);
91915260 1726
6214bb74
AD
1727 drm_object_attach_property(&radeon_connector->base.base,
1728 rdev->mode_info.dither_property,
1729 RADEON_FMT_DITHER_DISABLE);
91915260 1730
108dc8e8
AD
1731 if (radeon_audio != 0)
1732 drm_object_attach_property(&radeon_connector->base.base,
1733 rdev->mode_info.audio_property,
e31fadd3 1734 RADEON_AUDIO_AUTO);
91915260 1735
eac4dff6
AD
1736 subpixel_order = SubPixelHorizontalRGB;
1737 connector->interlace_allowed = true;
1738 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
1739 connector->doublescan_allowed = true;
1740 else
1741 connector->doublescan_allowed = false;
d629a3ce
AD
1742 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
1743 radeon_connector->dac_load_detect = true;
e35755fa 1744 drm_object_attach_property(&radeon_connector->base.base,
d629a3ce
AD
1745 rdev->mode_info.load_detect_property,
1746 1);
1747 }
eac4dff6
AD
1748 break;
1749 case DRM_MODE_CONNECTOR_LVDS:
1750 case DRM_MODE_CONNECTOR_eDP:
855f5f1d
AD
1751 drm_connector_init(dev, &radeon_connector->base,
1752 &radeon_lvds_bridge_connector_funcs, connector_type);
1753 drm_connector_helper_add(&radeon_connector->base,
1754 &radeon_dp_connector_helper_funcs);
e35755fa 1755 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1756 dev->mode_config.scaling_mode_property,
1757 DRM_MODE_SCALE_FULLSCREEN);
1758 subpixel_order = SubPixelHorizontalRGB;
1759 connector->interlace_allowed = false;
1760 connector->doublescan_allowed = false;
1761 break;
5bccf5e3 1762 }
eac4dff6
AD
1763 } else {
1764 switch (connector_type) {
1765 case DRM_MODE_CONNECTOR_VGA:
1766 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
1767 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
1768 if (i2c_bus->valid) {
1769 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1770 if (!radeon_connector->ddc_bus)
1771 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1772 }
390d0bbe 1773 radeon_connector->dac_load_detect = true;
e35755fa 1774 drm_object_attach_property(&radeon_connector->base.base,
390d0bbe
AD
1775 rdev->mode_info.load_detect_property,
1776 1);
eac4dff6
AD
1777 /* no HPD on analog connectors */
1778 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1779 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1780 connector->interlace_allowed = true;
c49948f4 1781 connector->doublescan_allowed = true;
eac4dff6
AD
1782 break;
1783 case DRM_MODE_CONNECTOR_DVIA:
1784 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
1785 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
1786 if (i2c_bus->valid) {
1787 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1788 if (!radeon_connector->ddc_bus)
1789 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1790 }
1791 radeon_connector->dac_load_detect = true;
e35755fa 1792 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1793 rdev->mode_info.load_detect_property,
1794 1);
1795 /* no HPD on analog connectors */
1796 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1797 connector->interlace_allowed = true;
1798 connector->doublescan_allowed = true;
1799 break;
1800 case DRM_MODE_CONNECTOR_DVII:
1801 case DRM_MODE_CONNECTOR_DVID:
1802 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1803 if (!radeon_dig_connector)
1804 goto failed;
1805 radeon_dig_connector->igp_lane_info = igp_lane_info;
1806 radeon_connector->con_priv = radeon_dig_connector;
1807 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
1808 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
1809 if (i2c_bus->valid) {
1810 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1811 if (!radeon_connector->ddc_bus)
1812 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1813 }
1814 subpixel_order = SubPixelHorizontalRGB;
e35755fa 1815 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1816 rdev->mode_info.coherent_mode_property,
1817 1);
1818 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 1819 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1820 rdev->mode_info.underscan_property,
1821 UNDERSCAN_OFF);
e35755fa 1822 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1823 rdev->mode_info.underscan_hborder_property,
1824 0);
e35755fa 1825 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1826 rdev->mode_info.underscan_vborder_property,
1827 0);
1828 }
108dc8e8 1829 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 1830 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 1831 rdev->mode_info.audio_property,
e31fadd3 1832 RADEON_AUDIO_AUTO);
8666c076 1833 }
6214bb74
AD
1834 if (ASIC_IS_AVIVO(rdev)) {
1835 drm_object_attach_property(&radeon_connector->base.base,
1836 rdev->mode_info.dither_property,
1837 RADEON_FMT_DITHER_DISABLE);
1838 }
eac4dff6
AD
1839 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
1840 radeon_connector->dac_load_detect = true;
e35755fa 1841 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1842 rdev->mode_info.load_detect_property,
1843 1);
1844 }
1845 connector->interlace_allowed = true;
1846 if (connector_type == DRM_MODE_CONNECTOR_DVII)
1847 connector->doublescan_allowed = true;
1848 else
1849 connector->doublescan_allowed = false;
1850 break;
1851 case DRM_MODE_CONNECTOR_HDMIA:
1852 case DRM_MODE_CONNECTOR_HDMIB:
1853 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1854 if (!radeon_dig_connector)
1855 goto failed;
1856 radeon_dig_connector->igp_lane_info = igp_lane_info;
1857 radeon_connector->con_priv = radeon_dig_connector;
1858 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
1859 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
1860 if (i2c_bus->valid) {
1861 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1862 if (!radeon_connector->ddc_bus)
1863 DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1864 }
e35755fa 1865 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1866 rdev->mode_info.coherent_mode_property,
1867 1);
1868 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 1869 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1870 rdev->mode_info.underscan_property,
1871 UNDERSCAN_OFF);
e35755fa 1872 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1873 rdev->mode_info.underscan_hborder_property,
1874 0);
e35755fa 1875 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1876 rdev->mode_info.underscan_vborder_property,
1877 0);
1878 }
108dc8e8 1879 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 1880 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 1881 rdev->mode_info.audio_property,
e31fadd3 1882 RADEON_AUDIO_AUTO);
8666c076 1883 }
6214bb74
AD
1884 if (ASIC_IS_AVIVO(rdev)) {
1885 drm_object_attach_property(&radeon_connector->base.base,
1886 rdev->mode_info.dither_property,
1887 RADEON_FMT_DITHER_DISABLE);
1888 }
eac4dff6
AD
1889 subpixel_order = SubPixelHorizontalRGB;
1890 connector->interlace_allowed = true;
1891 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
1892 connector->doublescan_allowed = true;
1893 else
1894 connector->doublescan_allowed = false;
1895 break;
1896 case DRM_MODE_CONNECTOR_DisplayPort:
1897 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1898 if (!radeon_dig_connector)
1899 goto failed;
1900 radeon_dig_connector->igp_lane_info = igp_lane_info;
1901 radeon_connector->con_priv = radeon_dig_connector;
1902 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
1903 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
1904 if (i2c_bus->valid) {
eac4dff6 1905 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
496263bf
AD
1906 if (radeon_connector->ddc_bus)
1907 has_aux = true;
1908 else
eac4dff6
AD
1909 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1910 }
1911 subpixel_order = SubPixelHorizontalRGB;
e35755fa 1912 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1913 rdev->mode_info.coherent_mode_property,
1914 1);
1915 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 1916 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1917 rdev->mode_info.underscan_property,
1918 UNDERSCAN_OFF);
e35755fa 1919 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1920 rdev->mode_info.underscan_hborder_property,
1921 0);
e35755fa 1922 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1923 rdev->mode_info.underscan_vborder_property,
1924 0);
1925 }
108dc8e8 1926 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 1927 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 1928 rdev->mode_info.audio_property,
e31fadd3 1929 RADEON_AUDIO_AUTO);
8666c076 1930 }
6214bb74
AD
1931 if (ASIC_IS_AVIVO(rdev)) {
1932 drm_object_attach_property(&radeon_connector->base.base,
1933 rdev->mode_info.dither_property,
1934 RADEON_FMT_DITHER_DISABLE);
91915260 1935
6214bb74 1936 }
eac4dff6
AD
1937 connector->interlace_allowed = true;
1938 /* in theory with a DP to VGA converter... */
c49948f4 1939 connector->doublescan_allowed = false;
eac4dff6
AD
1940 break;
1941 case DRM_MODE_CONNECTOR_eDP:
1942 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1943 if (!radeon_dig_connector)
1944 goto failed;
1945 radeon_dig_connector->igp_lane_info = igp_lane_info;
1946 radeon_connector->con_priv = radeon_dig_connector;
855f5f1d 1947 drm_connector_init(dev, &radeon_connector->base, &radeon_edp_connector_funcs, connector_type);
eac4dff6
AD
1948 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
1949 if (i2c_bus->valid) {
379dfc25
AD
1950 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1951 if (radeon_connector->ddc_bus)
496263bf
AD
1952 has_aux = true;
1953 else
eac4dff6
AD
1954 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1955 }
e35755fa 1956 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1957 dev->mode_config.scaling_mode_property,
1958 DRM_MODE_SCALE_FULLSCREEN);
1959 subpixel_order = SubPixelHorizontalRGB;
1960 connector->interlace_allowed = false;
1961 connector->doublescan_allowed = false;
1962 break;
1963 case DRM_MODE_CONNECTOR_SVIDEO:
1964 case DRM_MODE_CONNECTOR_Composite:
1965 case DRM_MODE_CONNECTOR_9PinDIN:
1966 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
1967 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
1968 radeon_connector->dac_load_detect = true;
e35755fa 1969 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1970 rdev->mode_info.load_detect_property,
1971 1);
e35755fa 1972 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1973 rdev->mode_info.tv_std_property,
1974 radeon_atombios_get_tv_info(rdev));
1975 /* no HPD on analog connectors */
1976 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1977 connector->interlace_allowed = false;
1978 connector->doublescan_allowed = false;
1979 break;
1980 case DRM_MODE_CONNECTOR_LVDS:
1981 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1982 if (!radeon_dig_connector)
1983 goto failed;
1984 radeon_dig_connector->igp_lane_info = igp_lane_info;
1985 radeon_connector->con_priv = radeon_dig_connector;
1986 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
1987 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
1988 if (i2c_bus->valid) {
1989 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1990 if (!radeon_connector->ddc_bus)
1991 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1992 }
e35755fa 1993 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD
1994 dev->mode_config.scaling_mode_property,
1995 DRM_MODE_SCALE_FULLSCREEN);
1996 subpixel_order = SubPixelHorizontalRGB;
1997 connector->interlace_allowed = false;
1998 connector->doublescan_allowed = false;
1999 break;
771fe6b9 2000 }
771fe6b9
JG
2001 }
2002
2581afcc 2003 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA
2004 if (i2c_bus->valid)
2005 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2006 } else
2007 connector->polled = DRM_CONNECTOR_POLL_HPD;
2008
771fe6b9
JG
2009 connector->display_info.subpixel_order = subpixel_order;
2010 drm_sysfs_connector_add(connector);
496263bf
AD
2011
2012 if (has_aux)
2013 radeon_dp_aux_init(radeon_connector);
2014
771fe6b9
JG
2015 return;
2016
2017failed:
771fe6b9
JG
2018 drm_connector_cleanup(connector);
2019 kfree(connector);
2020}
2021
2022void
2023radeon_add_legacy_connector(struct drm_device *dev,
2024 uint32_t connector_id,
2025 uint32_t supported_device,
2026 int connector_type,
b75fad06 2027 struct radeon_i2c_bus_rec *i2c_bus,
eed45b30
AD
2028 uint16_t connector_object_id,
2029 struct radeon_hpd *hpd)
771fe6b9 2030{
445282db 2031 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG
2032 struct drm_connector *connector;
2033 struct radeon_connector *radeon_connector;
2034 uint32_t subpixel_order = SubPixelNone;
2035
4ce001ab 2036 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG
2037 return;
2038
cf4c12f9
AD
2039 /* if the user selected tv=0 don't try and add the connector */
2040 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
2041 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
2042 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
2043 (radeon_tv == 0))
2044 return;
2045
771fe6b9
JG
2046 /* see if we already added it */
2047 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
2048 radeon_connector = to_radeon_connector(connector);
2049 if (radeon_connector->connector_id == connector_id) {
2050 radeon_connector->devices |= supported_device;
2051 return;
2052 }
2053 }
2054
2055 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
2056 if (!radeon_connector)
2057 return;
2058
2059 connector = &radeon_connector->base;
2060
2061 radeon_connector->connector_id = connector_id;
2062 radeon_connector->devices = supported_device;
b75fad06 2063 radeon_connector->connector_object_id = connector_object_id;
eed45b30 2064 radeon_connector->hpd = *hpd;
bc1c4dc3 2065
771fe6b9
JG
2066 switch (connector_type) {
2067 case DRM_MODE_CONNECTOR_VGA:
2068 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 2069 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 2070 if (i2c_bus->valid) {
f376b94f 2071 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2072 if (!radeon_connector->ddc_bus)
a70882aa 2073 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2074 }
35e4b7af 2075 radeon_connector->dac_load_detect = true;
e35755fa 2076 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA
2077 rdev->mode_info.load_detect_property,
2078 1);
2581afcc
AD
2079 /* no HPD on analog connectors */
2080 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
eb1f8e4f 2081 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
c49948f4
AD
2082 connector->interlace_allowed = true;
2083 connector->doublescan_allowed = true;
771fe6b9
JG
2084 break;
2085 case DRM_MODE_CONNECTOR_DVIA:
2086 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 2087 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 2088 if (i2c_bus->valid) {
f376b94f 2089 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2090 if (!radeon_connector->ddc_bus)
a70882aa 2091 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2092 }
35e4b7af 2093 radeon_connector->dac_load_detect = true;
e35755fa 2094 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA
2095 rdev->mode_info.load_detect_property,
2096 1);
2581afcc
AD
2097 /* no HPD on analog connectors */
2098 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD
2099 connector->interlace_allowed = true;
2100 connector->doublescan_allowed = true;
771fe6b9
JG
2101 break;
2102 case DRM_MODE_CONNECTOR_DVII:
2103 case DRM_MODE_CONNECTOR_DVID:
2104 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
0b4c0f3f 2105 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
771fe6b9 2106 if (i2c_bus->valid) {
f376b94f 2107 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2108 if (!radeon_connector->ddc_bus)
a70882aa 2109 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
68b3adb4
AD
2110 }
2111 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
35e4b7af 2112 radeon_connector->dac_load_detect = true;
e35755fa 2113 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA
2114 rdev->mode_info.load_detect_property,
2115 1);
771fe6b9
JG
2116 }
2117 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD
2118 connector->interlace_allowed = true;
2119 if (connector_type == DRM_MODE_CONNECTOR_DVII)
2120 connector->doublescan_allowed = true;
2121 else
2122 connector->doublescan_allowed = false;
771fe6b9
JG
2123 break;
2124 case DRM_MODE_CONNECTOR_SVIDEO:
2125 case DRM_MODE_CONNECTOR_Composite:
2126 case DRM_MODE_CONNECTOR_9PinDIN:
cf4c12f9
AD
2127 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
2128 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
2129 radeon_connector->dac_load_detect = true;
2130 /* RS400,RC410,RS480 chipset seems to report a lot
2131 * of false positive on load detect, we haven't yet
2132 * found a way to make load detect reliable on those
2133 * chipset, thus just disable it for TV.
2134 */
2135 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480)
2136 radeon_connector->dac_load_detect = false;
e35755fa 2137 drm_object_attach_property(&radeon_connector->base.base,
cf4c12f9
AD
2138 rdev->mode_info.load_detect_property,
2139 radeon_connector->dac_load_detect);
e35755fa 2140 drm_object_attach_property(&radeon_connector->base.base,
cf4c12f9
AD
2141 rdev->mode_info.tv_std_property,
2142 radeon_combios_get_tv_info(rdev));
2143 /* no HPD on analog connectors */
2144 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD
2145 connector->interlace_allowed = false;
2146 connector->doublescan_allowed = false;
771fe6b9
JG
2147 break;
2148 case DRM_MODE_CONNECTOR_LVDS:
2149 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
0b4c0f3f 2150 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
771fe6b9 2151 if (i2c_bus->valid) {
f376b94f 2152 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2153 if (!radeon_connector->ddc_bus)
a70882aa 2154 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2155 }
e35755fa 2156 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA
2157 dev->mode_config.scaling_mode_property,
2158 DRM_MODE_SCALE_FULLSCREEN);
771fe6b9 2159 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD
2160 connector->interlace_allowed = false;
2161 connector->doublescan_allowed = false;
771fe6b9
JG
2162 break;
2163 }
2164
2581afcc 2165 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA
2166 if (i2c_bus->valid)
2167 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2168 } else
2169 connector->polled = DRM_CONNECTOR_POLL_HPD;
771fe6b9
JG
2170 connector->display_info.subpixel_order = subpixel_order;
2171 drm_sysfs_connector_add(connector);
771fe6b9 2172}