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771fe6b9 JG |
1 | /* |
2 | * Copyright 2007-8 Advanced Micro Devices, Inc. | |
3 | * Copyright 2008 Red Hat Inc. | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the "Software"), | |
7 | * to deal in the Software without restriction, including without limitation | |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
9 | * and/or sell copies of the Software, and to permit persons to whom the | |
10 | * Software is furnished to do so, subject to the following conditions: | |
11 | * | |
12 | * The above copyright notice and this permission notice shall be included in | |
13 | * all copies or substantial portions of the Software. | |
14 | * | |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
18 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
19 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
20 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
21 | * OTHER DEALINGS IN THE SOFTWARE. | |
22 | * | |
23 | * Authors: Dave Airlie | |
24 | * Alex Deucher | |
25 | */ | |
26 | #include "drmP.h" | |
27 | #include "drm_edid.h" | |
28 | #include "drm_crtc_helper.h" | |
d50ba256 | 29 | #include "drm_fb_helper.h" |
771fe6b9 JG |
30 | #include "radeon_drm.h" |
31 | #include "radeon.h" | |
923f6848 | 32 | #include "atom.h" |
771fe6b9 JG |
33 | |
34 | extern void | |
35 | radeon_combios_connected_scratch_regs(struct drm_connector *connector, | |
36 | struct drm_encoder *encoder, | |
37 | bool connected); | |
38 | extern void | |
39 | radeon_atombios_connected_scratch_regs(struct drm_connector *connector, | |
40 | struct drm_encoder *encoder, | |
41 | bool connected); | |
42 | ||
63ec0119 MD |
43 | extern void |
44 | radeon_legacy_backlight_init(struct radeon_encoder *radeon_encoder, | |
45 | struct drm_connector *drm_connector); | |
46 | ||
d4877cf2 AD |
47 | void radeon_connector_hotplug(struct drm_connector *connector) |
48 | { | |
49 | struct drm_device *dev = connector->dev; | |
50 | struct radeon_device *rdev = dev->dev_private; | |
51 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
52 | ||
1e85e1d0 | 53 | radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd); |
d4877cf2 | 54 | |
7c3ed0fd AD |
55 | /* powering up/down the eDP panel generates hpd events which |
56 | * can interfere with modesetting. | |
57 | */ | |
58 | if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) | |
59 | return; | |
60 | ||
1e85e1d0 AD |
61 | /* pre-r600 did not always have the hpd pins mapped accurately to connectors */ |
62 | if (rdev->family >= CHIP_R600) { | |
63 | if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) | |
64 | drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON); | |
65 | else | |
66 | drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF); | |
d4877cf2 | 67 | } |
d4877cf2 AD |
68 | } |
69 | ||
445282db DA |
70 | static void radeon_property_change_mode(struct drm_encoder *encoder) |
71 | { | |
72 | struct drm_crtc *crtc = encoder->crtc; | |
73 | ||
74 | if (crtc && crtc->enabled) { | |
75 | drm_crtc_helper_set_mode(crtc, &crtc->mode, | |
76 | crtc->x, crtc->y, crtc->fb); | |
77 | } | |
78 | } | |
771fe6b9 JG |
79 | static void |
80 | radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status) | |
81 | { | |
82 | struct drm_device *dev = connector->dev; | |
83 | struct radeon_device *rdev = dev->dev_private; | |
84 | struct drm_encoder *best_encoder = NULL; | |
85 | struct drm_encoder *encoder = NULL; | |
86 | struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; | |
87 | struct drm_mode_object *obj; | |
88 | bool connected; | |
89 | int i; | |
90 | ||
91 | best_encoder = connector_funcs->best_encoder(connector); | |
92 | ||
93 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
94 | if (connector->encoder_ids[i] == 0) | |
95 | break; | |
96 | ||
97 | obj = drm_mode_object_find(connector->dev, | |
98 | connector->encoder_ids[i], | |
99 | DRM_MODE_OBJECT_ENCODER); | |
100 | if (!obj) | |
101 | continue; | |
102 | ||
103 | encoder = obj_to_encoder(obj); | |
104 | ||
105 | if ((encoder == best_encoder) && (status == connector_status_connected)) | |
106 | connected = true; | |
107 | else | |
108 | connected = false; | |
109 | ||
110 | if (rdev->is_atom_bios) | |
111 | radeon_atombios_connected_scratch_regs(connector, encoder, connected); | |
112 | else | |
113 | radeon_combios_connected_scratch_regs(connector, encoder, connected); | |
114 | ||
115 | } | |
116 | } | |
117 | ||
445282db DA |
118 | struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type) |
119 | { | |
120 | struct drm_mode_object *obj; | |
121 | struct drm_encoder *encoder; | |
122 | int i; | |
123 | ||
124 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
125 | if (connector->encoder_ids[i] == 0) | |
126 | break; | |
127 | ||
128 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
129 | if (!obj) | |
130 | continue; | |
131 | ||
132 | encoder = obj_to_encoder(obj); | |
133 | if (encoder->encoder_type == encoder_type) | |
134 | return encoder; | |
135 | } | |
136 | return NULL; | |
137 | } | |
138 | ||
771fe6b9 JG |
139 | struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector) |
140 | { | |
141 | int enc_id = connector->encoder_ids[0]; | |
142 | struct drm_mode_object *obj; | |
143 | struct drm_encoder *encoder; | |
144 | ||
145 | /* pick the encoder ids */ | |
146 | if (enc_id) { | |
147 | obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER); | |
148 | if (!obj) | |
149 | return NULL; | |
150 | encoder = obj_to_encoder(obj); | |
151 | return encoder; | |
152 | } | |
153 | return NULL; | |
154 | } | |
155 | ||
4ce001ab DA |
156 | /* |
157 | * radeon_connector_analog_encoder_conflict_solve | |
158 | * - search for other connectors sharing this encoder | |
159 | * if priority is true, then set them disconnected if this is connected | |
160 | * if priority is false, set us disconnected if they are connected | |
161 | */ | |
162 | static enum drm_connector_status | |
163 | radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector, | |
164 | struct drm_encoder *encoder, | |
165 | enum drm_connector_status current_status, | |
166 | bool priority) | |
167 | { | |
168 | struct drm_device *dev = connector->dev; | |
169 | struct drm_connector *conflict; | |
08d07511 | 170 | struct radeon_connector *radeon_conflict; |
4ce001ab DA |
171 | int i; |
172 | ||
173 | list_for_each_entry(conflict, &dev->mode_config.connector_list, head) { | |
174 | if (conflict == connector) | |
175 | continue; | |
176 | ||
08d07511 | 177 | radeon_conflict = to_radeon_connector(conflict); |
4ce001ab DA |
178 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { |
179 | if (conflict->encoder_ids[i] == 0) | |
180 | break; | |
181 | ||
182 | /* if the IDs match */ | |
183 | if (conflict->encoder_ids[i] == encoder->base.id) { | |
184 | if (conflict->status != connector_status_connected) | |
185 | continue; | |
08d07511 AD |
186 | |
187 | if (radeon_conflict->use_digital) | |
188 | continue; | |
4ce001ab DA |
189 | |
190 | if (priority == true) { | |
c5d46b4e AD |
191 | DRM_DEBUG_KMS("1: conflicting encoders switching off %s\n", drm_get_connector_name(conflict)); |
192 | DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(connector)); | |
4ce001ab DA |
193 | conflict->status = connector_status_disconnected; |
194 | radeon_connector_update_scratch_regs(conflict, connector_status_disconnected); | |
195 | } else { | |
c5d46b4e AD |
196 | DRM_DEBUG_KMS("2: conflicting encoders switching off %s\n", drm_get_connector_name(connector)); |
197 | DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(conflict)); | |
4ce001ab DA |
198 | current_status = connector_status_disconnected; |
199 | } | |
200 | break; | |
201 | } | |
202 | } | |
203 | } | |
204 | return current_status; | |
205 | ||
206 | } | |
207 | ||
771fe6b9 JG |
208 | static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder) |
209 | { | |
210 | struct drm_device *dev = encoder->dev; | |
211 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
212 | struct drm_display_mode *mode = NULL; | |
de2103e4 | 213 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
771fe6b9 | 214 | |
de2103e4 AD |
215 | if (native_mode->hdisplay != 0 && |
216 | native_mode->vdisplay != 0 && | |
217 | native_mode->clock != 0) { | |
fb06ca8f | 218 | mode = drm_mode_duplicate(dev, native_mode); |
771fe6b9 JG |
219 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; |
220 | drm_mode_set_name(mode); | |
221 | ||
d9fdaafb | 222 | DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name); |
d2efdf6d AD |
223 | } else if (native_mode->hdisplay != 0 && |
224 | native_mode->vdisplay != 0) { | |
225 | /* mac laptops without an edid */ | |
226 | /* Note that this is not necessarily the exact panel mode, | |
227 | * but an approximation based on the cvt formula. For these | |
228 | * systems we should ideally read the mode info out of the | |
229 | * registers or add a mode table, but this works and is much | |
230 | * simpler. | |
231 | */ | |
232 | mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false); | |
233 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; | |
d9fdaafb | 234 | DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name); |
771fe6b9 JG |
235 | } |
236 | return mode; | |
237 | } | |
238 | ||
923f6848 AD |
239 | static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector) |
240 | { | |
241 | struct drm_device *dev = encoder->dev; | |
242 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
243 | struct drm_display_mode *mode = NULL; | |
de2103e4 | 244 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
923f6848 AD |
245 | int i; |
246 | struct mode_size { | |
247 | int w; | |
248 | int h; | |
249 | } common_modes[17] = { | |
250 | { 640, 480}, | |
251 | { 720, 480}, | |
252 | { 800, 600}, | |
253 | { 848, 480}, | |
254 | {1024, 768}, | |
255 | {1152, 768}, | |
256 | {1280, 720}, | |
257 | {1280, 800}, | |
258 | {1280, 854}, | |
259 | {1280, 960}, | |
260 | {1280, 1024}, | |
261 | {1440, 900}, | |
262 | {1400, 1050}, | |
263 | {1680, 1050}, | |
264 | {1600, 1200}, | |
265 | {1920, 1080}, | |
266 | {1920, 1200} | |
267 | }; | |
268 | ||
269 | for (i = 0; i < 17; i++) { | |
dfdd6467 AD |
270 | if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) { |
271 | if (common_modes[i].w > 1024 || | |
272 | common_modes[i].h > 768) | |
273 | continue; | |
274 | } | |
923f6848 | 275 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { |
de2103e4 AD |
276 | if (common_modes[i].w > native_mode->hdisplay || |
277 | common_modes[i].h > native_mode->vdisplay || | |
278 | (common_modes[i].w == native_mode->hdisplay && | |
279 | common_modes[i].h == native_mode->vdisplay)) | |
923f6848 AD |
280 | continue; |
281 | } | |
282 | if (common_modes[i].w < 320 || common_modes[i].h < 200) | |
283 | continue; | |
284 | ||
d50ba256 | 285 | mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false); |
923f6848 AD |
286 | drm_mode_probed_add(connector, mode); |
287 | } | |
288 | } | |
289 | ||
771fe6b9 JG |
290 | int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property, |
291 | uint64_t val) | |
292 | { | |
445282db DA |
293 | struct drm_device *dev = connector->dev; |
294 | struct radeon_device *rdev = dev->dev_private; | |
295 | struct drm_encoder *encoder; | |
296 | struct radeon_encoder *radeon_encoder; | |
297 | ||
298 | if (property == rdev->mode_info.coherent_mode_property) { | |
299 | struct radeon_encoder_atom_dig *dig; | |
ce227c41 | 300 | bool new_coherent_mode; |
445282db DA |
301 | |
302 | /* need to find digital encoder on connector */ | |
303 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
304 | if (!encoder) | |
305 | return 0; | |
306 | ||
307 | radeon_encoder = to_radeon_encoder(encoder); | |
308 | ||
309 | if (!radeon_encoder->enc_priv) | |
310 | return 0; | |
311 | ||
312 | dig = radeon_encoder->enc_priv; | |
ce227c41 DA |
313 | new_coherent_mode = val ? true : false; |
314 | if (dig->coherent_mode != new_coherent_mode) { | |
315 | dig->coherent_mode = new_coherent_mode; | |
316 | radeon_property_change_mode(&radeon_encoder->base); | |
317 | } | |
445282db DA |
318 | } |
319 | ||
5b1714d3 AD |
320 | if (property == rdev->mode_info.underscan_property) { |
321 | /* need to find digital encoder on connector */ | |
322 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
323 | if (!encoder) | |
324 | return 0; | |
325 | ||
326 | radeon_encoder = to_radeon_encoder(encoder); | |
327 | ||
328 | if (radeon_encoder->underscan_type != val) { | |
329 | radeon_encoder->underscan_type = val; | |
330 | radeon_property_change_mode(&radeon_encoder->base); | |
331 | } | |
332 | } | |
333 | ||
5bccf5e3 MG |
334 | if (property == rdev->mode_info.underscan_hborder_property) { |
335 | /* need to find digital encoder on connector */ | |
336 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
337 | if (!encoder) | |
338 | return 0; | |
339 | ||
340 | radeon_encoder = to_radeon_encoder(encoder); | |
341 | ||
342 | if (radeon_encoder->underscan_hborder != val) { | |
343 | radeon_encoder->underscan_hborder = val; | |
344 | radeon_property_change_mode(&radeon_encoder->base); | |
345 | } | |
346 | } | |
347 | ||
348 | if (property == rdev->mode_info.underscan_vborder_property) { | |
349 | /* need to find digital encoder on connector */ | |
350 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
351 | if (!encoder) | |
352 | return 0; | |
353 | ||
354 | radeon_encoder = to_radeon_encoder(encoder); | |
355 | ||
356 | if (radeon_encoder->underscan_vborder != val) { | |
357 | radeon_encoder->underscan_vborder = val; | |
358 | radeon_property_change_mode(&radeon_encoder->base); | |
359 | } | |
360 | } | |
361 | ||
445282db DA |
362 | if (property == rdev->mode_info.tv_std_property) { |
363 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC); | |
364 | if (!encoder) { | |
365 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC); | |
366 | } | |
367 | ||
368 | if (!encoder) | |
369 | return 0; | |
370 | ||
371 | radeon_encoder = to_radeon_encoder(encoder); | |
372 | if (!radeon_encoder->enc_priv) | |
373 | return 0; | |
643acacf | 374 | if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) { |
445282db DA |
375 | struct radeon_encoder_atom_dac *dac_int; |
376 | dac_int = radeon_encoder->enc_priv; | |
377 | dac_int->tv_std = val; | |
378 | } else { | |
379 | struct radeon_encoder_tv_dac *dac_int; | |
380 | dac_int = radeon_encoder->enc_priv; | |
381 | dac_int->tv_std = val; | |
382 | } | |
383 | radeon_property_change_mode(&radeon_encoder->base); | |
384 | } | |
385 | ||
386 | if (property == rdev->mode_info.load_detect_property) { | |
387 | struct radeon_connector *radeon_connector = | |
388 | to_radeon_connector(connector); | |
389 | ||
390 | if (val == 0) | |
391 | radeon_connector->dac_load_detect = false; | |
392 | else | |
393 | radeon_connector->dac_load_detect = true; | |
394 | } | |
395 | ||
396 | if (property == rdev->mode_info.tmds_pll_property) { | |
397 | struct radeon_encoder_int_tmds *tmds = NULL; | |
398 | bool ret = false; | |
399 | /* need to find digital encoder on connector */ | |
400 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
401 | if (!encoder) | |
402 | return 0; | |
403 | ||
404 | radeon_encoder = to_radeon_encoder(encoder); | |
405 | ||
406 | tmds = radeon_encoder->enc_priv; | |
407 | if (!tmds) | |
408 | return 0; | |
409 | ||
410 | if (val == 0) { | |
411 | if (rdev->is_atom_bios) | |
412 | ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds); | |
413 | else | |
414 | ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds); | |
415 | } | |
416 | if (val == 1 || ret == false) { | |
417 | radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds); | |
418 | } | |
419 | radeon_property_change_mode(&radeon_encoder->base); | |
420 | } | |
421 | ||
771fe6b9 JG |
422 | return 0; |
423 | } | |
424 | ||
8dfaa8a7 MD |
425 | static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder, |
426 | struct drm_connector *connector) | |
427 | { | |
428 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
de2103e4 | 429 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
8dfaa8a7 MD |
430 | |
431 | /* Try to get native mode details from EDID if necessary */ | |
de2103e4 | 432 | if (!native_mode->clock) { |
8dfaa8a7 MD |
433 | struct drm_display_mode *t, *mode; |
434 | ||
435 | list_for_each_entry_safe(mode, t, &connector->probed_modes, head) { | |
de2103e4 AD |
436 | if (mode->hdisplay == native_mode->hdisplay && |
437 | mode->vdisplay == native_mode->vdisplay) { | |
438 | *native_mode = *mode; | |
439 | drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V); | |
c5d46b4e | 440 | DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n"); |
8dfaa8a7 MD |
441 | break; |
442 | } | |
443 | } | |
444 | } | |
de2103e4 | 445 | if (!native_mode->clock) { |
c5d46b4e | 446 | DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n"); |
8dfaa8a7 MD |
447 | radeon_encoder->rmx_type = RMX_OFF; |
448 | } | |
449 | } | |
771fe6b9 JG |
450 | |
451 | static int radeon_lvds_get_modes(struct drm_connector *connector) | |
452 | { | |
453 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
454 | struct drm_encoder *encoder; | |
455 | int ret = 0; | |
456 | struct drm_display_mode *mode; | |
457 | ||
458 | if (radeon_connector->ddc_bus) { | |
459 | ret = radeon_ddc_get_modes(radeon_connector); | |
460 | if (ret > 0) { | |
7747b713 | 461 | encoder = radeon_best_single_encoder(connector); |
8dfaa8a7 MD |
462 | if (encoder) { |
463 | radeon_fixup_lvds_native_mode(encoder, connector); | |
7747b713 AD |
464 | /* add scaled modes */ |
465 | radeon_add_common_modes(encoder, connector); | |
8dfaa8a7 | 466 | } |
771fe6b9 JG |
467 | return ret; |
468 | } | |
469 | } | |
470 | ||
471 | encoder = radeon_best_single_encoder(connector); | |
472 | if (!encoder) | |
473 | return 0; | |
474 | ||
475 | /* we have no EDID modes */ | |
476 | mode = radeon_fp_native_mode(encoder); | |
477 | if (mode) { | |
478 | ret = 1; | |
479 | drm_mode_probed_add(connector, mode); | |
7a868e18 AD |
480 | /* add the width/height from vbios tables if available */ |
481 | connector->display_info.width_mm = mode->width_mm; | |
482 | connector->display_info.height_mm = mode->height_mm; | |
7747b713 AD |
483 | /* add scaled modes */ |
484 | radeon_add_common_modes(encoder, connector); | |
771fe6b9 | 485 | } |
923f6848 | 486 | |
771fe6b9 JG |
487 | return ret; |
488 | } | |
489 | ||
490 | static int radeon_lvds_mode_valid(struct drm_connector *connector, | |
491 | struct drm_display_mode *mode) | |
492 | { | |
a3fa6320 AD |
493 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
494 | ||
495 | if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) | |
496 | return MODE_PANEL; | |
497 | ||
498 | if (encoder) { | |
499 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
500 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | |
501 | ||
502 | /* AVIVO hardware supports downscaling modes larger than the panel | |
503 | * to the panel size, but I'm not sure this is desirable. | |
504 | */ | |
505 | if ((mode->hdisplay > native_mode->hdisplay) || | |
506 | (mode->vdisplay > native_mode->vdisplay)) | |
507 | return MODE_PANEL; | |
508 | ||
509 | /* if scaling is disabled, block non-native modes */ | |
510 | if (radeon_encoder->rmx_type == RMX_OFF) { | |
511 | if ((mode->hdisplay != native_mode->hdisplay) || | |
512 | (mode->vdisplay != native_mode->vdisplay)) | |
513 | return MODE_PANEL; | |
514 | } | |
515 | } | |
516 | ||
771fe6b9 JG |
517 | return MODE_OK; |
518 | } | |
519 | ||
7b334fcb | 520 | static enum drm_connector_status |
930a9e28 | 521 | radeon_lvds_detect(struct drm_connector *connector, bool force) |
771fe6b9 | 522 | { |
0549a061 | 523 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
2ffb8429 | 524 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
0549a061 | 525 | enum drm_connector_status ret = connector_status_disconnected; |
2ffb8429 AD |
526 | |
527 | if (encoder) { | |
528 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
de2103e4 | 529 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
2ffb8429 AD |
530 | |
531 | /* check if panel is valid */ | |
de2103e4 | 532 | if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) |
2ffb8429 AD |
533 | ret = connector_status_connected; |
534 | ||
535 | } | |
0549a061 AD |
536 | |
537 | /* check for edid as well */ | |
0294cf4f AD |
538 | if (radeon_connector->edid) |
539 | ret = connector_status_connected; | |
540 | else { | |
541 | if (radeon_connector->ddc_bus) { | |
0294cf4f AD |
542 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, |
543 | &radeon_connector->ddc_bus->adapter); | |
0294cf4f AD |
544 | if (radeon_connector->edid) |
545 | ret = connector_status_connected; | |
546 | } | |
0549a061 | 547 | } |
771fe6b9 | 548 | /* check acpi lid status ??? */ |
2ffb8429 | 549 | |
771fe6b9 JG |
550 | radeon_connector_update_scratch_regs(connector, ret); |
551 | return ret; | |
552 | } | |
553 | ||
554 | static void radeon_connector_destroy(struct drm_connector *connector) | |
555 | { | |
556 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
557 | ||
0294cf4f AD |
558 | if (radeon_connector->edid) |
559 | kfree(radeon_connector->edid); | |
771fe6b9 JG |
560 | kfree(radeon_connector->con_priv); |
561 | drm_sysfs_connector_remove(connector); | |
562 | drm_connector_cleanup(connector); | |
563 | kfree(connector); | |
564 | } | |
565 | ||
445282db DA |
566 | static int radeon_lvds_set_property(struct drm_connector *connector, |
567 | struct drm_property *property, | |
568 | uint64_t value) | |
569 | { | |
570 | struct drm_device *dev = connector->dev; | |
571 | struct radeon_encoder *radeon_encoder; | |
572 | enum radeon_rmx_type rmx_type; | |
573 | ||
d9fdaafb | 574 | DRM_DEBUG_KMS("\n"); |
445282db DA |
575 | if (property != dev->mode_config.scaling_mode_property) |
576 | return 0; | |
577 | ||
578 | if (connector->encoder) | |
579 | radeon_encoder = to_radeon_encoder(connector->encoder); | |
580 | else { | |
581 | struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; | |
582 | radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector)); | |
583 | } | |
584 | ||
585 | switch (value) { | |
586 | case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break; | |
587 | case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break; | |
588 | case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break; | |
589 | default: | |
590 | case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break; | |
591 | } | |
592 | if (radeon_encoder->rmx_type == rmx_type) | |
593 | return 0; | |
594 | ||
595 | radeon_encoder->rmx_type = rmx_type; | |
596 | ||
597 | radeon_property_change_mode(&radeon_encoder->base); | |
598 | return 0; | |
599 | } | |
600 | ||
601 | ||
771fe6b9 JG |
602 | struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = { |
603 | .get_modes = radeon_lvds_get_modes, | |
604 | .mode_valid = radeon_lvds_mode_valid, | |
605 | .best_encoder = radeon_best_single_encoder, | |
606 | }; | |
607 | ||
608 | struct drm_connector_funcs radeon_lvds_connector_funcs = { | |
609 | .dpms = drm_helper_connector_dpms, | |
610 | .detect = radeon_lvds_detect, | |
611 | .fill_modes = drm_helper_probe_single_connector_modes, | |
612 | .destroy = radeon_connector_destroy, | |
445282db | 613 | .set_property = radeon_lvds_set_property, |
771fe6b9 JG |
614 | }; |
615 | ||
616 | static int radeon_vga_get_modes(struct drm_connector *connector) | |
617 | { | |
618 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
619 | int ret; | |
620 | ||
621 | ret = radeon_ddc_get_modes(radeon_connector); | |
622 | ||
623 | return ret; | |
624 | } | |
625 | ||
626 | static int radeon_vga_mode_valid(struct drm_connector *connector, | |
627 | struct drm_display_mode *mode) | |
628 | { | |
b20f9bef AD |
629 | struct drm_device *dev = connector->dev; |
630 | struct radeon_device *rdev = dev->dev_private; | |
631 | ||
a3fa6320 | 632 | /* XXX check mode bandwidth */ |
b20f9bef AD |
633 | |
634 | if ((mode->clock / 10) > rdev->clock.max_pixel_clock) | |
635 | return MODE_CLOCK_HIGH; | |
636 | ||
771fe6b9 JG |
637 | return MODE_OK; |
638 | } | |
639 | ||
7b334fcb | 640 | static enum drm_connector_status |
930a9e28 | 641 | radeon_vga_detect(struct drm_connector *connector, bool force) |
771fe6b9 | 642 | { |
fafcf94e AD |
643 | struct drm_device *dev = connector->dev; |
644 | struct radeon_device *rdev = dev->dev_private; | |
771fe6b9 JG |
645 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
646 | struct drm_encoder *encoder; | |
647 | struct drm_encoder_helper_funcs *encoder_funcs; | |
4b9d2a21 | 648 | bool dret = false; |
771fe6b9 JG |
649 | enum drm_connector_status ret = connector_status_disconnected; |
650 | ||
4ce001ab DA |
651 | encoder = radeon_best_single_encoder(connector); |
652 | if (!encoder) | |
653 | ret = connector_status_disconnected; | |
654 | ||
eb6b6d7c | 655 | if (radeon_connector->ddc_bus) |
4b9d2a21 | 656 | dret = radeon_ddc_probe(radeon_connector); |
0294cf4f AD |
657 | if (dret) { |
658 | if (radeon_connector->edid) { | |
659 | kfree(radeon_connector->edid); | |
660 | radeon_connector->edid = NULL; | |
661 | } | |
0294cf4f | 662 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); |
0294cf4f AD |
663 | |
664 | if (!radeon_connector->edid) { | |
f82f5f3a JG |
665 | DRM_ERROR("%s: probed a monitor but no|invalid EDID\n", |
666 | drm_get_connector_name(connector)); | |
667 | ret = connector_status_connected; | |
0294cf4f AD |
668 | } else { |
669 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | |
670 | ||
671 | /* some oems have boards with separate digital and analog connectors | |
672 | * with a shared ddc line (often vga + hdmi) | |
673 | */ | |
674 | if (radeon_connector->use_digital && radeon_connector->shared_ddc) { | |
675 | kfree(radeon_connector->edid); | |
676 | radeon_connector->edid = NULL; | |
677 | ret = connector_status_disconnected; | |
678 | } else | |
679 | ret = connector_status_connected; | |
680 | } | |
681 | } else { | |
c3cceedd DA |
682 | |
683 | /* if we aren't forcing don't do destructive polling */ | |
684 | if (!force) | |
685 | return connector->status; | |
686 | ||
d8a7f792 | 687 | if (radeon_connector->dac_load_detect && encoder) { |
445282db DA |
688 | encoder_funcs = encoder->helper_private; |
689 | ret = encoder_funcs->detect(encoder, connector); | |
690 | } | |
771fe6b9 JG |
691 | } |
692 | ||
4ce001ab DA |
693 | if (ret == connector_status_connected) |
694 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true); | |
fafcf94e AD |
695 | |
696 | /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the | |
697 | * vbios to deal with KVMs. If we have one and are not able to detect a monitor | |
698 | * by other means, assume the CRT is connected and use that EDID. | |
699 | */ | |
700 | if ((!rdev->is_atom_bios) && | |
701 | (ret == connector_status_disconnected) && | |
702 | rdev->mode_info.bios_hardcoded_edid_size) { | |
703 | ret = connector_status_connected; | |
704 | } | |
705 | ||
771fe6b9 JG |
706 | radeon_connector_update_scratch_regs(connector, ret); |
707 | return ret; | |
708 | } | |
709 | ||
710 | struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = { | |
711 | .get_modes = radeon_vga_get_modes, | |
712 | .mode_valid = radeon_vga_mode_valid, | |
713 | .best_encoder = radeon_best_single_encoder, | |
714 | }; | |
715 | ||
716 | struct drm_connector_funcs radeon_vga_connector_funcs = { | |
717 | .dpms = drm_helper_connector_dpms, | |
718 | .detect = radeon_vga_detect, | |
719 | .fill_modes = drm_helper_probe_single_connector_modes, | |
720 | .destroy = radeon_connector_destroy, | |
721 | .set_property = radeon_connector_set_property, | |
722 | }; | |
723 | ||
4ce001ab DA |
724 | static int radeon_tv_get_modes(struct drm_connector *connector) |
725 | { | |
726 | struct drm_device *dev = connector->dev; | |
923f6848 | 727 | struct radeon_device *rdev = dev->dev_private; |
4ce001ab | 728 | struct drm_display_mode *tv_mode; |
923f6848 | 729 | struct drm_encoder *encoder; |
4ce001ab | 730 | |
923f6848 AD |
731 | encoder = radeon_best_single_encoder(connector); |
732 | if (!encoder) | |
733 | return 0; | |
4ce001ab | 734 | |
923f6848 AD |
735 | /* avivo chips can scale any mode */ |
736 | if (rdev->family >= CHIP_RS600) | |
737 | /* add scaled modes */ | |
738 | radeon_add_common_modes(encoder, connector); | |
739 | else { | |
740 | /* only 800x600 is supported right now on pre-avivo chips */ | |
d50ba256 | 741 | tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false); |
923f6848 AD |
742 | tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; |
743 | drm_mode_probed_add(connector, tv_mode); | |
744 | } | |
4ce001ab DA |
745 | return 1; |
746 | } | |
747 | ||
748 | static int radeon_tv_mode_valid(struct drm_connector *connector, | |
749 | struct drm_display_mode *mode) | |
750 | { | |
a3fa6320 AD |
751 | if ((mode->hdisplay > 1024) || (mode->vdisplay > 768)) |
752 | return MODE_CLOCK_RANGE; | |
4ce001ab DA |
753 | return MODE_OK; |
754 | } | |
755 | ||
7b334fcb | 756 | static enum drm_connector_status |
930a9e28 | 757 | radeon_tv_detect(struct drm_connector *connector, bool force) |
4ce001ab DA |
758 | { |
759 | struct drm_encoder *encoder; | |
760 | struct drm_encoder_helper_funcs *encoder_funcs; | |
445282db DA |
761 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
762 | enum drm_connector_status ret = connector_status_disconnected; | |
763 | ||
764 | if (!radeon_connector->dac_load_detect) | |
765 | return ret; | |
4ce001ab DA |
766 | |
767 | encoder = radeon_best_single_encoder(connector); | |
768 | if (!encoder) | |
769 | ret = connector_status_disconnected; | |
770 | else { | |
771 | encoder_funcs = encoder->helper_private; | |
772 | ret = encoder_funcs->detect(encoder, connector); | |
773 | } | |
774 | if (ret == connector_status_connected) | |
775 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false); | |
776 | radeon_connector_update_scratch_regs(connector, ret); | |
777 | return ret; | |
778 | } | |
779 | ||
780 | struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = { | |
781 | .get_modes = radeon_tv_get_modes, | |
782 | .mode_valid = radeon_tv_mode_valid, | |
783 | .best_encoder = radeon_best_single_encoder, | |
784 | }; | |
785 | ||
786 | struct drm_connector_funcs radeon_tv_connector_funcs = { | |
787 | .dpms = drm_helper_connector_dpms, | |
788 | .detect = radeon_tv_detect, | |
789 | .fill_modes = drm_helper_probe_single_connector_modes, | |
790 | .destroy = radeon_connector_destroy, | |
791 | .set_property = radeon_connector_set_property, | |
792 | }; | |
793 | ||
771fe6b9 JG |
794 | static int radeon_dvi_get_modes(struct drm_connector *connector) |
795 | { | |
796 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
797 | int ret; | |
798 | ||
799 | ret = radeon_ddc_get_modes(radeon_connector); | |
771fe6b9 JG |
800 | return ret; |
801 | } | |
802 | ||
4ce001ab DA |
803 | /* |
804 | * DVI is complicated | |
805 | * Do a DDC probe, if DDC probe passes, get the full EDID so | |
806 | * we can do analog/digital monitor detection at this point. | |
807 | * If the monitor is an analog monitor or we got no DDC, | |
808 | * we need to find the DAC encoder object for this connector. | |
809 | * If we got no DDC, we do load detection on the DAC encoder object. | |
810 | * If we got analog DDC or load detection passes on the DAC encoder | |
811 | * we have to check if this analog encoder is shared with anyone else (TV) | |
812 | * if its shared we have to set the other connector to disconnected. | |
813 | */ | |
7b334fcb | 814 | static enum drm_connector_status |
930a9e28 | 815 | radeon_dvi_detect(struct drm_connector *connector, bool force) |
771fe6b9 | 816 | { |
fafcf94e AD |
817 | struct drm_device *dev = connector->dev; |
818 | struct radeon_device *rdev = dev->dev_private; | |
771fe6b9 | 819 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
4ce001ab | 820 | struct drm_encoder *encoder = NULL; |
771fe6b9 JG |
821 | struct drm_encoder_helper_funcs *encoder_funcs; |
822 | struct drm_mode_object *obj; | |
823 | int i; | |
824 | enum drm_connector_status ret = connector_status_disconnected; | |
4b9d2a21 | 825 | bool dret = false; |
771fe6b9 | 826 | |
eb6b6d7c | 827 | if (radeon_connector->ddc_bus) |
4b9d2a21 | 828 | dret = radeon_ddc_probe(radeon_connector); |
4ce001ab | 829 | if (dret) { |
0294cf4f AD |
830 | if (radeon_connector->edid) { |
831 | kfree(radeon_connector->edid); | |
832 | radeon_connector->edid = NULL; | |
833 | } | |
4ce001ab | 834 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); |
4ce001ab DA |
835 | |
836 | if (!radeon_connector->edid) { | |
f82f5f3a JG |
837 | DRM_ERROR("%s: probed a monitor but no|invalid EDID\n", |
838 | drm_get_connector_name(connector)); | |
4a9a8b71 DA |
839 | /* rs690 seems to have a problem with connectors not existing and always |
840 | * return a block of 0's. If we see this just stop polling on this output */ | |
841 | if ((rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) && radeon_connector->base.null_edid_counter) { | |
842 | ret = connector_status_disconnected; | |
843 | DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n", drm_get_connector_name(connector)); | |
844 | radeon_connector->ddc_bus = NULL; | |
845 | } | |
4ce001ab DA |
846 | } else { |
847 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | |
848 | ||
0294cf4f AD |
849 | /* some oems have boards with separate digital and analog connectors |
850 | * with a shared ddc line (often vga + hdmi) | |
851 | */ | |
852 | if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) { | |
853 | kfree(radeon_connector->edid); | |
854 | radeon_connector->edid = NULL; | |
855 | ret = connector_status_disconnected; | |
856 | } else | |
857 | ret = connector_status_connected; | |
71407c46 | 858 | |
42f14c4b AD |
859 | /* This gets complicated. We have boards with VGA + HDMI with a |
860 | * shared DDC line and we have boards with DVI-D + HDMI with a shared | |
861 | * DDC line. The latter is more complex because with DVI<->HDMI adapters | |
862 | * you don't really know what's connected to which port as both are digital. | |
71407c46 | 863 | */ |
d3932d6c | 864 | if (radeon_connector->shared_ddc && (ret == connector_status_connected)) { |
71407c46 AD |
865 | struct drm_connector *list_connector; |
866 | struct radeon_connector *list_radeon_connector; | |
867 | list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) { | |
868 | if (connector == list_connector) | |
869 | continue; | |
870 | list_radeon_connector = to_radeon_connector(list_connector); | |
b2ea4aa6 AD |
871 | if (list_radeon_connector->shared_ddc && |
872 | (list_radeon_connector->ddc_bus->rec.i2c_id == | |
873 | radeon_connector->ddc_bus->rec.i2c_id)) { | |
42f14c4b AD |
874 | /* cases where both connectors are digital */ |
875 | if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) { | |
876 | /* hpd is our only option in this case */ | |
877 | if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { | |
71407c46 AD |
878 | kfree(radeon_connector->edid); |
879 | radeon_connector->edid = NULL; | |
880 | ret = connector_status_disconnected; | |
881 | } | |
882 | } | |
883 | } | |
884 | } | |
885 | } | |
4ce001ab DA |
886 | } |
887 | } | |
888 | ||
889 | if ((ret == connector_status_connected) && (radeon_connector->use_digital == true)) | |
890 | goto out; | |
891 | ||
c3cceedd DA |
892 | if (!force) { |
893 | ret = connector->status; | |
894 | goto out; | |
895 | } | |
896 | ||
4ce001ab | 897 | /* find analog encoder */ |
445282db DA |
898 | if (radeon_connector->dac_load_detect) { |
899 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
900 | if (connector->encoder_ids[i] == 0) | |
901 | break; | |
771fe6b9 | 902 | |
445282db DA |
903 | obj = drm_mode_object_find(connector->dev, |
904 | connector->encoder_ids[i], | |
905 | DRM_MODE_OBJECT_ENCODER); | |
906 | if (!obj) | |
907 | continue; | |
771fe6b9 | 908 | |
445282db | 909 | encoder = obj_to_encoder(obj); |
771fe6b9 | 910 | |
445282db DA |
911 | encoder_funcs = encoder->helper_private; |
912 | if (encoder_funcs->detect) { | |
913 | if (ret != connector_status_connected) { | |
914 | ret = encoder_funcs->detect(encoder, connector); | |
915 | if (ret == connector_status_connected) { | |
916 | radeon_connector->use_digital = false; | |
917 | } | |
771fe6b9 | 918 | } |
445282db | 919 | break; |
771fe6b9 JG |
920 | } |
921 | } | |
922 | } | |
923 | ||
4ce001ab DA |
924 | if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) && |
925 | encoder) { | |
926 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true); | |
927 | } | |
928 | ||
fafcf94e AD |
929 | /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the |
930 | * vbios to deal with KVMs. If we have one and are not able to detect a monitor | |
931 | * by other means, assume the DFP is connected and use that EDID. In most | |
932 | * cases the DVI port is actually a virtual KVM port connected to the service | |
933 | * processor. | |
934 | */ | |
935 | if ((!rdev->is_atom_bios) && | |
936 | (ret == connector_status_disconnected) && | |
937 | rdev->mode_info.bios_hardcoded_edid_size) { | |
938 | radeon_connector->use_digital = true; | |
939 | ret = connector_status_connected; | |
940 | } | |
941 | ||
4ce001ab | 942 | out: |
771fe6b9 JG |
943 | /* updated in get modes as well since we need to know if it's analog or digital */ |
944 | radeon_connector_update_scratch_regs(connector, ret); | |
945 | return ret; | |
946 | } | |
947 | ||
948 | /* okay need to be smart in here about which encoder to pick */ | |
949 | struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector) | |
950 | { | |
951 | int enc_id = connector->encoder_ids[0]; | |
952 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
953 | struct drm_mode_object *obj; | |
954 | struct drm_encoder *encoder; | |
955 | int i; | |
956 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
957 | if (connector->encoder_ids[i] == 0) | |
958 | break; | |
959 | ||
960 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
961 | if (!obj) | |
962 | continue; | |
963 | ||
964 | encoder = obj_to_encoder(obj); | |
965 | ||
4ce001ab | 966 | if (radeon_connector->use_digital == true) { |
771fe6b9 JG |
967 | if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS) |
968 | return encoder; | |
969 | } else { | |
970 | if (encoder->encoder_type == DRM_MODE_ENCODER_DAC || | |
971 | encoder->encoder_type == DRM_MODE_ENCODER_TVDAC) | |
972 | return encoder; | |
973 | } | |
974 | } | |
975 | ||
976 | /* see if we have a default encoder TODO */ | |
977 | ||
978 | /* then check use digitial */ | |
979 | /* pick the first one */ | |
980 | if (enc_id) { | |
981 | obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER); | |
982 | if (!obj) | |
983 | return NULL; | |
984 | encoder = obj_to_encoder(obj); | |
985 | return encoder; | |
986 | } | |
987 | return NULL; | |
988 | } | |
989 | ||
d50ba256 DA |
990 | static void radeon_dvi_force(struct drm_connector *connector) |
991 | { | |
992 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
993 | if (connector->force == DRM_FORCE_ON) | |
994 | radeon_connector->use_digital = false; | |
995 | if (connector->force == DRM_FORCE_ON_DIGITAL) | |
996 | radeon_connector->use_digital = true; | |
997 | } | |
998 | ||
a3fa6320 AD |
999 | static int radeon_dvi_mode_valid(struct drm_connector *connector, |
1000 | struct drm_display_mode *mode) | |
1001 | { | |
1b24203e AD |
1002 | struct drm_device *dev = connector->dev; |
1003 | struct radeon_device *rdev = dev->dev_private; | |
a3fa6320 AD |
1004 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
1005 | ||
1006 | /* XXX check mode bandwidth */ | |
1007 | ||
1b24203e AD |
1008 | /* clocks over 135 MHz have heat issues with DVI on RV100 */ |
1009 | if (radeon_connector->use_digital && | |
1010 | (rdev->family == CHIP_RV100) && | |
1011 | (mode->clock > 135000)) | |
1012 | return MODE_CLOCK_HIGH; | |
1013 | ||
a3fa6320 AD |
1014 | if (radeon_connector->use_digital && (mode->clock > 165000)) { |
1015 | if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) || | |
1016 | (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) || | |
1017 | (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B)) | |
1018 | return MODE_OK; | |
e1e84017 AD |
1019 | else if (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_A) { |
1020 | if (ASIC_IS_DCE3(rdev)) { | |
1021 | /* HDMI 1.3+ supports max clock of 340 Mhz */ | |
1022 | if (mode->clock > 340000) | |
1023 | return MODE_CLOCK_HIGH; | |
1024 | else | |
1025 | return MODE_OK; | |
1026 | } else | |
1027 | return MODE_CLOCK_HIGH; | |
1028 | } else | |
a3fa6320 AD |
1029 | return MODE_CLOCK_HIGH; |
1030 | } | |
b20f9bef AD |
1031 | |
1032 | /* check against the max pixel clock */ | |
1033 | if ((mode->clock / 10) > rdev->clock.max_pixel_clock) | |
1034 | return MODE_CLOCK_HIGH; | |
1035 | ||
a3fa6320 AD |
1036 | return MODE_OK; |
1037 | } | |
1038 | ||
771fe6b9 JG |
1039 | struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = { |
1040 | .get_modes = radeon_dvi_get_modes, | |
a3fa6320 | 1041 | .mode_valid = radeon_dvi_mode_valid, |
771fe6b9 JG |
1042 | .best_encoder = radeon_dvi_encoder, |
1043 | }; | |
1044 | ||
1045 | struct drm_connector_funcs radeon_dvi_connector_funcs = { | |
1046 | .dpms = drm_helper_connector_dpms, | |
1047 | .detect = radeon_dvi_detect, | |
1048 | .fill_modes = drm_helper_probe_single_connector_modes, | |
1049 | .set_property = radeon_connector_set_property, | |
1050 | .destroy = radeon_connector_destroy, | |
d50ba256 | 1051 | .force = radeon_dvi_force, |
771fe6b9 JG |
1052 | }; |
1053 | ||
ffd09c64 AD |
1054 | static void radeon_dp_connector_destroy(struct drm_connector *connector) |
1055 | { | |
1056 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1057 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; | |
1058 | ||
ffd09c64 AD |
1059 | if (radeon_connector->edid) |
1060 | kfree(radeon_connector->edid); | |
1061 | if (radeon_dig_connector->dp_i2c_bus) | |
ac1aade6 | 1062 | radeon_i2c_destroy(radeon_dig_connector->dp_i2c_bus); |
ffd09c64 AD |
1063 | kfree(radeon_connector->con_priv); |
1064 | drm_sysfs_connector_remove(connector); | |
1065 | drm_connector_cleanup(connector); | |
1066 | kfree(connector); | |
1067 | } | |
1068 | ||
746c1aa4 DA |
1069 | static int radeon_dp_get_modes(struct drm_connector *connector) |
1070 | { | |
1071 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
8b834852 | 1072 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; |
746c1aa4 DA |
1073 | int ret; |
1074 | ||
8b834852 | 1075 | if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { |
d291767b AD |
1076 | struct drm_encoder *encoder; |
1077 | struct drm_display_mode *mode; | |
1078 | ||
8b834852 AD |
1079 | if (!radeon_dig_connector->edp_on) |
1080 | atombios_set_edp_panel_power(connector, | |
1081 | ATOM_TRANSMITTER_ACTION_POWER_ON); | |
d291767b | 1082 | ret = radeon_ddc_get_modes(radeon_connector); |
8b834852 AD |
1083 | if (!radeon_dig_connector->edp_on) |
1084 | atombios_set_edp_panel_power(connector, | |
1085 | ATOM_TRANSMITTER_ACTION_POWER_OFF); | |
d291767b AD |
1086 | |
1087 | if (ret > 0) { | |
1088 | encoder = radeon_best_single_encoder(connector); | |
1089 | if (encoder) { | |
1090 | radeon_fixup_lvds_native_mode(encoder, connector); | |
1091 | /* add scaled modes */ | |
1092 | radeon_add_common_modes(encoder, connector); | |
1093 | } | |
1094 | return ret; | |
1095 | } | |
1096 | ||
1097 | encoder = radeon_best_single_encoder(connector); | |
1098 | if (!encoder) | |
1099 | return 0; | |
1100 | ||
1101 | /* we have no EDID modes */ | |
1102 | mode = radeon_fp_native_mode(encoder); | |
1103 | if (mode) { | |
1104 | ret = 1; | |
1105 | drm_mode_probed_add(connector, mode); | |
1106 | /* add the width/height from vbios tables if available */ | |
1107 | connector->display_info.width_mm = mode->width_mm; | |
1108 | connector->display_info.height_mm = mode->height_mm; | |
1109 | /* add scaled modes */ | |
1110 | radeon_add_common_modes(encoder, connector); | |
1111 | } | |
1112 | } else | |
1113 | ret = radeon_ddc_get_modes(radeon_connector); | |
8b834852 | 1114 | |
746c1aa4 DA |
1115 | return ret; |
1116 | } | |
1117 | ||
d7fa8bb3 AD |
1118 | bool radeon_connector_encoder_is_dp_bridge(struct drm_connector *connector) |
1119 | { | |
1120 | struct drm_mode_object *obj; | |
1121 | struct drm_encoder *encoder; | |
1122 | struct radeon_encoder *radeon_encoder; | |
1123 | int i; | |
1124 | bool found = false; | |
1125 | ||
1126 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
1127 | if (connector->encoder_ids[i] == 0) | |
1128 | break; | |
1129 | ||
1130 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
1131 | if (!obj) | |
1132 | continue; | |
1133 | ||
1134 | encoder = obj_to_encoder(obj); | |
1135 | radeon_encoder = to_radeon_encoder(encoder); | |
1136 | ||
1137 | switch (radeon_encoder->encoder_id) { | |
1138 | case ENCODER_OBJECT_ID_TRAVIS: | |
1139 | case ENCODER_OBJECT_ID_NUTMEG: | |
1140 | found = true; | |
1141 | break; | |
1142 | default: | |
1143 | break; | |
1144 | } | |
1145 | } | |
1146 | ||
1147 | return found; | |
1148 | } | |
1149 | ||
1150 | bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector) | |
1151 | { | |
1152 | struct drm_mode_object *obj; | |
1153 | struct drm_encoder *encoder; | |
1154 | struct radeon_encoder *radeon_encoder; | |
1155 | int i; | |
1156 | bool found = false; | |
1157 | ||
1158 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | |
1159 | if (connector->encoder_ids[i] == 0) | |
1160 | break; | |
1161 | ||
1162 | obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER); | |
1163 | if (!obj) | |
1164 | continue; | |
1165 | ||
1166 | encoder = obj_to_encoder(obj); | |
1167 | radeon_encoder = to_radeon_encoder(encoder); | |
1168 | if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2) | |
1169 | found = true; | |
1170 | } | |
1171 | ||
1172 | return found; | |
1173 | } | |
1174 | ||
1175 | bool radeon_connector_is_dp12_capable(struct drm_connector *connector) | |
1176 | { | |
1177 | struct drm_device *dev = connector->dev; | |
1178 | struct radeon_device *rdev = dev->dev_private; | |
1179 | ||
1180 | if (ASIC_IS_DCE5(rdev) && | |
1181 | (rdev->clock.dp_extclk >= 53900) && | |
1182 | radeon_connector_encoder_is_hbr2(connector)) { | |
1183 | return true; | |
1184 | } | |
1185 | ||
1186 | return false; | |
1187 | } | |
1188 | ||
7b334fcb | 1189 | static enum drm_connector_status |
930a9e28 | 1190 | radeon_dp_detect(struct drm_connector *connector, bool force) |
746c1aa4 | 1191 | { |
f8d0edde AD |
1192 | struct drm_device *dev = connector->dev; |
1193 | struct radeon_device *rdev = dev->dev_private; | |
746c1aa4 | 1194 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
746c1aa4 | 1195 | enum drm_connector_status ret = connector_status_disconnected; |
4143e919 | 1196 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; |
746c1aa4 DA |
1197 | |
1198 | if (radeon_connector->edid) { | |
1199 | kfree(radeon_connector->edid); | |
1200 | radeon_connector->edid = NULL; | |
1201 | } | |
1202 | ||
6f50eae7 | 1203 | if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { |
d291767b AD |
1204 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
1205 | if (encoder) { | |
1206 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
1207 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | |
1208 | ||
1209 | /* check if panel is valid */ | |
1210 | if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) | |
1211 | ret = connector_status_connected; | |
1212 | } | |
6f50eae7 AD |
1213 | /* eDP is always DP */ |
1214 | radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT; | |
8b834852 AD |
1215 | if (!radeon_dig_connector->edp_on) |
1216 | atombios_set_edp_panel_power(connector, | |
1217 | ATOM_TRANSMITTER_ACTION_POWER_ON); | |
6f50eae7 | 1218 | if (radeon_dp_getdpcd(radeon_connector)) |
9fa05c98 | 1219 | ret = connector_status_connected; |
8b834852 AD |
1220 | if (!radeon_dig_connector->edp_on) |
1221 | atombios_set_edp_panel_power(connector, | |
1222 | ATOM_TRANSMITTER_ACTION_POWER_OFF); | |
4143e919 | 1223 | } else { |
6f50eae7 | 1224 | radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector); |
f8d0edde AD |
1225 | if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { |
1226 | ret = connector_status_connected; | |
1227 | if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) | |
1228 | radeon_dp_getdpcd(radeon_connector); | |
6f50eae7 | 1229 | } else { |
f8d0edde AD |
1230 | if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) { |
1231 | if (radeon_dp_getdpcd(radeon_connector)) | |
1232 | ret = connector_status_connected; | |
1233 | } else { | |
1234 | if (radeon_ddc_probe(radeon_connector)) | |
1235 | ret = connector_status_connected; | |
1236 | } | |
4143e919 | 1237 | } |
746c1aa4 | 1238 | } |
4143e919 | 1239 | |
30f44372 | 1240 | radeon_connector_update_scratch_regs(connector, ret); |
746c1aa4 DA |
1241 | return ret; |
1242 | } | |
1243 | ||
5801ead6 AD |
1244 | static int radeon_dp_mode_valid(struct drm_connector *connector, |
1245 | struct drm_display_mode *mode) | |
1246 | { | |
1247 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
1248 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; | |
1249 | ||
1250 | /* XXX check mode bandwidth */ | |
1251 | ||
d291767b AD |
1252 | if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { |
1253 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); | |
1254 | ||
1255 | if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) | |
1256 | return MODE_PANEL; | |
1257 | ||
1258 | if (encoder) { | |
1259 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
1260 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | |
1261 | ||
1262 | /* AVIVO hardware supports downscaling modes larger than the panel | |
1263 | * to the panel size, but I'm not sure this is desirable. | |
1264 | */ | |
1265 | if ((mode->hdisplay > native_mode->hdisplay) || | |
1266 | (mode->vdisplay > native_mode->vdisplay)) | |
1267 | return MODE_PANEL; | |
1268 | ||
1269 | /* if scaling is disabled, block non-native modes */ | |
1270 | if (radeon_encoder->rmx_type == RMX_OFF) { | |
1271 | if ((mode->hdisplay != native_mode->hdisplay) || | |
1272 | (mode->vdisplay != native_mode->vdisplay)) | |
1273 | return MODE_PANEL; | |
1274 | } | |
1275 | } | |
5801ead6 | 1276 | return MODE_OK; |
d291767b AD |
1277 | } else { |
1278 | if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || | |
1279 | (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) | |
1280 | return radeon_dp_mode_valid_helper(connector, mode); | |
1281 | else | |
1282 | return MODE_OK; | |
1283 | } | |
5801ead6 AD |
1284 | } |
1285 | ||
746c1aa4 DA |
1286 | struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = { |
1287 | .get_modes = radeon_dp_get_modes, | |
5801ead6 | 1288 | .mode_valid = radeon_dp_mode_valid, |
746c1aa4 DA |
1289 | .best_encoder = radeon_dvi_encoder, |
1290 | }; | |
1291 | ||
1292 | struct drm_connector_funcs radeon_dp_connector_funcs = { | |
1293 | .dpms = drm_helper_connector_dpms, | |
1294 | .detect = radeon_dp_detect, | |
1295 | .fill_modes = drm_helper_probe_single_connector_modes, | |
1296 | .set_property = radeon_connector_set_property, | |
ffd09c64 | 1297 | .destroy = radeon_dp_connector_destroy, |
746c1aa4 DA |
1298 | .force = radeon_dvi_force, |
1299 | }; | |
1300 | ||
771fe6b9 JG |
1301 | void |
1302 | radeon_add_atom_connector(struct drm_device *dev, | |
1303 | uint32_t connector_id, | |
1304 | uint32_t supported_device, | |
1305 | int connector_type, | |
1306 | struct radeon_i2c_bus_rec *i2c_bus, | |
b75fad06 | 1307 | uint32_t igp_lane_info, |
eed45b30 | 1308 | uint16_t connector_object_id, |
26b5bc98 AD |
1309 | struct radeon_hpd *hpd, |
1310 | struct radeon_router *router) | |
771fe6b9 | 1311 | { |
445282db | 1312 | struct radeon_device *rdev = dev->dev_private; |
771fe6b9 JG |
1313 | struct drm_connector *connector; |
1314 | struct radeon_connector *radeon_connector; | |
1315 | struct radeon_connector_atom_dig *radeon_dig_connector; | |
eac4dff6 AD |
1316 | struct drm_encoder *encoder; |
1317 | struct radeon_encoder *radeon_encoder; | |
771fe6b9 | 1318 | uint32_t subpixel_order = SubPixelNone; |
0294cf4f | 1319 | bool shared_ddc = false; |
eac4dff6 | 1320 | bool is_dp_bridge = false; |
771fe6b9 | 1321 | |
4ce001ab | 1322 | if (connector_type == DRM_MODE_CONNECTOR_Unknown) |
771fe6b9 JG |
1323 | return; |
1324 | ||
cf4c12f9 AD |
1325 | /* if the user selected tv=0 don't try and add the connector */ |
1326 | if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) || | |
1327 | (connector_type == DRM_MODE_CONNECTOR_Composite) || | |
1328 | (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) && | |
1329 | (radeon_tv == 0)) | |
1330 | return; | |
1331 | ||
771fe6b9 JG |
1332 | /* see if we already added it */ |
1333 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
1334 | radeon_connector = to_radeon_connector(connector); | |
1335 | if (radeon_connector->connector_id == connector_id) { | |
1336 | radeon_connector->devices |= supported_device; | |
1337 | return; | |
1338 | } | |
0294cf4f | 1339 | if (radeon_connector->ddc_bus && i2c_bus->valid) { |
d3932d6c | 1340 | if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) { |
0294cf4f AD |
1341 | radeon_connector->shared_ddc = true; |
1342 | shared_ddc = true; | |
1343 | } | |
fb939dfc | 1344 | if (radeon_connector->router_bus && router->ddc_valid && |
26b5bc98 AD |
1345 | (radeon_connector->router.router_id == router->router_id)) { |
1346 | radeon_connector->shared_ddc = false; | |
1347 | shared_ddc = false; | |
1348 | } | |
0294cf4f | 1349 | } |
771fe6b9 JG |
1350 | } |
1351 | ||
eac4dff6 AD |
1352 | /* check if it's a dp bridge */ |
1353 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { | |
1354 | radeon_encoder = to_radeon_encoder(encoder); | |
1355 | if (radeon_encoder->devices & supported_device) { | |
1356 | switch (radeon_encoder->encoder_id) { | |
1357 | case ENCODER_OBJECT_ID_TRAVIS: | |
1358 | case ENCODER_OBJECT_ID_NUTMEG: | |
1359 | is_dp_bridge = true; | |
1360 | break; | |
1361 | default: | |
1362 | break; | |
1363 | } | |
1364 | } | |
1365 | } | |
1366 | ||
771fe6b9 JG |
1367 | radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); |
1368 | if (!radeon_connector) | |
1369 | return; | |
1370 | ||
1371 | connector = &radeon_connector->base; | |
1372 | ||
1373 | radeon_connector->connector_id = connector_id; | |
1374 | radeon_connector->devices = supported_device; | |
0294cf4f | 1375 | radeon_connector->shared_ddc = shared_ddc; |
b75fad06 | 1376 | radeon_connector->connector_object_id = connector_object_id; |
eed45b30 | 1377 | radeon_connector->hpd = *hpd; |
26b5bc98 | 1378 | radeon_connector->router = *router; |
fb939dfc | 1379 | if (router->ddc_valid || router->cd_valid) { |
26b5bc98 AD |
1380 | radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info); |
1381 | if (!radeon_connector->router_bus) | |
a70882aa | 1382 | DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n"); |
26b5bc98 | 1383 | } |
eac4dff6 AD |
1384 | |
1385 | if (is_dp_bridge) { | |
771fe6b9 JG |
1386 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); |
1387 | if (!radeon_dig_connector) | |
1388 | goto failed; | |
771fe6b9 JG |
1389 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
1390 | radeon_connector->con_priv = radeon_dig_connector; | |
eac4dff6 AD |
1391 | drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); |
1392 | drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); | |
771fe6b9 | 1393 | if (i2c_bus->valid) { |
eac4dff6 AD |
1394 | /* add DP i2c bus */ |
1395 | if (connector_type == DRM_MODE_CONNECTOR_eDP) | |
1396 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch"); | |
1397 | else | |
1398 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch"); | |
1399 | if (!radeon_dig_connector->dp_i2c_bus) | |
1400 | DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n"); | |
f376b94f | 1401 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1402 | if (!radeon_connector->ddc_bus) |
eac4dff6 | 1403 | DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 1404 | } |
eac4dff6 AD |
1405 | switch (connector_type) { |
1406 | case DRM_MODE_CONNECTOR_VGA: | |
1407 | case DRM_MODE_CONNECTOR_DVIA: | |
1408 | default: | |
1409 | connector->interlace_allowed = true; | |
1410 | connector->doublescan_allowed = true; | |
1411 | break; | |
1412 | case DRM_MODE_CONNECTOR_DVII: | |
1413 | case DRM_MODE_CONNECTOR_DVID: | |
1414 | case DRM_MODE_CONNECTOR_HDMIA: | |
1415 | case DRM_MODE_CONNECTOR_HDMIB: | |
1416 | case DRM_MODE_CONNECTOR_DisplayPort: | |
430f70d5 AD |
1417 | drm_connector_attach_property(&radeon_connector->base, |
1418 | rdev->mode_info.underscan_property, | |
56bec7c0 | 1419 | UNDERSCAN_OFF); |
5bccf5e3 MG |
1420 | drm_connector_attach_property(&radeon_connector->base, |
1421 | rdev->mode_info.underscan_hborder_property, | |
1422 | 0); | |
1423 | drm_connector_attach_property(&radeon_connector->base, | |
1424 | rdev->mode_info.underscan_vborder_property, | |
1425 | 0); | |
eac4dff6 AD |
1426 | subpixel_order = SubPixelHorizontalRGB; |
1427 | connector->interlace_allowed = true; | |
1428 | if (connector_type == DRM_MODE_CONNECTOR_HDMIB) | |
1429 | connector->doublescan_allowed = true; | |
1430 | else | |
1431 | connector->doublescan_allowed = false; | |
1432 | break; | |
1433 | case DRM_MODE_CONNECTOR_LVDS: | |
1434 | case DRM_MODE_CONNECTOR_eDP: | |
1435 | drm_connector_attach_property(&radeon_connector->base, | |
1436 | dev->mode_config.scaling_mode_property, | |
1437 | DRM_MODE_SCALE_FULLSCREEN); | |
1438 | subpixel_order = SubPixelHorizontalRGB; | |
1439 | connector->interlace_allowed = false; | |
1440 | connector->doublescan_allowed = false; | |
1441 | break; | |
5bccf5e3 | 1442 | } |
eac4dff6 AD |
1443 | } else { |
1444 | switch (connector_type) { | |
1445 | case DRM_MODE_CONNECTOR_VGA: | |
1446 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
1447 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); | |
1448 | if (i2c_bus->valid) { | |
1449 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1450 | if (!radeon_connector->ddc_bus) | |
1451 | DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1452 | } | |
390d0bbe AD |
1453 | radeon_connector->dac_load_detect = true; |
1454 | drm_connector_attach_property(&radeon_connector->base, | |
1455 | rdev->mode_info.load_detect_property, | |
1456 | 1); | |
eac4dff6 AD |
1457 | /* no HPD on analog connectors */ |
1458 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
1459 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | |
1460 | connector->interlace_allowed = true; | |
c49948f4 | 1461 | connector->doublescan_allowed = true; |
eac4dff6 AD |
1462 | break; |
1463 | case DRM_MODE_CONNECTOR_DVIA: | |
1464 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
1465 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); | |
1466 | if (i2c_bus->valid) { | |
1467 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1468 | if (!radeon_connector->ddc_bus) | |
1469 | DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1470 | } | |
1471 | radeon_connector->dac_load_detect = true; | |
430f70d5 | 1472 | drm_connector_attach_property(&radeon_connector->base, |
eac4dff6 AD |
1473 | rdev->mode_info.load_detect_property, |
1474 | 1); | |
1475 | /* no HPD on analog connectors */ | |
1476 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
1477 | connector->interlace_allowed = true; | |
1478 | connector->doublescan_allowed = true; | |
1479 | break; | |
1480 | case DRM_MODE_CONNECTOR_DVII: | |
1481 | case DRM_MODE_CONNECTOR_DVID: | |
1482 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1483 | if (!radeon_dig_connector) | |
1484 | goto failed; | |
1485 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1486 | radeon_connector->con_priv = radeon_dig_connector; | |
1487 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
1488 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); | |
1489 | if (i2c_bus->valid) { | |
1490 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1491 | if (!radeon_connector->ddc_bus) | |
1492 | DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1493 | } | |
1494 | subpixel_order = SubPixelHorizontalRGB; | |
5bccf5e3 | 1495 | drm_connector_attach_property(&radeon_connector->base, |
eac4dff6 AD |
1496 | rdev->mode_info.coherent_mode_property, |
1497 | 1); | |
1498 | if (ASIC_IS_AVIVO(rdev)) { | |
1499 | drm_connector_attach_property(&radeon_connector->base, | |
1500 | rdev->mode_info.underscan_property, | |
1501 | UNDERSCAN_OFF); | |
1502 | drm_connector_attach_property(&radeon_connector->base, | |
1503 | rdev->mode_info.underscan_hborder_property, | |
1504 | 0); | |
1505 | drm_connector_attach_property(&radeon_connector->base, | |
1506 | rdev->mode_info.underscan_vborder_property, | |
1507 | 0); | |
1508 | } | |
1509 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { | |
1510 | radeon_connector->dac_load_detect = true; | |
1511 | drm_connector_attach_property(&radeon_connector->base, | |
1512 | rdev->mode_info.load_detect_property, | |
1513 | 1); | |
1514 | } | |
1515 | connector->interlace_allowed = true; | |
1516 | if (connector_type == DRM_MODE_CONNECTOR_DVII) | |
1517 | connector->doublescan_allowed = true; | |
1518 | else | |
1519 | connector->doublescan_allowed = false; | |
1520 | break; | |
1521 | case DRM_MODE_CONNECTOR_HDMIA: | |
1522 | case DRM_MODE_CONNECTOR_HDMIB: | |
1523 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1524 | if (!radeon_dig_connector) | |
1525 | goto failed; | |
1526 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1527 | radeon_connector->con_priv = radeon_dig_connector; | |
1528 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
1529 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); | |
1530 | if (i2c_bus->valid) { | |
1531 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1532 | if (!radeon_connector->ddc_bus) | |
1533 | DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1534 | } | |
5bccf5e3 | 1535 | drm_connector_attach_property(&radeon_connector->base, |
eac4dff6 AD |
1536 | rdev->mode_info.coherent_mode_property, |
1537 | 1); | |
1538 | if (ASIC_IS_AVIVO(rdev)) { | |
1539 | drm_connector_attach_property(&radeon_connector->base, | |
1540 | rdev->mode_info.underscan_property, | |
1541 | UNDERSCAN_OFF); | |
1542 | drm_connector_attach_property(&radeon_connector->base, | |
1543 | rdev->mode_info.underscan_hborder_property, | |
1544 | 0); | |
1545 | drm_connector_attach_property(&radeon_connector->base, | |
1546 | rdev->mode_info.underscan_vborder_property, | |
1547 | 0); | |
1548 | } | |
1549 | subpixel_order = SubPixelHorizontalRGB; | |
1550 | connector->interlace_allowed = true; | |
1551 | if (connector_type == DRM_MODE_CONNECTOR_HDMIB) | |
1552 | connector->doublescan_allowed = true; | |
1553 | else | |
1554 | connector->doublescan_allowed = false; | |
1555 | break; | |
1556 | case DRM_MODE_CONNECTOR_DisplayPort: | |
1557 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1558 | if (!radeon_dig_connector) | |
1559 | goto failed; | |
1560 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1561 | radeon_connector->con_priv = radeon_dig_connector; | |
1562 | drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); | |
1563 | drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); | |
1564 | if (i2c_bus->valid) { | |
1565 | /* add DP i2c bus */ | |
1566 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch"); | |
1567 | if (!radeon_dig_connector->dp_i2c_bus) | |
1568 | DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n"); | |
1569 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1570 | if (!radeon_connector->ddc_bus) | |
1571 | DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1572 | } | |
1573 | subpixel_order = SubPixelHorizontalRGB; | |
1574 | drm_connector_attach_property(&radeon_connector->base, | |
1575 | rdev->mode_info.coherent_mode_property, | |
1576 | 1); | |
1577 | if (ASIC_IS_AVIVO(rdev)) { | |
1578 | drm_connector_attach_property(&radeon_connector->base, | |
1579 | rdev->mode_info.underscan_property, | |
1580 | UNDERSCAN_OFF); | |
1581 | drm_connector_attach_property(&radeon_connector->base, | |
1582 | rdev->mode_info.underscan_hborder_property, | |
1583 | 0); | |
1584 | drm_connector_attach_property(&radeon_connector->base, | |
1585 | rdev->mode_info.underscan_vborder_property, | |
1586 | 0); | |
1587 | } | |
1588 | connector->interlace_allowed = true; | |
1589 | /* in theory with a DP to VGA converter... */ | |
c49948f4 | 1590 | connector->doublescan_allowed = false; |
eac4dff6 AD |
1591 | break; |
1592 | case DRM_MODE_CONNECTOR_eDP: | |
1593 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1594 | if (!radeon_dig_connector) | |
1595 | goto failed; | |
1596 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1597 | radeon_connector->con_priv = radeon_dig_connector; | |
1598 | drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); | |
1599 | drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); | |
1600 | if (i2c_bus->valid) { | |
1601 | /* add DP i2c bus */ | |
1602 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch"); | |
1603 | if (!radeon_dig_connector->dp_i2c_bus) | |
1604 | DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n"); | |
1605 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1606 | if (!radeon_connector->ddc_bus) | |
1607 | DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1608 | } | |
430f70d5 | 1609 | drm_connector_attach_property(&radeon_connector->base, |
eac4dff6 AD |
1610 | dev->mode_config.scaling_mode_property, |
1611 | DRM_MODE_SCALE_FULLSCREEN); | |
1612 | subpixel_order = SubPixelHorizontalRGB; | |
1613 | connector->interlace_allowed = false; | |
1614 | connector->doublescan_allowed = false; | |
1615 | break; | |
1616 | case DRM_MODE_CONNECTOR_SVIDEO: | |
1617 | case DRM_MODE_CONNECTOR_Composite: | |
1618 | case DRM_MODE_CONNECTOR_9PinDIN: | |
1619 | drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type); | |
1620 | drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs); | |
1621 | radeon_connector->dac_load_detect = true; | |
5bccf5e3 | 1622 | drm_connector_attach_property(&radeon_connector->base, |
eac4dff6 AD |
1623 | rdev->mode_info.load_detect_property, |
1624 | 1); | |
5bccf5e3 | 1625 | drm_connector_attach_property(&radeon_connector->base, |
eac4dff6 AD |
1626 | rdev->mode_info.tv_std_property, |
1627 | radeon_atombios_get_tv_info(rdev)); | |
1628 | /* no HPD on analog connectors */ | |
1629 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
1630 | connector->interlace_allowed = false; | |
1631 | connector->doublescan_allowed = false; | |
1632 | break; | |
1633 | case DRM_MODE_CONNECTOR_LVDS: | |
1634 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | |
1635 | if (!radeon_dig_connector) | |
1636 | goto failed; | |
1637 | radeon_dig_connector->igp_lane_info = igp_lane_info; | |
1638 | radeon_connector->con_priv = radeon_dig_connector; | |
1639 | drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); | |
1640 | drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); | |
1641 | if (i2c_bus->valid) { | |
1642 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); | |
1643 | if (!radeon_connector->ddc_bus) | |
1644 | DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); | |
1645 | } | |
1646 | drm_connector_attach_property(&radeon_connector->base, | |
1647 | dev->mode_config.scaling_mode_property, | |
1648 | DRM_MODE_SCALE_FULLSCREEN); | |
1649 | subpixel_order = SubPixelHorizontalRGB; | |
1650 | connector->interlace_allowed = false; | |
1651 | connector->doublescan_allowed = false; | |
1652 | break; | |
771fe6b9 | 1653 | } |
771fe6b9 JG |
1654 | } |
1655 | ||
2581afcc | 1656 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { |
eb1f8e4f DA |
1657 | if (i2c_bus->valid) |
1658 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | |
1659 | } else | |
1660 | connector->polled = DRM_CONNECTOR_POLL_HPD; | |
1661 | ||
771fe6b9 JG |
1662 | connector->display_info.subpixel_order = subpixel_order; |
1663 | drm_sysfs_connector_add(connector); | |
1664 | return; | |
1665 | ||
1666 | failed: | |
771fe6b9 JG |
1667 | drm_connector_cleanup(connector); |
1668 | kfree(connector); | |
1669 | } | |
1670 | ||
1671 | void | |
1672 | radeon_add_legacy_connector(struct drm_device *dev, | |
1673 | uint32_t connector_id, | |
1674 | uint32_t supported_device, | |
1675 | int connector_type, | |
b75fad06 | 1676 | struct radeon_i2c_bus_rec *i2c_bus, |
eed45b30 AD |
1677 | uint16_t connector_object_id, |
1678 | struct radeon_hpd *hpd) | |
771fe6b9 | 1679 | { |
445282db | 1680 | struct radeon_device *rdev = dev->dev_private; |
771fe6b9 JG |
1681 | struct drm_connector *connector; |
1682 | struct radeon_connector *radeon_connector; | |
1683 | uint32_t subpixel_order = SubPixelNone; | |
1684 | ||
4ce001ab | 1685 | if (connector_type == DRM_MODE_CONNECTOR_Unknown) |
771fe6b9 JG |
1686 | return; |
1687 | ||
cf4c12f9 AD |
1688 | /* if the user selected tv=0 don't try and add the connector */ |
1689 | if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) || | |
1690 | (connector_type == DRM_MODE_CONNECTOR_Composite) || | |
1691 | (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) && | |
1692 | (radeon_tv == 0)) | |
1693 | return; | |
1694 | ||
771fe6b9 JG |
1695 | /* see if we already added it */ |
1696 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
1697 | radeon_connector = to_radeon_connector(connector); | |
1698 | if (radeon_connector->connector_id == connector_id) { | |
1699 | radeon_connector->devices |= supported_device; | |
1700 | return; | |
1701 | } | |
1702 | } | |
1703 | ||
1704 | radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); | |
1705 | if (!radeon_connector) | |
1706 | return; | |
1707 | ||
1708 | connector = &radeon_connector->base; | |
1709 | ||
1710 | radeon_connector->connector_id = connector_id; | |
1711 | radeon_connector->devices = supported_device; | |
b75fad06 | 1712 | radeon_connector->connector_object_id = connector_object_id; |
eed45b30 | 1713 | radeon_connector->hpd = *hpd; |
771fe6b9 JG |
1714 | switch (connector_type) { |
1715 | case DRM_MODE_CONNECTOR_VGA: | |
1716 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
0b4c0f3f | 1717 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
771fe6b9 | 1718 | if (i2c_bus->valid) { |
f376b94f | 1719 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1720 | if (!radeon_connector->ddc_bus) |
a70882aa | 1721 | DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 1722 | } |
35e4b7af | 1723 | radeon_connector->dac_load_detect = true; |
445282db DA |
1724 | drm_connector_attach_property(&radeon_connector->base, |
1725 | rdev->mode_info.load_detect_property, | |
1726 | 1); | |
2581afcc AD |
1727 | /* no HPD on analog connectors */ |
1728 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
eb1f8e4f | 1729 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; |
c49948f4 AD |
1730 | connector->interlace_allowed = true; |
1731 | connector->doublescan_allowed = true; | |
771fe6b9 JG |
1732 | break; |
1733 | case DRM_MODE_CONNECTOR_DVIA: | |
1734 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | |
0b4c0f3f | 1735 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
771fe6b9 | 1736 | if (i2c_bus->valid) { |
f376b94f | 1737 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1738 | if (!radeon_connector->ddc_bus) |
a70882aa | 1739 | DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 1740 | } |
35e4b7af | 1741 | radeon_connector->dac_load_detect = true; |
445282db DA |
1742 | drm_connector_attach_property(&radeon_connector->base, |
1743 | rdev->mode_info.load_detect_property, | |
1744 | 1); | |
2581afcc AD |
1745 | /* no HPD on analog connectors */ |
1746 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
c49948f4 AD |
1747 | connector->interlace_allowed = true; |
1748 | connector->doublescan_allowed = true; | |
771fe6b9 JG |
1749 | break; |
1750 | case DRM_MODE_CONNECTOR_DVII: | |
1751 | case DRM_MODE_CONNECTOR_DVID: | |
1752 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | |
0b4c0f3f | 1753 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); |
771fe6b9 | 1754 | if (i2c_bus->valid) { |
f376b94f | 1755 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1756 | if (!radeon_connector->ddc_bus) |
a70882aa | 1757 | DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
68b3adb4 AD |
1758 | } |
1759 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { | |
35e4b7af | 1760 | radeon_connector->dac_load_detect = true; |
445282db DA |
1761 | drm_connector_attach_property(&radeon_connector->base, |
1762 | rdev->mode_info.load_detect_property, | |
1763 | 1); | |
771fe6b9 JG |
1764 | } |
1765 | subpixel_order = SubPixelHorizontalRGB; | |
c49948f4 AD |
1766 | connector->interlace_allowed = true; |
1767 | if (connector_type == DRM_MODE_CONNECTOR_DVII) | |
1768 | connector->doublescan_allowed = true; | |
1769 | else | |
1770 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
1771 | break; |
1772 | case DRM_MODE_CONNECTOR_SVIDEO: | |
1773 | case DRM_MODE_CONNECTOR_Composite: | |
1774 | case DRM_MODE_CONNECTOR_9PinDIN: | |
cf4c12f9 AD |
1775 | drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type); |
1776 | drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs); | |
1777 | radeon_connector->dac_load_detect = true; | |
1778 | /* RS400,RC410,RS480 chipset seems to report a lot | |
1779 | * of false positive on load detect, we haven't yet | |
1780 | * found a way to make load detect reliable on those | |
1781 | * chipset, thus just disable it for TV. | |
1782 | */ | |
1783 | if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480) | |
1784 | radeon_connector->dac_load_detect = false; | |
1785 | drm_connector_attach_property(&radeon_connector->base, | |
1786 | rdev->mode_info.load_detect_property, | |
1787 | radeon_connector->dac_load_detect); | |
1788 | drm_connector_attach_property(&radeon_connector->base, | |
1789 | rdev->mode_info.tv_std_property, | |
1790 | radeon_combios_get_tv_info(rdev)); | |
1791 | /* no HPD on analog connectors */ | |
1792 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; | |
c49948f4 AD |
1793 | connector->interlace_allowed = false; |
1794 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
1795 | break; |
1796 | case DRM_MODE_CONNECTOR_LVDS: | |
1797 | drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); | |
0b4c0f3f | 1798 | drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); |
771fe6b9 | 1799 | if (i2c_bus->valid) { |
f376b94f | 1800 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
771fe6b9 | 1801 | if (!radeon_connector->ddc_bus) |
a70882aa | 1802 | DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); |
771fe6b9 | 1803 | } |
445282db DA |
1804 | drm_connector_attach_property(&radeon_connector->base, |
1805 | dev->mode_config.scaling_mode_property, | |
1806 | DRM_MODE_SCALE_FULLSCREEN); | |
771fe6b9 | 1807 | subpixel_order = SubPixelHorizontalRGB; |
c49948f4 AD |
1808 | connector->interlace_allowed = false; |
1809 | connector->doublescan_allowed = false; | |
771fe6b9 JG |
1810 | break; |
1811 | } | |
1812 | ||
2581afcc | 1813 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { |
eb1f8e4f DA |
1814 | if (i2c_bus->valid) |
1815 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | |
1816 | } else | |
1817 | connector->polled = DRM_CONNECTOR_POLL_HPD; | |
771fe6b9 JG |
1818 | connector->display_info.subpixel_order = subpixel_order; |
1819 | drm_sysfs_connector_add(connector); | |
63ec0119 MD |
1820 | if (connector_type == DRM_MODE_CONNECTOR_LVDS) { |
1821 | struct drm_encoder *drm_encoder; | |
1822 | ||
1823 | list_for_each_entry(drm_encoder, &dev->mode_config.encoder_list, head) { | |
1824 | struct radeon_encoder *radeon_encoder; | |
1825 | ||
1826 | radeon_encoder = to_radeon_encoder(drm_encoder); | |
1827 | if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_LVDS) | |
1828 | radeon_legacy_backlight_init(radeon_encoder, connector); | |
1829 | } | |
1830 | } | |
771fe6b9 | 1831 | } |