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drm/radeon: improve encoder picking functions (v2)
[mirror_ubuntu-hirsute-kernel.git] / drivers / gpu / drm / radeon / radeon_connectors.c
CommitLineData
771fe6b9
JG		 1/*
2 * Copyright 2007-8 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors: Dave Airlie
24 * Alex Deucher
25 */
760285e7
DH		 26#include <drm/drmP.h>
27#include <drm/drm_edid.h>
28#include <drm/drm_crtc_helper.h>
29#include <drm/drm_fb_helper.h>
30#include <drm/radeon_drm.h>
771fe6b9 31#include "radeon.h"
1a626b68 32#include "radeon_audio.h"
923f6848 33#include "atom.h"
771fe6b9 34
10ebc0bc
DA		 35#include <linux/pm_runtime.h>
36
d4877cf2
AD		 37void radeon_connector_hotplug(struct drm_connector *connector)
38{
39 struct drm_device *dev = connector->dev;
40 struct radeon_device *rdev = dev->dev_private;
41 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
42
cbac9543
AD		 43 /* bail if the connector does not have hpd pin, e.g.,
44 * VGA, TV, etc.
45 */
46 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE)
47 return;
48
1e85e1d0 49 radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
d4877cf2 50
73104b5c 51 /* if the connector is already off, don't turn it back on */
6e9f798d 52 /* FIXME: This access isn't protected by any locks. */
73104b5c
AD		 53 if (connector->dpms != DRM_MODE_DPMS_ON)
54 return;
55
d5811e87
AD		 56 /* just deal with DP (not eDP) here. */
57 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
266dcba5
JG		 58 struct radeon_connector_atom_dig *dig_connector =
59 radeon_connector->con_priv;
7c3ed0fd 60
266dcba5
JG		 61 /* if existing sink type was not DP no need to retrain */
62 if (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT)
63 return;
64
65 /* first get sink type as it may be reset after (un)plug */
66 dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
67 /* don't do anything if sink is not display port, i.e.,
68 * passive dp->(dvi|hdmi) adaptor
69 */
70 if (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
71 int saved_dpms = connector->dpms;
72 /* Only turn off the display if it's physically disconnected */
ca2ccde5 73 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
266dcba5 74 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
ca2ccde5
JG		 75 } else if (radeon_dp_needs_link_train(radeon_connector)) {
76 /* set it to OFF so that drm_helper_connector_dpms()
77 * won't return immediately since the current state
78 * is ON at this point.
79 */
80 connector->dpms = DRM_MODE_DPMS_OFF;
266dcba5 81 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
ca2ccde5 82 }
266dcba5
JG		 83 connector->dpms = saved_dpms;
84 }
d4877cf2 85 }
d4877cf2
AD		 86}
87
445282db
DA		 88static void radeon_property_change_mode(struct drm_encoder *encoder)
89{
90 struct drm_crtc *crtc = encoder->crtc;
91
92 if (crtc && crtc->enabled) {
93 drm_crtc_helper_set_mode(crtc, &crtc->mode,
f4510a27 94 crtc->x, crtc->y, crtc->primary->fb);
445282db
DA		 95 }
96}
eccea792
AD		 97
98int radeon_get_monitor_bpc(struct drm_connector *connector)
99{
100 struct drm_device *dev = connector->dev;
101 struct radeon_device *rdev = dev->dev_private;
102 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
103 struct radeon_connector_atom_dig *dig_connector;
104 int bpc = 8;
ea292861 105 int mode_clock, max_tmds_clock;
eccea792
AD		 106
107 switch (connector->connector_type) {
108 case DRM_MODE_CONNECTOR_DVII:
109 case DRM_MODE_CONNECTOR_HDMIB:
110 if (radeon_connector->use_digital) {
377bd8a9 111 if (drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
eccea792
AD		 112 if (connector->display_info.bpc)
113 bpc = connector->display_info.bpc;
114 }
115 }
116 break;
117 case DRM_MODE_CONNECTOR_DVID:
118 case DRM_MODE_CONNECTOR_HDMIA:
377bd8a9 119 if (drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
eccea792
AD		 120 if (connector->display_info.bpc)
121 bpc = connector->display_info.bpc;
122 }
123 break;
124 case DRM_MODE_CONNECTOR_DisplayPort:
125 dig_connector = radeon_connector->con_priv;
126 if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
127 (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) ||
377bd8a9 128 drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
eccea792
AD		 129 if (connector->display_info.bpc)
130 bpc = connector->display_info.bpc;
131 }
132 break;
133 case DRM_MODE_CONNECTOR_eDP:
134 case DRM_MODE_CONNECTOR_LVDS:
135 if (connector->display_info.bpc)
136 bpc = connector->display_info.bpc;
137 else if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) {
138 struct drm_connector_helper_funcs *connector_funcs =
139 connector->helper_private;
140 struct drm_encoder *encoder = connector_funcs->best_encoder(connector);
141 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
142 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
143
144 if (dig->lcd_misc & ATOM_PANEL_MISC_V13_6BIT_PER_COLOR)
145 bpc = 6;
146 else if (dig->lcd_misc & ATOM_PANEL_MISC_V13_8BIT_PER_COLOR)
147 bpc = 8;
148 }
149 break;
150 }
89b92339 151
377bd8a9 152 if (drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
89b92339
MK		 153 /* hdmi deep color only implemented on DCE4+ */
154 if ((bpc > 8) && !ASIC_IS_DCE4(rdev)) {
155 DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 8 bpc.\n",
72082093 156 connector->name, bpc);
89b92339
MK		 157 bpc = 8;
158 }
159
160 /*
161 * Pre DCE-8 hw can't handle > 12 bpc, and more than 12 bpc doesn't make
162 * much sense without support for > 12 bpc framebuffers. RGB 4:4:4 at
163 * 12 bpc is always supported on hdmi deep color sinks, as this is
164 * required by the HDMI-1.3 spec. Clamp to a safe 12 bpc maximum.
165 */
166 if (bpc > 12) {
167 DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 12 bpc.\n",
72082093 168 connector->name, bpc);
89b92339
MK		 169 bpc = 12;
170 }
ea292861
MK		 171
172 /* Any defined maximum tmds clock limit we must not exceed? */
173 if (connector->max_tmds_clock > 0) {
174 /* mode_clock is clock in kHz for mode to be modeset on this connector */
175 mode_clock = radeon_connector->pixelclock_for_modeset;
176
177 /* Maximum allowable input clock in kHz */
178 max_tmds_clock = connector->max_tmds_clock * 1000;
179
180 DRM_DEBUG("%s: hdmi mode dotclock %d kHz, max tmds input clock %d kHz.\n",
181 connector->name, mode_clock, max_tmds_clock);
182
183 /* Check if bpc is within clock limit. Try to degrade gracefully otherwise */
184 if ((bpc == 12) && (mode_clock * 3/2 > max_tmds_clock)) {
185 if ((connector->display_info.edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_30) &&
186 (mode_clock * 5/4 <= max_tmds_clock))
187 bpc = 10;
188 else
189 bpc = 8;
190
191 DRM_DEBUG("%s: HDMI deep color 12 bpc exceeds max tmds clock. Using %d bpc.\n",
192 connector->name, bpc);
193 }
194
195 if ((bpc == 10) && (mode_clock * 5/4 > max_tmds_clock)) {
196 bpc = 8;
197 DRM_DEBUG("%s: HDMI deep color 10 bpc exceeds max tmds clock. Using %d bpc.\n",
198 connector->name, bpc);
199 }
200 }
9f51e2e0
MK		 201 else if (bpc > 8) {
202 /* max_tmds_clock missing, but hdmi spec mandates it for deep color. */
203 DRM_DEBUG("%s: Required max tmds clock for HDMI deep color missing. Using 8 bpc.\n",
204 connector->name);
205 bpc = 8;
206 }
89b92339
MK		 207 }
208
9f51e2e0
MK		 209 if ((radeon_deep_color == 0) && (bpc > 8)) {
210 DRM_DEBUG("%s: Deep color disabled. Set radeon module param deep_color=1 to enable.\n",
211 connector->name);
a624f429 212 bpc = 8;
9f51e2e0 213 }
a624f429 214
89b92339 215 DRM_DEBUG("%s: Display bpc=%d, returned bpc=%d\n",
72082093 216 connector->name, connector->display_info.bpc, bpc);
89b92339 217
eccea792
AD		 218 return bpc;
219}
220
771fe6b9
JG		 221static void
222radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status)
223{
224 struct drm_device *dev = connector->dev;
225 struct radeon_device *rdev = dev->dev_private;
226 struct drm_encoder *best_encoder = NULL;
227 struct drm_encoder *encoder = NULL;
228 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
771fe6b9
JG		 229 bool connected;
230 int i;
231
232 best_encoder = connector_funcs->best_encoder(connector);
233
234 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
235 if (connector->encoder_ids[i] == 0)
236 break;
237
b957f457
RC		 238 encoder = drm_encoder_find(connector->dev,
239 connector->encoder_ids[i]);
240 if (!encoder)
771fe6b9
JG		 241 continue;
242
771fe6b9
JG		 243 if ((encoder == best_encoder) && (status == connector_status_connected))
244 connected = true;
245 else
246 connected = false;
247
248 if (rdev->is_atom_bios)
249 radeon_atombios_connected_scratch_regs(connector, encoder, connected);
250 else
251 radeon_combios_connected_scratch_regs(connector, encoder, connected);
252
253 }
254}
255
1109ca09 256static struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type)
445282db 257{
445282db
DA		 258 struct drm_encoder *encoder;
259 int i;
260
261 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
262 if (connector->encoder_ids[i] == 0)
263 break;
264
b957f457
RC		 265 encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]);
266 if (!encoder)
445282db
DA		 267 continue;
268
445282db
DA		 269 if (encoder->encoder_type == encoder_type)
270 return encoder;
271 }
272 return NULL;
273}
274
377bd8a9
AD		 275struct edid *radeon_connector_edid(struct drm_connector *connector)
276{
277 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
278 struct drm_property_blob *edid_blob = connector->edid_blob_ptr;
279
280 if (radeon_connector->edid) {
281 return radeon_connector->edid;
282 } else if (edid_blob) {
283 struct edid *edid = kmemdup(edid_blob->data, edid_blob->length, GFP_KERNEL);
284 if (edid)
285 radeon_connector->edid = edid;
286 }
287 return radeon_connector->edid;
288}
289
72a5c970
AD		 290static void radeon_connector_get_edid(struct drm_connector *connector)
291{
292 struct drm_device *dev = connector->dev;
293 struct radeon_device *rdev = dev->dev_private;
294 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
295
296 if (radeon_connector->edid)
297 return;
298
299 /* on hw with routers, select right port */
300 if (radeon_connector->router.ddc_valid)
301 radeon_router_select_ddc_port(radeon_connector);
302
303 if ((radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
304 ENCODER_OBJECT_ID_NONE) &&
305 radeon_connector->ddc_bus->has_aux) {
306 radeon_connector->edid = drm_get_edid(connector,
307 &radeon_connector->ddc_bus->aux.ddc);
308 } else if ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) ||
309 (connector->connector_type == DRM_MODE_CONNECTOR_eDP)) {
310 struct radeon_connector_atom_dig *dig = radeon_connector->con_priv;
311
312 if ((dig->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT ||
313 dig->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) &&
314 radeon_connector->ddc_bus->has_aux)
315 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
316 &radeon_connector->ddc_bus->aux.ddc);
317 else if (radeon_connector->ddc_bus)
318 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
319 &radeon_connector->ddc_bus->adapter);
320 } else if (radeon_connector->ddc_bus) {
321 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
322 &radeon_connector->ddc_bus->adapter);
323 }
324
325 if (!radeon_connector->edid) {
13485794
AD		 326 /* don't fetch the edid from the vbios if ddc fails and runpm is
327 * enabled so we report disconnected.
328 */
329 if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0))
330 return;
331
72a5c970
AD		 332 if (rdev->is_atom_bios) {
333 /* some laptops provide a hardcoded edid in rom for LCDs */
334 if (((connector->connector_type == DRM_MODE_CONNECTOR_LVDS) ||
335 (connector->connector_type == DRM_MODE_CONNECTOR_eDP)))
336 radeon_connector->edid = radeon_bios_get_hardcoded_edid(rdev);
337 } else {
338 /* some servers provide a hardcoded edid in rom for KVMs */
339 radeon_connector->edid = radeon_bios_get_hardcoded_edid(rdev);
340 }
341 }
342}
343
344static void radeon_connector_free_edid(struct drm_connector *connector)
345{
346 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
347
348 if (radeon_connector->edid) {
349 kfree(radeon_connector->edid);
350 radeon_connector->edid = NULL;
351 }
352}
353
354static int radeon_ddc_get_modes(struct drm_connector *connector)
355{
356 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
357 int ret;
358
359 if (radeon_connector->edid) {
360 drm_mode_connector_update_edid_property(connector, radeon_connector->edid);
361 ret = drm_add_edid_modes(connector, radeon_connector->edid);
362 drm_edid_to_eld(connector, radeon_connector->edid);
363 return ret;
364 }
365 drm_mode_connector_update_edid_property(connector, NULL);
366 return 0;
367}
368
1109ca09 369static struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector)
771fe6b9
JG		 370{
371 int enc_id = connector->encoder_ids[0];
771fe6b9 372 /* pick the encoder ids */
b957f457
RC		 373 if (enc_id)
374 return drm_encoder_find(connector->dev, enc_id);
771fe6b9
JG		 375 return NULL;
376}
377
da997620
AD		 378static void radeon_get_native_mode(struct drm_connector *connector)
379{
380 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
381 struct radeon_encoder *radeon_encoder;
382
383 if (encoder == NULL)
384 return;
385
386 radeon_encoder = to_radeon_encoder(encoder);
387
388 if (!list_empty(&connector->probed_modes)) {
389 struct drm_display_mode *preferred_mode =
390 list_first_entry(&connector->probed_modes,
391 struct drm_display_mode, head);
392
393 radeon_encoder->native_mode = *preferred_mode;
394 } else {
395 radeon_encoder->native_mode.clock = 0;
396 }
397}
398
4ce001ab
DA		 399/*
400 * radeon_connector_analog_encoder_conflict_solve
401 * - search for other connectors sharing this encoder
402 * if priority is true, then set them disconnected if this is connected
403 * if priority is false, set us disconnected if they are connected
404 */
405static enum drm_connector_status
406radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector,
407 struct drm_encoder *encoder,
408 enum drm_connector_status current_status,
409 bool priority)
410{
411 struct drm_device *dev = connector->dev;
412 struct drm_connector *conflict;
08d07511 413 struct radeon_connector *radeon_conflict;
4ce001ab
DA		 414 int i;
415
416 list_for_each_entry(conflict, &dev->mode_config.connector_list, head) {
417 if (conflict == connector)
418 continue;
419
08d07511 420 radeon_conflict = to_radeon_connector(conflict);
4ce001ab
DA		 421 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
422 if (conflict->encoder_ids[i] == 0)
423 break;
424
425 /* if the IDs match */
426 if (conflict->encoder_ids[i] == encoder->base.id) {
427 if (conflict->status != connector_status_connected)
428 continue;
08d07511
AD		 429
430 if (radeon_conflict->use_digital)
431 continue;
4ce001ab
DA		 432
433 if (priority == true) {
72082093
JN		 434 DRM_DEBUG_KMS("1: conflicting encoders switching off %s\n",
435 conflict->name);
436 DRM_DEBUG_KMS("in favor of %s\n",
437 connector->name);
4ce001ab
DA		 438 conflict->status = connector_status_disconnected;
439 radeon_connector_update_scratch_regs(conflict, connector_status_disconnected);
440 } else {
72082093
JN		 441 DRM_DEBUG_KMS("2: conflicting encoders switching off %s\n",
442 connector->name);
443 DRM_DEBUG_KMS("in favor of %s\n",
444 conflict->name);
4ce001ab
DA		 445 current_status = connector_status_disconnected;
446 }
447 break;
448 }
449 }
450 }
451 return current_status;
452
453}
454
771fe6b9
JG		 455static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder)
456{
457 struct drm_device *dev = encoder->dev;
458 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
459 struct drm_display_mode *mode = NULL;
de2103e4 460 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
771fe6b9 461
de2103e4
AD		 462 if (native_mode->hdisplay != 0 &&
463 native_mode->vdisplay != 0 &&
464 native_mode->clock != 0) {
fb06ca8f 465 mode = drm_mode_duplicate(dev, native_mode);
771fe6b9
JG		 466 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
467 drm_mode_set_name(mode);
468
d9fdaafb 469 DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name);
d2efdf6d
AD		 470 } else if (native_mode->hdisplay != 0 &&
471 native_mode->vdisplay != 0) {
472 /* mac laptops without an edid */
473 /* Note that this is not necessarily the exact panel mode,
474 * but an approximation based on the cvt formula. For these
475 * systems we should ideally read the mode info out of the
476 * registers or add a mode table, but this works and is much
477 * simpler.
478 */
479 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false);
480 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
d9fdaafb 481 DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name);
771fe6b9
JG		 482 }
483 return mode;
484}
485
923f6848
AD		 486static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector)
487{
488 struct drm_device *dev = encoder->dev;
489 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
490 struct drm_display_mode *mode = NULL;
de2103e4 491 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
923f6848
AD		 492 int i;
493 struct mode_size {
494 int w;
495 int h;
496 } common_modes[17] = {
497 { 640, 480},
498 { 720, 480},
499 { 800, 600},
500 { 848, 480},
501 {1024, 768},
502 {1152, 768},
503 {1280, 720},
504 {1280, 800},
505 {1280, 854},
506 {1280, 960},
507 {1280, 1024},
508 {1440, 900},
509 {1400, 1050},
510 {1680, 1050},
511 {1600, 1200},
512 {1920, 1080},
513 {1920, 1200}
514 };
515
516 for (i = 0; i < 17; i++) {
dfdd6467
AD		 517 if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) {
518 if (common_modes[i].w > 1024 ||
519 common_modes[i].h > 768)
520 continue;
521 }
923f6848 522 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
de2103e4
AD		 523 if (common_modes[i].w > native_mode->hdisplay ||
524 common_modes[i].h > native_mode->vdisplay ||
525 (common_modes[i].w == native_mode->hdisplay &&
526 common_modes[i].h == native_mode->vdisplay))
923f6848
AD		 527 continue;
528 }
529 if (common_modes[i].w < 320 || common_modes[i].h < 200)
530 continue;
531
d50ba256 532 mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
923f6848
AD		 533 drm_mode_probed_add(connector, mode);
534 }
535}
536
1109ca09 537static int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property,
771fe6b9
JG		 538 uint64_t val)
539{
445282db
DA		 540 struct drm_device *dev = connector->dev;
541 struct radeon_device *rdev = dev->dev_private;
542 struct drm_encoder *encoder;
543 struct radeon_encoder *radeon_encoder;
544
545 if (property == rdev->mode_info.coherent_mode_property) {
546 struct radeon_encoder_atom_dig *dig;
ce227c41 547 bool new_coherent_mode;
445282db
DA		 548
549 /* need to find digital encoder on connector */
550 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
551 if (!encoder)
552 return 0;
553
554 radeon_encoder = to_radeon_encoder(encoder);
555
556 if (!radeon_encoder->enc_priv)
557 return 0;
558
559 dig = radeon_encoder->enc_priv;
ce227c41
DA		 560 new_coherent_mode = val ? true : false;
561 if (dig->coherent_mode != new_coherent_mode) {
562 dig->coherent_mode = new_coherent_mode;
563 radeon_property_change_mode(&radeon_encoder->base);
564 }
445282db
DA		 565 }
566
8666c076
AD		 567 if (property == rdev->mode_info.audio_property) {
568 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
569 /* need to find digital encoder on connector */
570 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
571 if (!encoder)
572 return 0;
573
574 radeon_encoder = to_radeon_encoder(encoder);
575
576 if (radeon_connector->audio != val) {
577 radeon_connector->audio = val;
578 radeon_property_change_mode(&radeon_encoder->base);
579 }
580 }
581
6214bb74
AD		 582 if (property == rdev->mode_info.dither_property) {
583 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
584 /* need to find digital encoder on connector */
585 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
586 if (!encoder)
587 return 0;
588
589 radeon_encoder = to_radeon_encoder(encoder);
590
591 if (radeon_connector->dither != val) {
592 radeon_connector->dither = val;
593 radeon_property_change_mode(&radeon_encoder->base);
594 }
595 }
596
5b1714d3
AD		 597 if (property == rdev->mode_info.underscan_property) {
598 /* need to find digital encoder on connector */
599 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
600 if (!encoder)
601 return 0;
602
603 radeon_encoder = to_radeon_encoder(encoder);
604
605 if (radeon_encoder->underscan_type != val) {
606 radeon_encoder->underscan_type = val;
607 radeon_property_change_mode(&radeon_encoder->base);
608 }
609 }
610
5bccf5e3
MG		 611 if (property == rdev->mode_info.underscan_hborder_property) {
612 /* need to find digital encoder on connector */
613 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
614 if (!encoder)
615 return 0;
616
617 radeon_encoder = to_radeon_encoder(encoder);
618
619 if (radeon_encoder->underscan_hborder != val) {
620 radeon_encoder->underscan_hborder = val;
621 radeon_property_change_mode(&radeon_encoder->base);
622 }
623 }
624
625 if (property == rdev->mode_info.underscan_vborder_property) {
626 /* need to find digital encoder on connector */
627 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
628 if (!encoder)
629 return 0;
630
631 radeon_encoder = to_radeon_encoder(encoder);
632
633 if (radeon_encoder->underscan_vborder != val) {
634 radeon_encoder->underscan_vborder = val;
635 radeon_property_change_mode(&radeon_encoder->base);
636 }
637 }
638
445282db
DA		 639 if (property == rdev->mode_info.tv_std_property) {
640 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC);
641 if (!encoder) {
642 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC);
643 }
644
645 if (!encoder)
646 return 0;
647
648 radeon_encoder = to_radeon_encoder(encoder);
649 if (!radeon_encoder->enc_priv)
650 return 0;
643acacf 651 if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) {
445282db
DA		 652 struct radeon_encoder_atom_dac *dac_int;
653 dac_int = radeon_encoder->enc_priv;
654 dac_int->tv_std = val;
655 } else {
656 struct radeon_encoder_tv_dac *dac_int;
657 dac_int = radeon_encoder->enc_priv;
658 dac_int->tv_std = val;
659 }
660 radeon_property_change_mode(&radeon_encoder->base);
661 }
662
663 if (property == rdev->mode_info.load_detect_property) {
664 struct radeon_connector *radeon_connector =
665 to_radeon_connector(connector);
666
667 if (val == 0)
668 radeon_connector->dac_load_detect = false;
669 else
670 radeon_connector->dac_load_detect = true;
671 }
672
673 if (property == rdev->mode_info.tmds_pll_property) {
674 struct radeon_encoder_int_tmds *tmds = NULL;
675 bool ret = false;
676 /* need to find digital encoder on connector */
677 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
678 if (!encoder)
679 return 0;
680
681 radeon_encoder = to_radeon_encoder(encoder);
682
683 tmds = radeon_encoder->enc_priv;
684 if (!tmds)
685 return 0;
686
687 if (val == 0) {
688 if (rdev->is_atom_bios)
689 ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds);
690 else
691 ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds);
692 }
693 if (val == 1 || ret == false) {
694 radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds);
695 }
696 radeon_property_change_mode(&radeon_encoder->base);
697 }
698
da997620
AD		 699 if (property == dev->mode_config.scaling_mode_property) {
700 enum radeon_rmx_type rmx_type;
701
702 if (connector->encoder)
703 radeon_encoder = to_radeon_encoder(connector->encoder);
704 else {
705 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
706 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
707 }
708
709 switch (val) {
710 default:
711 case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
712 case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
713 case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
714 case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
715 }
716 if (radeon_encoder->rmx_type == rmx_type)
717 return 0;
718
719 if ((rmx_type != DRM_MODE_SCALE_NONE) &&
720 (radeon_encoder->native_mode.clock == 0))
721 return 0;
722
723 radeon_encoder->rmx_type = rmx_type;
724
725 radeon_property_change_mode(&radeon_encoder->base);
726 }
727
643b1f56
AD		 728 if (property == rdev->mode_info.output_csc_property) {
729 if (connector->encoder)
730 radeon_encoder = to_radeon_encoder(connector->encoder);
731 else {
732 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
733 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
734 }
735
736 if (radeon_encoder->output_csc == val)
737 return 0;
738
739 radeon_encoder->output_csc = val;
740
741 if (connector->encoder->crtc) {
742 struct drm_crtc *crtc = connector->encoder->crtc;
743 struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
744 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
745
746 radeon_crtc->output_csc = radeon_encoder->output_csc;
747
748 (*crtc_funcs->load_lut)(crtc);
749 }
750 }
751
771fe6b9
JG		 752 return 0;
753}
754
8dfaa8a7
MD		 755static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder,
756 struct drm_connector *connector)
757{
758 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 759 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
13bb9430
MG		 760 struct drm_display_mode *t, *mode;
761
762 /* If the EDID preferred mode doesn't match the native mode, use it */
763 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
764 if (mode->type & DRM_MODE_TYPE_PREFERRED) {
765 if (mode->hdisplay != native_mode->hdisplay ||
766 mode->vdisplay != native_mode->vdisplay)
767 memcpy(native_mode, mode, sizeof(*mode));
768 }
769 }
8dfaa8a7
MD		 770
771 /* Try to get native mode details from EDID if necessary */
de2103e4 772 if (!native_mode->clock) {
8dfaa8a7 773 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
de2103e4
AD		 774 if (mode->hdisplay == native_mode->hdisplay &&
775 mode->vdisplay == native_mode->vdisplay) {
776 *native_mode = *mode;
777 drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V);
c5d46b4e 778 DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n");
8dfaa8a7
MD		 779 break;
780 }
781 }
782 }
13bb9430 783
de2103e4 784 if (!native_mode->clock) {
c5d46b4e 785 DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n");
8dfaa8a7
MD		 786 radeon_encoder->rmx_type = RMX_OFF;
787 }
788}
771fe6b9
JG		 789
790static int radeon_lvds_get_modes(struct drm_connector *connector)
791{
771fe6b9
JG		 792 struct drm_encoder *encoder;
793 int ret = 0;
794 struct drm_display_mode *mode;
795
72a5c970
AD		 796 radeon_connector_get_edid(connector);
797 ret = radeon_ddc_get_modes(connector);
798 if (ret > 0) {
799 encoder = radeon_best_single_encoder(connector);
800 if (encoder) {
801 radeon_fixup_lvds_native_mode(encoder, connector);
802 /* add scaled modes */
803 radeon_add_common_modes(encoder, connector);
771fe6b9 804 }
72a5c970 805 return ret;
771fe6b9
JG		 806 }
807
808 encoder = radeon_best_single_encoder(connector);
809 if (!encoder)
810 return 0;
811
812 /* we have no EDID modes */
813 mode = radeon_fp_native_mode(encoder);
814 if (mode) {
815 ret = 1;
816 drm_mode_probed_add(connector, mode);
7a868e18
AD		 817 /* add the width/height from vbios tables if available */
818 connector->display_info.width_mm = mode->width_mm;
819 connector->display_info.height_mm = mode->height_mm;
7747b713
AD		 820 /* add scaled modes */
821 radeon_add_common_modes(encoder, connector);
771fe6b9 822 }
923f6848 823
771fe6b9
JG		 824 return ret;
825}
826
827static int radeon_lvds_mode_valid(struct drm_connector *connector,
828 struct drm_display_mode *mode)
829{
a3fa6320
AD		 830 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
831
832 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
833 return MODE_PANEL;
834
835 if (encoder) {
836 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
837 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
838
839 /* AVIVO hardware supports downscaling modes larger than the panel
840 * to the panel size, but I'm not sure this is desirable.
841 */
842 if ((mode->hdisplay > native_mode->hdisplay) ||
843 (mode->vdisplay > native_mode->vdisplay))
844 return MODE_PANEL;
845
846 /* if scaling is disabled, block non-native modes */
847 if (radeon_encoder->rmx_type == RMX_OFF) {
848 if ((mode->hdisplay != native_mode->hdisplay) ||
849 (mode->vdisplay != native_mode->vdisplay))
850 return MODE_PANEL;
851 }
852 }
853
771fe6b9
JG		 854 return MODE_OK;
855}
856
7b334fcb 857static enum drm_connector_status
930a9e28 858radeon_lvds_detect(struct drm_connector *connector, bool force)
771fe6b9 859{
13485794
AD		 860 struct drm_device *dev = connector->dev;
861 struct radeon_device *rdev = dev->dev_private;
0549a061 862 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
2ffb8429 863 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
0549a061 864 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc
DA		 865 int r;
866
867 r = pm_runtime_get_sync(connector->dev->dev);
868 if (r < 0)
869 return connector_status_disconnected;
2ffb8429
AD		 870
871 if (encoder) {
872 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 873 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
2ffb8429
AD		 874
875 /* check if panel is valid */
de2103e4 876 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
2ffb8429 877 ret = connector_status_connected;
13485794
AD		 878 /* don't fetch the edid from the vbios if ddc fails and runpm is
879 * enabled so we report disconnected.
880 */
881 if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0))
882 ret = connector_status_disconnected;
2ffb8429 883 }
0549a061
AD		 884
885 /* check for edid as well */
72a5c970 886 radeon_connector_get_edid(connector);
0294cf4f
AD		 887 if (radeon_connector->edid)
888 ret = connector_status_connected;
771fe6b9 889 /* check acpi lid status ??? */
2ffb8429 890
771fe6b9 891 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA		 892 pm_runtime_mark_last_busy(connector->dev->dev);
893 pm_runtime_put_autosuspend(connector->dev->dev);
771fe6b9
JG		 894 return ret;
895}
896
897static void radeon_connector_destroy(struct drm_connector *connector)
898{
899 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
900
72a5c970 901 radeon_connector_free_edid(connector);
771fe6b9 902 kfree(radeon_connector->con_priv);
34ea3d38 903 drm_connector_unregister(connector);
771fe6b9
JG		 904 drm_connector_cleanup(connector);
905 kfree(connector);
906}
907
445282db
DA		 908static int radeon_lvds_set_property(struct drm_connector *connector,
909 struct drm_property *property,
910 uint64_t value)
911{
912 struct drm_device *dev = connector->dev;
913 struct radeon_encoder *radeon_encoder;
914 enum radeon_rmx_type rmx_type;
915
d9fdaafb 916 DRM_DEBUG_KMS("\n");
445282db
DA		 917 if (property != dev->mode_config.scaling_mode_property)
918 return 0;
919
920 if (connector->encoder)
921 radeon_encoder = to_radeon_encoder(connector->encoder);
922 else {
923 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
924 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
925 }
926
927 switch (value) {
928 case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
929 case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
930 case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
931 default:
932 case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
933 }
934 if (radeon_encoder->rmx_type == rmx_type)
935 return 0;
936
937 radeon_encoder->rmx_type = rmx_type;
938
939 radeon_property_change_mode(&radeon_encoder->base);
940 return 0;
941}
942
943
1109ca09 944static const struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = {
771fe6b9
JG		 945 .get_modes = radeon_lvds_get_modes,
946 .mode_valid = radeon_lvds_mode_valid,
947 .best_encoder = radeon_best_single_encoder,
948};
949
1109ca09 950static const struct drm_connector_funcs radeon_lvds_connector_funcs = {
771fe6b9
JG		 951 .dpms = drm_helper_connector_dpms,
952 .detect = radeon_lvds_detect,
953 .fill_modes = drm_helper_probe_single_connector_modes,
954 .destroy = radeon_connector_destroy,
445282db 955 .set_property = radeon_lvds_set_property,
771fe6b9
JG		 956};
957
958static int radeon_vga_get_modes(struct drm_connector *connector)
959{
771fe6b9
JG		 960 int ret;
961
72a5c970
AD		 962 radeon_connector_get_edid(connector);
963 ret = radeon_ddc_get_modes(connector);
771fe6b9 964
da997620
AD		 965 radeon_get_native_mode(connector);
966
771fe6b9
JG		 967 return ret;
968}
969
970static int radeon_vga_mode_valid(struct drm_connector *connector,
971 struct drm_display_mode *mode)
972{
b20f9bef
AD		 973 struct drm_device *dev = connector->dev;
974 struct radeon_device *rdev = dev->dev_private;
975
a3fa6320 976 /* XXX check mode bandwidth */
b20f9bef
AD		 977
978 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
979 return MODE_CLOCK_HIGH;
980
771fe6b9
JG		 981 return MODE_OK;
982}
983
7b334fcb 984static enum drm_connector_status
930a9e28 985radeon_vga_detect(struct drm_connector *connector, bool force)
771fe6b9 986{
fafcf94e
AD		 987 struct drm_device *dev = connector->dev;
988 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG		 989 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
990 struct drm_encoder *encoder;
991 struct drm_encoder_helper_funcs *encoder_funcs;
4b9d2a21 992 bool dret = false;
771fe6b9 993 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc
DA		 994 int r;
995
996 r = pm_runtime_get_sync(connector->dev->dev);
997 if (r < 0)
998 return connector_status_disconnected;
771fe6b9 999
4ce001ab
DA		 1000 encoder = radeon_best_single_encoder(connector);
1001 if (!encoder)
1002 ret = connector_status_disconnected;
1003
eb6b6d7c 1004 if (radeon_connector->ddc_bus)
0a9069d3 1005 dret = radeon_ddc_probe(radeon_connector, false);
0294cf4f 1006 if (dret) {
d0d0a225 1007 radeon_connector->detected_by_load = false;
72a5c970
AD		 1008 radeon_connector_free_edid(connector);
1009 radeon_connector_get_edid(connector);
0294cf4f
AD		 1010
1011 if (!radeon_connector->edid) {
f82f5f3a 1012 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
72082093 1013 connector->name);
f82f5f3a 1014 ret = connector_status_connected;
0294cf4f 1015 } else {
72a5c970
AD		 1016 radeon_connector->use_digital =
1017 !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
0294cf4f
AD		 1018
1019 /* some oems have boards with separate digital and analog connectors
1020 * with a shared ddc line (often vga + hdmi)
1021 */
1022 if (radeon_connector->use_digital && radeon_connector->shared_ddc) {
72a5c970 1023 radeon_connector_free_edid(connector);
0294cf4f 1024 ret = connector_status_disconnected;
72a5c970 1025 } else {
0294cf4f 1026 ret = connector_status_connected;
72a5c970 1027 }
0294cf4f
AD		 1028 }
1029 } else {
c3cceedd
DA		 1030
1031 /* if we aren't forcing don't do destructive polling */
d0d0a225
AD		 1032 if (!force) {
1033 /* only return the previous status if we last
1034 * detected a monitor via load.
1035 */
1036 if (radeon_connector->detected_by_load)
10ebc0bc
DA		 1037 ret = connector->status;
1038 goto out;
d0d0a225 1039 }
c3cceedd 1040
d8a7f792 1041 if (radeon_connector->dac_load_detect && encoder) {
445282db
DA		 1042 encoder_funcs = encoder->helper_private;
1043 ret = encoder_funcs->detect(encoder, connector);
34076446 1044 if (ret != connector_status_disconnected)
d0d0a225 1045 radeon_connector->detected_by_load = true;
445282db 1046 }
771fe6b9
JG		 1047 }
1048
4ce001ab
DA		 1049 if (ret == connector_status_connected)
1050 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
fafcf94e
AD		 1051
1052 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
1053 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
1054 * by other means, assume the CRT is connected and use that EDID.
1055 */
1056 if ((!rdev->is_atom_bios) &&
1057 (ret == connector_status_disconnected) &&
1058 rdev->mode_info.bios_hardcoded_edid_size) {
1059 ret = connector_status_connected;
1060 }
1061
771fe6b9 1062 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA		 1063
1064out:
1065 pm_runtime_mark_last_busy(connector->dev->dev);
1066 pm_runtime_put_autosuspend(connector->dev->dev);
1067
771fe6b9
JG		 1068 return ret;
1069}
1070
1109ca09 1071static const struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = {
771fe6b9
JG		 1072 .get_modes = radeon_vga_get_modes,
1073 .mode_valid = radeon_vga_mode_valid,
1074 .best_encoder = radeon_best_single_encoder,
1075};
1076
1109ca09 1077static const struct drm_connector_funcs radeon_vga_connector_funcs = {
771fe6b9
JG		 1078 .dpms = drm_helper_connector_dpms,
1079 .detect = radeon_vga_detect,
1080 .fill_modes = drm_helper_probe_single_connector_modes,
1081 .destroy = radeon_connector_destroy,
1082 .set_property = radeon_connector_set_property,
1083};
1084
4ce001ab
DA		 1085static int radeon_tv_get_modes(struct drm_connector *connector)
1086{
1087 struct drm_device *dev = connector->dev;
923f6848 1088 struct radeon_device *rdev = dev->dev_private;
4ce001ab 1089 struct drm_display_mode *tv_mode;
923f6848 1090 struct drm_encoder *encoder;
4ce001ab 1091
923f6848
AD		 1092 encoder = radeon_best_single_encoder(connector);
1093 if (!encoder)
1094 return 0;
4ce001ab 1095
923f6848
AD		 1096 /* avivo chips can scale any mode */
1097 if (rdev->family >= CHIP_RS600)
1098 /* add scaled modes */
1099 radeon_add_common_modes(encoder, connector);
1100 else {
1101 /* only 800x600 is supported right now on pre-avivo chips */
d50ba256 1102 tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false);
923f6848
AD		 1103 tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
1104 drm_mode_probed_add(connector, tv_mode);
1105 }
4ce001ab
DA		 1106 return 1;
1107}
1108
1109static int radeon_tv_mode_valid(struct drm_connector *connector,
1110 struct drm_display_mode *mode)
1111{
a3fa6320
AD		 1112 if ((mode->hdisplay > 1024) || (mode->vdisplay > 768))
1113 return MODE_CLOCK_RANGE;
4ce001ab
DA		 1114 return MODE_OK;
1115}
1116
7b334fcb 1117static enum drm_connector_status
930a9e28 1118radeon_tv_detect(struct drm_connector *connector, bool force)
4ce001ab
DA		 1119{
1120 struct drm_encoder *encoder;
1121 struct drm_encoder_helper_funcs *encoder_funcs;
445282db
DA		 1122 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1123 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc 1124 int r;
445282db
DA		 1125
1126 if (!radeon_connector->dac_load_detect)
1127 return ret;
4ce001ab 1128
10ebc0bc
DA		 1129 r = pm_runtime_get_sync(connector->dev->dev);
1130 if (r < 0)
1131 return connector_status_disconnected;
1132
4ce001ab
DA		 1133 encoder = radeon_best_single_encoder(connector);
1134 if (!encoder)
1135 ret = connector_status_disconnected;
1136 else {
1137 encoder_funcs = encoder->helper_private;
1138 ret = encoder_funcs->detect(encoder, connector);
1139 }
1140 if (ret == connector_status_connected)
1141 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false);
1142 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA		 1143 pm_runtime_mark_last_busy(connector->dev->dev);
1144 pm_runtime_put_autosuspend(connector->dev->dev);
4ce001ab
DA		 1145 return ret;
1146}
1147
1109ca09 1148static const struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = {
4ce001ab
DA		 1149 .get_modes = radeon_tv_get_modes,
1150 .mode_valid = radeon_tv_mode_valid,
1151 .best_encoder = radeon_best_single_encoder,
1152};
1153
1109ca09 1154static const struct drm_connector_funcs radeon_tv_connector_funcs = {
4ce001ab
DA		 1155 .dpms = drm_helper_connector_dpms,
1156 .detect = radeon_tv_detect,
1157 .fill_modes = drm_helper_probe_single_connector_modes,
1158 .destroy = radeon_connector_destroy,
1159 .set_property = radeon_connector_set_property,
1160};
1161
11fe1266
TU		 1162static bool radeon_check_hpd_status_unchanged(struct drm_connector *connector)
1163{
1164 struct drm_device *dev = connector->dev;
1165 struct radeon_device *rdev = dev->dev_private;
1166 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1167 enum drm_connector_status status;
1168
1169 /* We only trust HPD on R600 and newer ASICS. */
1170 if (rdev->family >= CHIP_R600
1171 && radeon_connector->hpd.hpd != RADEON_HPD_NONE) {
1172 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd))
1173 status = connector_status_connected;
1174 else
1175 status = connector_status_disconnected;
1176 if (connector->status == status)
1177 return true;
1178 }
1179
1180 return false;
1181}
1182
4ce001ab
DA		 1183/*
1184 * DVI is complicated
1185 * Do a DDC probe, if DDC probe passes, get the full EDID so
1186 * we can do analog/digital monitor detection at this point.
1187 * If the monitor is an analog monitor or we got no DDC,
1188 * we need to find the DAC encoder object for this connector.
1189 * If we got no DDC, we do load detection on the DAC encoder object.
1190 * If we got analog DDC or load detection passes on the DAC encoder
1191 * we have to check if this analog encoder is shared with anyone else (TV)
1192 * if its shared we have to set the other connector to disconnected.
1193 */
7b334fcb 1194static enum drm_connector_status
930a9e28 1195radeon_dvi_detect(struct drm_connector *connector, bool force)
771fe6b9 1196{
fafcf94e
AD		 1197 struct drm_device *dev = connector->dev;
1198 struct radeon_device *rdev = dev->dev_private;
771fe6b9 1199 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
4ce001ab 1200 struct drm_encoder *encoder = NULL;
771fe6b9 1201 struct drm_encoder_helper_funcs *encoder_funcs;
10ebc0bc 1202 int i, r;
771fe6b9 1203 enum drm_connector_status ret = connector_status_disconnected;
fc87f13b 1204 bool dret = false, broken_edid = false;
771fe6b9 1205
10ebc0bc
DA		 1206 r = pm_runtime_get_sync(connector->dev->dev);
1207 if (r < 0)
1208 return connector_status_disconnected;
1209
1210 if (!force && radeon_check_hpd_status_unchanged(connector)) {
1211 ret = connector->status;
1212 goto exit;
1213 }
11fe1266 1214
eb6b6d7c 1215 if (radeon_connector->ddc_bus)
0a9069d3 1216 dret = radeon_ddc_probe(radeon_connector, false);
4ce001ab 1217 if (dret) {
d0d0a225 1218 radeon_connector->detected_by_load = false;
72a5c970
AD		 1219 radeon_connector_free_edid(connector);
1220 radeon_connector_get_edid(connector);
4ce001ab
DA		 1221
1222 if (!radeon_connector->edid) {
f82f5f3a 1223 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
72082093 1224 connector->name);
4a9a8b71
DA		 1225 /* rs690 seems to have a problem with connectors not existing and always
1226 * return a block of 0's. If we see this just stop polling on this output */
72a5c970
AD		 1227 if ((rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) &&
1228 radeon_connector->base.null_edid_counter) {
4a9a8b71 1229 ret = connector_status_disconnected;
72082093
JN		 1230 DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n",
1231 connector->name);
4a9a8b71 1232 radeon_connector->ddc_bus = NULL;
fc87f13b
EE		 1233 } else {
1234 ret = connector_status_connected;
1235 broken_edid = true; /* defer use_digital to later */
4a9a8b71 1236 }
4ce001ab 1237 } else {
72a5c970
AD		 1238 radeon_connector->use_digital =
1239 !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
4ce001ab 1240
0294cf4f
AD		 1241 /* some oems have boards with separate digital and analog connectors
1242 * with a shared ddc line (often vga + hdmi)
1243 */
1244 if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) {
72a5c970 1245 radeon_connector_free_edid(connector);
0294cf4f 1246 ret = connector_status_disconnected;
72a5c970 1247 } else {
0294cf4f 1248 ret = connector_status_connected;
72a5c970 1249 }
42f14c4b
AD		 1250 /* This gets complicated. We have boards with VGA + HDMI with a
1251 * shared DDC line and we have boards with DVI-D + HDMI with a shared
1252 * DDC line. The latter is more complex because with DVI<->HDMI adapters
1253 * you don't really know what's connected to which port as both are digital.
71407c46 1254 */
d3932d6c 1255 if (radeon_connector->shared_ddc && (ret == connector_status_connected)) {
71407c46
AD		 1256 struct drm_connector *list_connector;
1257 struct radeon_connector *list_radeon_connector;
1258 list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) {
1259 if (connector == list_connector)
1260 continue;
1261 list_radeon_connector = to_radeon_connector(list_connector);
b2ea4aa6
AD		 1262 if (list_radeon_connector->shared_ddc &&
1263 (list_radeon_connector->ddc_bus->rec.i2c_id ==
1264 radeon_connector->ddc_bus->rec.i2c_id)) {
42f14c4b
AD		 1265 /* cases where both connectors are digital */
1266 if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) {
1267 /* hpd is our only option in this case */
1268 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
72a5c970 1269 radeon_connector_free_edid(connector);
71407c46
AD		 1270 ret = connector_status_disconnected;
1271 }
1272 }
1273 }
1274 }
1275 }
4ce001ab
DA		 1276 }
1277 }
1278
1279 if ((ret == connector_status_connected) && (radeon_connector->use_digital == true))
1280 goto out;
1281
5f0a2612
AD		 1282 /* DVI-D and HDMI-A are digital only */
1283 if ((connector->connector_type == DRM_MODE_CONNECTOR_DVID) ||
1284 (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA))
1285 goto out;
1286
d0d0a225 1287 /* if we aren't forcing don't do destructive polling */
c3cceedd 1288 if (!force) {
d0d0a225
AD		 1289 /* only return the previous status if we last
1290 * detected a monitor via load.
1291 */
1292 if (radeon_connector->detected_by_load)
1293 ret = connector->status;
c3cceedd
DA		 1294 goto out;
1295 }
1296
4ce001ab 1297 /* find analog encoder */
445282db
DA		 1298 if (radeon_connector->dac_load_detect) {
1299 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1300 if (connector->encoder_ids[i] == 0)
1301 break;
771fe6b9 1302
b957f457
RC		 1303 encoder = drm_encoder_find(connector->dev,
1304 connector->encoder_ids[i]);
1305 if (!encoder)
445282db 1306 continue;
771fe6b9 1307
e3632507 1308 if (encoder->encoder_type != DRM_MODE_ENCODER_DAC &&
e00e8b5e
AD		 1309 encoder->encoder_type != DRM_MODE_ENCODER_TVDAC)
1310 continue;
1311
445282db
DA		 1312 encoder_funcs = encoder->helper_private;
1313 if (encoder_funcs->detect) {
fc87f13b
EE		 1314 if (!broken_edid) {
1315 if (ret != connector_status_connected) {
1316 /* deal with analog monitors without DDC */
1317 ret = encoder_funcs->detect(encoder, connector);
1318 if (ret == connector_status_connected) {
1319 radeon_connector->use_digital = false;
1320 }
1321 if (ret != connector_status_disconnected)
1322 radeon_connector->detected_by_load = true;
445282db 1323 }
fc87f13b
EE		 1324 } else {
1325 enum drm_connector_status lret;
1326 /* assume digital unless load detected otherwise */
1327 radeon_connector->use_digital = true;
1328 lret = encoder_funcs->detect(encoder, connector);
1329 DRM_DEBUG_KMS("load_detect %x returned: %x\n",encoder->encoder_type,lret);
1330 if (lret == connector_status_connected)
1331 radeon_connector->use_digital = false;
771fe6b9 1332 }
445282db 1333 break;
771fe6b9
JG		 1334 }
1335 }
1336 }
1337
4ce001ab
DA		 1338 if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) &&
1339 encoder) {
1340 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
1341 }
1342
fafcf94e
AD		 1343 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
1344 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
1345 * by other means, assume the DFP is connected and use that EDID. In most
1346 * cases the DVI port is actually a virtual KVM port connected to the service
1347 * processor.
1348 */
a09d431f 1349out:
fafcf94e
AD		 1350 if ((!rdev->is_atom_bios) &&
1351 (ret == connector_status_disconnected) &&
1352 rdev->mode_info.bios_hardcoded_edid_size) {
1353 radeon_connector->use_digital = true;
1354 ret = connector_status_connected;
1355 }
1356
771fe6b9
JG		 1357 /* updated in get modes as well since we need to know if it's analog or digital */
1358 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc 1359
1a626b68
SG		 1360 if (radeon_audio != 0)
1361 radeon_audio_detect(connector, ret);
1362
10ebc0bc
DA		 1363exit:
1364 pm_runtime_mark_last_busy(connector->dev->dev);
1365 pm_runtime_put_autosuspend(connector->dev->dev);
1366
771fe6b9
JG		 1367 return ret;
1368}
1369
1370/* okay need to be smart in here about which encoder to pick */
1109ca09 1371static struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector)
771fe6b9
JG		 1372{
1373 int enc_id = connector->encoder_ids[0];
1374 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
771fe6b9
JG		 1375 struct drm_encoder *encoder;
1376 int i;
1377 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1378 if (connector->encoder_ids[i] == 0)
1379 break;
1380
b957f457
RC		 1381 encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]);
1382 if (!encoder)
771fe6b9
JG		 1383 continue;
1384
4ce001ab 1385 if (radeon_connector->use_digital == true) {
771fe6b9
JG		 1386 if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)
1387 return encoder;
1388 } else {
1389 if (encoder->encoder_type == DRM_MODE_ENCODER_DAC ||
1390 encoder->encoder_type == DRM_MODE_ENCODER_TVDAC)
1391 return encoder;
1392 }
1393 }
1394
1395 /* see if we have a default encoder TODO */
1396
1397 /* then check use digitial */
1398 /* pick the first one */
b957f457
RC		 1399 if (enc_id)
1400 return drm_encoder_find(connector->dev, enc_id);
771fe6b9
JG		 1401 return NULL;
1402}
1403
d50ba256
DA		 1404static void radeon_dvi_force(struct drm_connector *connector)
1405{
1406 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1407 if (connector->force == DRM_FORCE_ON)
1408 radeon_connector->use_digital = false;
1409 if (connector->force == DRM_FORCE_ON_DIGITAL)
1410 radeon_connector->use_digital = true;
1411}
1412
a3fa6320
AD		 1413static int radeon_dvi_mode_valid(struct drm_connector *connector,
1414 struct drm_display_mode *mode)
1415{
1b24203e
AD		 1416 struct drm_device *dev = connector->dev;
1417 struct radeon_device *rdev = dev->dev_private;
a3fa6320
AD		 1418 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1419
1420 /* XXX check mode bandwidth */
1421
1b24203e
AD		 1422 /* clocks over 135 MHz have heat issues with DVI on RV100 */
1423 if (radeon_connector->use_digital &&
1424 (rdev->family == CHIP_RV100) &&
1425 (mode->clock > 135000))
1426 return MODE_CLOCK_HIGH;
1427
a3fa6320
AD		 1428 if (radeon_connector->use_digital && (mode->clock > 165000)) {
1429 if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) ||
1430 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) ||
1431 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B))
1432 return MODE_OK;
377bd8a9 1433 else if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
f2263fc7
AD		 1434 /* HDMI 1.3+ supports max clock of 340 Mhz */
1435 if (mode->clock > 340000)
e1e84017 1436 return MODE_CLOCK_HIGH;
f2263fc7
AD		 1437 else
1438 return MODE_OK;
1439 } else {
a3fa6320 1440 return MODE_CLOCK_HIGH;
f2263fc7 1441 }
a3fa6320 1442 }
b20f9bef
AD		 1443
1444 /* check against the max pixel clock */
1445 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
1446 return MODE_CLOCK_HIGH;
1447
a3fa6320
AD		 1448 return MODE_OK;
1449}
1450
1109ca09 1451static const struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = {
3e22920f 1452 .get_modes = radeon_vga_get_modes,
a3fa6320 1453 .mode_valid = radeon_dvi_mode_valid,
771fe6b9
JG		 1454 .best_encoder = radeon_dvi_encoder,
1455};
1456
1109ca09 1457static const struct drm_connector_funcs radeon_dvi_connector_funcs = {
771fe6b9
JG		 1458 .dpms = drm_helper_connector_dpms,
1459 .detect = radeon_dvi_detect,
1460 .fill_modes = drm_helper_probe_single_connector_modes,
1461 .set_property = radeon_connector_set_property,
1462 .destroy = radeon_connector_destroy,
d50ba256 1463 .force = radeon_dvi_force,
771fe6b9
JG		 1464};
1465
746c1aa4
DA		 1466static int radeon_dp_get_modes(struct drm_connector *connector)
1467{
1468 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
8b834852 1469 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1470 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
746c1aa4
DA		 1471 int ret;
1472
f89931f3
AD		 1473 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1474 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD		 1475 struct drm_display_mode *mode;
1476
2b69ffb9
AD		 1477 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
1478 if (!radeon_dig_connector->edp_on)
1479 atombios_set_edp_panel_power(connector,
1480 ATOM_TRANSMITTER_ACTION_POWER_ON);
72a5c970
AD		 1481 radeon_connector_get_edid(connector);
1482 ret = radeon_ddc_get_modes(connector);
2b69ffb9
AD		 1483 if (!radeon_dig_connector->edp_on)
1484 atombios_set_edp_panel_power(connector,
1485 ATOM_TRANSMITTER_ACTION_POWER_OFF);
1486 } else {
1487 /* need to setup ddc on the bridge */
1488 if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1489 ENCODER_OBJECT_ID_NONE) {
1490 if (encoder)
1491 radeon_atom_ext_encoder_setup_ddc(encoder);
1492 }
72a5c970
AD		 1493 radeon_connector_get_edid(connector);
1494 ret = radeon_ddc_get_modes(connector);
2b69ffb9 1495 }
d291767b
AD		 1496
1497 if (ret > 0) {
d291767b
AD		 1498 if (encoder) {
1499 radeon_fixup_lvds_native_mode(encoder, connector);
1500 /* add scaled modes */
1501 radeon_add_common_modes(encoder, connector);
1502 }
1503 return ret;
1504 }
1505
d291767b
AD		 1506 if (!encoder)
1507 return 0;
1508
1509 /* we have no EDID modes */
1510 mode = radeon_fp_native_mode(encoder);
1511 if (mode) {
1512 ret = 1;
1513 drm_mode_probed_add(connector, mode);
1514 /* add the width/height from vbios tables if available */
1515 connector->display_info.width_mm = mode->width_mm;
1516 connector->display_info.height_mm = mode->height_mm;
1517 /* add scaled modes */
1518 radeon_add_common_modes(encoder, connector);
1519 }
591a10e1
AD		 1520 } else {
1521 /* need to setup ddc on the bridge */
1d33e1fc
AD		 1522 if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1523 ENCODER_OBJECT_ID_NONE) {
591a10e1
AD		 1524 if (encoder)
1525 radeon_atom_ext_encoder_setup_ddc(encoder);
1526 }
72a5c970
AD		 1527 radeon_connector_get_edid(connector);
1528 ret = radeon_ddc_get_modes(connector);
da997620
AD		 1529
1530 radeon_get_native_mode(connector);
591a10e1 1531 }
8b834852 1532
746c1aa4
DA		 1533 return ret;
1534}
1535
1d33e1fc 1536u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector)
d7fa8bb3 1537{
d7fa8bb3
AD		 1538 struct drm_encoder *encoder;
1539 struct radeon_encoder *radeon_encoder;
1540 int i;
d7fa8bb3
AD		 1541
1542 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1543 if (connector->encoder_ids[i] == 0)
1544 break;
1545
b957f457
RC		 1546 encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]);
1547 if (!encoder)
d7fa8bb3
AD		 1548 continue;
1549
d7fa8bb3
AD		 1550 radeon_encoder = to_radeon_encoder(encoder);
1551
1552 switch (radeon_encoder->encoder_id) {
1553 case ENCODER_OBJECT_ID_TRAVIS:
1554 case ENCODER_OBJECT_ID_NUTMEG:
1d33e1fc 1555 return radeon_encoder->encoder_id;
d7fa8bb3
AD		 1556 default:
1557 break;
1558 }
1559 }
1560
1d33e1fc 1561 return ENCODER_OBJECT_ID_NONE;
d7fa8bb3
AD		 1562}
1563
ebdea82d 1564static bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector)
d7fa8bb3 1565{
d7fa8bb3
AD		 1566 struct drm_encoder *encoder;
1567 struct radeon_encoder *radeon_encoder;
1568 int i;
1569 bool found = false;
1570
1571 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1572 if (connector->encoder_ids[i] == 0)
1573 break;
1574
b957f457
RC		 1575 encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]);
1576 if (!encoder)
d7fa8bb3
AD		 1577 continue;
1578
d7fa8bb3
AD		 1579 radeon_encoder = to_radeon_encoder(encoder);
1580 if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2)
1581 found = true;
1582 }
1583
1584 return found;
1585}
1586
1587bool radeon_connector_is_dp12_capable(struct drm_connector *connector)
1588{
1589 struct drm_device *dev = connector->dev;
1590 struct radeon_device *rdev = dev->dev_private;
1591
1592 if (ASIC_IS_DCE5(rdev) &&
af5d3653 1593 (rdev->clock.default_dispclk >= 53900) &&
d7fa8bb3
AD		 1594 radeon_connector_encoder_is_hbr2(connector)) {
1595 return true;
1596 }
1597
1598 return false;
1599}
1600
7b334fcb 1601static enum drm_connector_status
930a9e28 1602radeon_dp_detect(struct drm_connector *connector, bool force)
746c1aa4 1603{
f8d0edde
AD		 1604 struct drm_device *dev = connector->dev;
1605 struct radeon_device *rdev = dev->dev_private;
746c1aa4 1606 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
746c1aa4 1607 enum drm_connector_status ret = connector_status_disconnected;
4143e919 1608 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1609 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
10ebc0bc 1610 int r;
746c1aa4 1611
10ebc0bc
DA		 1612 r = pm_runtime_get_sync(connector->dev->dev);
1613 if (r < 0)
1614 return connector_status_disconnected;
1615
1616 if (!force && radeon_check_hpd_status_unchanged(connector)) {
1617 ret = connector->status;
1618 goto out;
1619 }
11fe1266 1620
72a5c970 1621 radeon_connector_free_edid(connector);
746c1aa4 1622
f89931f3
AD		 1623 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1624 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD		 1625 if (encoder) {
1626 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1627 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1628
1629 /* check if panel is valid */
1630 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
1631 ret = connector_status_connected;
13485794
AD		 1632 /* don't fetch the edid from the vbios if ddc fails and runpm is
1633 * enabled so we report disconnected.
1634 */
1635 if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0))
1636 ret = connector_status_disconnected;
d291767b 1637 }
6f50eae7
AD		 1638 /* eDP is always DP */
1639 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
8b834852
AD		 1640 if (!radeon_dig_connector->edp_on)
1641 atombios_set_edp_panel_power(connector,
1642 ATOM_TRANSMITTER_ACTION_POWER_ON);
6f50eae7 1643 if (radeon_dp_getdpcd(radeon_connector))
9fa05c98 1644 ret = connector_status_connected;
8b834852
AD		 1645 if (!radeon_dig_connector->edp_on)
1646 atombios_set_edp_panel_power(connector,
1647 ATOM_TRANSMITTER_ACTION_POWER_OFF);
1d33e1fc
AD		 1648 } else if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1649 ENCODER_OBJECT_ID_NONE) {
b06947b5
AD		 1650 /* DP bridges are always DP */
1651 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
1652 /* get the DPCD from the bridge */
1653 radeon_dp_getdpcd(radeon_connector);
1654
6777a4f6
AD		 1655 if (encoder) {
1656 /* setup ddc on the bridge */
1657 radeon_atom_ext_encoder_setup_ddc(encoder);
0a9069d3
NOS		 1658 /* bridge chips are always aux */
1659 if (radeon_ddc_probe(radeon_connector, true)) /* try DDC */
b06947b5 1660 ret = connector_status_connected;
6777a4f6
AD		 1661 else if (radeon_connector->dac_load_detect) { /* try load detection */
1662 struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private;
b06947b5
AD		 1663 ret = encoder_funcs->detect(encoder, connector);
1664 }
591a10e1 1665 }
b06947b5 1666 } else {
6f50eae7 1667 radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
f8d0edde
AD		 1668 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
1669 ret = connector_status_connected;
1670 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
1671 radeon_dp_getdpcd(radeon_connector);
6f50eae7 1672 } else {
f8d0edde
AD		 1673 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
1674 if (radeon_dp_getdpcd(radeon_connector))
1675 ret = connector_status_connected;
1676 } else {
d592fca9 1677 /* try non-aux ddc (DP to DVI/HDMI/etc. adapter) */
0a9069d3 1678 if (radeon_ddc_probe(radeon_connector, false))
f8d0edde
AD		 1679 ret = connector_status_connected;
1680 }
4143e919 1681 }
746c1aa4 1682 }
4143e919 1683
30f44372 1684 radeon_connector_update_scratch_regs(connector, ret);
1a626b68
SG		 1685
1686 if (radeon_audio != 0)
1687 radeon_audio_detect(connector, ret);
1688
10ebc0bc
DA		 1689out:
1690 pm_runtime_mark_last_busy(connector->dev->dev);
1691 pm_runtime_put_autosuspend(connector->dev->dev);
1692
746c1aa4
DA		 1693 return ret;
1694}
1695
5801ead6
AD		 1696static int radeon_dp_mode_valid(struct drm_connector *connector,
1697 struct drm_display_mode *mode)
1698{
6536a3a6
AD		 1699 struct drm_device *dev = connector->dev;
1700 struct radeon_device *rdev = dev->dev_private;
5801ead6
AD		 1701 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1702 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
1703
1704 /* XXX check mode bandwidth */
1705
f89931f3
AD		 1706 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1707 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD		 1708 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
1709
1710 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
1711 return MODE_PANEL;
1712
1713 if (encoder) {
1714 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1715 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1716
f89931f3 1717 /* AVIVO hardware supports downscaling modes larger than the panel
d291767b
AD		 1718 * to the panel size, but I'm not sure this is desirable.
1719 */
1720 if ((mode->hdisplay > native_mode->hdisplay) ||
1721 (mode->vdisplay > native_mode->vdisplay))
1722 return MODE_PANEL;
1723
1724 /* if scaling is disabled, block non-native modes */
1725 if (radeon_encoder->rmx_type == RMX_OFF) {
1726 if ((mode->hdisplay != native_mode->hdisplay) ||
1727 (mode->vdisplay != native_mode->vdisplay))
1728 return MODE_PANEL;
1729 }
1730 }
d291767b
AD		 1731 } else {
1732 if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
6536a3a6 1733 (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) {
d291767b 1734 return radeon_dp_mode_valid_helper(connector, mode);
6536a3a6 1735 } else {
377bd8a9 1736 if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
6536a3a6
AD		 1737 /* HDMI 1.3+ supports max clock of 340 Mhz */
1738 if (mode->clock > 340000)
1739 return MODE_CLOCK_HIGH;
1740 } else {
1741 if (mode->clock > 165000)
1742 return MODE_CLOCK_HIGH;
1743 }
1744 }
d291767b 1745 }
6536a3a6
AD		 1746
1747 return MODE_OK;
5801ead6
AD		 1748}
1749
1109ca09 1750static const struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = {
746c1aa4 1751 .get_modes = radeon_dp_get_modes,
5801ead6 1752 .mode_valid = radeon_dp_mode_valid,
746c1aa4
DA		 1753 .best_encoder = radeon_dvi_encoder,
1754};
1755
1109ca09 1756static const struct drm_connector_funcs radeon_dp_connector_funcs = {
746c1aa4
DA		 1757 .dpms = drm_helper_connector_dpms,
1758 .detect = radeon_dp_detect,
1759 .fill_modes = drm_helper_probe_single_connector_modes,
1760 .set_property = radeon_connector_set_property,
379dfc25 1761 .destroy = radeon_connector_destroy,
746c1aa4
DA		 1762 .force = radeon_dvi_force,
1763};
1764
855f5f1d
AD		 1765static const struct drm_connector_funcs radeon_edp_connector_funcs = {
1766 .dpms = drm_helper_connector_dpms,
1767 .detect = radeon_dp_detect,
1768 .fill_modes = drm_helper_probe_single_connector_modes,
1769 .set_property = radeon_lvds_set_property,
379dfc25 1770 .destroy = radeon_connector_destroy,
855f5f1d
AD		 1771 .force = radeon_dvi_force,
1772};
1773
1774static const struct drm_connector_funcs radeon_lvds_bridge_connector_funcs = {
1775 .dpms = drm_helper_connector_dpms,
1776 .detect = radeon_dp_detect,
1777 .fill_modes = drm_helper_probe_single_connector_modes,
1778 .set_property = radeon_lvds_set_property,
379dfc25 1779 .destroy = radeon_connector_destroy,
855f5f1d
AD		 1780 .force = radeon_dvi_force,
1781};
1782
771fe6b9
JG		 1783void
1784radeon_add_atom_connector(struct drm_device *dev,
1785 uint32_t connector_id,
1786 uint32_t supported_device,
1787 int connector_type,
1788 struct radeon_i2c_bus_rec *i2c_bus,
b75fad06 1789 uint32_t igp_lane_info,
eed45b30 1790 uint16_t connector_object_id,
26b5bc98
AD		 1791 struct radeon_hpd *hpd,
1792 struct radeon_router *router)
771fe6b9 1793{
445282db 1794 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG		 1795 struct drm_connector *connector;
1796 struct radeon_connector *radeon_connector;
1797 struct radeon_connector_atom_dig *radeon_dig_connector;
eac4dff6
AD		 1798 struct drm_encoder *encoder;
1799 struct radeon_encoder *radeon_encoder;
771fe6b9 1800 uint32_t subpixel_order = SubPixelNone;
0294cf4f 1801 bool shared_ddc = false;
eac4dff6 1802 bool is_dp_bridge = false;
496263bf 1803 bool has_aux = false;
771fe6b9 1804
4ce001ab 1805 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG		 1806 return;
1807
cf4c12f9
AD		 1808 /* if the user selected tv=0 don't try and add the connector */
1809 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
1810 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
1811 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
1812 (radeon_tv == 0))
1813 return;
1814
771fe6b9
JG		 1815 /* see if we already added it */
1816 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1817 radeon_connector = to_radeon_connector(connector);
1818 if (radeon_connector->connector_id == connector_id) {
1819 radeon_connector->devices |= supported_device;
1820 return;
1821 }
0294cf4f 1822 if (radeon_connector->ddc_bus && i2c_bus->valid) {
d3932d6c 1823 if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) {
0294cf4f
AD		 1824 radeon_connector->shared_ddc = true;
1825 shared_ddc = true;
1826 }
fb939dfc 1827 if (radeon_connector->router_bus && router->ddc_valid &&
26b5bc98
AD		 1828 (radeon_connector->router.router_id == router->router_id)) {
1829 radeon_connector->shared_ddc = false;
1830 shared_ddc = false;
1831 }
0294cf4f 1832 }
771fe6b9
JG		 1833 }
1834
eac4dff6
AD		 1835 /* check if it's a dp bridge */
1836 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
1837 radeon_encoder = to_radeon_encoder(encoder);
1838 if (radeon_encoder->devices & supported_device) {
1839 switch (radeon_encoder->encoder_id) {
1840 case ENCODER_OBJECT_ID_TRAVIS:
1841 case ENCODER_OBJECT_ID_NUTMEG:
1842 is_dp_bridge = true;
1843 break;
1844 default:
1845 break;
1846 }
1847 }
1848 }
1849
771fe6b9
JG		 1850 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
1851 if (!radeon_connector)
1852 return;
1853
1854 connector = &radeon_connector->base;
1855
1856 radeon_connector->connector_id = connector_id;
1857 radeon_connector->devices = supported_device;
0294cf4f 1858 radeon_connector->shared_ddc = shared_ddc;
b75fad06 1859 radeon_connector->connector_object_id = connector_object_id;
eed45b30 1860 radeon_connector->hpd = *hpd;
bc1c4dc3 1861
26b5bc98 1862 radeon_connector->router = *router;
fb939dfc 1863 if (router->ddc_valid || router->cd_valid) {
26b5bc98
AD		 1864 radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info);
1865 if (!radeon_connector->router_bus)
a70882aa 1866 DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n");
26b5bc98 1867 }
eac4dff6
AD		 1868
1869 if (is_dp_bridge) {
771fe6b9
JG		 1870 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1871 if (!radeon_dig_connector)
1872 goto failed;
771fe6b9
JG		 1873 radeon_dig_connector->igp_lane_info = igp_lane_info;
1874 radeon_connector->con_priv = radeon_dig_connector;
771fe6b9 1875 if (i2c_bus->valid) {
379dfc25
AD		 1876 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1877 if (radeon_connector->ddc_bus)
496263bf
AD		 1878 has_aux = true;
1879 else
eac4dff6 1880 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1881 }
eac4dff6
AD		 1882 switch (connector_type) {
1883 case DRM_MODE_CONNECTOR_VGA:
1884 case DRM_MODE_CONNECTOR_DVIA:
1885 default:
855f5f1d
AD		 1886 drm_connector_init(dev, &radeon_connector->base,
1887 &radeon_dp_connector_funcs, connector_type);
1888 drm_connector_helper_add(&radeon_connector->base,
1889 &radeon_dp_connector_helper_funcs);
eac4dff6
AD		 1890 connector->interlace_allowed = true;
1891 connector->doublescan_allowed = true;
d629a3ce 1892 radeon_connector->dac_load_detect = true;
e35755fa 1893 drm_object_attach_property(&radeon_connector->base.base,
d629a3ce
AD		 1894 rdev->mode_info.load_detect_property,
1895 1);
da997620
AD		 1896 drm_object_attach_property(&radeon_connector->base.base,
1897 dev->mode_config.scaling_mode_property,
1898 DRM_MODE_SCALE_NONE);
643b1f56
AD		 1899 if (ASIC_IS_DCE5(rdev))
1900 drm_object_attach_property(&radeon_connector->base.base,
1901 rdev->mode_info.output_csc_property,
1902 RADEON_OUTPUT_CSC_BYPASS);
eac4dff6
AD		 1903 break;
1904 case DRM_MODE_CONNECTOR_DVII:
1905 case DRM_MODE_CONNECTOR_DVID:
1906 case DRM_MODE_CONNECTOR_HDMIA:
1907 case DRM_MODE_CONNECTOR_HDMIB:
1908 case DRM_MODE_CONNECTOR_DisplayPort:
855f5f1d
AD		 1909 drm_connector_init(dev, &radeon_connector->base,
1910 &radeon_dp_connector_funcs, connector_type);
1911 drm_connector_helper_add(&radeon_connector->base,
1912 &radeon_dp_connector_helper_funcs);
e35755fa 1913 drm_object_attach_property(&radeon_connector->base.base,
430f70d5 1914 rdev->mode_info.underscan_property,
56bec7c0 1915 UNDERSCAN_OFF);
e35755fa 1916 drm_object_attach_property(&radeon_connector->base.base,
5bccf5e3
MG		 1917 rdev->mode_info.underscan_hborder_property,
1918 0);
e35755fa 1919 drm_object_attach_property(&radeon_connector->base.base,
5bccf5e3
MG		 1920 rdev->mode_info.underscan_vborder_property,
1921 0);
91915260 1922
da997620
AD		 1923 drm_object_attach_property(&radeon_connector->base.base,
1924 dev->mode_config.scaling_mode_property,
1925 DRM_MODE_SCALE_NONE);
1926
6214bb74
AD		 1927 drm_object_attach_property(&radeon_connector->base.base,
1928 rdev->mode_info.dither_property,
1929 RADEON_FMT_DITHER_DISABLE);
91915260 1930
108dc8e8
AD		 1931 if (radeon_audio != 0)
1932 drm_object_attach_property(&radeon_connector->base.base,
1933 rdev->mode_info.audio_property,
e31fadd3 1934 RADEON_AUDIO_AUTO);
643b1f56
AD		 1935 if (ASIC_IS_DCE5(rdev))
1936 drm_object_attach_property(&radeon_connector->base.base,
1937 rdev->mode_info.output_csc_property,
1938 RADEON_OUTPUT_CSC_BYPASS);
91915260 1939
eac4dff6
AD		 1940 subpixel_order = SubPixelHorizontalRGB;
1941 connector->interlace_allowed = true;
1942 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
1943 connector->doublescan_allowed = true;
1944 else
1945 connector->doublescan_allowed = false;
d629a3ce
AD		 1946 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
1947 radeon_connector->dac_load_detect = true;
e35755fa 1948 drm_object_attach_property(&radeon_connector->base.base,
d629a3ce
AD		 1949 rdev->mode_info.load_detect_property,
1950 1);
1951 }
eac4dff6
AD		 1952 break;
1953 case DRM_MODE_CONNECTOR_LVDS:
1954 case DRM_MODE_CONNECTOR_eDP:
855f5f1d
AD		 1955 drm_connector_init(dev, &radeon_connector->base,
1956 &radeon_lvds_bridge_connector_funcs, connector_type);
1957 drm_connector_helper_add(&radeon_connector->base,
1958 &radeon_dp_connector_helper_funcs);
e35755fa 1959 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1960 dev->mode_config.scaling_mode_property,
1961 DRM_MODE_SCALE_FULLSCREEN);
1962 subpixel_order = SubPixelHorizontalRGB;
1963 connector->interlace_allowed = false;
1964 connector->doublescan_allowed = false;
1965 break;
5bccf5e3 1966 }
eac4dff6
AD		 1967 } else {
1968 switch (connector_type) {
1969 case DRM_MODE_CONNECTOR_VGA:
1970 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
1971 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
1972 if (i2c_bus->valid) {
1973 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1974 if (!radeon_connector->ddc_bus)
1975 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1976 }
390d0bbe 1977 radeon_connector->dac_load_detect = true;
e35755fa 1978 drm_object_attach_property(&radeon_connector->base.base,
390d0bbe
AD		 1979 rdev->mode_info.load_detect_property,
1980 1);
da997620
AD		 1981 if (ASIC_IS_AVIVO(rdev))
1982 drm_object_attach_property(&radeon_connector->base.base,
1983 dev->mode_config.scaling_mode_property,
1984 DRM_MODE_SCALE_NONE);
643b1f56
AD		 1985 if (ASIC_IS_DCE5(rdev))
1986 drm_object_attach_property(&radeon_connector->base.base,
1987 rdev->mode_info.output_csc_property,
1988 RADEON_OUTPUT_CSC_BYPASS);
eac4dff6
AD		 1989 /* no HPD on analog connectors */
1990 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1991 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1992 connector->interlace_allowed = true;
c49948f4 1993 connector->doublescan_allowed = true;
eac4dff6
AD		 1994 break;
1995 case DRM_MODE_CONNECTOR_DVIA:
1996 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
1997 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
1998 if (i2c_bus->valid) {
1999 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2000 if (!radeon_connector->ddc_bus)
2001 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2002 }
2003 radeon_connector->dac_load_detect = true;
e35755fa 2004 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2005 rdev->mode_info.load_detect_property,
2006 1);
da997620
AD		 2007 if (ASIC_IS_AVIVO(rdev))
2008 drm_object_attach_property(&radeon_connector->base.base,
2009 dev->mode_config.scaling_mode_property,
2010 DRM_MODE_SCALE_NONE);
643b1f56
AD		 2011 if (ASIC_IS_DCE5(rdev))
2012 drm_object_attach_property(&radeon_connector->base.base,
2013 rdev->mode_info.output_csc_property,
2014 RADEON_OUTPUT_CSC_BYPASS);
eac4dff6
AD		 2015 /* no HPD on analog connectors */
2016 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
2017 connector->interlace_allowed = true;
2018 connector->doublescan_allowed = true;
2019 break;
2020 case DRM_MODE_CONNECTOR_DVII:
2021 case DRM_MODE_CONNECTOR_DVID:
2022 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2023 if (!radeon_dig_connector)
2024 goto failed;
2025 radeon_dig_connector->igp_lane_info = igp_lane_info;
2026 radeon_connector->con_priv = radeon_dig_connector;
2027 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
2028 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
2029 if (i2c_bus->valid) {
2030 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2031 if (!radeon_connector->ddc_bus)
2032 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2033 }
2034 subpixel_order = SubPixelHorizontalRGB;
e35755fa 2035 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2036 rdev->mode_info.coherent_mode_property,
2037 1);
2038 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 2039 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2040 rdev->mode_info.underscan_property,
2041 UNDERSCAN_OFF);
e35755fa 2042 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2043 rdev->mode_info.underscan_hborder_property,
2044 0);
e35755fa 2045 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2046 rdev->mode_info.underscan_vborder_property,
2047 0);
da997620
AD		 2048 drm_object_attach_property(&radeon_connector->base.base,
2049 rdev->mode_info.dither_property,
2050 RADEON_FMT_DITHER_DISABLE);
2051 drm_object_attach_property(&radeon_connector->base.base,
2052 dev->mode_config.scaling_mode_property,
2053 DRM_MODE_SCALE_NONE);
eac4dff6 2054 }
108dc8e8 2055 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 2056 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 2057 rdev->mode_info.audio_property,
e31fadd3 2058 RADEON_AUDIO_AUTO);
8666c076 2059 }
eac4dff6
AD		 2060 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
2061 radeon_connector->dac_load_detect = true;
e35755fa 2062 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2063 rdev->mode_info.load_detect_property,
2064 1);
2065 }
643b1f56
AD		 2066 if (ASIC_IS_DCE5(rdev))
2067 drm_object_attach_property(&radeon_connector->base.base,
2068 rdev->mode_info.output_csc_property,
2069 RADEON_OUTPUT_CSC_BYPASS);
eac4dff6
AD		 2070 connector->interlace_allowed = true;
2071 if (connector_type == DRM_MODE_CONNECTOR_DVII)
2072 connector->doublescan_allowed = true;
2073 else
2074 connector->doublescan_allowed = false;
2075 break;
2076 case DRM_MODE_CONNECTOR_HDMIA:
2077 case DRM_MODE_CONNECTOR_HDMIB:
2078 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2079 if (!radeon_dig_connector)
2080 goto failed;
2081 radeon_dig_connector->igp_lane_info = igp_lane_info;
2082 radeon_connector->con_priv = radeon_dig_connector;
2083 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
2084 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
2085 if (i2c_bus->valid) {
2086 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2087 if (!radeon_connector->ddc_bus)
2088 DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2089 }
e35755fa 2090 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2091 rdev->mode_info.coherent_mode_property,
2092 1);
2093 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 2094 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2095 rdev->mode_info.underscan_property,
2096 UNDERSCAN_OFF);
e35755fa 2097 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2098 rdev->mode_info.underscan_hborder_property,
2099 0);
e35755fa 2100 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2101 rdev->mode_info.underscan_vborder_property,
2102 0);
da997620
AD		 2103 drm_object_attach_property(&radeon_connector->base.base,
2104 rdev->mode_info.dither_property,
2105 RADEON_FMT_DITHER_DISABLE);
2106 drm_object_attach_property(&radeon_connector->base.base,
2107 dev->mode_config.scaling_mode_property,
2108 DRM_MODE_SCALE_NONE);
eac4dff6 2109 }
108dc8e8 2110 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 2111 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 2112 rdev->mode_info.audio_property,
e31fadd3 2113 RADEON_AUDIO_AUTO);
8666c076 2114 }
643b1f56
AD		 2115 if (ASIC_IS_DCE5(rdev))
2116 drm_object_attach_property(&radeon_connector->base.base,
2117 rdev->mode_info.output_csc_property,
2118 RADEON_OUTPUT_CSC_BYPASS);
eac4dff6
AD		 2119 subpixel_order = SubPixelHorizontalRGB;
2120 connector->interlace_allowed = true;
2121 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
2122 connector->doublescan_allowed = true;
2123 else
2124 connector->doublescan_allowed = false;
2125 break;
2126 case DRM_MODE_CONNECTOR_DisplayPort:
2127 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2128 if (!radeon_dig_connector)
2129 goto failed;
2130 radeon_dig_connector->igp_lane_info = igp_lane_info;
2131 radeon_connector->con_priv = radeon_dig_connector;
2132 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
2133 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
2134 if (i2c_bus->valid) {
eac4dff6 2135 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
496263bf
AD		 2136 if (radeon_connector->ddc_bus)
2137 has_aux = true;
2138 else
eac4dff6
AD		 2139 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2140 }
2141 subpixel_order = SubPixelHorizontalRGB;
e35755fa 2142 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2143 rdev->mode_info.coherent_mode_property,
2144 1);
2145 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 2146 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2147 rdev->mode_info.underscan_property,
2148 UNDERSCAN_OFF);
e35755fa 2149 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2150 rdev->mode_info.underscan_hborder_property,
2151 0);
e35755fa 2152 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2153 rdev->mode_info.underscan_vborder_property,
2154 0);
da997620
AD		 2155 drm_object_attach_property(&radeon_connector->base.base,
2156 rdev->mode_info.dither_property,
2157 RADEON_FMT_DITHER_DISABLE);
2158 drm_object_attach_property(&radeon_connector->base.base,
2159 dev->mode_config.scaling_mode_property,
2160 DRM_MODE_SCALE_NONE);
eac4dff6 2161 }
108dc8e8 2162 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 2163 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 2164 rdev->mode_info.audio_property,
e31fadd3 2165 RADEON_AUDIO_AUTO);
8666c076 2166 }
643b1f56
AD		 2167 if (ASIC_IS_DCE5(rdev))
2168 drm_object_attach_property(&radeon_connector->base.base,
2169 rdev->mode_info.output_csc_property,
2170 RADEON_OUTPUT_CSC_BYPASS);
eac4dff6
AD		 2171 connector->interlace_allowed = true;
2172 /* in theory with a DP to VGA converter... */
c49948f4 2173 connector->doublescan_allowed = false;
eac4dff6
AD		 2174 break;
2175 case DRM_MODE_CONNECTOR_eDP:
2176 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2177 if (!radeon_dig_connector)
2178 goto failed;
2179 radeon_dig_connector->igp_lane_info = igp_lane_info;
2180 radeon_connector->con_priv = radeon_dig_connector;
855f5f1d 2181 drm_connector_init(dev, &radeon_connector->base, &radeon_edp_connector_funcs, connector_type);
eac4dff6
AD		 2182 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
2183 if (i2c_bus->valid) {
379dfc25
AD		 2184 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2185 if (radeon_connector->ddc_bus)
496263bf
AD		 2186 has_aux = true;
2187 else
eac4dff6
AD		 2188 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2189 }
e35755fa 2190 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2191 dev->mode_config.scaling_mode_property,
2192 DRM_MODE_SCALE_FULLSCREEN);
2193 subpixel_order = SubPixelHorizontalRGB;
2194 connector->interlace_allowed = false;
2195 connector->doublescan_allowed = false;
2196 break;
2197 case DRM_MODE_CONNECTOR_SVIDEO:
2198 case DRM_MODE_CONNECTOR_Composite:
2199 case DRM_MODE_CONNECTOR_9PinDIN:
2200 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
2201 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
2202 radeon_connector->dac_load_detect = true;
e35755fa 2203 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2204 rdev->mode_info.load_detect_property,
2205 1);
e35755fa 2206 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2207 rdev->mode_info.tv_std_property,
2208 radeon_atombios_get_tv_info(rdev));
2209 /* no HPD on analog connectors */
2210 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
2211 connector->interlace_allowed = false;
2212 connector->doublescan_allowed = false;
2213 break;
2214 case DRM_MODE_CONNECTOR_LVDS:
2215 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2216 if (!radeon_dig_connector)
2217 goto failed;
2218 radeon_dig_connector->igp_lane_info = igp_lane_info;
2219 radeon_connector->con_priv = radeon_dig_connector;
2220 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
2221 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
2222 if (i2c_bus->valid) {
2223 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2224 if (!radeon_connector->ddc_bus)
2225 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2226 }
e35755fa 2227 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2228 dev->mode_config.scaling_mode_property,
2229 DRM_MODE_SCALE_FULLSCREEN);
2230 subpixel_order = SubPixelHorizontalRGB;
2231 connector->interlace_allowed = false;
2232 connector->doublescan_allowed = false;
2233 break;
771fe6b9 2234 }
771fe6b9
JG		 2235 }
2236
2581afcc 2237 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA		 2238 if (i2c_bus->valid)
2239 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2240 } else
2241 connector->polled = DRM_CONNECTOR_POLL_HPD;
2242
771fe6b9 2243 connector->display_info.subpixel_order = subpixel_order;
34ea3d38 2244 drm_connector_register(connector);
496263bf
AD		 2245
2246 if (has_aux)
2247 radeon_dp_aux_init(radeon_connector);
2248
771fe6b9
JG		 2249 return;
2250
2251failed:
771fe6b9
JG		 2252 drm_connector_cleanup(connector);
2253 kfree(connector);
2254}
2255
2256void
2257radeon_add_legacy_connector(struct drm_device *dev,
2258 uint32_t connector_id,
2259 uint32_t supported_device,
2260 int connector_type,
b75fad06 2261 struct radeon_i2c_bus_rec *i2c_bus,
eed45b30
AD		 2262 uint16_t connector_object_id,
2263 struct radeon_hpd *hpd)
771fe6b9 2264{
445282db 2265 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG		 2266 struct drm_connector *connector;
2267 struct radeon_connector *radeon_connector;
2268 uint32_t subpixel_order = SubPixelNone;
2269
4ce001ab 2270 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG		 2271 return;
2272
cf4c12f9
AD		 2273 /* if the user selected tv=0 don't try and add the connector */
2274 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
2275 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
2276 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
2277 (radeon_tv == 0))
2278 return;
2279
771fe6b9
JG		 2280 /* see if we already added it */
2281 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
2282 radeon_connector = to_radeon_connector(connector);
2283 if (radeon_connector->connector_id == connector_id) {
2284 radeon_connector->devices |= supported_device;
2285 return;
2286 }
2287 }
2288
2289 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
2290 if (!radeon_connector)
2291 return;
2292
2293 connector = &radeon_connector->base;
2294
2295 radeon_connector->connector_id = connector_id;
2296 radeon_connector->devices = supported_device;
b75fad06 2297 radeon_connector->connector_object_id = connector_object_id;
eed45b30 2298 radeon_connector->hpd = *hpd;
bc1c4dc3 2299
771fe6b9
JG		 2300 switch (connector_type) {
2301 case DRM_MODE_CONNECTOR_VGA:
2302 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 2303 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 2304 if (i2c_bus->valid) {
f376b94f 2305 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2306 if (!radeon_connector->ddc_bus)
a70882aa 2307 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2308 }
35e4b7af 2309 radeon_connector->dac_load_detect = true;
e35755fa 2310 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2311 rdev->mode_info.load_detect_property,
2312 1);
2581afcc
AD		 2313 /* no HPD on analog connectors */
2314 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
eb1f8e4f 2315 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
c49948f4
AD		 2316 connector->interlace_allowed = true;
2317 connector->doublescan_allowed = true;
771fe6b9
JG		 2318 break;
2319 case DRM_MODE_CONNECTOR_DVIA:
2320 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 2321 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 2322 if (i2c_bus->valid) {
f376b94f 2323 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2324 if (!radeon_connector->ddc_bus)
a70882aa 2325 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2326 }
35e4b7af 2327 radeon_connector->dac_load_detect = true;
e35755fa 2328 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2329 rdev->mode_info.load_detect_property,
2330 1);
2581afcc
AD		 2331 /* no HPD on analog connectors */
2332 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD		 2333 connector->interlace_allowed = true;
2334 connector->doublescan_allowed = true;
771fe6b9
JG		 2335 break;
2336 case DRM_MODE_CONNECTOR_DVII:
2337 case DRM_MODE_CONNECTOR_DVID:
2338 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
0b4c0f3f 2339 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
771fe6b9 2340 if (i2c_bus->valid) {
f376b94f 2341 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2342 if (!radeon_connector->ddc_bus)
a70882aa 2343 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
68b3adb4
AD		 2344 }
2345 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
35e4b7af 2346 radeon_connector->dac_load_detect = true;
e35755fa 2347 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2348 rdev->mode_info.load_detect_property,
2349 1);
771fe6b9
JG		 2350 }
2351 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD		 2352 connector->interlace_allowed = true;
2353 if (connector_type == DRM_MODE_CONNECTOR_DVII)
2354 connector->doublescan_allowed = true;
2355 else
2356 connector->doublescan_allowed = false;
771fe6b9
JG		 2357 break;
2358 case DRM_MODE_CONNECTOR_SVIDEO:
2359 case DRM_MODE_CONNECTOR_Composite:
2360 case DRM_MODE_CONNECTOR_9PinDIN:
cf4c12f9
AD		 2361 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
2362 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
2363 radeon_connector->dac_load_detect = true;
2364 /* RS400,RC410,RS480 chipset seems to report a lot
2365 * of false positive on load detect, we haven't yet
2366 * found a way to make load detect reliable on those
2367 * chipset, thus just disable it for TV.
2368 */
2369 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480)
2370 radeon_connector->dac_load_detect = false;
e35755fa 2371 drm_object_attach_property(&radeon_connector->base.base,
cf4c12f9
AD		 2372 rdev->mode_info.load_detect_property,
2373 radeon_connector->dac_load_detect);
e35755fa 2374 drm_object_attach_property(&radeon_connector->base.base,
cf4c12f9
AD		 2375 rdev->mode_info.tv_std_property,
2376 radeon_combios_get_tv_info(rdev));
2377 /* no HPD on analog connectors */
2378 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD		 2379 connector->interlace_allowed = false;
2380 connector->doublescan_allowed = false;
771fe6b9
JG		 2381 break;
2382 case DRM_MODE_CONNECTOR_LVDS:
2383 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
0b4c0f3f 2384 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
771fe6b9 2385 if (i2c_bus->valid) {
f376b94f 2386 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2387 if (!radeon_connector->ddc_bus)
a70882aa 2388 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2389 }
e35755fa 2390 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2391 dev->mode_config.scaling_mode_property,
2392 DRM_MODE_SCALE_FULLSCREEN);
771fe6b9 2393 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD		 2394 connector->interlace_allowed = false;
2395 connector->doublescan_allowed = false;
771fe6b9
JG		 2396 break;
2397 }
2398
2581afcc 2399 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA		 2400 if (i2c_bus->valid)
2401 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2402 } else
2403 connector->polled = DRM_CONNECTOR_POLL_HPD;
771fe6b9 2404 connector->display_info.subpixel_order = subpixel_order;
34ea3d38 2405 drm_connector_register(connector);
771fe6b9 2406}
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