]> git.proxmox.com Git - mirror_ubuntu-eoan-kernel.git/blame - drivers/gpu/drm/radeon/radeon_connectors.c
Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[mirror_ubuntu-eoan-kernel.git] / drivers / gpu / drm / radeon / radeon_connectors.c
CommitLineData
771fe6b9
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1/*
2 * Copyright 2007-8 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors: Dave Airlie
24 * Alex Deucher
25 */
26#include "drmP.h"
27#include "drm_edid.h"
28#include "drm_crtc_helper.h"
d50ba256 29#include "drm_fb_helper.h"
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30#include "radeon_drm.h"
31#include "radeon.h"
923f6848 32#include "atom.h"
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33
34extern void
35radeon_combios_connected_scratch_regs(struct drm_connector *connector,
36 struct drm_encoder *encoder,
37 bool connected);
38extern void
39radeon_atombios_connected_scratch_regs(struct drm_connector *connector,
40 struct drm_encoder *encoder,
41 bool connected);
42
63ec0119
MD
43extern void
44radeon_legacy_backlight_init(struct radeon_encoder *radeon_encoder,
45 struct drm_connector *drm_connector);
46
591a10e1
AD
47bool radeon_connector_encoder_is_dp_bridge(struct drm_connector *connector);
48
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49void radeon_connector_hotplug(struct drm_connector *connector)
50{
51 struct drm_device *dev = connector->dev;
52 struct radeon_device *rdev = dev->dev_private;
53 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
54
cbac9543
AD
55 /* bail if the connector does not have hpd pin, e.g.,
56 * VGA, TV, etc.
57 */
58 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE)
59 return;
60
1e85e1d0 61 radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
d4877cf2 62
7c3ed0fd
AD
63 /* powering up/down the eDP panel generates hpd events which
64 * can interfere with modesetting.
65 */
66 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP)
67 return;
68
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AD
69 /* pre-r600 did not always have the hpd pins mapped accurately to connectors */
70 if (rdev->family >= CHIP_R600) {
71 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd))
72 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
73 else
74 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
d4877cf2 75 }
d4877cf2
AD
76}
77
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78static void radeon_property_change_mode(struct drm_encoder *encoder)
79{
80 struct drm_crtc *crtc = encoder->crtc;
81
82 if (crtc && crtc->enabled) {
83 drm_crtc_helper_set_mode(crtc, &crtc->mode,
84 crtc->x, crtc->y, crtc->fb);
85 }
86}
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87static void
88radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status)
89{
90 struct drm_device *dev = connector->dev;
91 struct radeon_device *rdev = dev->dev_private;
92 struct drm_encoder *best_encoder = NULL;
93 struct drm_encoder *encoder = NULL;
94 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
95 struct drm_mode_object *obj;
96 bool connected;
97 int i;
98
99 best_encoder = connector_funcs->best_encoder(connector);
100
101 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
102 if (connector->encoder_ids[i] == 0)
103 break;
104
105 obj = drm_mode_object_find(connector->dev,
106 connector->encoder_ids[i],
107 DRM_MODE_OBJECT_ENCODER);
108 if (!obj)
109 continue;
110
111 encoder = obj_to_encoder(obj);
112
113 if ((encoder == best_encoder) && (status == connector_status_connected))
114 connected = true;
115 else
116 connected = false;
117
118 if (rdev->is_atom_bios)
119 radeon_atombios_connected_scratch_regs(connector, encoder, connected);
120 else
121 radeon_combios_connected_scratch_regs(connector, encoder, connected);
122
123 }
124}
125
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126struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type)
127{
128 struct drm_mode_object *obj;
129 struct drm_encoder *encoder;
130 int i;
131
132 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
133 if (connector->encoder_ids[i] == 0)
134 break;
135
136 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
137 if (!obj)
138 continue;
139
140 encoder = obj_to_encoder(obj);
141 if (encoder->encoder_type == encoder_type)
142 return encoder;
143 }
144 return NULL;
145}
146
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147struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector)
148{
149 int enc_id = connector->encoder_ids[0];
150 struct drm_mode_object *obj;
151 struct drm_encoder *encoder;
152
153 /* pick the encoder ids */
154 if (enc_id) {
155 obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER);
156 if (!obj)
157 return NULL;
158 encoder = obj_to_encoder(obj);
159 return encoder;
160 }
161 return NULL;
162}
163
4ce001ab
DA
164/*
165 * radeon_connector_analog_encoder_conflict_solve
166 * - search for other connectors sharing this encoder
167 * if priority is true, then set them disconnected if this is connected
168 * if priority is false, set us disconnected if they are connected
169 */
170static enum drm_connector_status
171radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector,
172 struct drm_encoder *encoder,
173 enum drm_connector_status current_status,
174 bool priority)
175{
176 struct drm_device *dev = connector->dev;
177 struct drm_connector *conflict;
08d07511 178 struct radeon_connector *radeon_conflict;
4ce001ab
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179 int i;
180
181 list_for_each_entry(conflict, &dev->mode_config.connector_list, head) {
182 if (conflict == connector)
183 continue;
184
08d07511 185 radeon_conflict = to_radeon_connector(conflict);
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DA
186 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
187 if (conflict->encoder_ids[i] == 0)
188 break;
189
190 /* if the IDs match */
191 if (conflict->encoder_ids[i] == encoder->base.id) {
192 if (conflict->status != connector_status_connected)
193 continue;
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194
195 if (radeon_conflict->use_digital)
196 continue;
4ce001ab
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197
198 if (priority == true) {
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199 DRM_DEBUG_KMS("1: conflicting encoders switching off %s\n", drm_get_connector_name(conflict));
200 DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(connector));
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201 conflict->status = connector_status_disconnected;
202 radeon_connector_update_scratch_regs(conflict, connector_status_disconnected);
203 } else {
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204 DRM_DEBUG_KMS("2: conflicting encoders switching off %s\n", drm_get_connector_name(connector));
205 DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(conflict));
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206 current_status = connector_status_disconnected;
207 }
208 break;
209 }
210 }
211 }
212 return current_status;
213
214}
215
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216static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder)
217{
218 struct drm_device *dev = encoder->dev;
219 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
220 struct drm_display_mode *mode = NULL;
de2103e4 221 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
771fe6b9 222
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AD
223 if (native_mode->hdisplay != 0 &&
224 native_mode->vdisplay != 0 &&
225 native_mode->clock != 0) {
fb06ca8f 226 mode = drm_mode_duplicate(dev, native_mode);
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227 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
228 drm_mode_set_name(mode);
229
d9fdaafb 230 DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name);
d2efdf6d
AD
231 } else if (native_mode->hdisplay != 0 &&
232 native_mode->vdisplay != 0) {
233 /* mac laptops without an edid */
234 /* Note that this is not necessarily the exact panel mode,
235 * but an approximation based on the cvt formula. For these
236 * systems we should ideally read the mode info out of the
237 * registers or add a mode table, but this works and is much
238 * simpler.
239 */
240 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false);
241 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
d9fdaafb 242 DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name);
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243 }
244 return mode;
245}
246
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247static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector)
248{
249 struct drm_device *dev = encoder->dev;
250 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
251 struct drm_display_mode *mode = NULL;
de2103e4 252 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
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AD
253 int i;
254 struct mode_size {
255 int w;
256 int h;
257 } common_modes[17] = {
258 { 640, 480},
259 { 720, 480},
260 { 800, 600},
261 { 848, 480},
262 {1024, 768},
263 {1152, 768},
264 {1280, 720},
265 {1280, 800},
266 {1280, 854},
267 {1280, 960},
268 {1280, 1024},
269 {1440, 900},
270 {1400, 1050},
271 {1680, 1050},
272 {1600, 1200},
273 {1920, 1080},
274 {1920, 1200}
275 };
276
277 for (i = 0; i < 17; i++) {
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AD
278 if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) {
279 if (common_modes[i].w > 1024 ||
280 common_modes[i].h > 768)
281 continue;
282 }
923f6848 283 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
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AD
284 if (common_modes[i].w > native_mode->hdisplay ||
285 common_modes[i].h > native_mode->vdisplay ||
286 (common_modes[i].w == native_mode->hdisplay &&
287 common_modes[i].h == native_mode->vdisplay))
923f6848
AD
288 continue;
289 }
290 if (common_modes[i].w < 320 || common_modes[i].h < 200)
291 continue;
292
d50ba256 293 mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
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AD
294 drm_mode_probed_add(connector, mode);
295 }
296}
297
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298int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property,
299 uint64_t val)
300{
445282db
DA
301 struct drm_device *dev = connector->dev;
302 struct radeon_device *rdev = dev->dev_private;
303 struct drm_encoder *encoder;
304 struct radeon_encoder *radeon_encoder;
305
306 if (property == rdev->mode_info.coherent_mode_property) {
307 struct radeon_encoder_atom_dig *dig;
ce227c41 308 bool new_coherent_mode;
445282db
DA
309
310 /* need to find digital encoder on connector */
311 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
312 if (!encoder)
313 return 0;
314
315 radeon_encoder = to_radeon_encoder(encoder);
316
317 if (!radeon_encoder->enc_priv)
318 return 0;
319
320 dig = radeon_encoder->enc_priv;
ce227c41
DA
321 new_coherent_mode = val ? true : false;
322 if (dig->coherent_mode != new_coherent_mode) {
323 dig->coherent_mode = new_coherent_mode;
324 radeon_property_change_mode(&radeon_encoder->base);
325 }
445282db
DA
326 }
327
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AD
328 if (property == rdev->mode_info.underscan_property) {
329 /* need to find digital encoder on connector */
330 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
331 if (!encoder)
332 return 0;
333
334 radeon_encoder = to_radeon_encoder(encoder);
335
336 if (radeon_encoder->underscan_type != val) {
337 radeon_encoder->underscan_type = val;
338 radeon_property_change_mode(&radeon_encoder->base);
339 }
340 }
341
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MG
342 if (property == rdev->mode_info.underscan_hborder_property) {
343 /* need to find digital encoder on connector */
344 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
345 if (!encoder)
346 return 0;
347
348 radeon_encoder = to_radeon_encoder(encoder);
349
350 if (radeon_encoder->underscan_hborder != val) {
351 radeon_encoder->underscan_hborder = val;
352 radeon_property_change_mode(&radeon_encoder->base);
353 }
354 }
355
356 if (property == rdev->mode_info.underscan_vborder_property) {
357 /* need to find digital encoder on connector */
358 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
359 if (!encoder)
360 return 0;
361
362 radeon_encoder = to_radeon_encoder(encoder);
363
364 if (radeon_encoder->underscan_vborder != val) {
365 radeon_encoder->underscan_vborder = val;
366 radeon_property_change_mode(&radeon_encoder->base);
367 }
368 }
369
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DA
370 if (property == rdev->mode_info.tv_std_property) {
371 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC);
372 if (!encoder) {
373 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC);
374 }
375
376 if (!encoder)
377 return 0;
378
379 radeon_encoder = to_radeon_encoder(encoder);
380 if (!radeon_encoder->enc_priv)
381 return 0;
643acacf 382 if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) {
445282db
DA
383 struct radeon_encoder_atom_dac *dac_int;
384 dac_int = radeon_encoder->enc_priv;
385 dac_int->tv_std = val;
386 } else {
387 struct radeon_encoder_tv_dac *dac_int;
388 dac_int = radeon_encoder->enc_priv;
389 dac_int->tv_std = val;
390 }
391 radeon_property_change_mode(&radeon_encoder->base);
392 }
393
394 if (property == rdev->mode_info.load_detect_property) {
395 struct radeon_connector *radeon_connector =
396 to_radeon_connector(connector);
397
398 if (val == 0)
399 radeon_connector->dac_load_detect = false;
400 else
401 radeon_connector->dac_load_detect = true;
402 }
403
404 if (property == rdev->mode_info.tmds_pll_property) {
405 struct radeon_encoder_int_tmds *tmds = NULL;
406 bool ret = false;
407 /* need to find digital encoder on connector */
408 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
409 if (!encoder)
410 return 0;
411
412 radeon_encoder = to_radeon_encoder(encoder);
413
414 tmds = radeon_encoder->enc_priv;
415 if (!tmds)
416 return 0;
417
418 if (val == 0) {
419 if (rdev->is_atom_bios)
420 ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds);
421 else
422 ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds);
423 }
424 if (val == 1 || ret == false) {
425 radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds);
426 }
427 radeon_property_change_mode(&radeon_encoder->base);
428 }
429
771fe6b9
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430 return 0;
431}
432
8dfaa8a7
MD
433static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder,
434 struct drm_connector *connector)
435{
436 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 437 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
8dfaa8a7
MD
438
439 /* Try to get native mode details from EDID if necessary */
de2103e4 440 if (!native_mode->clock) {
8dfaa8a7
MD
441 struct drm_display_mode *t, *mode;
442
443 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
de2103e4
AD
444 if (mode->hdisplay == native_mode->hdisplay &&
445 mode->vdisplay == native_mode->vdisplay) {
446 *native_mode = *mode;
447 drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V);
c5d46b4e 448 DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n");
8dfaa8a7
MD
449 break;
450 }
451 }
452 }
de2103e4 453 if (!native_mode->clock) {
c5d46b4e 454 DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n");
8dfaa8a7
MD
455 radeon_encoder->rmx_type = RMX_OFF;
456 }
457}
771fe6b9
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458
459static int radeon_lvds_get_modes(struct drm_connector *connector)
460{
461 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
462 struct drm_encoder *encoder;
463 int ret = 0;
464 struct drm_display_mode *mode;
465
466 if (radeon_connector->ddc_bus) {
467 ret = radeon_ddc_get_modes(radeon_connector);
468 if (ret > 0) {
7747b713 469 encoder = radeon_best_single_encoder(connector);
8dfaa8a7
MD
470 if (encoder) {
471 radeon_fixup_lvds_native_mode(encoder, connector);
7747b713
AD
472 /* add scaled modes */
473 radeon_add_common_modes(encoder, connector);
8dfaa8a7 474 }
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475 return ret;
476 }
477 }
478
479 encoder = radeon_best_single_encoder(connector);
480 if (!encoder)
481 return 0;
482
483 /* we have no EDID modes */
484 mode = radeon_fp_native_mode(encoder);
485 if (mode) {
486 ret = 1;
487 drm_mode_probed_add(connector, mode);
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488 /* add the width/height from vbios tables if available */
489 connector->display_info.width_mm = mode->width_mm;
490 connector->display_info.height_mm = mode->height_mm;
7747b713
AD
491 /* add scaled modes */
492 radeon_add_common_modes(encoder, connector);
771fe6b9 493 }
923f6848 494
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495 return ret;
496}
497
498static int radeon_lvds_mode_valid(struct drm_connector *connector,
499 struct drm_display_mode *mode)
500{
a3fa6320
AD
501 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
502
503 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
504 return MODE_PANEL;
505
506 if (encoder) {
507 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
508 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
509
510 /* AVIVO hardware supports downscaling modes larger than the panel
511 * to the panel size, but I'm not sure this is desirable.
512 */
513 if ((mode->hdisplay > native_mode->hdisplay) ||
514 (mode->vdisplay > native_mode->vdisplay))
515 return MODE_PANEL;
516
517 /* if scaling is disabled, block non-native modes */
518 if (radeon_encoder->rmx_type == RMX_OFF) {
519 if ((mode->hdisplay != native_mode->hdisplay) ||
520 (mode->vdisplay != native_mode->vdisplay))
521 return MODE_PANEL;
522 }
523 }
524
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525 return MODE_OK;
526}
527
7b334fcb 528static enum drm_connector_status
930a9e28 529radeon_lvds_detect(struct drm_connector *connector, bool force)
771fe6b9 530{
0549a061 531 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
2ffb8429 532 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
0549a061 533 enum drm_connector_status ret = connector_status_disconnected;
2ffb8429
AD
534
535 if (encoder) {
536 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 537 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
2ffb8429
AD
538
539 /* check if panel is valid */
de2103e4 540 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
2ffb8429
AD
541 ret = connector_status_connected;
542
543 }
0549a061
AD
544
545 /* check for edid as well */
0294cf4f
AD
546 if (radeon_connector->edid)
547 ret = connector_status_connected;
548 else {
549 if (radeon_connector->ddc_bus) {
0294cf4f
AD
550 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
551 &radeon_connector->ddc_bus->adapter);
0294cf4f
AD
552 if (radeon_connector->edid)
553 ret = connector_status_connected;
554 }
0549a061 555 }
771fe6b9 556 /* check acpi lid status ??? */
2ffb8429 557
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JG
558 radeon_connector_update_scratch_regs(connector, ret);
559 return ret;
560}
561
562static void radeon_connector_destroy(struct drm_connector *connector)
563{
564 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
565
0294cf4f
AD
566 if (radeon_connector->edid)
567 kfree(radeon_connector->edid);
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568 kfree(radeon_connector->con_priv);
569 drm_sysfs_connector_remove(connector);
570 drm_connector_cleanup(connector);
571 kfree(connector);
572}
573
445282db
DA
574static int radeon_lvds_set_property(struct drm_connector *connector,
575 struct drm_property *property,
576 uint64_t value)
577{
578 struct drm_device *dev = connector->dev;
579 struct radeon_encoder *radeon_encoder;
580 enum radeon_rmx_type rmx_type;
581
d9fdaafb 582 DRM_DEBUG_KMS("\n");
445282db
DA
583 if (property != dev->mode_config.scaling_mode_property)
584 return 0;
585
586 if (connector->encoder)
587 radeon_encoder = to_radeon_encoder(connector->encoder);
588 else {
589 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
590 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
591 }
592
593 switch (value) {
594 case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
595 case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
596 case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
597 default:
598 case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
599 }
600 if (radeon_encoder->rmx_type == rmx_type)
601 return 0;
602
603 radeon_encoder->rmx_type = rmx_type;
604
605 radeon_property_change_mode(&radeon_encoder->base);
606 return 0;
607}
608
609
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JG
610struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = {
611 .get_modes = radeon_lvds_get_modes,
612 .mode_valid = radeon_lvds_mode_valid,
613 .best_encoder = radeon_best_single_encoder,
614};
615
616struct drm_connector_funcs radeon_lvds_connector_funcs = {
617 .dpms = drm_helper_connector_dpms,
618 .detect = radeon_lvds_detect,
619 .fill_modes = drm_helper_probe_single_connector_modes,
620 .destroy = radeon_connector_destroy,
445282db 621 .set_property = radeon_lvds_set_property,
771fe6b9
JG
622};
623
624static int radeon_vga_get_modes(struct drm_connector *connector)
625{
626 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
627 int ret;
628
629 ret = radeon_ddc_get_modes(radeon_connector);
630
631 return ret;
632}
633
634static int radeon_vga_mode_valid(struct drm_connector *connector,
635 struct drm_display_mode *mode)
636{
b20f9bef
AD
637 struct drm_device *dev = connector->dev;
638 struct radeon_device *rdev = dev->dev_private;
639
a3fa6320 640 /* XXX check mode bandwidth */
b20f9bef
AD
641
642 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
643 return MODE_CLOCK_HIGH;
644
771fe6b9
JG
645 return MODE_OK;
646}
647
7b334fcb 648static enum drm_connector_status
930a9e28 649radeon_vga_detect(struct drm_connector *connector, bool force)
771fe6b9 650{
fafcf94e
AD
651 struct drm_device *dev = connector->dev;
652 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG
653 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
654 struct drm_encoder *encoder;
655 struct drm_encoder_helper_funcs *encoder_funcs;
4b9d2a21 656 bool dret = false;
771fe6b9
JG
657 enum drm_connector_status ret = connector_status_disconnected;
658
4ce001ab
DA
659 encoder = radeon_best_single_encoder(connector);
660 if (!encoder)
661 ret = connector_status_disconnected;
662
eb6b6d7c 663 if (radeon_connector->ddc_bus)
4b9d2a21 664 dret = radeon_ddc_probe(radeon_connector);
0294cf4f
AD
665 if (dret) {
666 if (radeon_connector->edid) {
667 kfree(radeon_connector->edid);
668 radeon_connector->edid = NULL;
669 }
0294cf4f 670 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
0294cf4f
AD
671
672 if (!radeon_connector->edid) {
f82f5f3a
JG
673 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
674 drm_get_connector_name(connector));
675 ret = connector_status_connected;
0294cf4f
AD
676 } else {
677 radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
678
679 /* some oems have boards with separate digital and analog connectors
680 * with a shared ddc line (often vga + hdmi)
681 */
682 if (radeon_connector->use_digital && radeon_connector->shared_ddc) {
683 kfree(radeon_connector->edid);
684 radeon_connector->edid = NULL;
685 ret = connector_status_disconnected;
686 } else
687 ret = connector_status_connected;
688 }
689 } else {
c3cceedd
DA
690
691 /* if we aren't forcing don't do destructive polling */
692 if (!force)
693 return connector->status;
694
d8a7f792 695 if (radeon_connector->dac_load_detect && encoder) {
445282db
DA
696 encoder_funcs = encoder->helper_private;
697 ret = encoder_funcs->detect(encoder, connector);
698 }
771fe6b9
JG
699 }
700
4ce001ab
DA
701 if (ret == connector_status_connected)
702 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
fafcf94e
AD
703
704 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
705 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
706 * by other means, assume the CRT is connected and use that EDID.
707 */
708 if ((!rdev->is_atom_bios) &&
709 (ret == connector_status_disconnected) &&
710 rdev->mode_info.bios_hardcoded_edid_size) {
711 ret = connector_status_connected;
712 }
713
771fe6b9
JG
714 radeon_connector_update_scratch_regs(connector, ret);
715 return ret;
716}
717
718struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = {
719 .get_modes = radeon_vga_get_modes,
720 .mode_valid = radeon_vga_mode_valid,
721 .best_encoder = radeon_best_single_encoder,
722};
723
724struct drm_connector_funcs radeon_vga_connector_funcs = {
725 .dpms = drm_helper_connector_dpms,
726 .detect = radeon_vga_detect,
727 .fill_modes = drm_helper_probe_single_connector_modes,
728 .destroy = radeon_connector_destroy,
729 .set_property = radeon_connector_set_property,
730};
731
4ce001ab
DA
732static int radeon_tv_get_modes(struct drm_connector *connector)
733{
734 struct drm_device *dev = connector->dev;
923f6848 735 struct radeon_device *rdev = dev->dev_private;
4ce001ab 736 struct drm_display_mode *tv_mode;
923f6848 737 struct drm_encoder *encoder;
4ce001ab 738
923f6848
AD
739 encoder = radeon_best_single_encoder(connector);
740 if (!encoder)
741 return 0;
4ce001ab 742
923f6848
AD
743 /* avivo chips can scale any mode */
744 if (rdev->family >= CHIP_RS600)
745 /* add scaled modes */
746 radeon_add_common_modes(encoder, connector);
747 else {
748 /* only 800x600 is supported right now on pre-avivo chips */
d50ba256 749 tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false);
923f6848
AD
750 tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
751 drm_mode_probed_add(connector, tv_mode);
752 }
4ce001ab
DA
753 return 1;
754}
755
756static int radeon_tv_mode_valid(struct drm_connector *connector,
757 struct drm_display_mode *mode)
758{
a3fa6320
AD
759 if ((mode->hdisplay > 1024) || (mode->vdisplay > 768))
760 return MODE_CLOCK_RANGE;
4ce001ab
DA
761 return MODE_OK;
762}
763
7b334fcb 764static enum drm_connector_status
930a9e28 765radeon_tv_detect(struct drm_connector *connector, bool force)
4ce001ab
DA
766{
767 struct drm_encoder *encoder;
768 struct drm_encoder_helper_funcs *encoder_funcs;
445282db
DA
769 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
770 enum drm_connector_status ret = connector_status_disconnected;
771
772 if (!radeon_connector->dac_load_detect)
773 return ret;
4ce001ab
DA
774
775 encoder = radeon_best_single_encoder(connector);
776 if (!encoder)
777 ret = connector_status_disconnected;
778 else {
779 encoder_funcs = encoder->helper_private;
780 ret = encoder_funcs->detect(encoder, connector);
781 }
782 if (ret == connector_status_connected)
783 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false);
784 radeon_connector_update_scratch_regs(connector, ret);
785 return ret;
786}
787
788struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = {
789 .get_modes = radeon_tv_get_modes,
790 .mode_valid = radeon_tv_mode_valid,
791 .best_encoder = radeon_best_single_encoder,
792};
793
794struct drm_connector_funcs radeon_tv_connector_funcs = {
795 .dpms = drm_helper_connector_dpms,
796 .detect = radeon_tv_detect,
797 .fill_modes = drm_helper_probe_single_connector_modes,
798 .destroy = radeon_connector_destroy,
799 .set_property = radeon_connector_set_property,
800};
801
771fe6b9
JG
802static int radeon_dvi_get_modes(struct drm_connector *connector)
803{
804 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
805 int ret;
806
807 ret = radeon_ddc_get_modes(radeon_connector);
771fe6b9
JG
808 return ret;
809}
810
4ce001ab
DA
811/*
812 * DVI is complicated
813 * Do a DDC probe, if DDC probe passes, get the full EDID so
814 * we can do analog/digital monitor detection at this point.
815 * If the monitor is an analog monitor or we got no DDC,
816 * we need to find the DAC encoder object for this connector.
817 * If we got no DDC, we do load detection on the DAC encoder object.
818 * If we got analog DDC or load detection passes on the DAC encoder
819 * we have to check if this analog encoder is shared with anyone else (TV)
820 * if its shared we have to set the other connector to disconnected.
821 */
7b334fcb 822static enum drm_connector_status
930a9e28 823radeon_dvi_detect(struct drm_connector *connector, bool force)
771fe6b9 824{
fafcf94e
AD
825 struct drm_device *dev = connector->dev;
826 struct radeon_device *rdev = dev->dev_private;
771fe6b9 827 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
4ce001ab 828 struct drm_encoder *encoder = NULL;
771fe6b9
JG
829 struct drm_encoder_helper_funcs *encoder_funcs;
830 struct drm_mode_object *obj;
831 int i;
832 enum drm_connector_status ret = connector_status_disconnected;
4b9d2a21 833 bool dret = false;
771fe6b9 834
eb6b6d7c 835 if (radeon_connector->ddc_bus)
4b9d2a21 836 dret = radeon_ddc_probe(radeon_connector);
4ce001ab 837 if (dret) {
0294cf4f
AD
838 if (radeon_connector->edid) {
839 kfree(radeon_connector->edid);
840 radeon_connector->edid = NULL;
841 }
4ce001ab 842 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
4ce001ab
DA
843
844 if (!radeon_connector->edid) {
f82f5f3a
JG
845 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
846 drm_get_connector_name(connector));
4a9a8b71
DA
847 /* rs690 seems to have a problem with connectors not existing and always
848 * return a block of 0's. If we see this just stop polling on this output */
849 if ((rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) && radeon_connector->base.null_edid_counter) {
850 ret = connector_status_disconnected;
851 DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n", drm_get_connector_name(connector));
852 radeon_connector->ddc_bus = NULL;
853 }
4ce001ab
DA
854 } else {
855 radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
856
0294cf4f
AD
857 /* some oems have boards with separate digital and analog connectors
858 * with a shared ddc line (often vga + hdmi)
859 */
860 if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) {
861 kfree(radeon_connector->edid);
862 radeon_connector->edid = NULL;
863 ret = connector_status_disconnected;
864 } else
865 ret = connector_status_connected;
71407c46 866
42f14c4b
AD
867 /* This gets complicated. We have boards with VGA + HDMI with a
868 * shared DDC line and we have boards with DVI-D + HDMI with a shared
869 * DDC line. The latter is more complex because with DVI<->HDMI adapters
870 * you don't really know what's connected to which port as both are digital.
71407c46 871 */
d3932d6c 872 if (radeon_connector->shared_ddc && (ret == connector_status_connected)) {
71407c46
AD
873 struct drm_connector *list_connector;
874 struct radeon_connector *list_radeon_connector;
875 list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) {
876 if (connector == list_connector)
877 continue;
878 list_radeon_connector = to_radeon_connector(list_connector);
b2ea4aa6
AD
879 if (list_radeon_connector->shared_ddc &&
880 (list_radeon_connector->ddc_bus->rec.i2c_id ==
881 radeon_connector->ddc_bus->rec.i2c_id)) {
42f14c4b
AD
882 /* cases where both connectors are digital */
883 if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) {
884 /* hpd is our only option in this case */
885 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
71407c46
AD
886 kfree(radeon_connector->edid);
887 radeon_connector->edid = NULL;
888 ret = connector_status_disconnected;
889 }
890 }
891 }
892 }
893 }
4ce001ab
DA
894 }
895 }
896
897 if ((ret == connector_status_connected) && (radeon_connector->use_digital == true))
898 goto out;
899
c3cceedd
DA
900 if (!force) {
901 ret = connector->status;
902 goto out;
903 }
904
4ce001ab 905 /* find analog encoder */
445282db
DA
906 if (radeon_connector->dac_load_detect) {
907 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
908 if (connector->encoder_ids[i] == 0)
909 break;
771fe6b9 910
445282db
DA
911 obj = drm_mode_object_find(connector->dev,
912 connector->encoder_ids[i],
913 DRM_MODE_OBJECT_ENCODER);
914 if (!obj)
915 continue;
771fe6b9 916
445282db 917 encoder = obj_to_encoder(obj);
771fe6b9 918
445282db
DA
919 encoder_funcs = encoder->helper_private;
920 if (encoder_funcs->detect) {
921 if (ret != connector_status_connected) {
922 ret = encoder_funcs->detect(encoder, connector);
923 if (ret == connector_status_connected) {
924 radeon_connector->use_digital = false;
925 }
771fe6b9 926 }
445282db 927 break;
771fe6b9
JG
928 }
929 }
930 }
931
4ce001ab
DA
932 if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) &&
933 encoder) {
934 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
935 }
936
fafcf94e
AD
937 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
938 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
939 * by other means, assume the DFP is connected and use that EDID. In most
940 * cases the DVI port is actually a virtual KVM port connected to the service
941 * processor.
942 */
943 if ((!rdev->is_atom_bios) &&
944 (ret == connector_status_disconnected) &&
945 rdev->mode_info.bios_hardcoded_edid_size) {
946 radeon_connector->use_digital = true;
947 ret = connector_status_connected;
948 }
949
4ce001ab 950out:
771fe6b9
JG
951 /* updated in get modes as well since we need to know if it's analog or digital */
952 radeon_connector_update_scratch_regs(connector, ret);
953 return ret;
954}
955
956/* okay need to be smart in here about which encoder to pick */
957struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector)
958{
959 int enc_id = connector->encoder_ids[0];
960 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
961 struct drm_mode_object *obj;
962 struct drm_encoder *encoder;
963 int i;
964 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
965 if (connector->encoder_ids[i] == 0)
966 break;
967
968 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
969 if (!obj)
970 continue;
971
972 encoder = obj_to_encoder(obj);
973
4ce001ab 974 if (radeon_connector->use_digital == true) {
771fe6b9
JG
975 if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)
976 return encoder;
977 } else {
978 if (encoder->encoder_type == DRM_MODE_ENCODER_DAC ||
979 encoder->encoder_type == DRM_MODE_ENCODER_TVDAC)
980 return encoder;
981 }
982 }
983
984 /* see if we have a default encoder TODO */
985
986 /* then check use digitial */
987 /* pick the first one */
988 if (enc_id) {
989 obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER);
990 if (!obj)
991 return NULL;
992 encoder = obj_to_encoder(obj);
993 return encoder;
994 }
995 return NULL;
996}
997
d50ba256
DA
998static void radeon_dvi_force(struct drm_connector *connector)
999{
1000 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1001 if (connector->force == DRM_FORCE_ON)
1002 radeon_connector->use_digital = false;
1003 if (connector->force == DRM_FORCE_ON_DIGITAL)
1004 radeon_connector->use_digital = true;
1005}
1006
a3fa6320
AD
1007static int radeon_dvi_mode_valid(struct drm_connector *connector,
1008 struct drm_display_mode *mode)
1009{
1b24203e
AD
1010 struct drm_device *dev = connector->dev;
1011 struct radeon_device *rdev = dev->dev_private;
a3fa6320
AD
1012 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1013
1014 /* XXX check mode bandwidth */
1015
1b24203e
AD
1016 /* clocks over 135 MHz have heat issues with DVI on RV100 */
1017 if (radeon_connector->use_digital &&
1018 (rdev->family == CHIP_RV100) &&
1019 (mode->clock > 135000))
1020 return MODE_CLOCK_HIGH;
1021
a3fa6320
AD
1022 if (radeon_connector->use_digital && (mode->clock > 165000)) {
1023 if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) ||
1024 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) ||
1025 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B))
1026 return MODE_OK;
e1e84017
AD
1027 else if (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_A) {
1028 if (ASIC_IS_DCE3(rdev)) {
1029 /* HDMI 1.3+ supports max clock of 340 Mhz */
1030 if (mode->clock > 340000)
1031 return MODE_CLOCK_HIGH;
1032 else
1033 return MODE_OK;
1034 } else
1035 return MODE_CLOCK_HIGH;
1036 } else
a3fa6320
AD
1037 return MODE_CLOCK_HIGH;
1038 }
b20f9bef
AD
1039
1040 /* check against the max pixel clock */
1041 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
1042 return MODE_CLOCK_HIGH;
1043
a3fa6320
AD
1044 return MODE_OK;
1045}
1046
771fe6b9
JG
1047struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = {
1048 .get_modes = radeon_dvi_get_modes,
a3fa6320 1049 .mode_valid = radeon_dvi_mode_valid,
771fe6b9
JG
1050 .best_encoder = radeon_dvi_encoder,
1051};
1052
1053struct drm_connector_funcs radeon_dvi_connector_funcs = {
1054 .dpms = drm_helper_connector_dpms,
1055 .detect = radeon_dvi_detect,
1056 .fill_modes = drm_helper_probe_single_connector_modes,
1057 .set_property = radeon_connector_set_property,
1058 .destroy = radeon_connector_destroy,
d50ba256 1059 .force = radeon_dvi_force,
771fe6b9
JG
1060};
1061
ffd09c64
AD
1062static void radeon_dp_connector_destroy(struct drm_connector *connector)
1063{
1064 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1065 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
1066
ffd09c64
AD
1067 if (radeon_connector->edid)
1068 kfree(radeon_connector->edid);
1069 if (radeon_dig_connector->dp_i2c_bus)
ac1aade6 1070 radeon_i2c_destroy(radeon_dig_connector->dp_i2c_bus);
ffd09c64
AD
1071 kfree(radeon_connector->con_priv);
1072 drm_sysfs_connector_remove(connector);
1073 drm_connector_cleanup(connector);
1074 kfree(connector);
1075}
1076
746c1aa4
DA
1077static int radeon_dp_get_modes(struct drm_connector *connector)
1078{
1079 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
8b834852 1080 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1081 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
746c1aa4
DA
1082 int ret;
1083
f89931f3
AD
1084 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1085 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD
1086 struct drm_display_mode *mode;
1087
8b834852
AD
1088 if (!radeon_dig_connector->edp_on)
1089 atombios_set_edp_panel_power(connector,
1090 ATOM_TRANSMITTER_ACTION_POWER_ON);
d291767b 1091 ret = radeon_ddc_get_modes(radeon_connector);
8b834852
AD
1092 if (!radeon_dig_connector->edp_on)
1093 atombios_set_edp_panel_power(connector,
1094 ATOM_TRANSMITTER_ACTION_POWER_OFF);
d291767b
AD
1095
1096 if (ret > 0) {
d291767b
AD
1097 if (encoder) {
1098 radeon_fixup_lvds_native_mode(encoder, connector);
1099 /* add scaled modes */
1100 radeon_add_common_modes(encoder, connector);
1101 }
1102 return ret;
1103 }
1104
1105 encoder = radeon_best_single_encoder(connector);
1106 if (!encoder)
1107 return 0;
1108
1109 /* we have no EDID modes */
1110 mode = radeon_fp_native_mode(encoder);
1111 if (mode) {
1112 ret = 1;
1113 drm_mode_probed_add(connector, mode);
1114 /* add the width/height from vbios tables if available */
1115 connector->display_info.width_mm = mode->width_mm;
1116 connector->display_info.height_mm = mode->height_mm;
1117 /* add scaled modes */
1118 radeon_add_common_modes(encoder, connector);
1119 }
591a10e1
AD
1120 } else {
1121 /* need to setup ddc on the bridge */
1122 if (radeon_connector_encoder_is_dp_bridge(connector)) {
1123 if (encoder)
1124 radeon_atom_ext_encoder_setup_ddc(encoder);
1125 }
d291767b 1126 ret = radeon_ddc_get_modes(radeon_connector);
591a10e1 1127 }
8b834852 1128
746c1aa4
DA
1129 return ret;
1130}
1131
d7fa8bb3
AD
1132bool radeon_connector_encoder_is_dp_bridge(struct drm_connector *connector)
1133{
1134 struct drm_mode_object *obj;
1135 struct drm_encoder *encoder;
1136 struct radeon_encoder *radeon_encoder;
1137 int i;
1138 bool found = false;
1139
1140 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1141 if (connector->encoder_ids[i] == 0)
1142 break;
1143
1144 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
1145 if (!obj)
1146 continue;
1147
1148 encoder = obj_to_encoder(obj);
1149 radeon_encoder = to_radeon_encoder(encoder);
1150
1151 switch (radeon_encoder->encoder_id) {
1152 case ENCODER_OBJECT_ID_TRAVIS:
1153 case ENCODER_OBJECT_ID_NUTMEG:
1154 found = true;
1155 break;
1156 default:
1157 break;
1158 }
1159 }
1160
1161 return found;
1162}
1163
1164bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector)
1165{
1166 struct drm_mode_object *obj;
1167 struct drm_encoder *encoder;
1168 struct radeon_encoder *radeon_encoder;
1169 int i;
1170 bool found = false;
1171
1172 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1173 if (connector->encoder_ids[i] == 0)
1174 break;
1175
1176 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
1177 if (!obj)
1178 continue;
1179
1180 encoder = obj_to_encoder(obj);
1181 radeon_encoder = to_radeon_encoder(encoder);
1182 if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2)
1183 found = true;
1184 }
1185
1186 return found;
1187}
1188
1189bool radeon_connector_is_dp12_capable(struct drm_connector *connector)
1190{
1191 struct drm_device *dev = connector->dev;
1192 struct radeon_device *rdev = dev->dev_private;
1193
1194 if (ASIC_IS_DCE5(rdev) &&
1195 (rdev->clock.dp_extclk >= 53900) &&
1196 radeon_connector_encoder_is_hbr2(connector)) {
1197 return true;
1198 }
1199
1200 return false;
1201}
1202
7b334fcb 1203static enum drm_connector_status
930a9e28 1204radeon_dp_detect(struct drm_connector *connector, bool force)
746c1aa4 1205{
f8d0edde
AD
1206 struct drm_device *dev = connector->dev;
1207 struct radeon_device *rdev = dev->dev_private;
746c1aa4 1208 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
746c1aa4 1209 enum drm_connector_status ret = connector_status_disconnected;
4143e919 1210 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1211 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
746c1aa4
DA
1212
1213 if (radeon_connector->edid) {
1214 kfree(radeon_connector->edid);
1215 radeon_connector->edid = NULL;
1216 }
1217
f89931f3
AD
1218 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1219 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD
1220 if (encoder) {
1221 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1222 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1223
1224 /* check if panel is valid */
1225 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
1226 ret = connector_status_connected;
1227 }
6f50eae7
AD
1228 /* eDP is always DP */
1229 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
8b834852
AD
1230 if (!radeon_dig_connector->edp_on)
1231 atombios_set_edp_panel_power(connector,
1232 ATOM_TRANSMITTER_ACTION_POWER_ON);
6f50eae7 1233 if (radeon_dp_getdpcd(radeon_connector))
9fa05c98 1234 ret = connector_status_connected;
8b834852
AD
1235 if (!radeon_dig_connector->edp_on)
1236 atombios_set_edp_panel_power(connector,
1237 ATOM_TRANSMITTER_ACTION_POWER_OFF);
4143e919 1238 } else {
591a10e1
AD
1239 /* need to setup ddc on the bridge */
1240 if (radeon_connector_encoder_is_dp_bridge(connector)) {
1241 if (encoder)
1242 radeon_atom_ext_encoder_setup_ddc(encoder);
1243 }
6f50eae7 1244 radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
f8d0edde
AD
1245 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
1246 ret = connector_status_connected;
1247 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
1248 radeon_dp_getdpcd(radeon_connector);
6f50eae7 1249 } else {
f8d0edde
AD
1250 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
1251 if (radeon_dp_getdpcd(radeon_connector))
1252 ret = connector_status_connected;
1253 } else {
1254 if (radeon_ddc_probe(radeon_connector))
1255 ret = connector_status_connected;
1256 }
4143e919 1257 }
d629a3ce
AD
1258
1259 if ((ret == connector_status_disconnected) &&
1260 radeon_connector->dac_load_detect) {
1261 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
1262 struct drm_encoder_helper_funcs *encoder_funcs;
1263 if (encoder) {
1264 encoder_funcs = encoder->helper_private;
1265 ret = encoder_funcs->detect(encoder, connector);
1266 }
1267 }
746c1aa4 1268 }
4143e919 1269
30f44372 1270 radeon_connector_update_scratch_regs(connector, ret);
746c1aa4
DA
1271 return ret;
1272}
1273
5801ead6
AD
1274static int radeon_dp_mode_valid(struct drm_connector *connector,
1275 struct drm_display_mode *mode)
1276{
1277 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1278 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
1279
1280 /* XXX check mode bandwidth */
1281
f89931f3
AD
1282 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1283 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD
1284 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
1285
1286 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
1287 return MODE_PANEL;
1288
1289 if (encoder) {
1290 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1291 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1292
f89931f3 1293 /* AVIVO hardware supports downscaling modes larger than the panel
d291767b
AD
1294 * to the panel size, but I'm not sure this is desirable.
1295 */
1296 if ((mode->hdisplay > native_mode->hdisplay) ||
1297 (mode->vdisplay > native_mode->vdisplay))
1298 return MODE_PANEL;
1299
1300 /* if scaling is disabled, block non-native modes */
1301 if (radeon_encoder->rmx_type == RMX_OFF) {
1302 if ((mode->hdisplay != native_mode->hdisplay) ||
1303 (mode->vdisplay != native_mode->vdisplay))
1304 return MODE_PANEL;
1305 }
1306 }
5801ead6 1307 return MODE_OK;
d291767b
AD
1308 } else {
1309 if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
1310 (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
1311 return radeon_dp_mode_valid_helper(connector, mode);
1312 else
1313 return MODE_OK;
1314 }
5801ead6
AD
1315}
1316
746c1aa4
DA
1317struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = {
1318 .get_modes = radeon_dp_get_modes,
5801ead6 1319 .mode_valid = radeon_dp_mode_valid,
746c1aa4
DA
1320 .best_encoder = radeon_dvi_encoder,
1321};
1322
1323struct drm_connector_funcs radeon_dp_connector_funcs = {
1324 .dpms = drm_helper_connector_dpms,
1325 .detect = radeon_dp_detect,
1326 .fill_modes = drm_helper_probe_single_connector_modes,
1327 .set_property = radeon_connector_set_property,
ffd09c64 1328 .destroy = radeon_dp_connector_destroy,
746c1aa4
DA
1329 .force = radeon_dvi_force,
1330};
1331
771fe6b9
JG
1332void
1333radeon_add_atom_connector(struct drm_device *dev,
1334 uint32_t connector_id,
1335 uint32_t supported_device,
1336 int connector_type,
1337 struct radeon_i2c_bus_rec *i2c_bus,
b75fad06 1338 uint32_t igp_lane_info,
eed45b30 1339 uint16_t connector_object_id,
26b5bc98
AD
1340 struct radeon_hpd *hpd,
1341 struct radeon_router *router)
771fe6b9 1342{
445282db 1343 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG
1344 struct drm_connector *connector;
1345 struct radeon_connector *radeon_connector;
1346 struct radeon_connector_atom_dig *radeon_dig_connector;
eac4dff6
AD
1347 struct drm_encoder *encoder;
1348 struct radeon_encoder *radeon_encoder;
771fe6b9 1349 uint32_t subpixel_order = SubPixelNone;
0294cf4f 1350 bool shared_ddc = false;
eac4dff6 1351 bool is_dp_bridge = false;
771fe6b9 1352
4ce001ab 1353 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG
1354 return;
1355
cf4c12f9
AD
1356 /* if the user selected tv=0 don't try and add the connector */
1357 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
1358 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
1359 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
1360 (radeon_tv == 0))
1361 return;
1362
771fe6b9
JG
1363 /* see if we already added it */
1364 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1365 radeon_connector = to_radeon_connector(connector);
1366 if (radeon_connector->connector_id == connector_id) {
1367 radeon_connector->devices |= supported_device;
1368 return;
1369 }
0294cf4f 1370 if (radeon_connector->ddc_bus && i2c_bus->valid) {
d3932d6c 1371 if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) {
0294cf4f
AD
1372 radeon_connector->shared_ddc = true;
1373 shared_ddc = true;
1374 }
fb939dfc 1375 if (radeon_connector->router_bus && router->ddc_valid &&
26b5bc98
AD
1376 (radeon_connector->router.router_id == router->router_id)) {
1377 radeon_connector->shared_ddc = false;
1378 shared_ddc = false;
1379 }
0294cf4f 1380 }
771fe6b9
JG
1381 }
1382
eac4dff6
AD
1383 /* check if it's a dp bridge */
1384 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
1385 radeon_encoder = to_radeon_encoder(encoder);
1386 if (radeon_encoder->devices & supported_device) {
1387 switch (radeon_encoder->encoder_id) {
1388 case ENCODER_OBJECT_ID_TRAVIS:
1389 case ENCODER_OBJECT_ID_NUTMEG:
1390 is_dp_bridge = true;
1391 break;
1392 default:
1393 break;
1394 }
1395 }
1396 }
1397
771fe6b9
JG
1398 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
1399 if (!radeon_connector)
1400 return;
1401
1402 connector = &radeon_connector->base;
1403
1404 radeon_connector->connector_id = connector_id;
1405 radeon_connector->devices = supported_device;
0294cf4f 1406 radeon_connector->shared_ddc = shared_ddc;
b75fad06 1407 radeon_connector->connector_object_id = connector_object_id;
eed45b30 1408 radeon_connector->hpd = *hpd;
26b5bc98 1409 radeon_connector->router = *router;
fb939dfc 1410 if (router->ddc_valid || router->cd_valid) {
26b5bc98
AD
1411 radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info);
1412 if (!radeon_connector->router_bus)
a70882aa 1413 DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n");
26b5bc98 1414 }
eac4dff6
AD
1415
1416 if (is_dp_bridge) {
771fe6b9
JG
1417 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1418 if (!radeon_dig_connector)
1419 goto failed;
771fe6b9
JG
1420 radeon_dig_connector->igp_lane_info = igp_lane_info;
1421 radeon_connector->con_priv = radeon_dig_connector;
eac4dff6
AD
1422 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
1423 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
771fe6b9 1424 if (i2c_bus->valid) {
eac4dff6
AD
1425 /* add DP i2c bus */
1426 if (connector_type == DRM_MODE_CONNECTOR_eDP)
1427 radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch");
1428 else
1429 radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch");
1430 if (!radeon_dig_connector->dp_i2c_bus)
1431 DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n");
f376b94f 1432 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 1433 if (!radeon_connector->ddc_bus)
eac4dff6 1434 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1435 }
eac4dff6
AD
1436 switch (connector_type) {
1437 case DRM_MODE_CONNECTOR_VGA:
1438 case DRM_MODE_CONNECTOR_DVIA:
1439 default:
1440 connector->interlace_allowed = true;
1441 connector->doublescan_allowed = true;
d629a3ce
AD
1442 radeon_connector->dac_load_detect = true;
1443 drm_connector_attach_property(&radeon_connector->base,
1444 rdev->mode_info.load_detect_property,
1445 1);
eac4dff6
AD
1446 break;
1447 case DRM_MODE_CONNECTOR_DVII:
1448 case DRM_MODE_CONNECTOR_DVID:
1449 case DRM_MODE_CONNECTOR_HDMIA:
1450 case DRM_MODE_CONNECTOR_HDMIB:
1451 case DRM_MODE_CONNECTOR_DisplayPort:
430f70d5
AD
1452 drm_connector_attach_property(&radeon_connector->base,
1453 rdev->mode_info.underscan_property,
56bec7c0 1454 UNDERSCAN_OFF);
5bccf5e3
MG
1455 drm_connector_attach_property(&radeon_connector->base,
1456 rdev->mode_info.underscan_hborder_property,
1457 0);
1458 drm_connector_attach_property(&radeon_connector->base,
1459 rdev->mode_info.underscan_vborder_property,
1460 0);
eac4dff6
AD
1461 subpixel_order = SubPixelHorizontalRGB;
1462 connector->interlace_allowed = true;
1463 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
1464 connector->doublescan_allowed = true;
1465 else
1466 connector->doublescan_allowed = false;
d629a3ce
AD
1467 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
1468 radeon_connector->dac_load_detect = true;
1469 drm_connector_attach_property(&radeon_connector->base,
1470 rdev->mode_info.load_detect_property,
1471 1);
1472 }
eac4dff6
AD
1473 break;
1474 case DRM_MODE_CONNECTOR_LVDS:
1475 case DRM_MODE_CONNECTOR_eDP:
1476 drm_connector_attach_property(&radeon_connector->base,
1477 dev->mode_config.scaling_mode_property,
1478 DRM_MODE_SCALE_FULLSCREEN);
1479 subpixel_order = SubPixelHorizontalRGB;
1480 connector->interlace_allowed = false;
1481 connector->doublescan_allowed = false;
1482 break;
5bccf5e3 1483 }
eac4dff6
AD
1484 } else {
1485 switch (connector_type) {
1486 case DRM_MODE_CONNECTOR_VGA:
1487 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
1488 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
1489 if (i2c_bus->valid) {
1490 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1491 if (!radeon_connector->ddc_bus)
1492 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1493 }
390d0bbe
AD
1494 radeon_connector->dac_load_detect = true;
1495 drm_connector_attach_property(&radeon_connector->base,
1496 rdev->mode_info.load_detect_property,
1497 1);
eac4dff6
AD
1498 /* no HPD on analog connectors */
1499 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1500 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1501 connector->interlace_allowed = true;
c49948f4 1502 connector->doublescan_allowed = true;
eac4dff6
AD
1503 break;
1504 case DRM_MODE_CONNECTOR_DVIA:
1505 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
1506 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
1507 if (i2c_bus->valid) {
1508 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1509 if (!radeon_connector->ddc_bus)
1510 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1511 }
1512 radeon_connector->dac_load_detect = true;
430f70d5 1513 drm_connector_attach_property(&radeon_connector->base,
eac4dff6
AD
1514 rdev->mode_info.load_detect_property,
1515 1);
1516 /* no HPD on analog connectors */
1517 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1518 connector->interlace_allowed = true;
1519 connector->doublescan_allowed = true;
1520 break;
1521 case DRM_MODE_CONNECTOR_DVII:
1522 case DRM_MODE_CONNECTOR_DVID:
1523 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1524 if (!radeon_dig_connector)
1525 goto failed;
1526 radeon_dig_connector->igp_lane_info = igp_lane_info;
1527 radeon_connector->con_priv = radeon_dig_connector;
1528 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
1529 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
1530 if (i2c_bus->valid) {
1531 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1532 if (!radeon_connector->ddc_bus)
1533 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1534 }
1535 subpixel_order = SubPixelHorizontalRGB;
5bccf5e3 1536 drm_connector_attach_property(&radeon_connector->base,
eac4dff6
AD
1537 rdev->mode_info.coherent_mode_property,
1538 1);
1539 if (ASIC_IS_AVIVO(rdev)) {
1540 drm_connector_attach_property(&radeon_connector->base,
1541 rdev->mode_info.underscan_property,
1542 UNDERSCAN_OFF);
1543 drm_connector_attach_property(&radeon_connector->base,
1544 rdev->mode_info.underscan_hborder_property,
1545 0);
1546 drm_connector_attach_property(&radeon_connector->base,
1547 rdev->mode_info.underscan_vborder_property,
1548 0);
1549 }
1550 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
1551 radeon_connector->dac_load_detect = true;
1552 drm_connector_attach_property(&radeon_connector->base,
1553 rdev->mode_info.load_detect_property,
1554 1);
1555 }
1556 connector->interlace_allowed = true;
1557 if (connector_type == DRM_MODE_CONNECTOR_DVII)
1558 connector->doublescan_allowed = true;
1559 else
1560 connector->doublescan_allowed = false;
1561 break;
1562 case DRM_MODE_CONNECTOR_HDMIA:
1563 case DRM_MODE_CONNECTOR_HDMIB:
1564 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1565 if (!radeon_dig_connector)
1566 goto failed;
1567 radeon_dig_connector->igp_lane_info = igp_lane_info;
1568 radeon_connector->con_priv = radeon_dig_connector;
1569 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
1570 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
1571 if (i2c_bus->valid) {
1572 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1573 if (!radeon_connector->ddc_bus)
1574 DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1575 }
5bccf5e3 1576 drm_connector_attach_property(&radeon_connector->base,
eac4dff6
AD
1577 rdev->mode_info.coherent_mode_property,
1578 1);
1579 if (ASIC_IS_AVIVO(rdev)) {
1580 drm_connector_attach_property(&radeon_connector->base,
1581 rdev->mode_info.underscan_property,
1582 UNDERSCAN_OFF);
1583 drm_connector_attach_property(&radeon_connector->base,
1584 rdev->mode_info.underscan_hborder_property,
1585 0);
1586 drm_connector_attach_property(&radeon_connector->base,
1587 rdev->mode_info.underscan_vborder_property,
1588 0);
1589 }
1590 subpixel_order = SubPixelHorizontalRGB;
1591 connector->interlace_allowed = true;
1592 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
1593 connector->doublescan_allowed = true;
1594 else
1595 connector->doublescan_allowed = false;
1596 break;
1597 case DRM_MODE_CONNECTOR_DisplayPort:
1598 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1599 if (!radeon_dig_connector)
1600 goto failed;
1601 radeon_dig_connector->igp_lane_info = igp_lane_info;
1602 radeon_connector->con_priv = radeon_dig_connector;
1603 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
1604 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
1605 if (i2c_bus->valid) {
1606 /* add DP i2c bus */
1607 radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch");
1608 if (!radeon_dig_connector->dp_i2c_bus)
1609 DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n");
1610 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1611 if (!radeon_connector->ddc_bus)
1612 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1613 }
1614 subpixel_order = SubPixelHorizontalRGB;
1615 drm_connector_attach_property(&radeon_connector->base,
1616 rdev->mode_info.coherent_mode_property,
1617 1);
1618 if (ASIC_IS_AVIVO(rdev)) {
1619 drm_connector_attach_property(&radeon_connector->base,
1620 rdev->mode_info.underscan_property,
1621 UNDERSCAN_OFF);
1622 drm_connector_attach_property(&radeon_connector->base,
1623 rdev->mode_info.underscan_hborder_property,
1624 0);
1625 drm_connector_attach_property(&radeon_connector->base,
1626 rdev->mode_info.underscan_vborder_property,
1627 0);
1628 }
1629 connector->interlace_allowed = true;
1630 /* in theory with a DP to VGA converter... */
c49948f4 1631 connector->doublescan_allowed = false;
eac4dff6
AD
1632 break;
1633 case DRM_MODE_CONNECTOR_eDP:
1634 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1635 if (!radeon_dig_connector)
1636 goto failed;
1637 radeon_dig_connector->igp_lane_info = igp_lane_info;
1638 radeon_connector->con_priv = radeon_dig_connector;
1639 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
1640 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
1641 if (i2c_bus->valid) {
1642 /* add DP i2c bus */
1643 radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch");
1644 if (!radeon_dig_connector->dp_i2c_bus)
1645 DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n");
1646 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1647 if (!radeon_connector->ddc_bus)
1648 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1649 }
430f70d5 1650 drm_connector_attach_property(&radeon_connector->base,
eac4dff6
AD
1651 dev->mode_config.scaling_mode_property,
1652 DRM_MODE_SCALE_FULLSCREEN);
1653 subpixel_order = SubPixelHorizontalRGB;
1654 connector->interlace_allowed = false;
1655 connector->doublescan_allowed = false;
1656 break;
1657 case DRM_MODE_CONNECTOR_SVIDEO:
1658 case DRM_MODE_CONNECTOR_Composite:
1659 case DRM_MODE_CONNECTOR_9PinDIN:
1660 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
1661 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
1662 radeon_connector->dac_load_detect = true;
5bccf5e3 1663 drm_connector_attach_property(&radeon_connector->base,
eac4dff6
AD
1664 rdev->mode_info.load_detect_property,
1665 1);
5bccf5e3 1666 drm_connector_attach_property(&radeon_connector->base,
eac4dff6
AD
1667 rdev->mode_info.tv_std_property,
1668 radeon_atombios_get_tv_info(rdev));
1669 /* no HPD on analog connectors */
1670 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1671 connector->interlace_allowed = false;
1672 connector->doublescan_allowed = false;
1673 break;
1674 case DRM_MODE_CONNECTOR_LVDS:
1675 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1676 if (!radeon_dig_connector)
1677 goto failed;
1678 radeon_dig_connector->igp_lane_info = igp_lane_info;
1679 radeon_connector->con_priv = radeon_dig_connector;
1680 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
1681 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
1682 if (i2c_bus->valid) {
1683 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1684 if (!radeon_connector->ddc_bus)
1685 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1686 }
1687 drm_connector_attach_property(&radeon_connector->base,
1688 dev->mode_config.scaling_mode_property,
1689 DRM_MODE_SCALE_FULLSCREEN);
1690 subpixel_order = SubPixelHorizontalRGB;
1691 connector->interlace_allowed = false;
1692 connector->doublescan_allowed = false;
1693 break;
771fe6b9 1694 }
771fe6b9
JG
1695 }
1696
2581afcc 1697 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA
1698 if (i2c_bus->valid)
1699 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1700 } else
1701 connector->polled = DRM_CONNECTOR_POLL_HPD;
1702
771fe6b9
JG
1703 connector->display_info.subpixel_order = subpixel_order;
1704 drm_sysfs_connector_add(connector);
1705 return;
1706
1707failed:
771fe6b9
JG
1708 drm_connector_cleanup(connector);
1709 kfree(connector);
1710}
1711
1712void
1713radeon_add_legacy_connector(struct drm_device *dev,
1714 uint32_t connector_id,
1715 uint32_t supported_device,
1716 int connector_type,
b75fad06 1717 struct radeon_i2c_bus_rec *i2c_bus,
eed45b30
AD
1718 uint16_t connector_object_id,
1719 struct radeon_hpd *hpd)
771fe6b9 1720{
445282db 1721 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG
1722 struct drm_connector *connector;
1723 struct radeon_connector *radeon_connector;
1724 uint32_t subpixel_order = SubPixelNone;
1725
4ce001ab 1726 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG
1727 return;
1728
cf4c12f9
AD
1729 /* if the user selected tv=0 don't try and add the connector */
1730 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
1731 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
1732 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
1733 (radeon_tv == 0))
1734 return;
1735
771fe6b9
JG
1736 /* see if we already added it */
1737 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1738 radeon_connector = to_radeon_connector(connector);
1739 if (radeon_connector->connector_id == connector_id) {
1740 radeon_connector->devices |= supported_device;
1741 return;
1742 }
1743 }
1744
1745 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
1746 if (!radeon_connector)
1747 return;
1748
1749 connector = &radeon_connector->base;
1750
1751 radeon_connector->connector_id = connector_id;
1752 radeon_connector->devices = supported_device;
b75fad06 1753 radeon_connector->connector_object_id = connector_object_id;
eed45b30 1754 radeon_connector->hpd = *hpd;
771fe6b9
JG
1755 switch (connector_type) {
1756 case DRM_MODE_CONNECTOR_VGA:
1757 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 1758 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 1759 if (i2c_bus->valid) {
f376b94f 1760 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 1761 if (!radeon_connector->ddc_bus)
a70882aa 1762 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1763 }
35e4b7af 1764 radeon_connector->dac_load_detect = true;
445282db
DA
1765 drm_connector_attach_property(&radeon_connector->base,
1766 rdev->mode_info.load_detect_property,
1767 1);
2581afcc
AD
1768 /* no HPD on analog connectors */
1769 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
eb1f8e4f 1770 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
c49948f4
AD
1771 connector->interlace_allowed = true;
1772 connector->doublescan_allowed = true;
771fe6b9
JG
1773 break;
1774 case DRM_MODE_CONNECTOR_DVIA:
1775 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 1776 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 1777 if (i2c_bus->valid) {
f376b94f 1778 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 1779 if (!radeon_connector->ddc_bus)
a70882aa 1780 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1781 }
35e4b7af 1782 radeon_connector->dac_load_detect = true;
445282db
DA
1783 drm_connector_attach_property(&radeon_connector->base,
1784 rdev->mode_info.load_detect_property,
1785 1);
2581afcc
AD
1786 /* no HPD on analog connectors */
1787 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD
1788 connector->interlace_allowed = true;
1789 connector->doublescan_allowed = true;
771fe6b9
JG
1790 break;
1791 case DRM_MODE_CONNECTOR_DVII:
1792 case DRM_MODE_CONNECTOR_DVID:
1793 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
0b4c0f3f 1794 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
771fe6b9 1795 if (i2c_bus->valid) {
f376b94f 1796 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 1797 if (!radeon_connector->ddc_bus)
a70882aa 1798 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
68b3adb4
AD
1799 }
1800 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
35e4b7af 1801 radeon_connector->dac_load_detect = true;
445282db
DA
1802 drm_connector_attach_property(&radeon_connector->base,
1803 rdev->mode_info.load_detect_property,
1804 1);
771fe6b9
JG
1805 }
1806 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD
1807 connector->interlace_allowed = true;
1808 if (connector_type == DRM_MODE_CONNECTOR_DVII)
1809 connector->doublescan_allowed = true;
1810 else
1811 connector->doublescan_allowed = false;
771fe6b9
JG
1812 break;
1813 case DRM_MODE_CONNECTOR_SVIDEO:
1814 case DRM_MODE_CONNECTOR_Composite:
1815 case DRM_MODE_CONNECTOR_9PinDIN:
cf4c12f9
AD
1816 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
1817 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
1818 radeon_connector->dac_load_detect = true;
1819 /* RS400,RC410,RS480 chipset seems to report a lot
1820 * of false positive on load detect, we haven't yet
1821 * found a way to make load detect reliable on those
1822 * chipset, thus just disable it for TV.
1823 */
1824 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480)
1825 radeon_connector->dac_load_detect = false;
1826 drm_connector_attach_property(&radeon_connector->base,
1827 rdev->mode_info.load_detect_property,
1828 radeon_connector->dac_load_detect);
1829 drm_connector_attach_property(&radeon_connector->base,
1830 rdev->mode_info.tv_std_property,
1831 radeon_combios_get_tv_info(rdev));
1832 /* no HPD on analog connectors */
1833 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD
1834 connector->interlace_allowed = false;
1835 connector->doublescan_allowed = false;
771fe6b9
JG
1836 break;
1837 case DRM_MODE_CONNECTOR_LVDS:
1838 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
0b4c0f3f 1839 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
771fe6b9 1840 if (i2c_bus->valid) {
f376b94f 1841 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 1842 if (!radeon_connector->ddc_bus)
a70882aa 1843 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1844 }
445282db
DA
1845 drm_connector_attach_property(&radeon_connector->base,
1846 dev->mode_config.scaling_mode_property,
1847 DRM_MODE_SCALE_FULLSCREEN);
771fe6b9 1848 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD
1849 connector->interlace_allowed = false;
1850 connector->doublescan_allowed = false;
771fe6b9
JG
1851 break;
1852 }
1853
2581afcc 1854 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA
1855 if (i2c_bus->valid)
1856 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1857 } else
1858 connector->polled = DRM_CONNECTOR_POLL_HPD;
771fe6b9
JG
1859 connector->display_info.subpixel_order = subpixel_order;
1860 drm_sysfs_connector_add(connector);
63ec0119
MD
1861 if (connector_type == DRM_MODE_CONNECTOR_LVDS) {
1862 struct drm_encoder *drm_encoder;
1863
1864 list_for_each_entry(drm_encoder, &dev->mode_config.encoder_list, head) {
1865 struct radeon_encoder *radeon_encoder;
1866
1867 radeon_encoder = to_radeon_encoder(drm_encoder);
1868 if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_LVDS)
1869 radeon_legacy_backlight_init(radeon_encoder, connector);
1870 }
1871 }
771fe6b9 1872}