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drm/radeon: add trace_radeon_vm_flush
[mirror_ubuntu-hirsute-kernel.git] / drivers / gpu / drm / radeon / radeon_connectors.c
CommitLineData
771fe6b9
JG		 1/*
2 * Copyright 2007-8 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors: Dave Airlie
24 * Alex Deucher
25 */
760285e7
DH		 26#include <drm/drmP.h>
27#include <drm/drm_edid.h>
28#include <drm/drm_crtc_helper.h>
29#include <drm/drm_fb_helper.h>
30#include <drm/radeon_drm.h>
771fe6b9 31#include "radeon.h"
923f6848 32#include "atom.h"
771fe6b9 33
10ebc0bc
DA		 34#include <linux/pm_runtime.h>
35
d4877cf2
AD		 36void radeon_connector_hotplug(struct drm_connector *connector)
37{
38 struct drm_device *dev = connector->dev;
39 struct radeon_device *rdev = dev->dev_private;
40 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
41
cbac9543
AD		 42 /* bail if the connector does not have hpd pin, e.g.,
43 * VGA, TV, etc.
44 */
45 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE)
46 return;
47
1e85e1d0 48 radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
d4877cf2 49
73104b5c 50 /* if the connector is already off, don't turn it back on */
6e9f798d 51 /* FIXME: This access isn't protected by any locks. */
73104b5c
AD		 52 if (connector->dpms != DRM_MODE_DPMS_ON)
53 return;
54
d5811e87
AD		 55 /* just deal with DP (not eDP) here. */
56 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
266dcba5
JG		 57 struct radeon_connector_atom_dig *dig_connector =
58 radeon_connector->con_priv;
7c3ed0fd 59
266dcba5
JG		 60 /* if existing sink type was not DP no need to retrain */
61 if (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT)
62 return;
63
64 /* first get sink type as it may be reset after (un)plug */
65 dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
66 /* don't do anything if sink is not display port, i.e.,
67 * passive dp->(dvi|hdmi) adaptor
68 */
69 if (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
70 int saved_dpms = connector->dpms;
71 /* Only turn off the display if it's physically disconnected */
ca2ccde5 72 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
266dcba5 73 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
ca2ccde5
JG		 74 } else if (radeon_dp_needs_link_train(radeon_connector)) {
75 /* set it to OFF so that drm_helper_connector_dpms()
76 * won't return immediately since the current state
77 * is ON at this point.
78 */
79 connector->dpms = DRM_MODE_DPMS_OFF;
266dcba5 80 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
ca2ccde5 81 }
266dcba5
JG		 82 connector->dpms = saved_dpms;
83 }
d4877cf2 84 }
d4877cf2
AD		 85}
86
445282db
DA		 87static void radeon_property_change_mode(struct drm_encoder *encoder)
88{
89 struct drm_crtc *crtc = encoder->crtc;
90
91 if (crtc && crtc->enabled) {
92 drm_crtc_helper_set_mode(crtc, &crtc->mode,
f4510a27 93 crtc->x, crtc->y, crtc->primary->fb);
445282db
DA		 94 }
95}
eccea792
AD		 96
97int radeon_get_monitor_bpc(struct drm_connector *connector)
98{
99 struct drm_device *dev = connector->dev;
100 struct radeon_device *rdev = dev->dev_private;
101 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
102 struct radeon_connector_atom_dig *dig_connector;
103 int bpc = 8;
ea292861 104 int mode_clock, max_tmds_clock;
eccea792
AD		 105
106 switch (connector->connector_type) {
107 case DRM_MODE_CONNECTOR_DVII:
108 case DRM_MODE_CONNECTOR_HDMIB:
109 if (radeon_connector->use_digital) {
377bd8a9 110 if (drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
eccea792
AD		 111 if (connector->display_info.bpc)
112 bpc = connector->display_info.bpc;
113 }
114 }
115 break;
116 case DRM_MODE_CONNECTOR_DVID:
117 case DRM_MODE_CONNECTOR_HDMIA:
377bd8a9 118 if (drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
eccea792
AD		 119 if (connector->display_info.bpc)
120 bpc = connector->display_info.bpc;
121 }
122 break;
123 case DRM_MODE_CONNECTOR_DisplayPort:
124 dig_connector = radeon_connector->con_priv;
125 if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
126 (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) ||
377bd8a9 127 drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
eccea792
AD		 128 if (connector->display_info.bpc)
129 bpc = connector->display_info.bpc;
130 }
131 break;
132 case DRM_MODE_CONNECTOR_eDP:
133 case DRM_MODE_CONNECTOR_LVDS:
134 if (connector->display_info.bpc)
135 bpc = connector->display_info.bpc;
136 else if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) {
137 struct drm_connector_helper_funcs *connector_funcs =
138 connector->helper_private;
139 struct drm_encoder *encoder = connector_funcs->best_encoder(connector);
140 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
141 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
142
143 if (dig->lcd_misc & ATOM_PANEL_MISC_V13_6BIT_PER_COLOR)
144 bpc = 6;
145 else if (dig->lcd_misc & ATOM_PANEL_MISC_V13_8BIT_PER_COLOR)
146 bpc = 8;
147 }
148 break;
149 }
89b92339 150
377bd8a9 151 if (drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
89b92339
MK		 152 /* hdmi deep color only implemented on DCE4+ */
153 if ((bpc > 8) && !ASIC_IS_DCE4(rdev)) {
154 DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 8 bpc.\n",
72082093 155 connector->name, bpc);
89b92339
MK		 156 bpc = 8;
157 }
158
159 /*
160 * Pre DCE-8 hw can't handle > 12 bpc, and more than 12 bpc doesn't make
161 * much sense without support for > 12 bpc framebuffers. RGB 4:4:4 at
162 * 12 bpc is always supported on hdmi deep color sinks, as this is
163 * required by the HDMI-1.3 spec. Clamp to a safe 12 bpc maximum.
164 */
165 if (bpc > 12) {
166 DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 12 bpc.\n",
72082093 167 connector->name, bpc);
89b92339
MK		 168 bpc = 12;
169 }
ea292861
MK		 170
171 /* Any defined maximum tmds clock limit we must not exceed? */
172 if (connector->max_tmds_clock > 0) {
173 /* mode_clock is clock in kHz for mode to be modeset on this connector */
174 mode_clock = radeon_connector->pixelclock_for_modeset;
175
176 /* Maximum allowable input clock in kHz */
177 max_tmds_clock = connector->max_tmds_clock * 1000;
178
179 DRM_DEBUG("%s: hdmi mode dotclock %d kHz, max tmds input clock %d kHz.\n",
180 connector->name, mode_clock, max_tmds_clock);
181
182 /* Check if bpc is within clock limit. Try to degrade gracefully otherwise */
183 if ((bpc == 12) && (mode_clock * 3/2 > max_tmds_clock)) {
184 if ((connector->display_info.edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_30) &&
185 (mode_clock * 5/4 <= max_tmds_clock))
186 bpc = 10;
187 else
188 bpc = 8;
189
190 DRM_DEBUG("%s: HDMI deep color 12 bpc exceeds max tmds clock. Using %d bpc.\n",
191 connector->name, bpc);
192 }
193
194 if ((bpc == 10) && (mode_clock * 5/4 > max_tmds_clock)) {
195 bpc = 8;
196 DRM_DEBUG("%s: HDMI deep color 10 bpc exceeds max tmds clock. Using %d bpc.\n",
197 connector->name, bpc);
198 }
199 }
89b92339
MK		 200 }
201
a624f429
AD		 202 if ((radeon_deep_color == 0) && (bpc > 8))
203 bpc = 8;
204
89b92339 205 DRM_DEBUG("%s: Display bpc=%d, returned bpc=%d\n",
72082093 206 connector->name, connector->display_info.bpc, bpc);
89b92339 207
eccea792
AD		 208 return bpc;
209}
210
771fe6b9
JG		 211static void
212radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status)
213{
214 struct drm_device *dev = connector->dev;
215 struct radeon_device *rdev = dev->dev_private;
216 struct drm_encoder *best_encoder = NULL;
217 struct drm_encoder *encoder = NULL;
218 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
771fe6b9
JG		 219 bool connected;
220 int i;
221
222 best_encoder = connector_funcs->best_encoder(connector);
223
224 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
225 if (connector->encoder_ids[i] == 0)
226 break;
227
b957f457
RC		 228 encoder = drm_encoder_find(connector->dev,
229 connector->encoder_ids[i]);
230 if (!encoder)
771fe6b9
JG		 231 continue;
232
771fe6b9
JG		 233 if ((encoder == best_encoder) && (status == connector_status_connected))
234 connected = true;
235 else
236 connected = false;
237
238 if (rdev->is_atom_bios)
239 radeon_atombios_connected_scratch_regs(connector, encoder, connected);
240 else
241 radeon_combios_connected_scratch_regs(connector, encoder, connected);
242
243 }
244}
245
1109ca09 246static struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type)
445282db 247{
445282db
DA		 248 struct drm_encoder *encoder;
249 int i;
250
251 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
252 if (connector->encoder_ids[i] == 0)
253 break;
254
b957f457
RC		 255 encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]);
256 if (!encoder)
445282db
DA		 257 continue;
258
445282db
DA		 259 if (encoder->encoder_type == encoder_type)
260 return encoder;
261 }
262 return NULL;
263}
264
377bd8a9
AD		 265struct edid *radeon_connector_edid(struct drm_connector *connector)
266{
267 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
268 struct drm_property_blob *edid_blob = connector->edid_blob_ptr;
269
270 if (radeon_connector->edid) {
271 return radeon_connector->edid;
272 } else if (edid_blob) {
273 struct edid *edid = kmemdup(edid_blob->data, edid_blob->length, GFP_KERNEL);
274 if (edid)
275 radeon_connector->edid = edid;
276 }
277 return radeon_connector->edid;
278}
279
72a5c970
AD		 280static void radeon_connector_get_edid(struct drm_connector *connector)
281{
282 struct drm_device *dev = connector->dev;
283 struct radeon_device *rdev = dev->dev_private;
284 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
285
286 if (radeon_connector->edid)
287 return;
288
289 /* on hw with routers, select right port */
290 if (radeon_connector->router.ddc_valid)
291 radeon_router_select_ddc_port(radeon_connector);
292
293 if ((radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
294 ENCODER_OBJECT_ID_NONE) &&
295 radeon_connector->ddc_bus->has_aux) {
296 radeon_connector->edid = drm_get_edid(connector,
297 &radeon_connector->ddc_bus->aux.ddc);
298 } else if ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) ||
299 (connector->connector_type == DRM_MODE_CONNECTOR_eDP)) {
300 struct radeon_connector_atom_dig *dig = radeon_connector->con_priv;
301
302 if ((dig->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT ||
303 dig->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) &&
304 radeon_connector->ddc_bus->has_aux)
305 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
306 &radeon_connector->ddc_bus->aux.ddc);
307 else if (radeon_connector->ddc_bus)
308 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
309 &radeon_connector->ddc_bus->adapter);
310 } else if (radeon_connector->ddc_bus) {
311 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
312 &radeon_connector->ddc_bus->adapter);
313 }
314
315 if (!radeon_connector->edid) {
316 if (rdev->is_atom_bios) {
317 /* some laptops provide a hardcoded edid in rom for LCDs */
318 if (((connector->connector_type == DRM_MODE_CONNECTOR_LVDS) ||
319 (connector->connector_type == DRM_MODE_CONNECTOR_eDP)))
320 radeon_connector->edid = radeon_bios_get_hardcoded_edid(rdev);
321 } else {
322 /* some servers provide a hardcoded edid in rom for KVMs */
323 radeon_connector->edid = radeon_bios_get_hardcoded_edid(rdev);
324 }
325 }
326}
327
328static void radeon_connector_free_edid(struct drm_connector *connector)
329{
330 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
331
332 if (radeon_connector->edid) {
333 kfree(radeon_connector->edid);
334 radeon_connector->edid = NULL;
335 }
336}
337
338static int radeon_ddc_get_modes(struct drm_connector *connector)
339{
340 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
341 int ret;
342
343 if (radeon_connector->edid) {
344 drm_mode_connector_update_edid_property(connector, radeon_connector->edid);
345 ret = drm_add_edid_modes(connector, radeon_connector->edid);
346 drm_edid_to_eld(connector, radeon_connector->edid);
347 return ret;
348 }
349 drm_mode_connector_update_edid_property(connector, NULL);
350 return 0;
351}
352
1109ca09 353static struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector)
771fe6b9
JG		 354{
355 int enc_id = connector->encoder_ids[0];
771fe6b9 356 /* pick the encoder ids */
b957f457
RC		 357 if (enc_id)
358 return drm_encoder_find(connector->dev, enc_id);
771fe6b9
JG		 359 return NULL;
360}
361
da997620
AD		 362static void radeon_get_native_mode(struct drm_connector *connector)
363{
364 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
365 struct radeon_encoder *radeon_encoder;
366
367 if (encoder == NULL)
368 return;
369
370 radeon_encoder = to_radeon_encoder(encoder);
371
372 if (!list_empty(&connector->probed_modes)) {
373 struct drm_display_mode *preferred_mode =
374 list_first_entry(&connector->probed_modes,
375 struct drm_display_mode, head);
376
377 radeon_encoder->native_mode = *preferred_mode;
378 } else {
379 radeon_encoder->native_mode.clock = 0;
380 }
381}
382
4ce001ab
DA		 383/*
384 * radeon_connector_analog_encoder_conflict_solve
385 * - search for other connectors sharing this encoder
386 * if priority is true, then set them disconnected if this is connected
387 * if priority is false, set us disconnected if they are connected
388 */
389static enum drm_connector_status
390radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector,
391 struct drm_encoder *encoder,
392 enum drm_connector_status current_status,
393 bool priority)
394{
395 struct drm_device *dev = connector->dev;
396 struct drm_connector *conflict;
08d07511 397 struct radeon_connector *radeon_conflict;
4ce001ab
DA		 398 int i;
399
400 list_for_each_entry(conflict, &dev->mode_config.connector_list, head) {
401 if (conflict == connector)
402 continue;
403
08d07511 404 radeon_conflict = to_radeon_connector(conflict);
4ce001ab
DA		 405 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
406 if (conflict->encoder_ids[i] == 0)
407 break;
408
409 /* if the IDs match */
410 if (conflict->encoder_ids[i] == encoder->base.id) {
411 if (conflict->status != connector_status_connected)
412 continue;
08d07511
AD		 413
414 if (radeon_conflict->use_digital)
415 continue;
4ce001ab
DA		 416
417 if (priority == true) {
72082093
JN		 418 DRM_DEBUG_KMS("1: conflicting encoders switching off %s\n",
419 conflict->name);
420 DRM_DEBUG_KMS("in favor of %s\n",
421 connector->name);
4ce001ab
DA		 422 conflict->status = connector_status_disconnected;
423 radeon_connector_update_scratch_regs(conflict, connector_status_disconnected);
424 } else {
72082093
JN		 425 DRM_DEBUG_KMS("2: conflicting encoders switching off %s\n",
426 connector->name);
427 DRM_DEBUG_KMS("in favor of %s\n",
428 conflict->name);
4ce001ab
DA		 429 current_status = connector_status_disconnected;
430 }
431 break;
432 }
433 }
434 }
435 return current_status;
436
437}
438
771fe6b9
JG		 439static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder)
440{
441 struct drm_device *dev = encoder->dev;
442 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
443 struct drm_display_mode *mode = NULL;
de2103e4 444 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
771fe6b9 445
de2103e4
AD		 446 if (native_mode->hdisplay != 0 &&
447 native_mode->vdisplay != 0 &&
448 native_mode->clock != 0) {
fb06ca8f 449 mode = drm_mode_duplicate(dev, native_mode);
771fe6b9
JG		 450 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
451 drm_mode_set_name(mode);
452
d9fdaafb 453 DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name);
d2efdf6d
AD		 454 } else if (native_mode->hdisplay != 0 &&
455 native_mode->vdisplay != 0) {
456 /* mac laptops without an edid */
457 /* Note that this is not necessarily the exact panel mode,
458 * but an approximation based on the cvt formula. For these
459 * systems we should ideally read the mode info out of the
460 * registers or add a mode table, but this works and is much
461 * simpler.
462 */
463 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false);
464 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
d9fdaafb 465 DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name);
771fe6b9
JG		 466 }
467 return mode;
468}
469
923f6848
AD		 470static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector)
471{
472 struct drm_device *dev = encoder->dev;
473 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
474 struct drm_display_mode *mode = NULL;
de2103e4 475 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
923f6848
AD		 476 int i;
477 struct mode_size {
478 int w;
479 int h;
480 } common_modes[17] = {
481 { 640, 480},
482 { 720, 480},
483 { 800, 600},
484 { 848, 480},
485 {1024, 768},
486 {1152, 768},
487 {1280, 720},
488 {1280, 800},
489 {1280, 854},
490 {1280, 960},
491 {1280, 1024},
492 {1440, 900},
493 {1400, 1050},
494 {1680, 1050},
495 {1600, 1200},
496 {1920, 1080},
497 {1920, 1200}
498 };
499
500 for (i = 0; i < 17; i++) {
dfdd6467
AD		 501 if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) {
502 if (common_modes[i].w > 1024 ||
503 common_modes[i].h > 768)
504 continue;
505 }
923f6848 506 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
de2103e4
AD		 507 if (common_modes[i].w > native_mode->hdisplay ||
508 common_modes[i].h > native_mode->vdisplay ||
509 (common_modes[i].w == native_mode->hdisplay &&
510 common_modes[i].h == native_mode->vdisplay))
923f6848
AD		 511 continue;
512 }
513 if (common_modes[i].w < 320 || common_modes[i].h < 200)
514 continue;
515
d50ba256 516 mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
923f6848
AD		 517 drm_mode_probed_add(connector, mode);
518 }
519}
520
1109ca09 521static int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property,
771fe6b9
JG		 522 uint64_t val)
523{
445282db
DA		 524 struct drm_device *dev = connector->dev;
525 struct radeon_device *rdev = dev->dev_private;
526 struct drm_encoder *encoder;
527 struct radeon_encoder *radeon_encoder;
528
529 if (property == rdev->mode_info.coherent_mode_property) {
530 struct radeon_encoder_atom_dig *dig;
ce227c41 531 bool new_coherent_mode;
445282db
DA		 532
533 /* need to find digital encoder on connector */
534 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
535 if (!encoder)
536 return 0;
537
538 radeon_encoder = to_radeon_encoder(encoder);
539
540 if (!radeon_encoder->enc_priv)
541 return 0;
542
543 dig = radeon_encoder->enc_priv;
ce227c41
DA		 544 new_coherent_mode = val ? true : false;
545 if (dig->coherent_mode != new_coherent_mode) {
546 dig->coherent_mode = new_coherent_mode;
547 radeon_property_change_mode(&radeon_encoder->base);
548 }
445282db
DA		 549 }
550
8666c076
AD		 551 if (property == rdev->mode_info.audio_property) {
552 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
553 /* need to find digital encoder on connector */
554 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
555 if (!encoder)
556 return 0;
557
558 radeon_encoder = to_radeon_encoder(encoder);
559
560 if (radeon_connector->audio != val) {
561 radeon_connector->audio = val;
562 radeon_property_change_mode(&radeon_encoder->base);
563 }
564 }
565
6214bb74
AD		 566 if (property == rdev->mode_info.dither_property) {
567 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
568 /* need to find digital encoder on connector */
569 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
570 if (!encoder)
571 return 0;
572
573 radeon_encoder = to_radeon_encoder(encoder);
574
575 if (radeon_connector->dither != val) {
576 radeon_connector->dither = val;
577 radeon_property_change_mode(&radeon_encoder->base);
578 }
579 }
580
5b1714d3
AD		 581 if (property == rdev->mode_info.underscan_property) {
582 /* need to find digital encoder on connector */
583 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
584 if (!encoder)
585 return 0;
586
587 radeon_encoder = to_radeon_encoder(encoder);
588
589 if (radeon_encoder->underscan_type != val) {
590 radeon_encoder->underscan_type = val;
591 radeon_property_change_mode(&radeon_encoder->base);
592 }
593 }
594
5bccf5e3
MG		 595 if (property == rdev->mode_info.underscan_hborder_property) {
596 /* need to find digital encoder on connector */
597 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
598 if (!encoder)
599 return 0;
600
601 radeon_encoder = to_radeon_encoder(encoder);
602
603 if (radeon_encoder->underscan_hborder != val) {
604 radeon_encoder->underscan_hborder = val;
605 radeon_property_change_mode(&radeon_encoder->base);
606 }
607 }
608
609 if (property == rdev->mode_info.underscan_vborder_property) {
610 /* need to find digital encoder on connector */
611 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
612 if (!encoder)
613 return 0;
614
615 radeon_encoder = to_radeon_encoder(encoder);
616
617 if (radeon_encoder->underscan_vborder != val) {
618 radeon_encoder->underscan_vborder = val;
619 radeon_property_change_mode(&radeon_encoder->base);
620 }
621 }
622
445282db
DA		 623 if (property == rdev->mode_info.tv_std_property) {
624 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC);
625 if (!encoder) {
626 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC);
627 }
628
629 if (!encoder)
630 return 0;
631
632 radeon_encoder = to_radeon_encoder(encoder);
633 if (!radeon_encoder->enc_priv)
634 return 0;
643acacf 635 if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) {
445282db
DA		 636 struct radeon_encoder_atom_dac *dac_int;
637 dac_int = radeon_encoder->enc_priv;
638 dac_int->tv_std = val;
639 } else {
640 struct radeon_encoder_tv_dac *dac_int;
641 dac_int = radeon_encoder->enc_priv;
642 dac_int->tv_std = val;
643 }
644 radeon_property_change_mode(&radeon_encoder->base);
645 }
646
647 if (property == rdev->mode_info.load_detect_property) {
648 struct radeon_connector *radeon_connector =
649 to_radeon_connector(connector);
650
651 if (val == 0)
652 radeon_connector->dac_load_detect = false;
653 else
654 radeon_connector->dac_load_detect = true;
655 }
656
657 if (property == rdev->mode_info.tmds_pll_property) {
658 struct radeon_encoder_int_tmds *tmds = NULL;
659 bool ret = false;
660 /* need to find digital encoder on connector */
661 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
662 if (!encoder)
663 return 0;
664
665 radeon_encoder = to_radeon_encoder(encoder);
666
667 tmds = radeon_encoder->enc_priv;
668 if (!tmds)
669 return 0;
670
671 if (val == 0) {
672 if (rdev->is_atom_bios)
673 ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds);
674 else
675 ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds);
676 }
677 if (val == 1 || ret == false) {
678 radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds);
679 }
680 radeon_property_change_mode(&radeon_encoder->base);
681 }
682
da997620
AD		 683 if (property == dev->mode_config.scaling_mode_property) {
684 enum radeon_rmx_type rmx_type;
685
686 if (connector->encoder)
687 radeon_encoder = to_radeon_encoder(connector->encoder);
688 else {
689 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
690 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
691 }
692
693 switch (val) {
694 default:
695 case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
696 case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
697 case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
698 case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
699 }
700 if (radeon_encoder->rmx_type == rmx_type)
701 return 0;
702
703 if ((rmx_type != DRM_MODE_SCALE_NONE) &&
704 (radeon_encoder->native_mode.clock == 0))
705 return 0;
706
707 radeon_encoder->rmx_type = rmx_type;
708
709 radeon_property_change_mode(&radeon_encoder->base);
710 }
711
771fe6b9
JG		 712 return 0;
713}
714
8dfaa8a7
MD		 715static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder,
716 struct drm_connector *connector)
717{
718 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 719 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
13bb9430
MG		 720 struct drm_display_mode *t, *mode;
721
722 /* If the EDID preferred mode doesn't match the native mode, use it */
723 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
724 if (mode->type & DRM_MODE_TYPE_PREFERRED) {
725 if (mode->hdisplay != native_mode->hdisplay ||
726 mode->vdisplay != native_mode->vdisplay)
727 memcpy(native_mode, mode, sizeof(*mode));
728 }
729 }
8dfaa8a7
MD		 730
731 /* Try to get native mode details from EDID if necessary */
de2103e4 732 if (!native_mode->clock) {
8dfaa8a7 733 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
de2103e4
AD		 734 if (mode->hdisplay == native_mode->hdisplay &&
735 mode->vdisplay == native_mode->vdisplay) {
736 *native_mode = *mode;
737 drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V);
c5d46b4e 738 DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n");
8dfaa8a7
MD		 739 break;
740 }
741 }
742 }
13bb9430 743
de2103e4 744 if (!native_mode->clock) {
c5d46b4e 745 DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n");
8dfaa8a7
MD		 746 radeon_encoder->rmx_type = RMX_OFF;
747 }
748}
771fe6b9
JG		 749
750static int radeon_lvds_get_modes(struct drm_connector *connector)
751{
771fe6b9
JG		 752 struct drm_encoder *encoder;
753 int ret = 0;
754 struct drm_display_mode *mode;
755
72a5c970
AD		 756 radeon_connector_get_edid(connector);
757 ret = radeon_ddc_get_modes(connector);
758 if (ret > 0) {
759 encoder = radeon_best_single_encoder(connector);
760 if (encoder) {
761 radeon_fixup_lvds_native_mode(encoder, connector);
762 /* add scaled modes */
763 radeon_add_common_modes(encoder, connector);
771fe6b9 764 }
72a5c970 765 return ret;
771fe6b9
JG		 766 }
767
768 encoder = radeon_best_single_encoder(connector);
769 if (!encoder)
770 return 0;
771
772 /* we have no EDID modes */
773 mode = radeon_fp_native_mode(encoder);
774 if (mode) {
775 ret = 1;
776 drm_mode_probed_add(connector, mode);
7a868e18
AD		 777 /* add the width/height from vbios tables if available */
778 connector->display_info.width_mm = mode->width_mm;
779 connector->display_info.height_mm = mode->height_mm;
7747b713
AD		 780 /* add scaled modes */
781 radeon_add_common_modes(encoder, connector);
771fe6b9 782 }
923f6848 783
771fe6b9
JG		 784 return ret;
785}
786
787static int radeon_lvds_mode_valid(struct drm_connector *connector,
788 struct drm_display_mode *mode)
789{
a3fa6320
AD		 790 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
791
792 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
793 return MODE_PANEL;
794
795 if (encoder) {
796 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
797 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
798
799 /* AVIVO hardware supports downscaling modes larger than the panel
800 * to the panel size, but I'm not sure this is desirable.
801 */
802 if ((mode->hdisplay > native_mode->hdisplay) ||
803 (mode->vdisplay > native_mode->vdisplay))
804 return MODE_PANEL;
805
806 /* if scaling is disabled, block non-native modes */
807 if (radeon_encoder->rmx_type == RMX_OFF) {
808 if ((mode->hdisplay != native_mode->hdisplay) ||
809 (mode->vdisplay != native_mode->vdisplay))
810 return MODE_PANEL;
811 }
812 }
813
771fe6b9
JG		 814 return MODE_OK;
815}
816
7b334fcb 817static enum drm_connector_status
930a9e28 818radeon_lvds_detect(struct drm_connector *connector, bool force)
771fe6b9 819{
0549a061 820 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
2ffb8429 821 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
0549a061 822 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc
DA		 823 int r;
824
825 r = pm_runtime_get_sync(connector->dev->dev);
826 if (r < 0)
827 return connector_status_disconnected;
2ffb8429
AD		 828
829 if (encoder) {
830 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 831 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
2ffb8429
AD		 832
833 /* check if panel is valid */
de2103e4 834 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
2ffb8429
AD		 835 ret = connector_status_connected;
836
837 }
0549a061
AD		 838
839 /* check for edid as well */
72a5c970 840 radeon_connector_get_edid(connector);
0294cf4f
AD		 841 if (radeon_connector->edid)
842 ret = connector_status_connected;
771fe6b9 843 /* check acpi lid status ??? */
2ffb8429 844
771fe6b9 845 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA		 846 pm_runtime_mark_last_busy(connector->dev->dev);
847 pm_runtime_put_autosuspend(connector->dev->dev);
771fe6b9
JG		 848 return ret;
849}
850
851static void radeon_connector_destroy(struct drm_connector *connector)
852{
853 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
854
72a5c970 855 radeon_connector_free_edid(connector);
771fe6b9 856 kfree(radeon_connector->con_priv);
34ea3d38 857 drm_connector_unregister(connector);
771fe6b9
JG		 858 drm_connector_cleanup(connector);
859 kfree(connector);
860}
861
445282db
DA		 862static int radeon_lvds_set_property(struct drm_connector *connector,
863 struct drm_property *property,
864 uint64_t value)
865{
866 struct drm_device *dev = connector->dev;
867 struct radeon_encoder *radeon_encoder;
868 enum radeon_rmx_type rmx_type;
869
d9fdaafb 870 DRM_DEBUG_KMS("\n");
445282db
DA		 871 if (property != dev->mode_config.scaling_mode_property)
872 return 0;
873
874 if (connector->encoder)
875 radeon_encoder = to_radeon_encoder(connector->encoder);
876 else {
877 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
878 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
879 }
880
881 switch (value) {
882 case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
883 case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
884 case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
885 default:
886 case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
887 }
888 if (radeon_encoder->rmx_type == rmx_type)
889 return 0;
890
891 radeon_encoder->rmx_type = rmx_type;
892
893 radeon_property_change_mode(&radeon_encoder->base);
894 return 0;
895}
896
897
1109ca09 898static const struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = {
771fe6b9
JG		 899 .get_modes = radeon_lvds_get_modes,
900 .mode_valid = radeon_lvds_mode_valid,
901 .best_encoder = radeon_best_single_encoder,
902};
903
1109ca09 904static const struct drm_connector_funcs radeon_lvds_connector_funcs = {
771fe6b9
JG		 905 .dpms = drm_helper_connector_dpms,
906 .detect = radeon_lvds_detect,
907 .fill_modes = drm_helper_probe_single_connector_modes,
908 .destroy = radeon_connector_destroy,
445282db 909 .set_property = radeon_lvds_set_property,
771fe6b9
JG		 910};
911
912static int radeon_vga_get_modes(struct drm_connector *connector)
913{
771fe6b9
JG		 914 int ret;
915
72a5c970
AD		 916 radeon_connector_get_edid(connector);
917 ret = radeon_ddc_get_modes(connector);
771fe6b9 918
da997620
AD		 919 radeon_get_native_mode(connector);
920
771fe6b9
JG		 921 return ret;
922}
923
924static int radeon_vga_mode_valid(struct drm_connector *connector,
925 struct drm_display_mode *mode)
926{
b20f9bef
AD		 927 struct drm_device *dev = connector->dev;
928 struct radeon_device *rdev = dev->dev_private;
929
a3fa6320 930 /* XXX check mode bandwidth */
b20f9bef
AD		 931
932 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
933 return MODE_CLOCK_HIGH;
934
771fe6b9
JG		 935 return MODE_OK;
936}
937
7b334fcb 938static enum drm_connector_status
930a9e28 939radeon_vga_detect(struct drm_connector *connector, bool force)
771fe6b9 940{
fafcf94e
AD		 941 struct drm_device *dev = connector->dev;
942 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG		 943 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
944 struct drm_encoder *encoder;
945 struct drm_encoder_helper_funcs *encoder_funcs;
4b9d2a21 946 bool dret = false;
771fe6b9 947 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc
DA		 948 int r;
949
950 r = pm_runtime_get_sync(connector->dev->dev);
951 if (r < 0)
952 return connector_status_disconnected;
771fe6b9 953
4ce001ab
DA		 954 encoder = radeon_best_single_encoder(connector);
955 if (!encoder)
956 ret = connector_status_disconnected;
957
eb6b6d7c 958 if (radeon_connector->ddc_bus)
0a9069d3 959 dret = radeon_ddc_probe(radeon_connector, false);
0294cf4f 960 if (dret) {
d0d0a225 961 radeon_connector->detected_by_load = false;
72a5c970
AD		 962 radeon_connector_free_edid(connector);
963 radeon_connector_get_edid(connector);
0294cf4f
AD		 964
965 if (!radeon_connector->edid) {
f82f5f3a 966 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
72082093 967 connector->name);
f82f5f3a 968 ret = connector_status_connected;
0294cf4f 969 } else {
72a5c970
AD		 970 radeon_connector->use_digital =
971 !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
0294cf4f
AD		 972
973 /* some oems have boards with separate digital and analog connectors
974 * with a shared ddc line (often vga + hdmi)
975 */
976 if (radeon_connector->use_digital && radeon_connector->shared_ddc) {
72a5c970 977 radeon_connector_free_edid(connector);
0294cf4f 978 ret = connector_status_disconnected;
72a5c970 979 } else {
0294cf4f 980 ret = connector_status_connected;
72a5c970 981 }
0294cf4f
AD		 982 }
983 } else {
c3cceedd
DA		 984
985 /* if we aren't forcing don't do destructive polling */
d0d0a225
AD		 986 if (!force) {
987 /* only return the previous status if we last
988 * detected a monitor via load.
989 */
990 if (radeon_connector->detected_by_load)
10ebc0bc
DA		 991 ret = connector->status;
992 goto out;
d0d0a225 993 }
c3cceedd 994
d8a7f792 995 if (radeon_connector->dac_load_detect && encoder) {
445282db
DA		 996 encoder_funcs = encoder->helper_private;
997 ret = encoder_funcs->detect(encoder, connector);
34076446 998 if (ret != connector_status_disconnected)
d0d0a225 999 radeon_connector->detected_by_load = true;
445282db 1000 }
771fe6b9
JG		 1001 }
1002
4ce001ab
DA		 1003 if (ret == connector_status_connected)
1004 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
fafcf94e
AD		 1005
1006 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
1007 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
1008 * by other means, assume the CRT is connected and use that EDID.
1009 */
1010 if ((!rdev->is_atom_bios) &&
1011 (ret == connector_status_disconnected) &&
1012 rdev->mode_info.bios_hardcoded_edid_size) {
1013 ret = connector_status_connected;
1014 }
1015
771fe6b9 1016 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA		 1017
1018out:
1019 pm_runtime_mark_last_busy(connector->dev->dev);
1020 pm_runtime_put_autosuspend(connector->dev->dev);
1021
771fe6b9
JG		 1022 return ret;
1023}
1024
1109ca09 1025static const struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = {
771fe6b9
JG		 1026 .get_modes = radeon_vga_get_modes,
1027 .mode_valid = radeon_vga_mode_valid,
1028 .best_encoder = radeon_best_single_encoder,
1029};
1030
1109ca09 1031static const struct drm_connector_funcs radeon_vga_connector_funcs = {
771fe6b9
JG		 1032 .dpms = drm_helper_connector_dpms,
1033 .detect = radeon_vga_detect,
1034 .fill_modes = drm_helper_probe_single_connector_modes,
1035 .destroy = radeon_connector_destroy,
1036 .set_property = radeon_connector_set_property,
1037};
1038
4ce001ab
DA		 1039static int radeon_tv_get_modes(struct drm_connector *connector)
1040{
1041 struct drm_device *dev = connector->dev;
923f6848 1042 struct radeon_device *rdev = dev->dev_private;
4ce001ab 1043 struct drm_display_mode *tv_mode;
923f6848 1044 struct drm_encoder *encoder;
4ce001ab 1045
923f6848
AD		 1046 encoder = radeon_best_single_encoder(connector);
1047 if (!encoder)
1048 return 0;
4ce001ab 1049
923f6848
AD		 1050 /* avivo chips can scale any mode */
1051 if (rdev->family >= CHIP_RS600)
1052 /* add scaled modes */
1053 radeon_add_common_modes(encoder, connector);
1054 else {
1055 /* only 800x600 is supported right now on pre-avivo chips */
d50ba256 1056 tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false);
923f6848
AD		 1057 tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
1058 drm_mode_probed_add(connector, tv_mode);
1059 }
4ce001ab
DA		 1060 return 1;
1061}
1062
1063static int radeon_tv_mode_valid(struct drm_connector *connector,
1064 struct drm_display_mode *mode)
1065{
a3fa6320
AD		 1066 if ((mode->hdisplay > 1024) || (mode->vdisplay > 768))
1067 return MODE_CLOCK_RANGE;
4ce001ab
DA		 1068 return MODE_OK;
1069}
1070
7b334fcb 1071static enum drm_connector_status
930a9e28 1072radeon_tv_detect(struct drm_connector *connector, bool force)
4ce001ab
DA		 1073{
1074 struct drm_encoder *encoder;
1075 struct drm_encoder_helper_funcs *encoder_funcs;
445282db
DA		 1076 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1077 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc 1078 int r;
445282db
DA		 1079
1080 if (!radeon_connector->dac_load_detect)
1081 return ret;
4ce001ab 1082
10ebc0bc
DA		 1083 r = pm_runtime_get_sync(connector->dev->dev);
1084 if (r < 0)
1085 return connector_status_disconnected;
1086
4ce001ab
DA		 1087 encoder = radeon_best_single_encoder(connector);
1088 if (!encoder)
1089 ret = connector_status_disconnected;
1090 else {
1091 encoder_funcs = encoder->helper_private;
1092 ret = encoder_funcs->detect(encoder, connector);
1093 }
1094 if (ret == connector_status_connected)
1095 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false);
1096 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA		 1097 pm_runtime_mark_last_busy(connector->dev->dev);
1098 pm_runtime_put_autosuspend(connector->dev->dev);
4ce001ab
DA		 1099 return ret;
1100}
1101
1109ca09 1102static const struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = {
4ce001ab
DA		 1103 .get_modes = radeon_tv_get_modes,
1104 .mode_valid = radeon_tv_mode_valid,
1105 .best_encoder = radeon_best_single_encoder,
1106};
1107
1109ca09 1108static const struct drm_connector_funcs radeon_tv_connector_funcs = {
4ce001ab
DA		 1109 .dpms = drm_helper_connector_dpms,
1110 .detect = radeon_tv_detect,
1111 .fill_modes = drm_helper_probe_single_connector_modes,
1112 .destroy = radeon_connector_destroy,
1113 .set_property = radeon_connector_set_property,
1114};
1115
11fe1266
TU		 1116static bool radeon_check_hpd_status_unchanged(struct drm_connector *connector)
1117{
1118 struct drm_device *dev = connector->dev;
1119 struct radeon_device *rdev = dev->dev_private;
1120 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1121 enum drm_connector_status status;
1122
1123 /* We only trust HPD on R600 and newer ASICS. */
1124 if (rdev->family >= CHIP_R600
1125 && radeon_connector->hpd.hpd != RADEON_HPD_NONE) {
1126 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd))
1127 status = connector_status_connected;
1128 else
1129 status = connector_status_disconnected;
1130 if (connector->status == status)
1131 return true;
1132 }
1133
1134 return false;
1135}
1136
4ce001ab
DA		 1137/*
1138 * DVI is complicated
1139 * Do a DDC probe, if DDC probe passes, get the full EDID so
1140 * we can do analog/digital monitor detection at this point.
1141 * If the monitor is an analog monitor or we got no DDC,
1142 * we need to find the DAC encoder object for this connector.
1143 * If we got no DDC, we do load detection on the DAC encoder object.
1144 * If we got analog DDC or load detection passes on the DAC encoder
1145 * we have to check if this analog encoder is shared with anyone else (TV)
1146 * if its shared we have to set the other connector to disconnected.
1147 */
7b334fcb 1148static enum drm_connector_status
930a9e28 1149radeon_dvi_detect(struct drm_connector *connector, bool force)
771fe6b9 1150{
fafcf94e
AD		 1151 struct drm_device *dev = connector->dev;
1152 struct radeon_device *rdev = dev->dev_private;
771fe6b9 1153 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
4ce001ab 1154 struct drm_encoder *encoder = NULL;
771fe6b9 1155 struct drm_encoder_helper_funcs *encoder_funcs;
10ebc0bc 1156 int i, r;
771fe6b9 1157 enum drm_connector_status ret = connector_status_disconnected;
fc87f13b 1158 bool dret = false, broken_edid = false;
771fe6b9 1159
10ebc0bc
DA		 1160 r = pm_runtime_get_sync(connector->dev->dev);
1161 if (r < 0)
1162 return connector_status_disconnected;
1163
1164 if (!force && radeon_check_hpd_status_unchanged(connector)) {
1165 ret = connector->status;
1166 goto exit;
1167 }
11fe1266 1168
eb6b6d7c 1169 if (radeon_connector->ddc_bus)
0a9069d3 1170 dret = radeon_ddc_probe(radeon_connector, false);
4ce001ab 1171 if (dret) {
d0d0a225 1172 radeon_connector->detected_by_load = false;
72a5c970
AD		 1173 radeon_connector_free_edid(connector);
1174 radeon_connector_get_edid(connector);
4ce001ab
DA		 1175
1176 if (!radeon_connector->edid) {
f82f5f3a 1177 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
72082093 1178 connector->name);
4a9a8b71
DA		 1179 /* rs690 seems to have a problem with connectors not existing and always
1180 * return a block of 0's. If we see this just stop polling on this output */
72a5c970
AD		 1181 if ((rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) &&
1182 radeon_connector->base.null_edid_counter) {
4a9a8b71 1183 ret = connector_status_disconnected;
72082093
JN		 1184 DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n",
1185 connector->name);
4a9a8b71 1186 radeon_connector->ddc_bus = NULL;
fc87f13b
EE		 1187 } else {
1188 ret = connector_status_connected;
1189 broken_edid = true; /* defer use_digital to later */
4a9a8b71 1190 }
4ce001ab 1191 } else {
72a5c970
AD		 1192 radeon_connector->use_digital =
1193 !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
4ce001ab 1194
0294cf4f
AD		 1195 /* some oems have boards with separate digital and analog connectors
1196 * with a shared ddc line (often vga + hdmi)
1197 */
1198 if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) {
72a5c970 1199 radeon_connector_free_edid(connector);
0294cf4f 1200 ret = connector_status_disconnected;
72a5c970 1201 } else {
0294cf4f 1202 ret = connector_status_connected;
72a5c970 1203 }
42f14c4b
AD		 1204 /* This gets complicated. We have boards with VGA + HDMI with a
1205 * shared DDC line and we have boards with DVI-D + HDMI with a shared
1206 * DDC line. The latter is more complex because with DVI<->HDMI adapters
1207 * you don't really know what's connected to which port as both are digital.
71407c46 1208 */
d3932d6c 1209 if (radeon_connector->shared_ddc && (ret == connector_status_connected)) {
71407c46
AD		 1210 struct drm_connector *list_connector;
1211 struct radeon_connector *list_radeon_connector;
1212 list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) {
1213 if (connector == list_connector)
1214 continue;
1215 list_radeon_connector = to_radeon_connector(list_connector);
b2ea4aa6
AD		 1216 if (list_radeon_connector->shared_ddc &&
1217 (list_radeon_connector->ddc_bus->rec.i2c_id ==
1218 radeon_connector->ddc_bus->rec.i2c_id)) {
42f14c4b
AD		 1219 /* cases where both connectors are digital */
1220 if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) {
1221 /* hpd is our only option in this case */
1222 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
72a5c970 1223 radeon_connector_free_edid(connector);
71407c46
AD		 1224 ret = connector_status_disconnected;
1225 }
1226 }
1227 }
1228 }
1229 }
4ce001ab
DA		 1230 }
1231 }
1232
1233 if ((ret == connector_status_connected) && (radeon_connector->use_digital == true))
1234 goto out;
1235
5f0a2612
AD		 1236 /* DVI-D and HDMI-A are digital only */
1237 if ((connector->connector_type == DRM_MODE_CONNECTOR_DVID) ||
1238 (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA))
1239 goto out;
1240
d0d0a225 1241 /* if we aren't forcing don't do destructive polling */
c3cceedd 1242 if (!force) {
d0d0a225
AD		 1243 /* only return the previous status if we last
1244 * detected a monitor via load.
1245 */
1246 if (radeon_connector->detected_by_load)
1247 ret = connector->status;
c3cceedd
DA		 1248 goto out;
1249 }
1250
4ce001ab 1251 /* find analog encoder */
445282db
DA		 1252 if (radeon_connector->dac_load_detect) {
1253 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1254 if (connector->encoder_ids[i] == 0)
1255 break;
771fe6b9 1256
b957f457
RC		 1257 encoder = drm_encoder_find(connector->dev,
1258 connector->encoder_ids[i]);
1259 if (!encoder)
445282db 1260 continue;
771fe6b9 1261
e3632507 1262 if (encoder->encoder_type != DRM_MODE_ENCODER_DAC &&
e00e8b5e
AD		 1263 encoder->encoder_type != DRM_MODE_ENCODER_TVDAC)
1264 continue;
1265
445282db
DA		 1266 encoder_funcs = encoder->helper_private;
1267 if (encoder_funcs->detect) {
fc87f13b
EE		 1268 if (!broken_edid) {
1269 if (ret != connector_status_connected) {
1270 /* deal with analog monitors without DDC */
1271 ret = encoder_funcs->detect(encoder, connector);
1272 if (ret == connector_status_connected) {
1273 radeon_connector->use_digital = false;
1274 }
1275 if (ret != connector_status_disconnected)
1276 radeon_connector->detected_by_load = true;
445282db 1277 }
fc87f13b
EE		 1278 } else {
1279 enum drm_connector_status lret;
1280 /* assume digital unless load detected otherwise */
1281 radeon_connector->use_digital = true;
1282 lret = encoder_funcs->detect(encoder, connector);
1283 DRM_DEBUG_KMS("load_detect %x returned: %x\n",encoder->encoder_type,lret);
1284 if (lret == connector_status_connected)
1285 radeon_connector->use_digital = false;
771fe6b9 1286 }
445282db 1287 break;
771fe6b9
JG		 1288 }
1289 }
1290 }
1291
4ce001ab
DA		 1292 if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) &&
1293 encoder) {
1294 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
1295 }
1296
fafcf94e
AD		 1297 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
1298 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
1299 * by other means, assume the DFP is connected and use that EDID. In most
1300 * cases the DVI port is actually a virtual KVM port connected to the service
1301 * processor.
1302 */
a09d431f 1303out:
fafcf94e
AD		 1304 if ((!rdev->is_atom_bios) &&
1305 (ret == connector_status_disconnected) &&
1306 rdev->mode_info.bios_hardcoded_edid_size) {
1307 radeon_connector->use_digital = true;
1308 ret = connector_status_connected;
1309 }
1310
771fe6b9
JG		 1311 /* updated in get modes as well since we need to know if it's analog or digital */
1312 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA		 1313
1314exit:
1315 pm_runtime_mark_last_busy(connector->dev->dev);
1316 pm_runtime_put_autosuspend(connector->dev->dev);
1317
771fe6b9
JG		 1318 return ret;
1319}
1320
1321/* okay need to be smart in here about which encoder to pick */
1109ca09 1322static struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector)
771fe6b9
JG		 1323{
1324 int enc_id = connector->encoder_ids[0];
1325 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
771fe6b9
JG		 1326 struct drm_encoder *encoder;
1327 int i;
1328 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1329 if (connector->encoder_ids[i] == 0)
1330 break;
1331
b957f457
RC		 1332 encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]);
1333 if (!encoder)
771fe6b9
JG		 1334 continue;
1335
4ce001ab 1336 if (radeon_connector->use_digital == true) {
771fe6b9
JG		 1337 if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)
1338 return encoder;
1339 } else {
1340 if (encoder->encoder_type == DRM_MODE_ENCODER_DAC ||
1341 encoder->encoder_type == DRM_MODE_ENCODER_TVDAC)
1342 return encoder;
1343 }
1344 }
1345
1346 /* see if we have a default encoder TODO */
1347
1348 /* then check use digitial */
1349 /* pick the first one */
b957f457
RC		 1350 if (enc_id)
1351 return drm_encoder_find(connector->dev, enc_id);
771fe6b9
JG		 1352 return NULL;
1353}
1354
d50ba256
DA		 1355static void radeon_dvi_force(struct drm_connector *connector)
1356{
1357 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1358 if (connector->force == DRM_FORCE_ON)
1359 radeon_connector->use_digital = false;
1360 if (connector->force == DRM_FORCE_ON_DIGITAL)
1361 radeon_connector->use_digital = true;
1362}
1363
a3fa6320
AD		 1364static int radeon_dvi_mode_valid(struct drm_connector *connector,
1365 struct drm_display_mode *mode)
1366{
1b24203e
AD		 1367 struct drm_device *dev = connector->dev;
1368 struct radeon_device *rdev = dev->dev_private;
a3fa6320
AD		 1369 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1370
1371 /* XXX check mode bandwidth */
1372
1b24203e
AD		 1373 /* clocks over 135 MHz have heat issues with DVI on RV100 */
1374 if (radeon_connector->use_digital &&
1375 (rdev->family == CHIP_RV100) &&
1376 (mode->clock > 135000))
1377 return MODE_CLOCK_HIGH;
1378
a3fa6320
AD		 1379 if (radeon_connector->use_digital && (mode->clock > 165000)) {
1380 if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) ||
1381 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) ||
1382 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B))
1383 return MODE_OK;
377bd8a9 1384 else if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
f2263fc7
AD		 1385 /* HDMI 1.3+ supports max clock of 340 Mhz */
1386 if (mode->clock > 340000)
e1e84017 1387 return MODE_CLOCK_HIGH;
f2263fc7
AD		 1388 else
1389 return MODE_OK;
1390 } else {
a3fa6320 1391 return MODE_CLOCK_HIGH;
f2263fc7 1392 }
a3fa6320 1393 }
b20f9bef
AD		 1394
1395 /* check against the max pixel clock */
1396 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
1397 return MODE_CLOCK_HIGH;
1398
a3fa6320
AD		 1399 return MODE_OK;
1400}
1401
1109ca09 1402static const struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = {
3e22920f 1403 .get_modes = radeon_vga_get_modes,
a3fa6320 1404 .mode_valid = radeon_dvi_mode_valid,
771fe6b9
JG		 1405 .best_encoder = radeon_dvi_encoder,
1406};
1407
1109ca09 1408static const struct drm_connector_funcs radeon_dvi_connector_funcs = {
771fe6b9
JG		 1409 .dpms = drm_helper_connector_dpms,
1410 .detect = radeon_dvi_detect,
1411 .fill_modes = drm_helper_probe_single_connector_modes,
1412 .set_property = radeon_connector_set_property,
1413 .destroy = radeon_connector_destroy,
d50ba256 1414 .force = radeon_dvi_force,
771fe6b9
JG		 1415};
1416
746c1aa4
DA		 1417static int radeon_dp_get_modes(struct drm_connector *connector)
1418{
1419 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
8b834852 1420 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1421 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
746c1aa4
DA		 1422 int ret;
1423
f89931f3
AD		 1424 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1425 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD		 1426 struct drm_display_mode *mode;
1427
2b69ffb9
AD		 1428 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
1429 if (!radeon_dig_connector->edp_on)
1430 atombios_set_edp_panel_power(connector,
1431 ATOM_TRANSMITTER_ACTION_POWER_ON);
72a5c970
AD		 1432 radeon_connector_get_edid(connector);
1433 ret = radeon_ddc_get_modes(connector);
2b69ffb9
AD		 1434 if (!radeon_dig_connector->edp_on)
1435 atombios_set_edp_panel_power(connector,
1436 ATOM_TRANSMITTER_ACTION_POWER_OFF);
1437 } else {
1438 /* need to setup ddc on the bridge */
1439 if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1440 ENCODER_OBJECT_ID_NONE) {
1441 if (encoder)
1442 radeon_atom_ext_encoder_setup_ddc(encoder);
1443 }
72a5c970
AD		 1444 radeon_connector_get_edid(connector);
1445 ret = radeon_ddc_get_modes(connector);
2b69ffb9 1446 }
d291767b
AD		 1447
1448 if (ret > 0) {
d291767b
AD		 1449 if (encoder) {
1450 radeon_fixup_lvds_native_mode(encoder, connector);
1451 /* add scaled modes */
1452 radeon_add_common_modes(encoder, connector);
1453 }
1454 return ret;
1455 }
1456
d291767b
AD		 1457 if (!encoder)
1458 return 0;
1459
1460 /* we have no EDID modes */
1461 mode = radeon_fp_native_mode(encoder);
1462 if (mode) {
1463 ret = 1;
1464 drm_mode_probed_add(connector, mode);
1465 /* add the width/height from vbios tables if available */
1466 connector->display_info.width_mm = mode->width_mm;
1467 connector->display_info.height_mm = mode->height_mm;
1468 /* add scaled modes */
1469 radeon_add_common_modes(encoder, connector);
1470 }
591a10e1
AD		 1471 } else {
1472 /* need to setup ddc on the bridge */
1d33e1fc
AD		 1473 if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1474 ENCODER_OBJECT_ID_NONE) {
591a10e1
AD		 1475 if (encoder)
1476 radeon_atom_ext_encoder_setup_ddc(encoder);
1477 }
72a5c970
AD		 1478 radeon_connector_get_edid(connector);
1479 ret = radeon_ddc_get_modes(connector);
da997620
AD		 1480
1481 radeon_get_native_mode(connector);
591a10e1 1482 }
8b834852 1483
746c1aa4
DA		 1484 return ret;
1485}
1486
1d33e1fc 1487u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector)
d7fa8bb3 1488{
d7fa8bb3
AD		 1489 struct drm_encoder *encoder;
1490 struct radeon_encoder *radeon_encoder;
1491 int i;
d7fa8bb3
AD		 1492
1493 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1494 if (connector->encoder_ids[i] == 0)
1495 break;
1496
b957f457
RC		 1497 encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]);
1498 if (!encoder)
d7fa8bb3
AD		 1499 continue;
1500
d7fa8bb3
AD		 1501 radeon_encoder = to_radeon_encoder(encoder);
1502
1503 switch (radeon_encoder->encoder_id) {
1504 case ENCODER_OBJECT_ID_TRAVIS:
1505 case ENCODER_OBJECT_ID_NUTMEG:
1d33e1fc 1506 return radeon_encoder->encoder_id;
d7fa8bb3
AD		 1507 default:
1508 break;
1509 }
1510 }
1511
1d33e1fc 1512 return ENCODER_OBJECT_ID_NONE;
d7fa8bb3
AD		 1513}
1514
1515bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector)
1516{
d7fa8bb3
AD		 1517 struct drm_encoder *encoder;
1518 struct radeon_encoder *radeon_encoder;
1519 int i;
1520 bool found = false;
1521
1522 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1523 if (connector->encoder_ids[i] == 0)
1524 break;
1525
b957f457
RC		 1526 encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]);
1527 if (!encoder)
d7fa8bb3
AD		 1528 continue;
1529
d7fa8bb3
AD		 1530 radeon_encoder = to_radeon_encoder(encoder);
1531 if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2)
1532 found = true;
1533 }
1534
1535 return found;
1536}
1537
1538bool radeon_connector_is_dp12_capable(struct drm_connector *connector)
1539{
1540 struct drm_device *dev = connector->dev;
1541 struct radeon_device *rdev = dev->dev_private;
1542
1543 if (ASIC_IS_DCE5(rdev) &&
af5d3653 1544 (rdev->clock.default_dispclk >= 53900) &&
d7fa8bb3
AD		 1545 radeon_connector_encoder_is_hbr2(connector)) {
1546 return true;
1547 }
1548
1549 return false;
1550}
1551
7b334fcb 1552static enum drm_connector_status
930a9e28 1553radeon_dp_detect(struct drm_connector *connector, bool force)
746c1aa4 1554{
f8d0edde
AD		 1555 struct drm_device *dev = connector->dev;
1556 struct radeon_device *rdev = dev->dev_private;
746c1aa4 1557 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
746c1aa4 1558 enum drm_connector_status ret = connector_status_disconnected;
4143e919 1559 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1560 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
10ebc0bc 1561 int r;
746c1aa4 1562
10ebc0bc
DA		 1563 r = pm_runtime_get_sync(connector->dev->dev);
1564 if (r < 0)
1565 return connector_status_disconnected;
1566
1567 if (!force && radeon_check_hpd_status_unchanged(connector)) {
1568 ret = connector->status;
1569 goto out;
1570 }
11fe1266 1571
72a5c970 1572 radeon_connector_free_edid(connector);
746c1aa4 1573
f89931f3
AD		 1574 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1575 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD		 1576 if (encoder) {
1577 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1578 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1579
1580 /* check if panel is valid */
1581 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
1582 ret = connector_status_connected;
1583 }
6f50eae7
AD		 1584 /* eDP is always DP */
1585 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
8b834852
AD		 1586 if (!radeon_dig_connector->edp_on)
1587 atombios_set_edp_panel_power(connector,
1588 ATOM_TRANSMITTER_ACTION_POWER_ON);
6f50eae7 1589 if (radeon_dp_getdpcd(radeon_connector))
9fa05c98 1590 ret = connector_status_connected;
8b834852
AD		 1591 if (!radeon_dig_connector->edp_on)
1592 atombios_set_edp_panel_power(connector,
1593 ATOM_TRANSMITTER_ACTION_POWER_OFF);
1d33e1fc
AD		 1594 } else if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1595 ENCODER_OBJECT_ID_NONE) {
b06947b5
AD		 1596 /* DP bridges are always DP */
1597 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
1598 /* get the DPCD from the bridge */
1599 radeon_dp_getdpcd(radeon_connector);
1600
6777a4f6
AD		 1601 if (encoder) {
1602 /* setup ddc on the bridge */
1603 radeon_atom_ext_encoder_setup_ddc(encoder);
0a9069d3
NOS		 1604 /* bridge chips are always aux */
1605 if (radeon_ddc_probe(radeon_connector, true)) /* try DDC */
b06947b5 1606 ret = connector_status_connected;
6777a4f6
AD		 1607 else if (radeon_connector->dac_load_detect) { /* try load detection */
1608 struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private;
b06947b5
AD		 1609 ret = encoder_funcs->detect(encoder, connector);
1610 }
591a10e1 1611 }
b06947b5 1612 } else {
6f50eae7 1613 radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
f8d0edde
AD		 1614 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
1615 ret = connector_status_connected;
1616 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
1617 radeon_dp_getdpcd(radeon_connector);
6f50eae7 1618 } else {
f8d0edde
AD		 1619 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
1620 if (radeon_dp_getdpcd(radeon_connector))
1621 ret = connector_status_connected;
1622 } else {
d592fca9 1623 /* try non-aux ddc (DP to DVI/HDMI/etc. adapter) */
0a9069d3 1624 if (radeon_ddc_probe(radeon_connector, false))
f8d0edde
AD		 1625 ret = connector_status_connected;
1626 }
4143e919 1627 }
746c1aa4 1628 }
4143e919 1629
30f44372 1630 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA		 1631out:
1632 pm_runtime_mark_last_busy(connector->dev->dev);
1633 pm_runtime_put_autosuspend(connector->dev->dev);
1634
746c1aa4
DA		 1635 return ret;
1636}
1637
5801ead6
AD		 1638static int radeon_dp_mode_valid(struct drm_connector *connector,
1639 struct drm_display_mode *mode)
1640{
6536a3a6
AD		 1641 struct drm_device *dev = connector->dev;
1642 struct radeon_device *rdev = dev->dev_private;
5801ead6
AD		 1643 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1644 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
1645
1646 /* XXX check mode bandwidth */
1647
f89931f3
AD		 1648 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1649 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD		 1650 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
1651
1652 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
1653 return MODE_PANEL;
1654
1655 if (encoder) {
1656 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1657 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1658
f89931f3 1659 /* AVIVO hardware supports downscaling modes larger than the panel
d291767b
AD		 1660 * to the panel size, but I'm not sure this is desirable.
1661 */
1662 if ((mode->hdisplay > native_mode->hdisplay) ||
1663 (mode->vdisplay > native_mode->vdisplay))
1664 return MODE_PANEL;
1665
1666 /* if scaling is disabled, block non-native modes */
1667 if (radeon_encoder->rmx_type == RMX_OFF) {
1668 if ((mode->hdisplay != native_mode->hdisplay) ||
1669 (mode->vdisplay != native_mode->vdisplay))
1670 return MODE_PANEL;
1671 }
1672 }
d291767b
AD		 1673 } else {
1674 if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
6536a3a6 1675 (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) {
d291767b 1676 return radeon_dp_mode_valid_helper(connector, mode);
6536a3a6 1677 } else {
377bd8a9 1678 if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
6536a3a6
AD		 1679 /* HDMI 1.3+ supports max clock of 340 Mhz */
1680 if (mode->clock > 340000)
1681 return MODE_CLOCK_HIGH;
1682 } else {
1683 if (mode->clock > 165000)
1684 return MODE_CLOCK_HIGH;
1685 }
1686 }
d291767b 1687 }
6536a3a6
AD		 1688
1689 return MODE_OK;
5801ead6
AD		 1690}
1691
1109ca09 1692static const struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = {
746c1aa4 1693 .get_modes = radeon_dp_get_modes,
5801ead6 1694 .mode_valid = radeon_dp_mode_valid,
746c1aa4
DA		 1695 .best_encoder = radeon_dvi_encoder,
1696};
1697
1109ca09 1698static const struct drm_connector_funcs radeon_dp_connector_funcs = {
746c1aa4
DA		 1699 .dpms = drm_helper_connector_dpms,
1700 .detect = radeon_dp_detect,
1701 .fill_modes = drm_helper_probe_single_connector_modes,
1702 .set_property = radeon_connector_set_property,
379dfc25 1703 .destroy = radeon_connector_destroy,
746c1aa4
DA		 1704 .force = radeon_dvi_force,
1705};
1706
855f5f1d
AD		 1707static const struct drm_connector_funcs radeon_edp_connector_funcs = {
1708 .dpms = drm_helper_connector_dpms,
1709 .detect = radeon_dp_detect,
1710 .fill_modes = drm_helper_probe_single_connector_modes,
1711 .set_property = radeon_lvds_set_property,
379dfc25 1712 .destroy = radeon_connector_destroy,
855f5f1d
AD		 1713 .force = radeon_dvi_force,
1714};
1715
1716static const struct drm_connector_funcs radeon_lvds_bridge_connector_funcs = {
1717 .dpms = drm_helper_connector_dpms,
1718 .detect = radeon_dp_detect,
1719 .fill_modes = drm_helper_probe_single_connector_modes,
1720 .set_property = radeon_lvds_set_property,
379dfc25 1721 .destroy = radeon_connector_destroy,
855f5f1d
AD		 1722 .force = radeon_dvi_force,
1723};
1724
771fe6b9
JG		 1725void
1726radeon_add_atom_connector(struct drm_device *dev,
1727 uint32_t connector_id,
1728 uint32_t supported_device,
1729 int connector_type,
1730 struct radeon_i2c_bus_rec *i2c_bus,
b75fad06 1731 uint32_t igp_lane_info,
eed45b30 1732 uint16_t connector_object_id,
26b5bc98
AD		 1733 struct radeon_hpd *hpd,
1734 struct radeon_router *router)
771fe6b9 1735{
445282db 1736 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG		 1737 struct drm_connector *connector;
1738 struct radeon_connector *radeon_connector;
1739 struct radeon_connector_atom_dig *radeon_dig_connector;
eac4dff6
AD		 1740 struct drm_encoder *encoder;
1741 struct radeon_encoder *radeon_encoder;
771fe6b9 1742 uint32_t subpixel_order = SubPixelNone;
0294cf4f 1743 bool shared_ddc = false;
eac4dff6 1744 bool is_dp_bridge = false;
496263bf 1745 bool has_aux = false;
771fe6b9 1746
4ce001ab 1747 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG		 1748 return;
1749
cf4c12f9
AD		 1750 /* if the user selected tv=0 don't try and add the connector */
1751 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
1752 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
1753 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
1754 (radeon_tv == 0))
1755 return;
1756
771fe6b9
JG		 1757 /* see if we already added it */
1758 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1759 radeon_connector = to_radeon_connector(connector);
1760 if (radeon_connector->connector_id == connector_id) {
1761 radeon_connector->devices |= supported_device;
1762 return;
1763 }
0294cf4f 1764 if (radeon_connector->ddc_bus && i2c_bus->valid) {
d3932d6c 1765 if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) {
0294cf4f
AD		 1766 radeon_connector->shared_ddc = true;
1767 shared_ddc = true;
1768 }
fb939dfc 1769 if (radeon_connector->router_bus && router->ddc_valid &&
26b5bc98
AD		 1770 (radeon_connector->router.router_id == router->router_id)) {
1771 radeon_connector->shared_ddc = false;
1772 shared_ddc = false;
1773 }
0294cf4f 1774 }
771fe6b9
JG		 1775 }
1776
eac4dff6
AD		 1777 /* check if it's a dp bridge */
1778 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
1779 radeon_encoder = to_radeon_encoder(encoder);
1780 if (radeon_encoder->devices & supported_device) {
1781 switch (radeon_encoder->encoder_id) {
1782 case ENCODER_OBJECT_ID_TRAVIS:
1783 case ENCODER_OBJECT_ID_NUTMEG:
1784 is_dp_bridge = true;
1785 break;
1786 default:
1787 break;
1788 }
1789 }
1790 }
1791
771fe6b9
JG		 1792 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
1793 if (!radeon_connector)
1794 return;
1795
1796 connector = &radeon_connector->base;
1797
1798 radeon_connector->connector_id = connector_id;
1799 radeon_connector->devices = supported_device;
0294cf4f 1800 radeon_connector->shared_ddc = shared_ddc;
b75fad06 1801 radeon_connector->connector_object_id = connector_object_id;
eed45b30 1802 radeon_connector->hpd = *hpd;
bc1c4dc3 1803
26b5bc98 1804 radeon_connector->router = *router;
fb939dfc 1805 if (router->ddc_valid || router->cd_valid) {
26b5bc98
AD		 1806 radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info);
1807 if (!radeon_connector->router_bus)
a70882aa 1808 DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n");
26b5bc98 1809 }
eac4dff6
AD		 1810
1811 if (is_dp_bridge) {
771fe6b9
JG		 1812 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1813 if (!radeon_dig_connector)
1814 goto failed;
771fe6b9
JG		 1815 radeon_dig_connector->igp_lane_info = igp_lane_info;
1816 radeon_connector->con_priv = radeon_dig_connector;
771fe6b9 1817 if (i2c_bus->valid) {
379dfc25
AD		 1818 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1819 if (radeon_connector->ddc_bus)
496263bf
AD		 1820 has_aux = true;
1821 else
eac4dff6 1822 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1823 }
eac4dff6
AD		 1824 switch (connector_type) {
1825 case DRM_MODE_CONNECTOR_VGA:
1826 case DRM_MODE_CONNECTOR_DVIA:
1827 default:
855f5f1d
AD		 1828 drm_connector_init(dev, &radeon_connector->base,
1829 &radeon_dp_connector_funcs, connector_type);
1830 drm_connector_helper_add(&radeon_connector->base,
1831 &radeon_dp_connector_helper_funcs);
eac4dff6
AD		 1832 connector->interlace_allowed = true;
1833 connector->doublescan_allowed = true;
d629a3ce 1834 radeon_connector->dac_load_detect = true;
e35755fa 1835 drm_object_attach_property(&radeon_connector->base.base,
d629a3ce
AD		 1836 rdev->mode_info.load_detect_property,
1837 1);
da997620
AD		 1838 drm_object_attach_property(&radeon_connector->base.base,
1839 dev->mode_config.scaling_mode_property,
1840 DRM_MODE_SCALE_NONE);
eac4dff6
AD		 1841 break;
1842 case DRM_MODE_CONNECTOR_DVII:
1843 case DRM_MODE_CONNECTOR_DVID:
1844 case DRM_MODE_CONNECTOR_HDMIA:
1845 case DRM_MODE_CONNECTOR_HDMIB:
1846 case DRM_MODE_CONNECTOR_DisplayPort:
855f5f1d
AD		 1847 drm_connector_init(dev, &radeon_connector->base,
1848 &radeon_dp_connector_funcs, connector_type);
1849 drm_connector_helper_add(&radeon_connector->base,
1850 &radeon_dp_connector_helper_funcs);
e35755fa 1851 drm_object_attach_property(&radeon_connector->base.base,
430f70d5 1852 rdev->mode_info.underscan_property,
56bec7c0 1853 UNDERSCAN_OFF);
e35755fa 1854 drm_object_attach_property(&radeon_connector->base.base,
5bccf5e3
MG		 1855 rdev->mode_info.underscan_hborder_property,
1856 0);
e35755fa 1857 drm_object_attach_property(&radeon_connector->base.base,
5bccf5e3
MG		 1858 rdev->mode_info.underscan_vborder_property,
1859 0);
91915260 1860
da997620
AD		 1861 drm_object_attach_property(&radeon_connector->base.base,
1862 dev->mode_config.scaling_mode_property,
1863 DRM_MODE_SCALE_NONE);
1864
6214bb74
AD		 1865 drm_object_attach_property(&radeon_connector->base.base,
1866 rdev->mode_info.dither_property,
1867 RADEON_FMT_DITHER_DISABLE);
91915260 1868
108dc8e8
AD		 1869 if (radeon_audio != 0)
1870 drm_object_attach_property(&radeon_connector->base.base,
1871 rdev->mode_info.audio_property,
e31fadd3 1872 RADEON_AUDIO_AUTO);
91915260 1873
eac4dff6
AD		 1874 subpixel_order = SubPixelHorizontalRGB;
1875 connector->interlace_allowed = true;
1876 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
1877 connector->doublescan_allowed = true;
1878 else
1879 connector->doublescan_allowed = false;
d629a3ce
AD		 1880 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
1881 radeon_connector->dac_load_detect = true;
e35755fa 1882 drm_object_attach_property(&radeon_connector->base.base,
d629a3ce
AD		 1883 rdev->mode_info.load_detect_property,
1884 1);
1885 }
eac4dff6
AD		 1886 break;
1887 case DRM_MODE_CONNECTOR_LVDS:
1888 case DRM_MODE_CONNECTOR_eDP:
855f5f1d
AD		 1889 drm_connector_init(dev, &radeon_connector->base,
1890 &radeon_lvds_bridge_connector_funcs, connector_type);
1891 drm_connector_helper_add(&radeon_connector->base,
1892 &radeon_dp_connector_helper_funcs);
e35755fa 1893 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1894 dev->mode_config.scaling_mode_property,
1895 DRM_MODE_SCALE_FULLSCREEN);
1896 subpixel_order = SubPixelHorizontalRGB;
1897 connector->interlace_allowed = false;
1898 connector->doublescan_allowed = false;
1899 break;
5bccf5e3 1900 }
eac4dff6
AD		 1901 } else {
1902 switch (connector_type) {
1903 case DRM_MODE_CONNECTOR_VGA:
1904 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
1905 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
1906 if (i2c_bus->valid) {
1907 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1908 if (!radeon_connector->ddc_bus)
1909 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1910 }
390d0bbe 1911 radeon_connector->dac_load_detect = true;
e35755fa 1912 drm_object_attach_property(&radeon_connector->base.base,
390d0bbe
AD		 1913 rdev->mode_info.load_detect_property,
1914 1);
da997620
AD		 1915 if (ASIC_IS_AVIVO(rdev))
1916 drm_object_attach_property(&radeon_connector->base.base,
1917 dev->mode_config.scaling_mode_property,
1918 DRM_MODE_SCALE_NONE);
eac4dff6
AD		 1919 /* no HPD on analog connectors */
1920 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1921 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1922 connector->interlace_allowed = true;
c49948f4 1923 connector->doublescan_allowed = true;
eac4dff6
AD		 1924 break;
1925 case DRM_MODE_CONNECTOR_DVIA:
1926 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
1927 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
1928 if (i2c_bus->valid) {
1929 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1930 if (!radeon_connector->ddc_bus)
1931 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1932 }
1933 radeon_connector->dac_load_detect = true;
e35755fa 1934 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1935 rdev->mode_info.load_detect_property,
1936 1);
da997620
AD		 1937 if (ASIC_IS_AVIVO(rdev))
1938 drm_object_attach_property(&radeon_connector->base.base,
1939 dev->mode_config.scaling_mode_property,
1940 DRM_MODE_SCALE_NONE);
eac4dff6
AD		 1941 /* no HPD on analog connectors */
1942 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1943 connector->interlace_allowed = true;
1944 connector->doublescan_allowed = true;
1945 break;
1946 case DRM_MODE_CONNECTOR_DVII:
1947 case DRM_MODE_CONNECTOR_DVID:
1948 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1949 if (!radeon_dig_connector)
1950 goto failed;
1951 radeon_dig_connector->igp_lane_info = igp_lane_info;
1952 radeon_connector->con_priv = radeon_dig_connector;
1953 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
1954 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
1955 if (i2c_bus->valid) {
1956 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1957 if (!radeon_connector->ddc_bus)
1958 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1959 }
1960 subpixel_order = SubPixelHorizontalRGB;
e35755fa 1961 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1962 rdev->mode_info.coherent_mode_property,
1963 1);
1964 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 1965 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1966 rdev->mode_info.underscan_property,
1967 UNDERSCAN_OFF);
e35755fa 1968 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1969 rdev->mode_info.underscan_hborder_property,
1970 0);
e35755fa 1971 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1972 rdev->mode_info.underscan_vborder_property,
1973 0);
da997620
AD		 1974 drm_object_attach_property(&radeon_connector->base.base,
1975 rdev->mode_info.dither_property,
1976 RADEON_FMT_DITHER_DISABLE);
1977 drm_object_attach_property(&radeon_connector->base.base,
1978 dev->mode_config.scaling_mode_property,
1979 DRM_MODE_SCALE_NONE);
eac4dff6 1980 }
108dc8e8 1981 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 1982 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 1983 rdev->mode_info.audio_property,
e31fadd3 1984 RADEON_AUDIO_AUTO);
8666c076 1985 }
eac4dff6
AD		 1986 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
1987 radeon_connector->dac_load_detect = true;
e35755fa 1988 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1989 rdev->mode_info.load_detect_property,
1990 1);
1991 }
1992 connector->interlace_allowed = true;
1993 if (connector_type == DRM_MODE_CONNECTOR_DVII)
1994 connector->doublescan_allowed = true;
1995 else
1996 connector->doublescan_allowed = false;
1997 break;
1998 case DRM_MODE_CONNECTOR_HDMIA:
1999 case DRM_MODE_CONNECTOR_HDMIB:
2000 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2001 if (!radeon_dig_connector)
2002 goto failed;
2003 radeon_dig_connector->igp_lane_info = igp_lane_info;
2004 radeon_connector->con_priv = radeon_dig_connector;
2005 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
2006 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
2007 if (i2c_bus->valid) {
2008 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2009 if (!radeon_connector->ddc_bus)
2010 DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2011 }
e35755fa 2012 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2013 rdev->mode_info.coherent_mode_property,
2014 1);
2015 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 2016 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2017 rdev->mode_info.underscan_property,
2018 UNDERSCAN_OFF);
e35755fa 2019 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2020 rdev->mode_info.underscan_hborder_property,
2021 0);
e35755fa 2022 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2023 rdev->mode_info.underscan_vborder_property,
2024 0);
da997620
AD		 2025 drm_object_attach_property(&radeon_connector->base.base,
2026 rdev->mode_info.dither_property,
2027 RADEON_FMT_DITHER_DISABLE);
2028 drm_object_attach_property(&radeon_connector->base.base,
2029 dev->mode_config.scaling_mode_property,
2030 DRM_MODE_SCALE_NONE);
eac4dff6 2031 }
108dc8e8 2032 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 2033 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 2034 rdev->mode_info.audio_property,
e31fadd3 2035 RADEON_AUDIO_AUTO);
8666c076 2036 }
eac4dff6
AD		 2037 subpixel_order = SubPixelHorizontalRGB;
2038 connector->interlace_allowed = true;
2039 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
2040 connector->doublescan_allowed = true;
2041 else
2042 connector->doublescan_allowed = false;
2043 break;
2044 case DRM_MODE_CONNECTOR_DisplayPort:
2045 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2046 if (!radeon_dig_connector)
2047 goto failed;
2048 radeon_dig_connector->igp_lane_info = igp_lane_info;
2049 radeon_connector->con_priv = radeon_dig_connector;
2050 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
2051 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
2052 if (i2c_bus->valid) {
eac4dff6 2053 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
496263bf
AD		 2054 if (radeon_connector->ddc_bus)
2055 has_aux = true;
2056 else
eac4dff6
AD		 2057 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2058 }
2059 subpixel_order = SubPixelHorizontalRGB;
e35755fa 2060 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2061 rdev->mode_info.coherent_mode_property,
2062 1);
2063 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 2064 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2065 rdev->mode_info.underscan_property,
2066 UNDERSCAN_OFF);
e35755fa 2067 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2068 rdev->mode_info.underscan_hborder_property,
2069 0);
e35755fa 2070 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2071 rdev->mode_info.underscan_vborder_property,
2072 0);
da997620
AD		 2073 drm_object_attach_property(&radeon_connector->base.base,
2074 rdev->mode_info.dither_property,
2075 RADEON_FMT_DITHER_DISABLE);
2076 drm_object_attach_property(&radeon_connector->base.base,
2077 dev->mode_config.scaling_mode_property,
2078 DRM_MODE_SCALE_NONE);
eac4dff6 2079 }
108dc8e8 2080 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 2081 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 2082 rdev->mode_info.audio_property,
e31fadd3 2083 RADEON_AUDIO_AUTO);
8666c076 2084 }
eac4dff6
AD		 2085 connector->interlace_allowed = true;
2086 /* in theory with a DP to VGA converter... */
c49948f4 2087 connector->doublescan_allowed = false;
eac4dff6
AD		 2088 break;
2089 case DRM_MODE_CONNECTOR_eDP:
2090 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2091 if (!radeon_dig_connector)
2092 goto failed;
2093 radeon_dig_connector->igp_lane_info = igp_lane_info;
2094 radeon_connector->con_priv = radeon_dig_connector;
855f5f1d 2095 drm_connector_init(dev, &radeon_connector->base, &radeon_edp_connector_funcs, connector_type);
eac4dff6
AD		 2096 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
2097 if (i2c_bus->valid) {
379dfc25
AD		 2098 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2099 if (radeon_connector->ddc_bus)
496263bf
AD		 2100 has_aux = true;
2101 else
eac4dff6
AD		 2102 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2103 }
e35755fa 2104 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2105 dev->mode_config.scaling_mode_property,
2106 DRM_MODE_SCALE_FULLSCREEN);
2107 subpixel_order = SubPixelHorizontalRGB;
2108 connector->interlace_allowed = false;
2109 connector->doublescan_allowed = false;
2110 break;
2111 case DRM_MODE_CONNECTOR_SVIDEO:
2112 case DRM_MODE_CONNECTOR_Composite:
2113 case DRM_MODE_CONNECTOR_9PinDIN:
2114 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
2115 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
2116 radeon_connector->dac_load_detect = true;
e35755fa 2117 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2118 rdev->mode_info.load_detect_property,
2119 1);
e35755fa 2120 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2121 rdev->mode_info.tv_std_property,
2122 radeon_atombios_get_tv_info(rdev));
2123 /* no HPD on analog connectors */
2124 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
2125 connector->interlace_allowed = false;
2126 connector->doublescan_allowed = false;
2127 break;
2128 case DRM_MODE_CONNECTOR_LVDS:
2129 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2130 if (!radeon_dig_connector)
2131 goto failed;
2132 radeon_dig_connector->igp_lane_info = igp_lane_info;
2133 radeon_connector->con_priv = radeon_dig_connector;
2134 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
2135 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
2136 if (i2c_bus->valid) {
2137 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2138 if (!radeon_connector->ddc_bus)
2139 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2140 }
e35755fa 2141 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2142 dev->mode_config.scaling_mode_property,
2143 DRM_MODE_SCALE_FULLSCREEN);
2144 subpixel_order = SubPixelHorizontalRGB;
2145 connector->interlace_allowed = false;
2146 connector->doublescan_allowed = false;
2147 break;
771fe6b9 2148 }
771fe6b9
JG		 2149 }
2150
2581afcc 2151 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA		 2152 if (i2c_bus->valid)
2153 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2154 } else
2155 connector->polled = DRM_CONNECTOR_POLL_HPD;
2156
771fe6b9 2157 connector->display_info.subpixel_order = subpixel_order;
34ea3d38 2158 drm_connector_register(connector);
496263bf
AD		 2159
2160 if (has_aux)
2161 radeon_dp_aux_init(radeon_connector);
2162
771fe6b9
JG		 2163 return;
2164
2165failed:
771fe6b9
JG		 2166 drm_connector_cleanup(connector);
2167 kfree(connector);
2168}
2169
2170void
2171radeon_add_legacy_connector(struct drm_device *dev,
2172 uint32_t connector_id,
2173 uint32_t supported_device,
2174 int connector_type,
b75fad06 2175 struct radeon_i2c_bus_rec *i2c_bus,
eed45b30
AD		 2176 uint16_t connector_object_id,
2177 struct radeon_hpd *hpd)
771fe6b9 2178{
445282db 2179 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG		 2180 struct drm_connector *connector;
2181 struct radeon_connector *radeon_connector;
2182 uint32_t subpixel_order = SubPixelNone;
2183
4ce001ab 2184 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG		 2185 return;
2186
cf4c12f9
AD		 2187 /* if the user selected tv=0 don't try and add the connector */
2188 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
2189 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
2190 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
2191 (radeon_tv == 0))
2192 return;
2193
771fe6b9
JG		 2194 /* see if we already added it */
2195 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
2196 radeon_connector = to_radeon_connector(connector);
2197 if (radeon_connector->connector_id == connector_id) {
2198 radeon_connector->devices |= supported_device;
2199 return;
2200 }
2201 }
2202
2203 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
2204 if (!radeon_connector)
2205 return;
2206
2207 connector = &radeon_connector->base;
2208
2209 radeon_connector->connector_id = connector_id;
2210 radeon_connector->devices = supported_device;
b75fad06 2211 radeon_connector->connector_object_id = connector_object_id;
eed45b30 2212 radeon_connector->hpd = *hpd;
bc1c4dc3 2213
771fe6b9
JG		 2214 switch (connector_type) {
2215 case DRM_MODE_CONNECTOR_VGA:
2216 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 2217 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 2218 if (i2c_bus->valid) {
f376b94f 2219 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2220 if (!radeon_connector->ddc_bus)
a70882aa 2221 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2222 }
35e4b7af 2223 radeon_connector->dac_load_detect = true;
e35755fa 2224 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2225 rdev->mode_info.load_detect_property,
2226 1);
2581afcc
AD		 2227 /* no HPD on analog connectors */
2228 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
eb1f8e4f 2229 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
c49948f4
AD		 2230 connector->interlace_allowed = true;
2231 connector->doublescan_allowed = true;
771fe6b9
JG		 2232 break;
2233 case DRM_MODE_CONNECTOR_DVIA:
2234 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 2235 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 2236 if (i2c_bus->valid) {
f376b94f 2237 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2238 if (!radeon_connector->ddc_bus)
a70882aa 2239 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2240 }
35e4b7af 2241 radeon_connector->dac_load_detect = true;
e35755fa 2242 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2243 rdev->mode_info.load_detect_property,
2244 1);
2581afcc
AD		 2245 /* no HPD on analog connectors */
2246 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD		 2247 connector->interlace_allowed = true;
2248 connector->doublescan_allowed = true;
771fe6b9
JG		 2249 break;
2250 case DRM_MODE_CONNECTOR_DVII:
2251 case DRM_MODE_CONNECTOR_DVID:
2252 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
0b4c0f3f 2253 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
771fe6b9 2254 if (i2c_bus->valid) {
f376b94f 2255 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2256 if (!radeon_connector->ddc_bus)
a70882aa 2257 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
68b3adb4
AD		 2258 }
2259 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
35e4b7af 2260 radeon_connector->dac_load_detect = true;
e35755fa 2261 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2262 rdev->mode_info.load_detect_property,
2263 1);
771fe6b9
JG		 2264 }
2265 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD		 2266 connector->interlace_allowed = true;
2267 if (connector_type == DRM_MODE_CONNECTOR_DVII)
2268 connector->doublescan_allowed = true;
2269 else
2270 connector->doublescan_allowed = false;
771fe6b9
JG		 2271 break;
2272 case DRM_MODE_CONNECTOR_SVIDEO:
2273 case DRM_MODE_CONNECTOR_Composite:
2274 case DRM_MODE_CONNECTOR_9PinDIN:
cf4c12f9
AD		 2275 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
2276 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
2277 radeon_connector->dac_load_detect = true;
2278 /* RS400,RC410,RS480 chipset seems to report a lot
2279 * of false positive on load detect, we haven't yet
2280 * found a way to make load detect reliable on those
2281 * chipset, thus just disable it for TV.
2282 */
2283 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480)
2284 radeon_connector->dac_load_detect = false;
e35755fa 2285 drm_object_attach_property(&radeon_connector->base.base,
cf4c12f9
AD		 2286 rdev->mode_info.load_detect_property,
2287 radeon_connector->dac_load_detect);
e35755fa 2288 drm_object_attach_property(&radeon_connector->base.base,
cf4c12f9
AD		 2289 rdev->mode_info.tv_std_property,
2290 radeon_combios_get_tv_info(rdev));
2291 /* no HPD on analog connectors */
2292 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD		 2293 connector->interlace_allowed = false;
2294 connector->doublescan_allowed = false;
771fe6b9
JG		 2295 break;
2296 case DRM_MODE_CONNECTOR_LVDS:
2297 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
0b4c0f3f 2298 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
771fe6b9 2299 if (i2c_bus->valid) {
f376b94f 2300 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2301 if (!radeon_connector->ddc_bus)
a70882aa 2302 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2303 }
e35755fa 2304 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2305 dev->mode_config.scaling_mode_property,
2306 DRM_MODE_SCALE_FULLSCREEN);
771fe6b9 2307 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD		 2308 connector->interlace_allowed = false;
2309 connector->doublescan_allowed = false;
771fe6b9
JG		 2310 break;
2311 }
2312
2581afcc 2313 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA		 2314 if (i2c_bus->valid)
2315 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2316 } else
2317 connector->polled = DRM_CONNECTOR_POLL_HPD;
771fe6b9 2318 connector->display_info.subpixel_order = subpixel_order;
34ea3d38 2319 drm_connector_register(connector);
771fe6b9 2320}
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