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Merge tag 'pm+acpi-3.15-rc1-3' of git://git.kernel.org/pub/scm/linux/kernel/git/rafae...
[mirror_ubuntu-hirsute-kernel.git] / drivers / gpu / drm / radeon / radeon_connectors.c
CommitLineData
771fe6b9
JG		 1/*
2 * Copyright 2007-8 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors: Dave Airlie
24 * Alex Deucher
25 */
760285e7
DH		 26#include <drm/drmP.h>
27#include <drm/drm_edid.h>
28#include <drm/drm_crtc_helper.h>
29#include <drm/drm_fb_helper.h>
30#include <drm/radeon_drm.h>
771fe6b9 31#include "radeon.h"
923f6848 32#include "atom.h"
771fe6b9 33
10ebc0bc
DA		 34#include <linux/pm_runtime.h>
35
d4877cf2
AD		 36void radeon_connector_hotplug(struct drm_connector *connector)
37{
38 struct drm_device *dev = connector->dev;
39 struct radeon_device *rdev = dev->dev_private;
40 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
41
cbac9543
AD		 42 /* bail if the connector does not have hpd pin, e.g.,
43 * VGA, TV, etc.
44 */
45 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE)
46 return;
47
1e85e1d0 48 radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
d4877cf2 49
73104b5c
AD		 50 /* if the connector is already off, don't turn it back on */
51 if (connector->dpms != DRM_MODE_DPMS_ON)
52 return;
53
d5811e87
AD		 54 /* just deal with DP (not eDP) here. */
55 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
266dcba5
JG		 56 struct radeon_connector_atom_dig *dig_connector =
57 radeon_connector->con_priv;
7c3ed0fd 58
266dcba5
JG		 59 /* if existing sink type was not DP no need to retrain */
60 if (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT)
61 return;
62
63 /* first get sink type as it may be reset after (un)plug */
64 dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
65 /* don't do anything if sink is not display port, i.e.,
66 * passive dp->(dvi|hdmi) adaptor
67 */
68 if (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
69 int saved_dpms = connector->dpms;
70 /* Only turn off the display if it's physically disconnected */
ca2ccde5 71 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
266dcba5 72 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
ca2ccde5
JG		 73 } else if (radeon_dp_needs_link_train(radeon_connector)) {
74 /* set it to OFF so that drm_helper_connector_dpms()
75 * won't return immediately since the current state
76 * is ON at this point.
77 */
78 connector->dpms = DRM_MODE_DPMS_OFF;
266dcba5 79 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
ca2ccde5 80 }
266dcba5
JG		 81 connector->dpms = saved_dpms;
82 }
d4877cf2 83 }
d4877cf2
AD		 84}
85
445282db
DA		 86static void radeon_property_change_mode(struct drm_encoder *encoder)
87{
88 struct drm_crtc *crtc = encoder->crtc;
89
90 if (crtc && crtc->enabled) {
91 drm_crtc_helper_set_mode(crtc, &crtc->mode,
f4510a27 92 crtc->x, crtc->y, crtc->primary->fb);
445282db
DA		 93 }
94}
eccea792
AD		 95
96int radeon_get_monitor_bpc(struct drm_connector *connector)
97{
98 struct drm_device *dev = connector->dev;
99 struct radeon_device *rdev = dev->dev_private;
100 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
101 struct radeon_connector_atom_dig *dig_connector;
102 int bpc = 8;
103
104 switch (connector->connector_type) {
105 case DRM_MODE_CONNECTOR_DVII:
106 case DRM_MODE_CONNECTOR_HDMIB:
107 if (radeon_connector->use_digital) {
108 if (drm_detect_hdmi_monitor(radeon_connector->edid)) {
109 if (connector->display_info.bpc)
110 bpc = connector->display_info.bpc;
111 }
112 }
113 break;
114 case DRM_MODE_CONNECTOR_DVID:
115 case DRM_MODE_CONNECTOR_HDMIA:
116 if (drm_detect_hdmi_monitor(radeon_connector->edid)) {
117 if (connector->display_info.bpc)
118 bpc = connector->display_info.bpc;
119 }
120 break;
121 case DRM_MODE_CONNECTOR_DisplayPort:
122 dig_connector = radeon_connector->con_priv;
123 if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
124 (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) ||
125 drm_detect_hdmi_monitor(radeon_connector->edid)) {
126 if (connector->display_info.bpc)
127 bpc = connector->display_info.bpc;
128 }
129 break;
130 case DRM_MODE_CONNECTOR_eDP:
131 case DRM_MODE_CONNECTOR_LVDS:
132 if (connector->display_info.bpc)
133 bpc = connector->display_info.bpc;
134 else if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) {
135 struct drm_connector_helper_funcs *connector_funcs =
136 connector->helper_private;
137 struct drm_encoder *encoder = connector_funcs->best_encoder(connector);
138 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
139 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
140
141 if (dig->lcd_misc & ATOM_PANEL_MISC_V13_6BIT_PER_COLOR)
142 bpc = 6;
143 else if (dig->lcd_misc & ATOM_PANEL_MISC_V13_8BIT_PER_COLOR)
144 bpc = 8;
145 }
146 break;
147 }
148 return bpc;
149}
150
771fe6b9
JG		 151static void
152radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status)
153{
154 struct drm_device *dev = connector->dev;
155 struct radeon_device *rdev = dev->dev_private;
156 struct drm_encoder *best_encoder = NULL;
157 struct drm_encoder *encoder = NULL;
158 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
159 struct drm_mode_object *obj;
160 bool connected;
161 int i;
162
163 best_encoder = connector_funcs->best_encoder(connector);
164
165 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
166 if (connector->encoder_ids[i] == 0)
167 break;
168
169 obj = drm_mode_object_find(connector->dev,
170 connector->encoder_ids[i],
171 DRM_MODE_OBJECT_ENCODER);
172 if (!obj)
173 continue;
174
175 encoder = obj_to_encoder(obj);
176
177 if ((encoder == best_encoder) && (status == connector_status_connected))
178 connected = true;
179 else
180 connected = false;
181
182 if (rdev->is_atom_bios)
183 radeon_atombios_connected_scratch_regs(connector, encoder, connected);
184 else
185 radeon_combios_connected_scratch_regs(connector, encoder, connected);
186
187 }
188}
189
1109ca09 190static struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type)
445282db
DA		 191{
192 struct drm_mode_object *obj;
193 struct drm_encoder *encoder;
194 int i;
195
196 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
197 if (connector->encoder_ids[i] == 0)
198 break;
199
200 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
201 if (!obj)
202 continue;
203
204 encoder = obj_to_encoder(obj);
205 if (encoder->encoder_type == encoder_type)
206 return encoder;
207 }
208 return NULL;
209}
210
1109ca09 211static struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector)
771fe6b9
JG		 212{
213 int enc_id = connector->encoder_ids[0];
214 struct drm_mode_object *obj;
215 struct drm_encoder *encoder;
216
217 /* pick the encoder ids */
218 if (enc_id) {
219 obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER);
220 if (!obj)
221 return NULL;
222 encoder = obj_to_encoder(obj);
223 return encoder;
224 }
225 return NULL;
226}
227
4ce001ab
DA		 228/*
229 * radeon_connector_analog_encoder_conflict_solve
230 * - search for other connectors sharing this encoder
231 * if priority is true, then set them disconnected if this is connected
232 * if priority is false, set us disconnected if they are connected
233 */
234static enum drm_connector_status
235radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector,
236 struct drm_encoder *encoder,
237 enum drm_connector_status current_status,
238 bool priority)
239{
240 struct drm_device *dev = connector->dev;
241 struct drm_connector *conflict;
08d07511 242 struct radeon_connector *radeon_conflict;
4ce001ab
DA		 243 int i;
244
245 list_for_each_entry(conflict, &dev->mode_config.connector_list, head) {
246 if (conflict == connector)
247 continue;
248
08d07511 249 radeon_conflict = to_radeon_connector(conflict);
4ce001ab
DA		 250 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
251 if (conflict->encoder_ids[i] == 0)
252 break;
253
254 /* if the IDs match */
255 if (conflict->encoder_ids[i] == encoder->base.id) {
256 if (conflict->status != connector_status_connected)
257 continue;
08d07511
AD		 258
259 if (radeon_conflict->use_digital)
260 continue;
4ce001ab
DA		 261
262 if (priority == true) {
c5d46b4e
AD		 263 DRM_DEBUG_KMS("1: conflicting encoders switching off %s\n", drm_get_connector_name(conflict));
264 DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(connector));
4ce001ab
DA		 265 conflict->status = connector_status_disconnected;
266 radeon_connector_update_scratch_regs(conflict, connector_status_disconnected);
267 } else {
c5d46b4e
AD		 268 DRM_DEBUG_KMS("2: conflicting encoders switching off %s\n", drm_get_connector_name(connector));
269 DRM_DEBUG_KMS("in favor of %s\n", drm_get_connector_name(conflict));
4ce001ab
DA		 270 current_status = connector_status_disconnected;
271 }
272 break;
273 }
274 }
275 }
276 return current_status;
277
278}
279
771fe6b9
JG		 280static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder)
281{
282 struct drm_device *dev = encoder->dev;
283 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
284 struct drm_display_mode *mode = NULL;
de2103e4 285 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
771fe6b9 286
de2103e4
AD		 287 if (native_mode->hdisplay != 0 &&
288 native_mode->vdisplay != 0 &&
289 native_mode->clock != 0) {
fb06ca8f 290 mode = drm_mode_duplicate(dev, native_mode);
771fe6b9
JG		 291 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
292 drm_mode_set_name(mode);
293
d9fdaafb 294 DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name);
d2efdf6d
AD		 295 } else if (native_mode->hdisplay != 0 &&
296 native_mode->vdisplay != 0) {
297 /* mac laptops without an edid */
298 /* Note that this is not necessarily the exact panel mode,
299 * but an approximation based on the cvt formula. For these
300 * systems we should ideally read the mode info out of the
301 * registers or add a mode table, but this works and is much
302 * simpler.
303 */
304 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false);
305 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
d9fdaafb 306 DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name);
771fe6b9
JG		 307 }
308 return mode;
309}
310
923f6848
AD		 311static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector)
312{
313 struct drm_device *dev = encoder->dev;
314 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
315 struct drm_display_mode *mode = NULL;
de2103e4 316 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
923f6848
AD		 317 int i;
318 struct mode_size {
319 int w;
320 int h;
321 } common_modes[17] = {
322 { 640, 480},
323 { 720, 480},
324 { 800, 600},
325 { 848, 480},
326 {1024, 768},
327 {1152, 768},
328 {1280, 720},
329 {1280, 800},
330 {1280, 854},
331 {1280, 960},
332 {1280, 1024},
333 {1440, 900},
334 {1400, 1050},
335 {1680, 1050},
336 {1600, 1200},
337 {1920, 1080},
338 {1920, 1200}
339 };
340
341 for (i = 0; i < 17; i++) {
dfdd6467
AD		 342 if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) {
343 if (common_modes[i].w > 1024 ||
344 common_modes[i].h > 768)
345 continue;
346 }
923f6848 347 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
de2103e4
AD		 348 if (common_modes[i].w > native_mode->hdisplay ||
349 common_modes[i].h > native_mode->vdisplay ||
350 (common_modes[i].w == native_mode->hdisplay &&
351 common_modes[i].h == native_mode->vdisplay))
923f6848
AD		 352 continue;
353 }
354 if (common_modes[i].w < 320 || common_modes[i].h < 200)
355 continue;
356
d50ba256 357 mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
923f6848
AD		 358 drm_mode_probed_add(connector, mode);
359 }
360}
361
1109ca09 362static int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property,
771fe6b9
JG		 363 uint64_t val)
364{
445282db
DA		 365 struct drm_device *dev = connector->dev;
366 struct radeon_device *rdev = dev->dev_private;
367 struct drm_encoder *encoder;
368 struct radeon_encoder *radeon_encoder;
369
370 if (property == rdev->mode_info.coherent_mode_property) {
371 struct radeon_encoder_atom_dig *dig;
ce227c41 372 bool new_coherent_mode;
445282db
DA		 373
374 /* need to find digital encoder on connector */
375 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
376 if (!encoder)
377 return 0;
378
379 radeon_encoder = to_radeon_encoder(encoder);
380
381 if (!radeon_encoder->enc_priv)
382 return 0;
383
384 dig = radeon_encoder->enc_priv;
ce227c41
DA		 385 new_coherent_mode = val ? true : false;
386 if (dig->coherent_mode != new_coherent_mode) {
387 dig->coherent_mode = new_coherent_mode;
388 radeon_property_change_mode(&radeon_encoder->base);
389 }
445282db
DA		 390 }
391
8666c076
AD		 392 if (property == rdev->mode_info.audio_property) {
393 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
394 /* need to find digital encoder on connector */
395 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
396 if (!encoder)
397 return 0;
398
399 radeon_encoder = to_radeon_encoder(encoder);
400
401 if (radeon_connector->audio != val) {
402 radeon_connector->audio = val;
403 radeon_property_change_mode(&radeon_encoder->base);
404 }
405 }
406
6214bb74
AD		 407 if (property == rdev->mode_info.dither_property) {
408 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
409 /* need to find digital encoder on connector */
410 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
411 if (!encoder)
412 return 0;
413
414 radeon_encoder = to_radeon_encoder(encoder);
415
416 if (radeon_connector->dither != val) {
417 radeon_connector->dither = val;
418 radeon_property_change_mode(&radeon_encoder->base);
419 }
420 }
421
5b1714d3
AD		 422 if (property == rdev->mode_info.underscan_property) {
423 /* need to find digital encoder on connector */
424 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
425 if (!encoder)
426 return 0;
427
428 radeon_encoder = to_radeon_encoder(encoder);
429
430 if (radeon_encoder->underscan_type != val) {
431 radeon_encoder->underscan_type = val;
432 radeon_property_change_mode(&radeon_encoder->base);
433 }
434 }
435
5bccf5e3
MG		 436 if (property == rdev->mode_info.underscan_hborder_property) {
437 /* need to find digital encoder on connector */
438 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
439 if (!encoder)
440 return 0;
441
442 radeon_encoder = to_radeon_encoder(encoder);
443
444 if (radeon_encoder->underscan_hborder != val) {
445 radeon_encoder->underscan_hborder = val;
446 radeon_property_change_mode(&radeon_encoder->base);
447 }
448 }
449
450 if (property == rdev->mode_info.underscan_vborder_property) {
451 /* need to find digital encoder on connector */
452 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
453 if (!encoder)
454 return 0;
455
456 radeon_encoder = to_radeon_encoder(encoder);
457
458 if (radeon_encoder->underscan_vborder != val) {
459 radeon_encoder->underscan_vborder = val;
460 radeon_property_change_mode(&radeon_encoder->base);
461 }
462 }
463
445282db
DA		 464 if (property == rdev->mode_info.tv_std_property) {
465 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC);
466 if (!encoder) {
467 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC);
468 }
469
470 if (!encoder)
471 return 0;
472
473 radeon_encoder = to_radeon_encoder(encoder);
474 if (!radeon_encoder->enc_priv)
475 return 0;
643acacf 476 if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) {
445282db
DA		 477 struct radeon_encoder_atom_dac *dac_int;
478 dac_int = radeon_encoder->enc_priv;
479 dac_int->tv_std = val;
480 } else {
481 struct radeon_encoder_tv_dac *dac_int;
482 dac_int = radeon_encoder->enc_priv;
483 dac_int->tv_std = val;
484 }
485 radeon_property_change_mode(&radeon_encoder->base);
486 }
487
488 if (property == rdev->mode_info.load_detect_property) {
489 struct radeon_connector *radeon_connector =
490 to_radeon_connector(connector);
491
492 if (val == 0)
493 radeon_connector->dac_load_detect = false;
494 else
495 radeon_connector->dac_load_detect = true;
496 }
497
498 if (property == rdev->mode_info.tmds_pll_property) {
499 struct radeon_encoder_int_tmds *tmds = NULL;
500 bool ret = false;
501 /* need to find digital encoder on connector */
502 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
503 if (!encoder)
504 return 0;
505
506 radeon_encoder = to_radeon_encoder(encoder);
507
508 tmds = radeon_encoder->enc_priv;
509 if (!tmds)
510 return 0;
511
512 if (val == 0) {
513 if (rdev->is_atom_bios)
514 ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds);
515 else
516 ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds);
517 }
518 if (val == 1 || ret == false) {
519 radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds);
520 }
521 radeon_property_change_mode(&radeon_encoder->base);
522 }
523
771fe6b9
JG		 524 return 0;
525}
526
8dfaa8a7
MD		 527static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder,
528 struct drm_connector *connector)
529{
530 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 531 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
13bb9430
MG		 532 struct drm_display_mode *t, *mode;
533
534 /* If the EDID preferred mode doesn't match the native mode, use it */
535 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
536 if (mode->type & DRM_MODE_TYPE_PREFERRED) {
537 if (mode->hdisplay != native_mode->hdisplay ||
538 mode->vdisplay != native_mode->vdisplay)
539 memcpy(native_mode, mode, sizeof(*mode));
540 }
541 }
8dfaa8a7
MD		 542
543 /* Try to get native mode details from EDID if necessary */
de2103e4 544 if (!native_mode->clock) {
8dfaa8a7 545 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
de2103e4
AD		 546 if (mode->hdisplay == native_mode->hdisplay &&
547 mode->vdisplay == native_mode->vdisplay) {
548 *native_mode = *mode;
549 drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V);
c5d46b4e 550 DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n");
8dfaa8a7
MD		 551 break;
552 }
553 }
554 }
13bb9430 555
de2103e4 556 if (!native_mode->clock) {
c5d46b4e 557 DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n");
8dfaa8a7
MD		 558 radeon_encoder->rmx_type = RMX_OFF;
559 }
560}
771fe6b9
JG		 561
562static int radeon_lvds_get_modes(struct drm_connector *connector)
563{
564 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
565 struct drm_encoder *encoder;
566 int ret = 0;
567 struct drm_display_mode *mode;
568
569 if (radeon_connector->ddc_bus) {
570 ret = radeon_ddc_get_modes(radeon_connector);
571 if (ret > 0) {
7747b713 572 encoder = radeon_best_single_encoder(connector);
8dfaa8a7
MD		 573 if (encoder) {
574 radeon_fixup_lvds_native_mode(encoder, connector);
7747b713
AD		 575 /* add scaled modes */
576 radeon_add_common_modes(encoder, connector);
8dfaa8a7 577 }
771fe6b9
JG		 578 return ret;
579 }
580 }
581
582 encoder = radeon_best_single_encoder(connector);
583 if (!encoder)
584 return 0;
585
586 /* we have no EDID modes */
587 mode = radeon_fp_native_mode(encoder);
588 if (mode) {
589 ret = 1;
590 drm_mode_probed_add(connector, mode);
7a868e18
AD		 591 /* add the width/height from vbios tables if available */
592 connector->display_info.width_mm = mode->width_mm;
593 connector->display_info.height_mm = mode->height_mm;
7747b713
AD		 594 /* add scaled modes */
595 radeon_add_common_modes(encoder, connector);
771fe6b9 596 }
923f6848 597
771fe6b9
JG		 598 return ret;
599}
600
601static int radeon_lvds_mode_valid(struct drm_connector *connector,
602 struct drm_display_mode *mode)
603{
a3fa6320
AD		 604 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
605
606 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
607 return MODE_PANEL;
608
609 if (encoder) {
610 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
611 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
612
613 /* AVIVO hardware supports downscaling modes larger than the panel
614 * to the panel size, but I'm not sure this is desirable.
615 */
616 if ((mode->hdisplay > native_mode->hdisplay) ||
617 (mode->vdisplay > native_mode->vdisplay))
618 return MODE_PANEL;
619
620 /* if scaling is disabled, block non-native modes */
621 if (radeon_encoder->rmx_type == RMX_OFF) {
622 if ((mode->hdisplay != native_mode->hdisplay) ||
623 (mode->vdisplay != native_mode->vdisplay))
624 return MODE_PANEL;
625 }
626 }
627
771fe6b9
JG		 628 return MODE_OK;
629}
630
7b334fcb 631static enum drm_connector_status
930a9e28 632radeon_lvds_detect(struct drm_connector *connector, bool force)
771fe6b9 633{
0549a061 634 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
2ffb8429 635 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
0549a061 636 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc
DA		 637 int r;
638
639 r = pm_runtime_get_sync(connector->dev->dev);
640 if (r < 0)
641 return connector_status_disconnected;
2ffb8429
AD		 642
643 if (encoder) {
644 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 645 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
2ffb8429
AD		 646
647 /* check if panel is valid */
de2103e4 648 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
2ffb8429
AD		 649 ret = connector_status_connected;
650
651 }
0549a061
AD		 652
653 /* check for edid as well */
0294cf4f
AD		 654 if (radeon_connector->edid)
655 ret = connector_status_connected;
656 else {
657 if (radeon_connector->ddc_bus) {
0294cf4f
AD		 658 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
659 &radeon_connector->ddc_bus->adapter);
0294cf4f
AD		 660 if (radeon_connector->edid)
661 ret = connector_status_connected;
662 }
0549a061 663 }
771fe6b9 664 /* check acpi lid status ??? */
2ffb8429 665
771fe6b9 666 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA		 667 pm_runtime_mark_last_busy(connector->dev->dev);
668 pm_runtime_put_autosuspend(connector->dev->dev);
771fe6b9
JG		 669 return ret;
670}
671
672static void radeon_connector_destroy(struct drm_connector *connector)
673{
674 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
675
0294cf4f
AD		 676 if (radeon_connector->edid)
677 kfree(radeon_connector->edid);
771fe6b9
JG		 678 kfree(radeon_connector->con_priv);
679 drm_sysfs_connector_remove(connector);
680 drm_connector_cleanup(connector);
681 kfree(connector);
682}
683
445282db
DA		 684static int radeon_lvds_set_property(struct drm_connector *connector,
685 struct drm_property *property,
686 uint64_t value)
687{
688 struct drm_device *dev = connector->dev;
689 struct radeon_encoder *radeon_encoder;
690 enum radeon_rmx_type rmx_type;
691
d9fdaafb 692 DRM_DEBUG_KMS("\n");
445282db
DA		 693 if (property != dev->mode_config.scaling_mode_property)
694 return 0;
695
696 if (connector->encoder)
697 radeon_encoder = to_radeon_encoder(connector->encoder);
698 else {
699 struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
700 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
701 }
702
703 switch (value) {
704 case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
705 case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
706 case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
707 default:
708 case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
709 }
710 if (radeon_encoder->rmx_type == rmx_type)
711 return 0;
712
713 radeon_encoder->rmx_type = rmx_type;
714
715 radeon_property_change_mode(&radeon_encoder->base);
716 return 0;
717}
718
719
1109ca09 720static const struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = {
771fe6b9
JG		 721 .get_modes = radeon_lvds_get_modes,
722 .mode_valid = radeon_lvds_mode_valid,
723 .best_encoder = radeon_best_single_encoder,
724};
725
1109ca09 726static const struct drm_connector_funcs radeon_lvds_connector_funcs = {
771fe6b9
JG		 727 .dpms = drm_helper_connector_dpms,
728 .detect = radeon_lvds_detect,
729 .fill_modes = drm_helper_probe_single_connector_modes,
730 .destroy = radeon_connector_destroy,
445282db 731 .set_property = radeon_lvds_set_property,
771fe6b9
JG		 732};
733
734static int radeon_vga_get_modes(struct drm_connector *connector)
735{
736 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
737 int ret;
738
739 ret = radeon_ddc_get_modes(radeon_connector);
740
741 return ret;
742}
743
744static int radeon_vga_mode_valid(struct drm_connector *connector,
745 struct drm_display_mode *mode)
746{
b20f9bef
AD		 747 struct drm_device *dev = connector->dev;
748 struct radeon_device *rdev = dev->dev_private;
749
a3fa6320 750 /* XXX check mode bandwidth */
b20f9bef
AD		 751
752 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
753 return MODE_CLOCK_HIGH;
754
771fe6b9
JG		 755 return MODE_OK;
756}
757
7b334fcb 758static enum drm_connector_status
930a9e28 759radeon_vga_detect(struct drm_connector *connector, bool force)
771fe6b9 760{
fafcf94e
AD		 761 struct drm_device *dev = connector->dev;
762 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG		 763 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
764 struct drm_encoder *encoder;
765 struct drm_encoder_helper_funcs *encoder_funcs;
4b9d2a21 766 bool dret = false;
771fe6b9 767 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc
DA		 768 int r;
769
770 r = pm_runtime_get_sync(connector->dev->dev);
771 if (r < 0)
772 return connector_status_disconnected;
771fe6b9 773
4ce001ab
DA		 774 encoder = radeon_best_single_encoder(connector);
775 if (!encoder)
776 ret = connector_status_disconnected;
777
eb6b6d7c 778 if (radeon_connector->ddc_bus)
0a9069d3 779 dret = radeon_ddc_probe(radeon_connector, false);
0294cf4f 780 if (dret) {
d0d0a225 781 radeon_connector->detected_by_load = false;
0294cf4f
AD		 782 if (radeon_connector->edid) {
783 kfree(radeon_connector->edid);
784 radeon_connector->edid = NULL;
785 }
0294cf4f 786 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
0294cf4f
AD		 787
788 if (!radeon_connector->edid) {
f82f5f3a
JG		 789 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
790 drm_get_connector_name(connector));
791 ret = connector_status_connected;
0294cf4f
AD		 792 } else {
793 radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
794
795 /* some oems have boards with separate digital and analog connectors
796 * with a shared ddc line (often vga + hdmi)
797 */
798 if (radeon_connector->use_digital && radeon_connector->shared_ddc) {
799 kfree(radeon_connector->edid);
800 radeon_connector->edid = NULL;
801 ret = connector_status_disconnected;
802 } else
803 ret = connector_status_connected;
804 }
805 } else {
c3cceedd
DA		 806
807 /* if we aren't forcing don't do destructive polling */
d0d0a225
AD		 808 if (!force) {
809 /* only return the previous status if we last
810 * detected a monitor via load.
811 */
812 if (radeon_connector->detected_by_load)
10ebc0bc
DA		 813 ret = connector->status;
814 goto out;
d0d0a225 815 }
c3cceedd 816
d8a7f792 817 if (radeon_connector->dac_load_detect && encoder) {
445282db
DA		 818 encoder_funcs = encoder->helper_private;
819 ret = encoder_funcs->detect(encoder, connector);
34076446 820 if (ret != connector_status_disconnected)
d0d0a225 821 radeon_connector->detected_by_load = true;
445282db 822 }
771fe6b9
JG		 823 }
824
4ce001ab
DA		 825 if (ret == connector_status_connected)
826 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
fafcf94e
AD		 827
828 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
829 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
830 * by other means, assume the CRT is connected and use that EDID.
831 */
832 if ((!rdev->is_atom_bios) &&
833 (ret == connector_status_disconnected) &&
834 rdev->mode_info.bios_hardcoded_edid_size) {
835 ret = connector_status_connected;
836 }
837
771fe6b9 838 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA		 839
840out:
841 pm_runtime_mark_last_busy(connector->dev->dev);
842 pm_runtime_put_autosuspend(connector->dev->dev);
843
771fe6b9
JG		 844 return ret;
845}
846
1109ca09 847static const struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = {
771fe6b9
JG		 848 .get_modes = radeon_vga_get_modes,
849 .mode_valid = radeon_vga_mode_valid,
850 .best_encoder = radeon_best_single_encoder,
851};
852
1109ca09 853static const struct drm_connector_funcs radeon_vga_connector_funcs = {
771fe6b9
JG		 854 .dpms = drm_helper_connector_dpms,
855 .detect = radeon_vga_detect,
856 .fill_modes = drm_helper_probe_single_connector_modes,
857 .destroy = radeon_connector_destroy,
858 .set_property = radeon_connector_set_property,
859};
860
4ce001ab
DA		 861static int radeon_tv_get_modes(struct drm_connector *connector)
862{
863 struct drm_device *dev = connector->dev;
923f6848 864 struct radeon_device *rdev = dev->dev_private;
4ce001ab 865 struct drm_display_mode *tv_mode;
923f6848 866 struct drm_encoder *encoder;
4ce001ab 867
923f6848
AD		 868 encoder = radeon_best_single_encoder(connector);
869 if (!encoder)
870 return 0;
4ce001ab 871
923f6848
AD		 872 /* avivo chips can scale any mode */
873 if (rdev->family >= CHIP_RS600)
874 /* add scaled modes */
875 radeon_add_common_modes(encoder, connector);
876 else {
877 /* only 800x600 is supported right now on pre-avivo chips */
d50ba256 878 tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false);
923f6848
AD		 879 tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
880 drm_mode_probed_add(connector, tv_mode);
881 }
4ce001ab
DA		 882 return 1;
883}
884
885static int radeon_tv_mode_valid(struct drm_connector *connector,
886 struct drm_display_mode *mode)
887{
a3fa6320
AD		 888 if ((mode->hdisplay > 1024) || (mode->vdisplay > 768))
889 return MODE_CLOCK_RANGE;
4ce001ab
DA		 890 return MODE_OK;
891}
892
7b334fcb 893static enum drm_connector_status
930a9e28 894radeon_tv_detect(struct drm_connector *connector, bool force)
4ce001ab
DA		 895{
896 struct drm_encoder *encoder;
897 struct drm_encoder_helper_funcs *encoder_funcs;
445282db
DA		 898 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
899 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc 900 int r;
445282db
DA		 901
902 if (!radeon_connector->dac_load_detect)
903 return ret;
4ce001ab 904
10ebc0bc
DA		 905 r = pm_runtime_get_sync(connector->dev->dev);
906 if (r < 0)
907 return connector_status_disconnected;
908
4ce001ab
DA		 909 encoder = radeon_best_single_encoder(connector);
910 if (!encoder)
911 ret = connector_status_disconnected;
912 else {
913 encoder_funcs = encoder->helper_private;
914 ret = encoder_funcs->detect(encoder, connector);
915 }
916 if (ret == connector_status_connected)
917 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false);
918 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA		 919 pm_runtime_mark_last_busy(connector->dev->dev);
920 pm_runtime_put_autosuspend(connector->dev->dev);
4ce001ab
DA		 921 return ret;
922}
923
1109ca09 924static const struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = {
4ce001ab
DA		 925 .get_modes = radeon_tv_get_modes,
926 .mode_valid = radeon_tv_mode_valid,
927 .best_encoder = radeon_best_single_encoder,
928};
929
1109ca09 930static const struct drm_connector_funcs radeon_tv_connector_funcs = {
4ce001ab
DA		 931 .dpms = drm_helper_connector_dpms,
932 .detect = radeon_tv_detect,
933 .fill_modes = drm_helper_probe_single_connector_modes,
934 .destroy = radeon_connector_destroy,
935 .set_property = radeon_connector_set_property,
936};
937
771fe6b9
JG		 938static int radeon_dvi_get_modes(struct drm_connector *connector)
939{
940 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
941 int ret;
942
943 ret = radeon_ddc_get_modes(radeon_connector);
771fe6b9
JG		 944 return ret;
945}
946
11fe1266
TU		 947static bool radeon_check_hpd_status_unchanged(struct drm_connector *connector)
948{
949 struct drm_device *dev = connector->dev;
950 struct radeon_device *rdev = dev->dev_private;
951 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
952 enum drm_connector_status status;
953
954 /* We only trust HPD on R600 and newer ASICS. */
955 if (rdev->family >= CHIP_R600
956 && radeon_connector->hpd.hpd != RADEON_HPD_NONE) {
957 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd))
958 status = connector_status_connected;
959 else
960 status = connector_status_disconnected;
961 if (connector->status == status)
962 return true;
963 }
964
965 return false;
966}
967
4ce001ab
DA		 968/*
969 * DVI is complicated
970 * Do a DDC probe, if DDC probe passes, get the full EDID so
971 * we can do analog/digital monitor detection at this point.
972 * If the monitor is an analog monitor or we got no DDC,
973 * we need to find the DAC encoder object for this connector.
974 * If we got no DDC, we do load detection on the DAC encoder object.
975 * If we got analog DDC or load detection passes on the DAC encoder
976 * we have to check if this analog encoder is shared with anyone else (TV)
977 * if its shared we have to set the other connector to disconnected.
978 */
7b334fcb 979static enum drm_connector_status
930a9e28 980radeon_dvi_detect(struct drm_connector *connector, bool force)
771fe6b9 981{
fafcf94e
AD		 982 struct drm_device *dev = connector->dev;
983 struct radeon_device *rdev = dev->dev_private;
771fe6b9 984 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
4ce001ab 985 struct drm_encoder *encoder = NULL;
771fe6b9
JG		 986 struct drm_encoder_helper_funcs *encoder_funcs;
987 struct drm_mode_object *obj;
10ebc0bc 988 int i, r;
771fe6b9 989 enum drm_connector_status ret = connector_status_disconnected;
fc87f13b 990 bool dret = false, broken_edid = false;
771fe6b9 991
10ebc0bc
DA		 992 r = pm_runtime_get_sync(connector->dev->dev);
993 if (r < 0)
994 return connector_status_disconnected;
995
996 if (!force && radeon_check_hpd_status_unchanged(connector)) {
997 ret = connector->status;
998 goto exit;
999 }
11fe1266 1000
eb6b6d7c 1001 if (radeon_connector->ddc_bus)
0a9069d3 1002 dret = radeon_ddc_probe(radeon_connector, false);
4ce001ab 1003 if (dret) {
d0d0a225 1004 radeon_connector->detected_by_load = false;
0294cf4f
AD		 1005 if (radeon_connector->edid) {
1006 kfree(radeon_connector->edid);
1007 radeon_connector->edid = NULL;
1008 }
4ce001ab 1009 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
4ce001ab
DA		 1010
1011 if (!radeon_connector->edid) {
f82f5f3a
JG		 1012 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
1013 drm_get_connector_name(connector));
4a9a8b71
DA		 1014 /* rs690 seems to have a problem with connectors not existing and always
1015 * return a block of 0's. If we see this just stop polling on this output */
1016 if ((rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) && radeon_connector->base.null_edid_counter) {
1017 ret = connector_status_disconnected;
1018 DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n", drm_get_connector_name(connector));
1019 radeon_connector->ddc_bus = NULL;
fc87f13b
EE		 1020 } else {
1021 ret = connector_status_connected;
1022 broken_edid = true; /* defer use_digital to later */
4a9a8b71 1023 }
4ce001ab
DA		 1024 } else {
1025 radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
1026
0294cf4f
AD		 1027 /* some oems have boards with separate digital and analog connectors
1028 * with a shared ddc line (often vga + hdmi)
1029 */
1030 if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) {
1031 kfree(radeon_connector->edid);
1032 radeon_connector->edid = NULL;
1033 ret = connector_status_disconnected;
1034 } else
1035 ret = connector_status_connected;
71407c46 1036
42f14c4b
AD		 1037 /* This gets complicated. We have boards with VGA + HDMI with a
1038 * shared DDC line and we have boards with DVI-D + HDMI with a shared
1039 * DDC line. The latter is more complex because with DVI<->HDMI adapters
1040 * you don't really know what's connected to which port as both are digital.
71407c46 1041 */
d3932d6c 1042 if (radeon_connector->shared_ddc && (ret == connector_status_connected)) {
71407c46
AD		 1043 struct drm_connector *list_connector;
1044 struct radeon_connector *list_radeon_connector;
1045 list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) {
1046 if (connector == list_connector)
1047 continue;
1048 list_radeon_connector = to_radeon_connector(list_connector);
b2ea4aa6
AD		 1049 if (list_radeon_connector->shared_ddc &&
1050 (list_radeon_connector->ddc_bus->rec.i2c_id ==
1051 radeon_connector->ddc_bus->rec.i2c_id)) {
42f14c4b
AD		 1052 /* cases where both connectors are digital */
1053 if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) {
1054 /* hpd is our only option in this case */
1055 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
71407c46
AD		 1056 kfree(radeon_connector->edid);
1057 radeon_connector->edid = NULL;
1058 ret = connector_status_disconnected;
1059 }
1060 }
1061 }
1062 }
1063 }
4ce001ab
DA		 1064 }
1065 }
1066
1067 if ((ret == connector_status_connected) && (radeon_connector->use_digital == true))
1068 goto out;
1069
5f0a2612
AD		 1070 /* DVI-D and HDMI-A are digital only */
1071 if ((connector->connector_type == DRM_MODE_CONNECTOR_DVID) ||
1072 (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA))
1073 goto out;
1074
d0d0a225 1075 /* if we aren't forcing don't do destructive polling */
c3cceedd 1076 if (!force) {
d0d0a225
AD		 1077 /* only return the previous status if we last
1078 * detected a monitor via load.
1079 */
1080 if (radeon_connector->detected_by_load)
1081 ret = connector->status;
c3cceedd
DA		 1082 goto out;
1083 }
1084
4ce001ab 1085 /* find analog encoder */
445282db
DA		 1086 if (radeon_connector->dac_load_detect) {
1087 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1088 if (connector->encoder_ids[i] == 0)
1089 break;
771fe6b9 1090
445282db
DA		 1091 obj = drm_mode_object_find(connector->dev,
1092 connector->encoder_ids[i],
1093 DRM_MODE_OBJECT_ENCODER);
1094 if (!obj)
1095 continue;
771fe6b9 1096
445282db 1097 encoder = obj_to_encoder(obj);
771fe6b9 1098
e3632507 1099 if (encoder->encoder_type != DRM_MODE_ENCODER_DAC &&
e00e8b5e
AD		 1100 encoder->encoder_type != DRM_MODE_ENCODER_TVDAC)
1101 continue;
1102
445282db
DA		 1103 encoder_funcs = encoder->helper_private;
1104 if (encoder_funcs->detect) {
fc87f13b
EE		 1105 if (!broken_edid) {
1106 if (ret != connector_status_connected) {
1107 /* deal with analog monitors without DDC */
1108 ret = encoder_funcs->detect(encoder, connector);
1109 if (ret == connector_status_connected) {
1110 radeon_connector->use_digital = false;
1111 }
1112 if (ret != connector_status_disconnected)
1113 radeon_connector->detected_by_load = true;
445282db 1114 }
fc87f13b
EE		 1115 } else {
1116 enum drm_connector_status lret;
1117 /* assume digital unless load detected otherwise */
1118 radeon_connector->use_digital = true;
1119 lret = encoder_funcs->detect(encoder, connector);
1120 DRM_DEBUG_KMS("load_detect %x returned: %x\n",encoder->encoder_type,lret);
1121 if (lret == connector_status_connected)
1122 radeon_connector->use_digital = false;
771fe6b9 1123 }
445282db 1124 break;
771fe6b9
JG		 1125 }
1126 }
1127 }
1128
4ce001ab
DA		 1129 if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) &&
1130 encoder) {
1131 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
1132 }
1133
fafcf94e
AD		 1134 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
1135 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
1136 * by other means, assume the DFP is connected and use that EDID. In most
1137 * cases the DVI port is actually a virtual KVM port connected to the service
1138 * processor.
1139 */
a09d431f 1140out:
fafcf94e
AD		 1141 if ((!rdev->is_atom_bios) &&
1142 (ret == connector_status_disconnected) &&
1143 rdev->mode_info.bios_hardcoded_edid_size) {
1144 radeon_connector->use_digital = true;
1145 ret = connector_status_connected;
1146 }
1147
771fe6b9
JG		 1148 /* updated in get modes as well since we need to know if it's analog or digital */
1149 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA		 1150
1151exit:
1152 pm_runtime_mark_last_busy(connector->dev->dev);
1153 pm_runtime_put_autosuspend(connector->dev->dev);
1154
771fe6b9
JG		 1155 return ret;
1156}
1157
1158/* okay need to be smart in here about which encoder to pick */
1109ca09 1159static struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector)
771fe6b9
JG		 1160{
1161 int enc_id = connector->encoder_ids[0];
1162 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1163 struct drm_mode_object *obj;
1164 struct drm_encoder *encoder;
1165 int i;
1166 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1167 if (connector->encoder_ids[i] == 0)
1168 break;
1169
1170 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
1171 if (!obj)
1172 continue;
1173
1174 encoder = obj_to_encoder(obj);
1175
4ce001ab 1176 if (radeon_connector->use_digital == true) {
771fe6b9
JG		 1177 if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)
1178 return encoder;
1179 } else {
1180 if (encoder->encoder_type == DRM_MODE_ENCODER_DAC ||
1181 encoder->encoder_type == DRM_MODE_ENCODER_TVDAC)
1182 return encoder;
1183 }
1184 }
1185
1186 /* see if we have a default encoder TODO */
1187
1188 /* then check use digitial */
1189 /* pick the first one */
1190 if (enc_id) {
1191 obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER);
1192 if (!obj)
1193 return NULL;
1194 encoder = obj_to_encoder(obj);
1195 return encoder;
1196 }
1197 return NULL;
1198}
1199
d50ba256
DA		 1200static void radeon_dvi_force(struct drm_connector *connector)
1201{
1202 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1203 if (connector->force == DRM_FORCE_ON)
1204 radeon_connector->use_digital = false;
1205 if (connector->force == DRM_FORCE_ON_DIGITAL)
1206 radeon_connector->use_digital = true;
1207}
1208
a3fa6320
AD		 1209static int radeon_dvi_mode_valid(struct drm_connector *connector,
1210 struct drm_display_mode *mode)
1211{
1b24203e
AD		 1212 struct drm_device *dev = connector->dev;
1213 struct radeon_device *rdev = dev->dev_private;
a3fa6320
AD		 1214 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1215
1216 /* XXX check mode bandwidth */
1217
1b24203e
AD		 1218 /* clocks over 135 MHz have heat issues with DVI on RV100 */
1219 if (radeon_connector->use_digital &&
1220 (rdev->family == CHIP_RV100) &&
1221 (mode->clock > 135000))
1222 return MODE_CLOCK_HIGH;
1223
a3fa6320
AD		 1224 if (radeon_connector->use_digital && (mode->clock > 165000)) {
1225 if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) ||
1226 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) ||
1227 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B))
1228 return MODE_OK;
e1e84017 1229 else if (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_A) {
1b2681ba 1230 if (ASIC_IS_DCE6(rdev)) {
e1e84017
AD		 1231 /* HDMI 1.3+ supports max clock of 340 Mhz */
1232 if (mode->clock > 340000)
1233 return MODE_CLOCK_HIGH;
1234 else
1235 return MODE_OK;
1236 } else
1237 return MODE_CLOCK_HIGH;
1238 } else
a3fa6320
AD		 1239 return MODE_CLOCK_HIGH;
1240 }
b20f9bef
AD		 1241
1242 /* check against the max pixel clock */
1243 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
1244 return MODE_CLOCK_HIGH;
1245
a3fa6320
AD		 1246 return MODE_OK;
1247}
1248
1109ca09 1249static const struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = {
771fe6b9 1250 .get_modes = radeon_dvi_get_modes,
a3fa6320 1251 .mode_valid = radeon_dvi_mode_valid,
771fe6b9
JG		 1252 .best_encoder = radeon_dvi_encoder,
1253};
1254
1109ca09 1255static const struct drm_connector_funcs radeon_dvi_connector_funcs = {
771fe6b9
JG		 1256 .dpms = drm_helper_connector_dpms,
1257 .detect = radeon_dvi_detect,
1258 .fill_modes = drm_helper_probe_single_connector_modes,
1259 .set_property = radeon_connector_set_property,
1260 .destroy = radeon_connector_destroy,
d50ba256 1261 .force = radeon_dvi_force,
771fe6b9
JG		 1262};
1263
ffd09c64
AD		 1264static void radeon_dp_connector_destroy(struct drm_connector *connector)
1265{
1266 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1267 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
1268
ffd09c64
AD		 1269 if (radeon_connector->edid)
1270 kfree(radeon_connector->edid);
1271 if (radeon_dig_connector->dp_i2c_bus)
ac1aade6 1272 radeon_i2c_destroy(radeon_dig_connector->dp_i2c_bus);
ffd09c64
AD		 1273 kfree(radeon_connector->con_priv);
1274 drm_sysfs_connector_remove(connector);
1275 drm_connector_cleanup(connector);
1276 kfree(connector);
1277}
1278
746c1aa4
DA		 1279static int radeon_dp_get_modes(struct drm_connector *connector)
1280{
1281 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
8b834852 1282 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1283 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
746c1aa4
DA		 1284 int ret;
1285
f89931f3
AD		 1286 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1287 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD		 1288 struct drm_display_mode *mode;
1289
2b69ffb9
AD		 1290 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
1291 if (!radeon_dig_connector->edp_on)
1292 atombios_set_edp_panel_power(connector,
1293 ATOM_TRANSMITTER_ACTION_POWER_ON);
1294 ret = radeon_ddc_get_modes(radeon_connector);
1295 if (!radeon_dig_connector->edp_on)
1296 atombios_set_edp_panel_power(connector,
1297 ATOM_TRANSMITTER_ACTION_POWER_OFF);
1298 } else {
1299 /* need to setup ddc on the bridge */
1300 if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1301 ENCODER_OBJECT_ID_NONE) {
1302 if (encoder)
1303 radeon_atom_ext_encoder_setup_ddc(encoder);
1304 }
1305 ret = radeon_ddc_get_modes(radeon_connector);
1306 }
d291767b
AD		 1307
1308 if (ret > 0) {
d291767b
AD		 1309 if (encoder) {
1310 radeon_fixup_lvds_native_mode(encoder, connector);
1311 /* add scaled modes */
1312 radeon_add_common_modes(encoder, connector);
1313 }
1314 return ret;
1315 }
1316
d291767b
AD		 1317 if (!encoder)
1318 return 0;
1319
1320 /* we have no EDID modes */
1321 mode = radeon_fp_native_mode(encoder);
1322 if (mode) {
1323 ret = 1;
1324 drm_mode_probed_add(connector, mode);
1325 /* add the width/height from vbios tables if available */
1326 connector->display_info.width_mm = mode->width_mm;
1327 connector->display_info.height_mm = mode->height_mm;
1328 /* add scaled modes */
1329 radeon_add_common_modes(encoder, connector);
1330 }
591a10e1
AD		 1331 } else {
1332 /* need to setup ddc on the bridge */
1d33e1fc
AD		 1333 if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1334 ENCODER_OBJECT_ID_NONE) {
591a10e1
AD		 1335 if (encoder)
1336 radeon_atom_ext_encoder_setup_ddc(encoder);
1337 }
d291767b 1338 ret = radeon_ddc_get_modes(radeon_connector);
591a10e1 1339 }
8b834852 1340
746c1aa4
DA		 1341 return ret;
1342}
1343
1d33e1fc 1344u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector)
d7fa8bb3
AD		 1345{
1346 struct drm_mode_object *obj;
1347 struct drm_encoder *encoder;
1348 struct radeon_encoder *radeon_encoder;
1349 int i;
d7fa8bb3
AD		 1350
1351 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1352 if (connector->encoder_ids[i] == 0)
1353 break;
1354
1355 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
1356 if (!obj)
1357 continue;
1358
1359 encoder = obj_to_encoder(obj);
1360 radeon_encoder = to_radeon_encoder(encoder);
1361
1362 switch (radeon_encoder->encoder_id) {
1363 case ENCODER_OBJECT_ID_TRAVIS:
1364 case ENCODER_OBJECT_ID_NUTMEG:
1d33e1fc 1365 return radeon_encoder->encoder_id;
d7fa8bb3
AD		 1366 default:
1367 break;
1368 }
1369 }
1370
1d33e1fc 1371 return ENCODER_OBJECT_ID_NONE;
d7fa8bb3
AD		 1372}
1373
1374bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector)
1375{
1376 struct drm_mode_object *obj;
1377 struct drm_encoder *encoder;
1378 struct radeon_encoder *radeon_encoder;
1379 int i;
1380 bool found = false;
1381
1382 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1383 if (connector->encoder_ids[i] == 0)
1384 break;
1385
1386 obj = drm_mode_object_find(connector->dev, connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
1387 if (!obj)
1388 continue;
1389
1390 encoder = obj_to_encoder(obj);
1391 radeon_encoder = to_radeon_encoder(encoder);
1392 if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2)
1393 found = true;
1394 }
1395
1396 return found;
1397}
1398
1399bool radeon_connector_is_dp12_capable(struct drm_connector *connector)
1400{
1401 struct drm_device *dev = connector->dev;
1402 struct radeon_device *rdev = dev->dev_private;
1403
1404 if (ASIC_IS_DCE5(rdev) &&
1405 (rdev->clock.dp_extclk >= 53900) &&
1406 radeon_connector_encoder_is_hbr2(connector)) {
1407 return true;
1408 }
1409
1410 return false;
1411}
1412
7b334fcb 1413static enum drm_connector_status
930a9e28 1414radeon_dp_detect(struct drm_connector *connector, bool force)
746c1aa4 1415{
f8d0edde
AD		 1416 struct drm_device *dev = connector->dev;
1417 struct radeon_device *rdev = dev->dev_private;
746c1aa4 1418 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
746c1aa4 1419 enum drm_connector_status ret = connector_status_disconnected;
4143e919 1420 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1421 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
10ebc0bc 1422 int r;
746c1aa4 1423
10ebc0bc
DA		 1424 r = pm_runtime_get_sync(connector->dev->dev);
1425 if (r < 0)
1426 return connector_status_disconnected;
1427
1428 if (!force && radeon_check_hpd_status_unchanged(connector)) {
1429 ret = connector->status;
1430 goto out;
1431 }
11fe1266 1432
746c1aa4
DA		 1433 if (radeon_connector->edid) {
1434 kfree(radeon_connector->edid);
1435 radeon_connector->edid = NULL;
1436 }
1437
f89931f3
AD		 1438 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1439 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD		 1440 if (encoder) {
1441 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1442 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1443
1444 /* check if panel is valid */
1445 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
1446 ret = connector_status_connected;
1447 }
6f50eae7
AD		 1448 /* eDP is always DP */
1449 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
8b834852
AD		 1450 if (!radeon_dig_connector->edp_on)
1451 atombios_set_edp_panel_power(connector,
1452 ATOM_TRANSMITTER_ACTION_POWER_ON);
6f50eae7 1453 if (radeon_dp_getdpcd(radeon_connector))
9fa05c98 1454 ret = connector_status_connected;
8b834852
AD		 1455 if (!radeon_dig_connector->edp_on)
1456 atombios_set_edp_panel_power(connector,
1457 ATOM_TRANSMITTER_ACTION_POWER_OFF);
1d33e1fc
AD		 1458 } else if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1459 ENCODER_OBJECT_ID_NONE) {
b06947b5
AD		 1460 /* DP bridges are always DP */
1461 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
1462 /* get the DPCD from the bridge */
1463 radeon_dp_getdpcd(radeon_connector);
1464
6777a4f6
AD		 1465 if (encoder) {
1466 /* setup ddc on the bridge */
1467 radeon_atom_ext_encoder_setup_ddc(encoder);
0a9069d3
NOS		 1468 /* bridge chips are always aux */
1469 if (radeon_ddc_probe(radeon_connector, true)) /* try DDC */
b06947b5 1470 ret = connector_status_connected;
6777a4f6
AD		 1471 else if (radeon_connector->dac_load_detect) { /* try load detection */
1472 struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private;
b06947b5
AD		 1473 ret = encoder_funcs->detect(encoder, connector);
1474 }
591a10e1 1475 }
b06947b5 1476 } else {
6f50eae7 1477 radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
f8d0edde
AD		 1478 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
1479 ret = connector_status_connected;
1480 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
1481 radeon_dp_getdpcd(radeon_connector);
6f50eae7 1482 } else {
f8d0edde
AD		 1483 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
1484 if (radeon_dp_getdpcd(radeon_connector))
1485 ret = connector_status_connected;
1486 } else {
d592fca9 1487 /* try non-aux ddc (DP to DVI/HDMI/etc. adapter) */
0a9069d3 1488 if (radeon_ddc_probe(radeon_connector, false))
f8d0edde
AD		 1489 ret = connector_status_connected;
1490 }
4143e919 1491 }
746c1aa4 1492 }
4143e919 1493
30f44372 1494 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA		 1495out:
1496 pm_runtime_mark_last_busy(connector->dev->dev);
1497 pm_runtime_put_autosuspend(connector->dev->dev);
1498
746c1aa4
DA		 1499 return ret;
1500}
1501
5801ead6
AD		 1502static int radeon_dp_mode_valid(struct drm_connector *connector,
1503 struct drm_display_mode *mode)
1504{
1505 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1506 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
1507
1508 /* XXX check mode bandwidth */
1509
f89931f3
AD		 1510 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1511 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD		 1512 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
1513
1514 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
1515 return MODE_PANEL;
1516
1517 if (encoder) {
1518 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1519 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1520
f89931f3 1521 /* AVIVO hardware supports downscaling modes larger than the panel
d291767b
AD		 1522 * to the panel size, but I'm not sure this is desirable.
1523 */
1524 if ((mode->hdisplay > native_mode->hdisplay) ||
1525 (mode->vdisplay > native_mode->vdisplay))
1526 return MODE_PANEL;
1527
1528 /* if scaling is disabled, block non-native modes */
1529 if (radeon_encoder->rmx_type == RMX_OFF) {
1530 if ((mode->hdisplay != native_mode->hdisplay) ||
1531 (mode->vdisplay != native_mode->vdisplay))
1532 return MODE_PANEL;
1533 }
1534 }
5801ead6 1535 return MODE_OK;
d291767b
AD		 1536 } else {
1537 if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
1538 (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
1539 return radeon_dp_mode_valid_helper(connector, mode);
1540 else
1541 return MODE_OK;
1542 }
5801ead6
AD		 1543}
1544
1109ca09 1545static const struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = {
746c1aa4 1546 .get_modes = radeon_dp_get_modes,
5801ead6 1547 .mode_valid = radeon_dp_mode_valid,
746c1aa4
DA		 1548 .best_encoder = radeon_dvi_encoder,
1549};
1550
1109ca09 1551static const struct drm_connector_funcs radeon_dp_connector_funcs = {
746c1aa4
DA		 1552 .dpms = drm_helper_connector_dpms,
1553 .detect = radeon_dp_detect,
1554 .fill_modes = drm_helper_probe_single_connector_modes,
1555 .set_property = radeon_connector_set_property,
ffd09c64 1556 .destroy = radeon_dp_connector_destroy,
746c1aa4
DA		 1557 .force = radeon_dvi_force,
1558};
1559
855f5f1d
AD		 1560static const struct drm_connector_funcs radeon_edp_connector_funcs = {
1561 .dpms = drm_helper_connector_dpms,
1562 .detect = radeon_dp_detect,
1563 .fill_modes = drm_helper_probe_single_connector_modes,
1564 .set_property = radeon_lvds_set_property,
1565 .destroy = radeon_dp_connector_destroy,
1566 .force = radeon_dvi_force,
1567};
1568
1569static const struct drm_connector_funcs radeon_lvds_bridge_connector_funcs = {
1570 .dpms = drm_helper_connector_dpms,
1571 .detect = radeon_dp_detect,
1572 .fill_modes = drm_helper_probe_single_connector_modes,
1573 .set_property = radeon_lvds_set_property,
1574 .destroy = radeon_dp_connector_destroy,
1575 .force = radeon_dvi_force,
1576};
1577
771fe6b9
JG		 1578void
1579radeon_add_atom_connector(struct drm_device *dev,
1580 uint32_t connector_id,
1581 uint32_t supported_device,
1582 int connector_type,
1583 struct radeon_i2c_bus_rec *i2c_bus,
b75fad06 1584 uint32_t igp_lane_info,
eed45b30 1585 uint16_t connector_object_id,
26b5bc98
AD		 1586 struct radeon_hpd *hpd,
1587 struct radeon_router *router)
771fe6b9 1588{
445282db 1589 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG		 1590 struct drm_connector *connector;
1591 struct radeon_connector *radeon_connector;
1592 struct radeon_connector_atom_dig *radeon_dig_connector;
eac4dff6
AD		 1593 struct drm_encoder *encoder;
1594 struct radeon_encoder *radeon_encoder;
771fe6b9 1595 uint32_t subpixel_order = SubPixelNone;
0294cf4f 1596 bool shared_ddc = false;
eac4dff6 1597 bool is_dp_bridge = false;
496263bf 1598 bool has_aux = false;
771fe6b9 1599
4ce001ab 1600 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG		 1601 return;
1602
cf4c12f9
AD		 1603 /* if the user selected tv=0 don't try and add the connector */
1604 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
1605 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
1606 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
1607 (radeon_tv == 0))
1608 return;
1609
771fe6b9
JG		 1610 /* see if we already added it */
1611 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1612 radeon_connector = to_radeon_connector(connector);
1613 if (radeon_connector->connector_id == connector_id) {
1614 radeon_connector->devices |= supported_device;
1615 return;
1616 }
0294cf4f 1617 if (radeon_connector->ddc_bus && i2c_bus->valid) {
d3932d6c 1618 if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) {
0294cf4f
AD		 1619 radeon_connector->shared_ddc = true;
1620 shared_ddc = true;
1621 }
fb939dfc 1622 if (radeon_connector->router_bus && router->ddc_valid &&
26b5bc98
AD		 1623 (radeon_connector->router.router_id == router->router_id)) {
1624 radeon_connector->shared_ddc = false;
1625 shared_ddc = false;
1626 }
0294cf4f 1627 }
771fe6b9
JG		 1628 }
1629
eac4dff6
AD		 1630 /* check if it's a dp bridge */
1631 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
1632 radeon_encoder = to_radeon_encoder(encoder);
1633 if (radeon_encoder->devices & supported_device) {
1634 switch (radeon_encoder->encoder_id) {
1635 case ENCODER_OBJECT_ID_TRAVIS:
1636 case ENCODER_OBJECT_ID_NUTMEG:
1637 is_dp_bridge = true;
1638 break;
1639 default:
1640 break;
1641 }
1642 }
1643 }
1644
771fe6b9
JG		 1645 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
1646 if (!radeon_connector)
1647 return;
1648
1649 connector = &radeon_connector->base;
1650
1651 radeon_connector->connector_id = connector_id;
1652 radeon_connector->devices = supported_device;
0294cf4f 1653 radeon_connector->shared_ddc = shared_ddc;
b75fad06 1654 radeon_connector->connector_object_id = connector_object_id;
eed45b30 1655 radeon_connector->hpd = *hpd;
bc1c4dc3 1656
26b5bc98 1657 radeon_connector->router = *router;
fb939dfc 1658 if (router->ddc_valid || router->cd_valid) {
26b5bc98
AD		 1659 radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info);
1660 if (!radeon_connector->router_bus)
a70882aa 1661 DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n");
26b5bc98 1662 }
eac4dff6
AD		 1663
1664 if (is_dp_bridge) {
771fe6b9
JG		 1665 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1666 if (!radeon_dig_connector)
1667 goto failed;
771fe6b9
JG		 1668 radeon_dig_connector->igp_lane_info = igp_lane_info;
1669 radeon_connector->con_priv = radeon_dig_connector;
771fe6b9 1670 if (i2c_bus->valid) {
eac4dff6
AD		 1671 /* add DP i2c bus */
1672 if (connector_type == DRM_MODE_CONNECTOR_eDP)
1673 radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch");
1674 else
1675 radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch");
496263bf
AD		 1676 if (radeon_dig_connector->dp_i2c_bus)
1677 has_aux = true;
1678 else
eac4dff6 1679 DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n");
f376b94f 1680 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 1681 if (!radeon_connector->ddc_bus)
eac4dff6 1682 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1683 }
eac4dff6
AD		 1684 switch (connector_type) {
1685 case DRM_MODE_CONNECTOR_VGA:
1686 case DRM_MODE_CONNECTOR_DVIA:
1687 default:
855f5f1d
AD		 1688 drm_connector_init(dev, &radeon_connector->base,
1689 &radeon_dp_connector_funcs, connector_type);
1690 drm_connector_helper_add(&radeon_connector->base,
1691 &radeon_dp_connector_helper_funcs);
eac4dff6
AD		 1692 connector->interlace_allowed = true;
1693 connector->doublescan_allowed = true;
d629a3ce 1694 radeon_connector->dac_load_detect = true;
e35755fa 1695 drm_object_attach_property(&radeon_connector->base.base,
d629a3ce
AD		 1696 rdev->mode_info.load_detect_property,
1697 1);
eac4dff6
AD		 1698 break;
1699 case DRM_MODE_CONNECTOR_DVII:
1700 case DRM_MODE_CONNECTOR_DVID:
1701 case DRM_MODE_CONNECTOR_HDMIA:
1702 case DRM_MODE_CONNECTOR_HDMIB:
1703 case DRM_MODE_CONNECTOR_DisplayPort:
855f5f1d
AD		 1704 drm_connector_init(dev, &radeon_connector->base,
1705 &radeon_dp_connector_funcs, connector_type);
1706 drm_connector_helper_add(&radeon_connector->base,
1707 &radeon_dp_connector_helper_funcs);
e35755fa 1708 drm_object_attach_property(&radeon_connector->base.base,
430f70d5 1709 rdev->mode_info.underscan_property,
56bec7c0 1710 UNDERSCAN_OFF);
e35755fa 1711 drm_object_attach_property(&radeon_connector->base.base,
5bccf5e3
MG		 1712 rdev->mode_info.underscan_hborder_property,
1713 0);
e35755fa 1714 drm_object_attach_property(&radeon_connector->base.base,
5bccf5e3
MG		 1715 rdev->mode_info.underscan_vborder_property,
1716 0);
91915260 1717
6214bb74
AD		 1718 drm_object_attach_property(&radeon_connector->base.base,
1719 rdev->mode_info.dither_property,
1720 RADEON_FMT_DITHER_DISABLE);
91915260 1721
108dc8e8
AD		 1722 if (radeon_audio != 0)
1723 drm_object_attach_property(&radeon_connector->base.base,
1724 rdev->mode_info.audio_property,
e31fadd3 1725 RADEON_AUDIO_AUTO);
91915260 1726
eac4dff6
AD		 1727 subpixel_order = SubPixelHorizontalRGB;
1728 connector->interlace_allowed = true;
1729 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
1730 connector->doublescan_allowed = true;
1731 else
1732 connector->doublescan_allowed = false;
d629a3ce
AD		 1733 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
1734 radeon_connector->dac_load_detect = true;
e35755fa 1735 drm_object_attach_property(&radeon_connector->base.base,
d629a3ce
AD		 1736 rdev->mode_info.load_detect_property,
1737 1);
1738 }
eac4dff6
AD		 1739 break;
1740 case DRM_MODE_CONNECTOR_LVDS:
1741 case DRM_MODE_CONNECTOR_eDP:
855f5f1d
AD		 1742 drm_connector_init(dev, &radeon_connector->base,
1743 &radeon_lvds_bridge_connector_funcs, connector_type);
1744 drm_connector_helper_add(&radeon_connector->base,
1745 &radeon_dp_connector_helper_funcs);
e35755fa 1746 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1747 dev->mode_config.scaling_mode_property,
1748 DRM_MODE_SCALE_FULLSCREEN);
1749 subpixel_order = SubPixelHorizontalRGB;
1750 connector->interlace_allowed = false;
1751 connector->doublescan_allowed = false;
1752 break;
5bccf5e3 1753 }
eac4dff6
AD		 1754 } else {
1755 switch (connector_type) {
1756 case DRM_MODE_CONNECTOR_VGA:
1757 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
1758 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
1759 if (i2c_bus->valid) {
1760 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1761 if (!radeon_connector->ddc_bus)
1762 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1763 }
390d0bbe 1764 radeon_connector->dac_load_detect = true;
e35755fa 1765 drm_object_attach_property(&radeon_connector->base.base,
390d0bbe
AD		 1766 rdev->mode_info.load_detect_property,
1767 1);
eac4dff6
AD		 1768 /* no HPD on analog connectors */
1769 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1770 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1771 connector->interlace_allowed = true;
c49948f4 1772 connector->doublescan_allowed = true;
eac4dff6
AD		 1773 break;
1774 case DRM_MODE_CONNECTOR_DVIA:
1775 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
1776 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
1777 if (i2c_bus->valid) {
1778 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1779 if (!radeon_connector->ddc_bus)
1780 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1781 }
1782 radeon_connector->dac_load_detect = true;
e35755fa 1783 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1784 rdev->mode_info.load_detect_property,
1785 1);
1786 /* no HPD on analog connectors */
1787 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1788 connector->interlace_allowed = true;
1789 connector->doublescan_allowed = true;
1790 break;
1791 case DRM_MODE_CONNECTOR_DVII:
1792 case DRM_MODE_CONNECTOR_DVID:
1793 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1794 if (!radeon_dig_connector)
1795 goto failed;
1796 radeon_dig_connector->igp_lane_info = igp_lane_info;
1797 radeon_connector->con_priv = radeon_dig_connector;
1798 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
1799 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
1800 if (i2c_bus->valid) {
1801 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1802 if (!radeon_connector->ddc_bus)
1803 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1804 }
1805 subpixel_order = SubPixelHorizontalRGB;
e35755fa 1806 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1807 rdev->mode_info.coherent_mode_property,
1808 1);
1809 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 1810 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1811 rdev->mode_info.underscan_property,
1812 UNDERSCAN_OFF);
e35755fa 1813 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1814 rdev->mode_info.underscan_hborder_property,
1815 0);
e35755fa 1816 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1817 rdev->mode_info.underscan_vborder_property,
1818 0);
1819 }
108dc8e8 1820 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 1821 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 1822 rdev->mode_info.audio_property,
e31fadd3 1823 RADEON_AUDIO_AUTO);
8666c076 1824 }
6214bb74
AD		 1825 if (ASIC_IS_AVIVO(rdev)) {
1826 drm_object_attach_property(&radeon_connector->base.base,
1827 rdev->mode_info.dither_property,
1828 RADEON_FMT_DITHER_DISABLE);
1829 }
eac4dff6
AD		 1830 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
1831 radeon_connector->dac_load_detect = true;
e35755fa 1832 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1833 rdev->mode_info.load_detect_property,
1834 1);
1835 }
1836 connector->interlace_allowed = true;
1837 if (connector_type == DRM_MODE_CONNECTOR_DVII)
1838 connector->doublescan_allowed = true;
1839 else
1840 connector->doublescan_allowed = false;
1841 break;
1842 case DRM_MODE_CONNECTOR_HDMIA:
1843 case DRM_MODE_CONNECTOR_HDMIB:
1844 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1845 if (!radeon_dig_connector)
1846 goto failed;
1847 radeon_dig_connector->igp_lane_info = igp_lane_info;
1848 radeon_connector->con_priv = radeon_dig_connector;
1849 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
1850 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
1851 if (i2c_bus->valid) {
1852 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1853 if (!radeon_connector->ddc_bus)
1854 DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1855 }
e35755fa 1856 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1857 rdev->mode_info.coherent_mode_property,
1858 1);
1859 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 1860 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1861 rdev->mode_info.underscan_property,
1862 UNDERSCAN_OFF);
e35755fa 1863 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1864 rdev->mode_info.underscan_hborder_property,
1865 0);
e35755fa 1866 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1867 rdev->mode_info.underscan_vborder_property,
1868 0);
1869 }
108dc8e8 1870 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 1871 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 1872 rdev->mode_info.audio_property,
e31fadd3 1873 RADEON_AUDIO_AUTO);
8666c076 1874 }
6214bb74
AD		 1875 if (ASIC_IS_AVIVO(rdev)) {
1876 drm_object_attach_property(&radeon_connector->base.base,
1877 rdev->mode_info.dither_property,
1878 RADEON_FMT_DITHER_DISABLE);
1879 }
eac4dff6
AD		 1880 subpixel_order = SubPixelHorizontalRGB;
1881 connector->interlace_allowed = true;
1882 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
1883 connector->doublescan_allowed = true;
1884 else
1885 connector->doublescan_allowed = false;
1886 break;
1887 case DRM_MODE_CONNECTOR_DisplayPort:
1888 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1889 if (!radeon_dig_connector)
1890 goto failed;
1891 radeon_dig_connector->igp_lane_info = igp_lane_info;
1892 radeon_connector->con_priv = radeon_dig_connector;
1893 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
1894 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
1895 if (i2c_bus->valid) {
1896 /* add DP i2c bus */
1897 radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch");
1898 if (!radeon_dig_connector->dp_i2c_bus)
1899 DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n");
1900 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
496263bf
AD		 1901 if (radeon_connector->ddc_bus)
1902 has_aux = true;
1903 else
eac4dff6
AD		 1904 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1905 }
1906 subpixel_order = SubPixelHorizontalRGB;
e35755fa 1907 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1908 rdev->mode_info.coherent_mode_property,
1909 1);
1910 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 1911 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1912 rdev->mode_info.underscan_property,
1913 UNDERSCAN_OFF);
e35755fa 1914 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1915 rdev->mode_info.underscan_hborder_property,
1916 0);
e35755fa 1917 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1918 rdev->mode_info.underscan_vborder_property,
1919 0);
1920 }
108dc8e8 1921 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 1922 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 1923 rdev->mode_info.audio_property,
e31fadd3 1924 RADEON_AUDIO_AUTO);
8666c076 1925 }
6214bb74
AD		 1926 if (ASIC_IS_AVIVO(rdev)) {
1927 drm_object_attach_property(&radeon_connector->base.base,
1928 rdev->mode_info.dither_property,
1929 RADEON_FMT_DITHER_DISABLE);
91915260 1930
6214bb74 1931 }
eac4dff6
AD		 1932 connector->interlace_allowed = true;
1933 /* in theory with a DP to VGA converter... */
c49948f4 1934 connector->doublescan_allowed = false;
eac4dff6
AD		 1935 break;
1936 case DRM_MODE_CONNECTOR_eDP:
1937 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1938 if (!radeon_dig_connector)
1939 goto failed;
1940 radeon_dig_connector->igp_lane_info = igp_lane_info;
1941 radeon_connector->con_priv = radeon_dig_connector;
855f5f1d 1942 drm_connector_init(dev, &radeon_connector->base, &radeon_edp_connector_funcs, connector_type);
eac4dff6
AD		 1943 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
1944 if (i2c_bus->valid) {
1945 /* add DP i2c bus */
1946 radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch");
496263bf
AD		 1947 if (radeon_dig_connector->dp_i2c_bus)
1948 has_aux = true;
1949 else
eac4dff6
AD		 1950 DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n");
1951 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1952 if (!radeon_connector->ddc_bus)
1953 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1954 }
e35755fa 1955 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1956 dev->mode_config.scaling_mode_property,
1957 DRM_MODE_SCALE_FULLSCREEN);
1958 subpixel_order = SubPixelHorizontalRGB;
1959 connector->interlace_allowed = false;
1960 connector->doublescan_allowed = false;
1961 break;
1962 case DRM_MODE_CONNECTOR_SVIDEO:
1963 case DRM_MODE_CONNECTOR_Composite:
1964 case DRM_MODE_CONNECTOR_9PinDIN:
1965 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
1966 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
1967 radeon_connector->dac_load_detect = true;
e35755fa 1968 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1969 rdev->mode_info.load_detect_property,
1970 1);
e35755fa 1971 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1972 rdev->mode_info.tv_std_property,
1973 radeon_atombios_get_tv_info(rdev));
1974 /* no HPD on analog connectors */
1975 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1976 connector->interlace_allowed = false;
1977 connector->doublescan_allowed = false;
1978 break;
1979 case DRM_MODE_CONNECTOR_LVDS:
1980 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1981 if (!radeon_dig_connector)
1982 goto failed;
1983 radeon_dig_connector->igp_lane_info = igp_lane_info;
1984 radeon_connector->con_priv = radeon_dig_connector;
1985 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
1986 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
1987 if (i2c_bus->valid) {
1988 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1989 if (!radeon_connector->ddc_bus)
1990 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1991 }
e35755fa 1992 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1993 dev->mode_config.scaling_mode_property,
1994 DRM_MODE_SCALE_FULLSCREEN);
1995 subpixel_order = SubPixelHorizontalRGB;
1996 connector->interlace_allowed = false;
1997 connector->doublescan_allowed = false;
1998 break;
771fe6b9 1999 }
771fe6b9
JG		 2000 }
2001
2581afcc 2002 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA		 2003 if (i2c_bus->valid)
2004 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2005 } else
2006 connector->polled = DRM_CONNECTOR_POLL_HPD;
2007
771fe6b9
JG		 2008 connector->display_info.subpixel_order = subpixel_order;
2009 drm_sysfs_connector_add(connector);
496263bf
AD		 2010
2011 if (has_aux)
2012 radeon_dp_aux_init(radeon_connector);
2013
771fe6b9
JG		 2014 return;
2015
2016failed:
771fe6b9
JG		 2017 drm_connector_cleanup(connector);
2018 kfree(connector);
2019}
2020
2021void
2022radeon_add_legacy_connector(struct drm_device *dev,
2023 uint32_t connector_id,
2024 uint32_t supported_device,
2025 int connector_type,
b75fad06 2026 struct radeon_i2c_bus_rec *i2c_bus,
eed45b30
AD		 2027 uint16_t connector_object_id,
2028 struct radeon_hpd *hpd)
771fe6b9 2029{
445282db 2030 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG		 2031 struct drm_connector *connector;
2032 struct radeon_connector *radeon_connector;
2033 uint32_t subpixel_order = SubPixelNone;
2034
4ce001ab 2035 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG		 2036 return;
2037
cf4c12f9
AD		 2038 /* if the user selected tv=0 don't try and add the connector */
2039 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
2040 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
2041 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
2042 (radeon_tv == 0))
2043 return;
2044
771fe6b9
JG		 2045 /* see if we already added it */
2046 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
2047 radeon_connector = to_radeon_connector(connector);
2048 if (radeon_connector->connector_id == connector_id) {
2049 radeon_connector->devices |= supported_device;
2050 return;
2051 }
2052 }
2053
2054 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
2055 if (!radeon_connector)
2056 return;
2057
2058 connector = &radeon_connector->base;
2059
2060 radeon_connector->connector_id = connector_id;
2061 radeon_connector->devices = supported_device;
b75fad06 2062 radeon_connector->connector_object_id = connector_object_id;
eed45b30 2063 radeon_connector->hpd = *hpd;
bc1c4dc3 2064
771fe6b9
JG		 2065 switch (connector_type) {
2066 case DRM_MODE_CONNECTOR_VGA:
2067 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 2068 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 2069 if (i2c_bus->valid) {
f376b94f 2070 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2071 if (!radeon_connector->ddc_bus)
a70882aa 2072 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2073 }
35e4b7af 2074 radeon_connector->dac_load_detect = true;
e35755fa 2075 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2076 rdev->mode_info.load_detect_property,
2077 1);
2581afcc
AD		 2078 /* no HPD on analog connectors */
2079 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
eb1f8e4f 2080 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
c49948f4
AD		 2081 connector->interlace_allowed = true;
2082 connector->doublescan_allowed = true;
771fe6b9
JG		 2083 break;
2084 case DRM_MODE_CONNECTOR_DVIA:
2085 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 2086 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 2087 if (i2c_bus->valid) {
f376b94f 2088 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2089 if (!radeon_connector->ddc_bus)
a70882aa 2090 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2091 }
35e4b7af 2092 radeon_connector->dac_load_detect = true;
e35755fa 2093 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2094 rdev->mode_info.load_detect_property,
2095 1);
2581afcc
AD		 2096 /* no HPD on analog connectors */
2097 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD		 2098 connector->interlace_allowed = true;
2099 connector->doublescan_allowed = true;
771fe6b9
JG		 2100 break;
2101 case DRM_MODE_CONNECTOR_DVII:
2102 case DRM_MODE_CONNECTOR_DVID:
2103 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
0b4c0f3f 2104 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
771fe6b9 2105 if (i2c_bus->valid) {
f376b94f 2106 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2107 if (!radeon_connector->ddc_bus)
a70882aa 2108 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
68b3adb4
AD		 2109 }
2110 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
35e4b7af 2111 radeon_connector->dac_load_detect = true;
e35755fa 2112 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2113 rdev->mode_info.load_detect_property,
2114 1);
771fe6b9
JG		 2115 }
2116 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD		 2117 connector->interlace_allowed = true;
2118 if (connector_type == DRM_MODE_CONNECTOR_DVII)
2119 connector->doublescan_allowed = true;
2120 else
2121 connector->doublescan_allowed = false;
771fe6b9
JG		 2122 break;
2123 case DRM_MODE_CONNECTOR_SVIDEO:
2124 case DRM_MODE_CONNECTOR_Composite:
2125 case DRM_MODE_CONNECTOR_9PinDIN:
cf4c12f9
AD		 2126 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
2127 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
2128 radeon_connector->dac_load_detect = true;
2129 /* RS400,RC410,RS480 chipset seems to report a lot
2130 * of false positive on load detect, we haven't yet
2131 * found a way to make load detect reliable on those
2132 * chipset, thus just disable it for TV.
2133 */
2134 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480)
2135 radeon_connector->dac_load_detect = false;
e35755fa 2136 drm_object_attach_property(&radeon_connector->base.base,
cf4c12f9
AD		 2137 rdev->mode_info.load_detect_property,
2138 radeon_connector->dac_load_detect);
e35755fa 2139 drm_object_attach_property(&radeon_connector->base.base,
cf4c12f9
AD		 2140 rdev->mode_info.tv_std_property,
2141 radeon_combios_get_tv_info(rdev));
2142 /* no HPD on analog connectors */
2143 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD		 2144 connector->interlace_allowed = false;
2145 connector->doublescan_allowed = false;
771fe6b9
JG		 2146 break;
2147 case DRM_MODE_CONNECTOR_LVDS:
2148 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
0b4c0f3f 2149 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
771fe6b9 2150 if (i2c_bus->valid) {
f376b94f 2151 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2152 if (!radeon_connector->ddc_bus)
a70882aa 2153 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2154 }
e35755fa 2155 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2156 dev->mode_config.scaling_mode_property,
2157 DRM_MODE_SCALE_FULLSCREEN);
771fe6b9 2158 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD		 2159 connector->interlace_allowed = false;
2160 connector->doublescan_allowed = false;
771fe6b9
JG		 2161 break;
2162 }
2163
2581afcc 2164 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA		 2165 if (i2c_bus->valid)
2166 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2167 } else
2168 connector->polled = DRM_CONNECTOR_POLL_HPD;
771fe6b9
JG		 2169 connector->display_info.subpixel_order = subpixel_order;
2170 drm_sysfs_connector_add(connector);
771fe6b9 2171}
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