[mirror_ubuntu-bionic-kernel.git] / drivers / gpu / drm / radeon / radeon_gem.c

/*
 * Copyright 2008 Advanced Micro Devices, Inc.
 * Copyright 2008 Red Hat Inc.
 * Copyright 2009 Jerome Glisse.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Dave Airlie
 *          Alex Deucher
 *          Jerome Glisse
 */
#include <drm/drmP.h>
#include <drm/radeon_drm.h>
#include "radeon.h"

int radeon_gem_object_init(struct drm_gem_object *obj)
{
	BUG();

	return 0;
}

void radeon_gem_object_free(struct drm_gem_object *gobj)
{
	struct radeon_bo *robj = gem_to_radeon_bo(gobj);

	if (robj) {
		if (robj->gem_base.import_attach)
			drm_prime_gem_destroy(&robj->gem_base, robj->tbo.sg);
		radeon_bo_unref(&robj);
	}
}

int radeon_gem_object_create(struct radeon_device *rdev, int size,
				int alignment, int initial_domain,
				bool discardable, bool kernel,
				struct drm_gem_object **obj)
{
	struct radeon_bo *robj;
	unsigned long max_size;
	int r;

	*obj = NULL;
	/* At least align on page size */
	if (alignment < PAGE_SIZE) {
		alignment = PAGE_SIZE;
	}

	/* maximun bo size is the minimun btw visible vram and gtt size */
	max_size = min(rdev->mc.visible_vram_size, rdev->mc.gtt_size);
	if (size > max_size) {
		printk(KERN_WARNING "%s:%d alloc size %dMb bigger than %ldMb limit\n",
		       __func__, __LINE__, size >> 20, max_size >> 20);
		return -ENOMEM;
	}

retry:
	r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain, NULL, &robj);
	if (r) {
		if (r != -ERESTARTSYS) {
			if (initial_domain == RADEON_GEM_DOMAIN_VRAM) {
				initial_domain |= RADEON_GEM_DOMAIN_GTT;
				goto retry;
			}
			DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, %d)\n",
				  size, initial_domain, alignment, r);
		}
		return r;
	}
	*obj = &robj->gem_base;

	mutex_lock(&rdev->gem.mutex);
	list_add_tail(&robj->list, &rdev->gem.objects);
	mutex_unlock(&rdev->gem.mutex);

	return 0;
}

int radeon_gem_set_domain(struct drm_gem_object *gobj,
			  uint32_t rdomain, uint32_t wdomain)
{
	struct radeon_bo *robj;
	uint32_t domain;
	int r;

	/* FIXME: reeimplement */
	robj = gem_to_radeon_bo(gobj);
	/* work out where to validate the buffer to */
	domain = wdomain;
	if (!domain) {
		domain = rdomain;
	}
	if (!domain) {
		/* Do nothings */
		printk(KERN_WARNING "Set domain without domain !\n");
		return 0;
	}
	if (domain == RADEON_GEM_DOMAIN_CPU) {
		/* Asking for cpu access wait for object idle */
		r = radeon_bo_wait(robj, NULL, false);
		if (r) {
			printk(KERN_ERR "Failed to wait for object !\n");
			return r;
		}
	}
	return 0;
}

int radeon_gem_init(struct radeon_device *rdev)
{
	INIT_LIST_HEAD(&rdev->gem.objects);
	return 0;
}

void radeon_gem_fini(struct radeon_device *rdev)
{
	radeon_bo_force_delete(rdev);
}

/*
 * Call from drm_gem_handle_create which appear in both new and open ioctl
 * case.
 */
int radeon_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv)
{
	struct radeon_bo *rbo = gem_to_radeon_bo(obj);
	struct radeon_device *rdev = rbo->rdev;
	struct radeon_fpriv *fpriv = file_priv->driver_priv;
	struct radeon_vm *vm = &fpriv->vm;
	struct radeon_bo_va *bo_va;
	int r;

	if (rdev->family < CHIP_CAYMAN) {
		return 0;
	}

	r = radeon_bo_reserve(rbo, false);
	if (r) {
		return r;
	}

	bo_va = radeon_vm_bo_find(vm, rbo);
	if (!bo_va) {
		bo_va = radeon_vm_bo_add(rdev, vm, rbo);
	} else {
		++bo_va->ref_count;
	}
	radeon_bo_unreserve(rbo);

	return 0;
}

void radeon_gem_object_close(struct drm_gem_object *obj,
			     struct drm_file *file_priv)
{
	struct radeon_bo *rbo = gem_to_radeon_bo(obj);
	struct radeon_device *rdev = rbo->rdev;
	struct radeon_fpriv *fpriv = file_priv->driver_priv;
	struct radeon_vm *vm = &fpriv->vm;
	struct radeon_bo_va *bo_va;
	int r;

	if (rdev->family < CHIP_CAYMAN) {
		return;
	}

	r = radeon_bo_reserve(rbo, true);
	if (r) {
		dev_err(rdev->dev, "leaking bo va because "
			"we fail to reserve bo (%d)\n", r);
		return;
	}
	bo_va = radeon_vm_bo_find(vm, rbo);
	if (bo_va) {
		if (--bo_va->ref_count == 0) {
			radeon_vm_bo_rmv(rdev, bo_va);
		}
	}
	radeon_bo_unreserve(rbo);
}

static int radeon_gem_handle_lockup(struct radeon_device *rdev, int r)
{
	if (r == -EDEADLK) {
		r = radeon_gpu_reset(rdev);
		if (!r)
			r = -EAGAIN;
	}
	return r;
}

/*
 * GEM ioctls.
 */
int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
			  struct drm_file *filp)
{
	struct radeon_device *rdev = dev->dev_private;
	struct drm_radeon_gem_info *args = data;
	struct ttm_mem_type_manager *man;
	unsigned i;

	man = &rdev->mman.bdev.man[TTM_PL_VRAM];

	args->vram_size = rdev->mc.real_vram_size;
	args->vram_visible = (u64)man->size << PAGE_SHIFT;
	if (rdev->stollen_vga_memory)
		args->vram_visible -= radeon_bo_size(rdev->stollen_vga_memory);
	args->vram_visible -= radeon_fbdev_total_size(rdev);
	args->gart_size = rdev->mc.gtt_size - 4096 - RADEON_IB_POOL_SIZE*64*1024;
	for(i = 0; i < RADEON_NUM_RINGS; ++i)
		args->gart_size -= rdev->ring[i].ring_size;
	return 0;
}

int radeon_gem_pread_ioctl(struct drm_device *dev, void *data,
			   struct drm_file *filp)
{
	/* TODO: implement */
	DRM_ERROR("unimplemented %s\n", __func__);
	return -ENOSYS;
}

int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data,
			    struct drm_file *filp)
{
	/* TODO: implement */
	DRM_ERROR("unimplemented %s\n", __func__);
	return -ENOSYS;
}

int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
			    struct drm_file *filp)
{
	struct radeon_device *rdev = dev->dev_private;
	struct drm_radeon_gem_create *args = data;
	struct drm_gem_object *gobj;
	uint32_t handle;
	int r;

	down_read(&rdev->exclusive_lock);
	/* create a gem object to contain this object in */
	args->size = roundup(args->size, PAGE_SIZE);
	r = radeon_gem_object_create(rdev, args->size, args->alignment,
					args->initial_domain, false,
					false, &gobj);
	if (r) {
		up_read(&rdev->exclusive_lock);
		r = radeon_gem_handle_lockup(rdev, r);
		return r;
	}
	r = drm_gem_handle_create(filp, gobj, &handle);
	/* drop reference from allocate - handle holds it now */
	drm_gem_object_unreference_unlocked(gobj);
	if (r) {
		up_read(&rdev->exclusive_lock);
		r = radeon_gem_handle_lockup(rdev, r);
		return r;
	}
	args->handle = handle;
	up_read(&rdev->exclusive_lock);
	return 0;
}

int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
				struct drm_file *filp)
{
	/* transition the BO to a domain -
	 * just validate the BO into a certain domain */
	struct radeon_device *rdev = dev->dev_private;
	struct drm_radeon_gem_set_domain *args = data;
	struct drm_gem_object *gobj;
	struct radeon_bo *robj;
	int r;

	/* for now if someone requests domain CPU -
	 * just make sure the buffer is finished with */
	down_read(&rdev->exclusive_lock);

	/* just do a BO wait for now */
	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	if (gobj == NULL) {
		up_read(&rdev->exclusive_lock);
		return -ENOENT;
	}
	robj = gem_to_radeon_bo(gobj);

	r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);

	drm_gem_object_unreference_unlocked(gobj);
	up_read(&rdev->exclusive_lock);
	r = radeon_gem_handle_lockup(robj->rdev, r);
	return r;
}

int radeon_mode_dumb_mmap(struct drm_file *filp,
			  struct drm_device *dev,
			  uint32_t handle, uint64_t *offset_p)
{
	struct drm_gem_object *gobj;
	struct radeon_bo *robj;

	gobj = drm_gem_object_lookup(dev, filp, handle);
	if (gobj == NULL) {
		return -ENOENT;
	}
	robj = gem_to_radeon_bo(gobj);
	*offset_p = radeon_bo_mmap_offset(robj);
	drm_gem_object_unreference_unlocked(gobj);
	return 0;
}

int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data,
			  struct drm_file *filp)
{
	struct drm_radeon_gem_mmap *args = data;

	return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr);
}

int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
			  struct drm_file *filp)
{
	struct radeon_device *rdev = dev->dev_private;
	struct drm_radeon_gem_busy *args = data;
	struct drm_gem_object *gobj;
	struct radeon_bo *robj;
	int r;
	uint32_t cur_placement = 0;

	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	if (gobj == NULL) {
		return -ENOENT;
	}
	robj = gem_to_radeon_bo(gobj);
	r = radeon_bo_wait(robj, &cur_placement, true);
	switch (cur_placement) {
	case TTM_PL_VRAM:
		args->domain = RADEON_GEM_DOMAIN_VRAM;
		break;
	case TTM_PL_TT:
		args->domain = RADEON_GEM_DOMAIN_GTT;
		break;
	case TTM_PL_SYSTEM:
		args->domain = RADEON_GEM_DOMAIN_CPU;
	default:
		break;
	}
	drm_gem_object_unreference_unlocked(gobj);
	r = radeon_gem_handle_lockup(rdev, r);
	return r;
}

int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
			      struct drm_file *filp)
{
	struct radeon_device *rdev = dev->dev_private;
	struct drm_radeon_gem_wait_idle *args = data;
	struct drm_gem_object *gobj;
	struct radeon_bo *robj;
	int r;

	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	if (gobj == NULL) {
		return -ENOENT;
	}
	robj = gem_to_radeon_bo(gobj);
	r = radeon_bo_wait(robj, NULL, false);
	/* callback hw specific functions if any */
	if (rdev->asic->ioctl_wait_idle)
		robj->rdev->asic->ioctl_wait_idle(rdev, robj);
	drm_gem_object_unreference_unlocked(gobj);
	r = radeon_gem_handle_lockup(rdev, r);
	return r;
}

int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
				struct drm_file *filp)
{
	struct drm_radeon_gem_set_tiling *args = data;
	struct drm_gem_object *gobj;
	struct radeon_bo *robj;
	int r = 0;

	DRM_DEBUG("%d \n", args->handle);
	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	if (gobj == NULL)
		return -ENOENT;
	robj = gem_to_radeon_bo(gobj);
	r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
	drm_gem_object_unreference_unlocked(gobj);
	return r;
}

int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
				struct drm_file *filp)
{
	struct drm_radeon_gem_get_tiling *args = data;
	struct drm_gem_object *gobj;
	struct radeon_bo *rbo;
	int r = 0;

	DRM_DEBUG("\n");
	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	if (gobj == NULL)
		return -ENOENT;
	rbo = gem_to_radeon_bo(gobj);
	r = radeon_bo_reserve(rbo, false);
	if (unlikely(r != 0))
		goto out;
	radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
	radeon_bo_unreserve(rbo);
out:
	drm_gem_object_unreference_unlocked(gobj);
	return r;
}

int radeon_gem_va_ioctl(struct drm_device *dev, void *data,
			  struct drm_file *filp)
{
	struct drm_radeon_gem_va *args = data;
	struct drm_gem_object *gobj;
	struct radeon_device *rdev = dev->dev_private;
	struct radeon_fpriv *fpriv = filp->driver_priv;
	struct radeon_bo *rbo;
	struct radeon_bo_va *bo_va;
	u32 invalid_flags;
	int r = 0;

	if (!rdev->vm_manager.enabled) {
		args->operation = RADEON_VA_RESULT_ERROR;
		return -ENOTTY;
	}

	/* !! DONT REMOVE !!
	 * We don't support vm_id yet, to be sure we don't have have broken
	 * userspace, reject anyone trying to use non 0 value thus moving
	 * forward we can use those fields without breaking existant userspace
	 */
	if (args->vm_id) {
		args->operation = RADEON_VA_RESULT_ERROR;
		return -EINVAL;
	}

	if (args->offset < RADEON_VA_RESERVED_SIZE) {
		dev_err(&dev->pdev->dev,
			"offset 0x%lX is in reserved area 0x%X\n",
			(unsigned long)args->offset,
			RADEON_VA_RESERVED_SIZE);
		args->operation = RADEON_VA_RESULT_ERROR;
		return -EINVAL;
	}

	/* don't remove, we need to enforce userspace to set the snooped flag
	 * otherwise we will endup with broken userspace and we won't be able
	 * to enable this feature without adding new interface
	 */
	invalid_flags = RADEON_VM_PAGE_VALID | RADEON_VM_PAGE_SYSTEM;
	if ((args->flags & invalid_flags)) {
		dev_err(&dev->pdev->dev, "invalid flags 0x%08X vs 0x%08X\n",
			args->flags, invalid_flags);
		args->operation = RADEON_VA_RESULT_ERROR;
		return -EINVAL;
	}
	if (!(args->flags & RADEON_VM_PAGE_SNOOPED)) {
		dev_err(&dev->pdev->dev, "only supported snooped mapping for now\n");
		args->operation = RADEON_VA_RESULT_ERROR;
		return -EINVAL;
	}

	switch (args->operation) {
	case RADEON_VA_MAP:
	case RADEON_VA_UNMAP:
		break;
	default:
		dev_err(&dev->pdev->dev, "unsupported operation %d\n",
			args->operation);
		args->operation = RADEON_VA_RESULT_ERROR;
		return -EINVAL;
	}

	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	if (gobj == NULL) {
		args->operation = RADEON_VA_RESULT_ERROR;
		return -ENOENT;
	}
	rbo = gem_to_radeon_bo(gobj);
	r = radeon_bo_reserve(rbo, false);
	if (r) {
		args->operation = RADEON_VA_RESULT_ERROR;
		drm_gem_object_unreference_unlocked(gobj);
		return r;
	}
	bo_va = radeon_vm_bo_find(&fpriv->vm, rbo);
	if (!bo_va) {
		args->operation = RADEON_VA_RESULT_ERROR;
		drm_gem_object_unreference_unlocked(gobj);
		return -ENOENT;
	}

	switch (args->operation) {
	case RADEON_VA_MAP:
		if (bo_va->soffset) {
			args->operation = RADEON_VA_RESULT_VA_EXIST;
			args->offset = bo_va->soffset;
			goto out;
		}
		r = radeon_vm_bo_set_addr(rdev, bo_va, args->offset, args->flags);
		break;
	case RADEON_VA_UNMAP:
		r = radeon_vm_bo_set_addr(rdev, bo_va, 0, 0);
		break;
	default:
		break;
	}
	args->operation = RADEON_VA_RESULT_OK;
	if (r) {
		args->operation = RADEON_VA_RESULT_ERROR;
	}
out:
	radeon_bo_unreserve(rbo);
	drm_gem_object_unreference_unlocked(gobj);
	return r;
}

int radeon_mode_dumb_create(struct drm_file *file_priv,
			    struct drm_device *dev,
			    struct drm_mode_create_dumb *args)
{
	struct radeon_device *rdev = dev->dev_private;
	struct drm_gem_object *gobj;
	uint32_t handle;
	int r;

	args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
	args->size = args->pitch * args->height;
	args->size = ALIGN(args->size, PAGE_SIZE);

	r = radeon_gem_object_create(rdev, args->size, 0,
				     RADEON_GEM_DOMAIN_VRAM,
				     false, ttm_bo_type_device,
				     &gobj);
	if (r)
		return -ENOMEM;

	r = drm_gem_handle_create(file_priv, gobj, &handle);
	/* drop reference from allocate - handle holds it now */
	drm_gem_object_unreference_unlocked(gobj);
	if (r) {
		return r;
	}
	args->handle = handle;
	return 0;
}

int radeon_mode_dumb_destroy(struct drm_file *file_priv,
			     struct drm_device *dev,
			     uint32_t handle)
{
	return drm_gem_handle_delete(file_priv, handle);
}
Commit	Line	Data
771fe6b9 JG	1	/*
	2	* Copyright 2008 Advanced Micro Devices, Inc.
	3	* Copyright 2008 Red Hat Inc.
	4	* Copyright 2009 Jerome Glisse.
	5	*
	6	* Permission is hereby granted, free of charge, to any person obtaining a
	7	* copy of this software and associated documentation files (the "Software"),
	8	* to deal in the Software without restriction, including without limitation
	9	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	10	* and/or sell copies of the Software, and to permit persons to whom the
	11	* Software is furnished to do so, subject to the following conditions:
	12	*
	13	* The above copyright notice and this permission notice shall be included in
	14	* all copies or substantial portions of the Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	20	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	21	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	22	* OTHER DEALINGS IN THE SOFTWARE.
	23	*
	24	* Authors: Dave Airlie
	25	* Alex Deucher
	26	* Jerome Glisse
	27	*/
760285e7 DH	28	#include <drm/drmP.h>
760285e7 DH	29	#include <drm/radeon_drm.h>
771fe6b9 JG	30	#include "radeon.h"
	31
	32	int radeon_gem_object_init(struct drm_gem_object *obj)
	33	{
441921d5 DV	34	BUG();
441921d5 DV	35
771fe6b9 JG	36	return 0;
	37	}
	38
	39	void radeon_gem_object_free(struct drm_gem_object *gobj)
	40	{
7e4d15d9	41	struct radeon_bo *robj = gem_to_radeon_bo(gobj);
771fe6b9	42
771fe6b9	43	if (robj) {
40f5cf99 AD	44	if (robj->gem_base.import_attach)
40f5cf99 AD	45	drm_prime_gem_destroy(&robj->gem_base, robj->tbo.sg);
4c788679	46	radeon_bo_unref(&robj);
771fe6b9 JG	47	}
	48	}
	49
	50	int radeon_gem_object_create(struct radeon_device *rdev, int size,
4c788679 JG	51	int alignment, int initial_domain,
	52	bool discardable, bool kernel,
	53	struct drm_gem_object **obj)
771fe6b9	54	{
4c788679	55	struct radeon_bo *robj;
6c0d112f	56	unsigned long max_size;
771fe6b9 JG	57	int r;
	58
	59	*obj = NULL;
771fe6b9 JG	60	/* At least align on page size */
	61	if (alignment < PAGE_SIZE) {
	62	alignment = PAGE_SIZE;
	63	}
6c0d112f CK	64
	65	/* maximun bo size is the minimun btw visible vram and gtt size */
	66	max_size = min(rdev->mc.visible_vram_size, rdev->mc.gtt_size);
	67	if (size > max_size) {
	68	printk(KERN_WARNING "%s:%d alloc size %dMb bigger than %ldMb limit\n",
	69	__func__, __LINE__, size >> 20, max_size >> 20);
	70	return -ENOMEM;
	71	}
	72
0fe7158c	73	retry:
40f5cf99	74	r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain, NULL, &robj);
771fe6b9	75	if (r) {
0fe7158c CK	76	if (r != -ERESTARTSYS) {
	77	if (initial_domain == RADEON_GEM_DOMAIN_VRAM) {
	78	initial_domain \|= RADEON_GEM_DOMAIN_GTT;
	79	goto retry;
	80	}
ecabd32a DA	81	DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, %d)\n",
ecabd32a DA	82	size, initial_domain, alignment, r);
0fe7158c	83	}
771fe6b9 JG	84	return r;
771fe6b9 JG	85	}
441921d5 DV	86	*obj = &robj->gem_base;
	87
	88	mutex_lock(&rdev->gem.mutex);
	89	list_add_tail(&robj->list, &rdev->gem.objects);
	90	mutex_unlock(&rdev->gem.mutex);
	91
771fe6b9 JG	92	return 0;
	93	}
	94
771fe6b9 JG	95	int radeon_gem_set_domain(struct drm_gem_object *gobj,
	96	uint32_t rdomain, uint32_t wdomain)
	97	{
4c788679	98	struct radeon_bo *robj;
771fe6b9 JG	99	uint32_t domain;
	100	int r;
	101
	102	/* FIXME: reeimplement */
7e4d15d9	103	robj = gem_to_radeon_bo(gobj);
771fe6b9 JG	104	/* work out where to validate the buffer to */
	105	domain = wdomain;
	106	if (!domain) {
	107	domain = rdomain;
	108	}
	109	if (!domain) {
	110	/* Do nothings */
b6cafa27	111	printk(KERN_WARNING "Set domain without domain !\n");
771fe6b9 JG	112	return 0;
	113	}
	114	if (domain == RADEON_GEM_DOMAIN_CPU) {
	115	/* Asking for cpu access wait for object idle */
4c788679	116	r = radeon_bo_wait(robj, NULL, false);
771fe6b9 JG	117	if (r) {
	118	printk(KERN_ERR "Failed to wait for object !\n");
	119	return r;
	120	}
	121	}
	122	return 0;
	123	}
	124
	125	int radeon_gem_init(struct radeon_device *rdev)
	126	{
	127	INIT_LIST_HEAD(&rdev->gem.objects);
	128	return 0;
	129	}
	130
	131	void radeon_gem_fini(struct radeon_device *rdev)
	132	{
4c788679	133	radeon_bo_force_delete(rdev);
771fe6b9 JG	134	}
771fe6b9 JG	135
721604a1 JG	136	/*
	137	* Call from drm_gem_handle_create which appear in both new and open ioctl
	138	* case.
	139	*/
	140	int radeon_gem_object_open(struct drm_gem_object obj, struct drm_file file_priv)
	141	{
e971bd5e CK	142	struct radeon_bo *rbo = gem_to_radeon_bo(obj);
	143	struct radeon_device *rdev = rbo->rdev;
	144	struct radeon_fpriv *fpriv = file_priv->driver_priv;
	145	struct radeon_vm *vm = &fpriv->vm;
	146	struct radeon_bo_va *bo_va;
	147	int r;
	148
	149	if (rdev->family < CHIP_CAYMAN) {
	150	return 0;
	151	}
	152
	153	r = radeon_bo_reserve(rbo, false);
	154	if (r) {
	155	return r;
	156	}
	157
	158	bo_va = radeon_vm_bo_find(vm, rbo);
	159	if (!bo_va) {
	160	bo_va = radeon_vm_bo_add(rdev, vm, rbo);
	161	} else {
	162	++bo_va->ref_count;
	163	}
	164	radeon_bo_unreserve(rbo);
	165
721604a1 JG	166	return 0;
	167	}
	168
	169	void radeon_gem_object_close(struct drm_gem_object *obj,
	170	struct drm_file *file_priv)
	171	{
	172	struct radeon_bo *rbo = gem_to_radeon_bo(obj);
	173	struct radeon_device *rdev = rbo->rdev;
	174	struct radeon_fpriv *fpriv = file_priv->driver_priv;
	175	struct radeon_vm *vm = &fpriv->vm;
e971bd5e	176	struct radeon_bo_va *bo_va;
d59f7021	177	int r;
721604a1 JG	178
	179	if (rdev->family < CHIP_CAYMAN) {
	180	return;
	181	}
	182
d59f7021 CK	183	r = radeon_bo_reserve(rbo, true);
	184	if (r) {
	185	dev_err(rdev->dev, "leaking bo va because "
	186	"we fail to reserve bo (%d)\n", r);
721604a1 JG	187	return;
721604a1 JG	188	}
e971bd5e CK	189	bo_va = radeon_vm_bo_find(vm, rbo);
	190	if (bo_va) {
	191	if (--bo_va->ref_count == 0) {
	192	radeon_vm_bo_rmv(rdev, bo_va);
	193	}
	194	}
721604a1 JG	195	radeon_bo_unreserve(rbo);
	196	}
	197
6c6f4783 CK	198	static int radeon_gem_handle_lockup(struct radeon_device *rdev, int r)
	199	{
	200	if (r == -EDEADLK) {
6c6f4783 CK	201	r = radeon_gpu_reset(rdev);
	202	if (!r)
	203	r = -EAGAIN;
6c6f4783 CK	204	}
	205	return r;
	206	}
771fe6b9 JG	207
	208	/*
	209	* GEM ioctls.
	210	*/
	211	int radeon_gem_info_ioctl(struct drm_device dev, void data,
	212	struct drm_file *filp)
	213	{
	214	struct radeon_device *rdev = dev->dev_private;
	215	struct drm_radeon_gem_info *args = data;
53595338	216	struct ttm_mem_type_manager *man;
bf852799	217	unsigned i;
53595338 DA	218
53595338 DA	219	man = &rdev->mman.bdev.man[TTM_PL_VRAM];
771fe6b9	220
7a50f01a	221	args->vram_size = rdev->mc.real_vram_size;
53595338	222	args->vram_visible = (u64)man->size << PAGE_SHIFT;
38e14921	223	if (rdev->stollen_vga_memory)
4c788679	224	args->vram_visible -= radeon_bo_size(rdev->stollen_vga_memory);
38651674	225	args->vram_visible -= radeon_fbdev_total_size(rdev);
7b1f2485	226	args->gart_size = rdev->mc.gtt_size - 4096 - RADEON_IB_POOL_SIZE641024;
bf852799	227	for(i = 0; i < RADEON_NUM_RINGS; ++i)
e32eb50d	228	args->gart_size -= rdev->ring[i].ring_size;
771fe6b9 JG	229	return 0;
	230	}
	231
	232	int radeon_gem_pread_ioctl(struct drm_device dev, void data,
	233	struct drm_file *filp)
	234	{
	235	/* TODO: implement */
	236	DRM_ERROR("unimplemented %s\n", __func__);
	237	return -ENOSYS;
	238	}
	239
	240	int radeon_gem_pwrite_ioctl(struct drm_device dev, void data,
	241	struct drm_file *filp)
	242	{
	243	/* TODO: implement */
	244	DRM_ERROR("unimplemented %s\n", __func__);
	245	return -ENOSYS;
	246	}
	247
	248	int radeon_gem_create_ioctl(struct drm_device dev, void data,
	249	struct drm_file *filp)
	250	{
	251	struct radeon_device *rdev = dev->dev_private;
	252	struct drm_radeon_gem_create *args = data;
	253	struct drm_gem_object *gobj;
	254	uint32_t handle;
	255	int r;
	256
dee53e7f	257	down_read(&rdev->exclusive_lock);
771fe6b9 JG	258	/* create a gem object to contain this object in */
	259	args->size = roundup(args->size, PAGE_SIZE);
	260	r = radeon_gem_object_create(rdev, args->size, args->alignment,
4c788679 JG	261	args->initial_domain, false,
4c788679 JG	262	false, &gobj);
771fe6b9	263	if (r) {
dee53e7f	264	up_read(&rdev->exclusive_lock);
6c6f4783	265	r = radeon_gem_handle_lockup(rdev, r);
771fe6b9 JG	266	return r;
	267	}
	268	r = drm_gem_handle_create(filp, gobj, &handle);
29d08b3e DA	269	/* drop reference from allocate - handle holds it now */
29d08b3e DA	270	drm_gem_object_unreference_unlocked(gobj);
771fe6b9	271	if (r) {
dee53e7f	272	up_read(&rdev->exclusive_lock);
6c6f4783	273	r = radeon_gem_handle_lockup(rdev, r);
771fe6b9 JG	274	return r;
771fe6b9 JG	275	}
771fe6b9	276	args->handle = handle;
dee53e7f	277	up_read(&rdev->exclusive_lock);
771fe6b9 JG	278	return 0;
	279	}
	280
	281	int radeon_gem_set_domain_ioctl(struct drm_device dev, void data,
	282	struct drm_file *filp)
	283	{
	284	/* transition the BO to a domain -
	285	* just validate the BO into a certain domain */
dee53e7f	286	struct radeon_device *rdev = dev->dev_private;
771fe6b9 JG	287	struct drm_radeon_gem_set_domain *args = data;
771fe6b9 JG	288	struct drm_gem_object *gobj;
4c788679	289	struct radeon_bo *robj;
771fe6b9 JG	290	int r;
	291
	292	/* for now if someone requests domain CPU -
	293	* just make sure the buffer is finished with */
dee53e7f	294	down_read(&rdev->exclusive_lock);
771fe6b9 JG	295
	296	/* just do a BO wait for now */
	297	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	298	if (gobj == NULL) {
dee53e7f	299	up_read(&rdev->exclusive_lock);
bf79cb91	300	return -ENOENT;
771fe6b9	301	}
7e4d15d9	302	robj = gem_to_radeon_bo(gobj);
771fe6b9 JG	303
	304	r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
	305
bc9025bd	306	drm_gem_object_unreference_unlocked(gobj);
dee53e7f	307	up_read(&rdev->exclusive_lock);
6c6f4783	308	r = radeon_gem_handle_lockup(robj->rdev, r);
771fe6b9 JG	309	return r;
	310	}
	311
ff72145b DA	312	int radeon_mode_dumb_mmap(struct drm_file *filp,
	313	struct drm_device *dev,
	314	uint32_t handle, uint64_t *offset_p)
771fe6b9	315	{
771fe6b9	316	struct drm_gem_object *gobj;
4c788679	317	struct radeon_bo *robj;
771fe6b9	318
ff72145b	319	gobj = drm_gem_object_lookup(dev, filp, handle);
771fe6b9	320	if (gobj == NULL) {
bf79cb91	321	return -ENOENT;
771fe6b9	322	}
7e4d15d9	323	robj = gem_to_radeon_bo(gobj);
ff72145b	324	*offset_p = radeon_bo_mmap_offset(robj);
bc9025bd	325	drm_gem_object_unreference_unlocked(gobj);
4c788679	326	return 0;
771fe6b9 JG	327	}
771fe6b9 JG	328
ff72145b DA	329	int radeon_gem_mmap_ioctl(struct drm_device dev, void data,
	330	struct drm_file *filp)
	331	{
	332	struct drm_radeon_gem_mmap *args = data;
	333
	334	return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr);
	335	}
	336
771fe6b9 JG	337	int radeon_gem_busy_ioctl(struct drm_device dev, void data,
	338	struct drm_file *filp)
	339	{
1ef5325b	340	struct radeon_device *rdev = dev->dev_private;
cefb87ef DA	341	struct drm_radeon_gem_busy *args = data;
cefb87ef DA	342	struct drm_gem_object *gobj;
4c788679	343	struct radeon_bo *robj;
cefb87ef	344	int r;
4361e52a	345	uint32_t cur_placement = 0;
cefb87ef DA	346
	347	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	348	if (gobj == NULL) {
bf79cb91	349	return -ENOENT;
cefb87ef	350	}
7e4d15d9	351	robj = gem_to_radeon_bo(gobj);
4c788679	352	r = radeon_bo_wait(robj, &cur_placement, true);
9f844e51 MD	353	switch (cur_placement) {
9f844e51 MD	354	case TTM_PL_VRAM:
cefb87ef	355	args->domain = RADEON_GEM_DOMAIN_VRAM;
9f844e51 MD	356	break;
9f844e51 MD	357	case TTM_PL_TT:
cefb87ef	358	args->domain = RADEON_GEM_DOMAIN_GTT;
9f844e51 MD	359	break;
9f844e51 MD	360	case TTM_PL_SYSTEM:
cefb87ef	361	args->domain = RADEON_GEM_DOMAIN_CPU;
9f844e51 MD	362	default:
	363	break;
	364	}
bc9025bd	365	drm_gem_object_unreference_unlocked(gobj);
1ef5325b	366	r = radeon_gem_handle_lockup(rdev, r);
e3b2415e	367	return r;
771fe6b9 JG	368	}
	369
	370	int radeon_gem_wait_idle_ioctl(struct drm_device dev, void data,
	371	struct drm_file *filp)
	372	{
1ef5325b	373	struct radeon_device *rdev = dev->dev_private;
771fe6b9 JG	374	struct drm_radeon_gem_wait_idle *args = data;
771fe6b9 JG	375	struct drm_gem_object *gobj;
4c788679	376	struct radeon_bo *robj;
771fe6b9 JG	377	int r;
	378
	379	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	380	if (gobj == NULL) {
bf79cb91	381	return -ENOENT;
771fe6b9	382	}
7e4d15d9	383	robj = gem_to_radeon_bo(gobj);
4c788679	384	r = radeon_bo_wait(robj, NULL, false);
062b389c	385	/* callback hw specific functions if any */
1ef5325b JG	386	if (rdev->asic->ioctl_wait_idle)
1ef5325b JG	387	robj->rdev->asic->ioctl_wait_idle(rdev, robj);
bc9025bd	388	drm_gem_object_unreference_unlocked(gobj);
1ef5325b	389	r = radeon_gem_handle_lockup(rdev, r);
771fe6b9 JG	390	return r;
771fe6b9 JG	391	}
e024e110 DA	392
	393	int radeon_gem_set_tiling_ioctl(struct drm_device dev, void data,
	394	struct drm_file *filp)
	395	{
	396	struct drm_radeon_gem_set_tiling *args = data;
	397	struct drm_gem_object *gobj;
4c788679	398	struct radeon_bo *robj;
e024e110 DA	399	int r = 0;
	400
	401	DRM_DEBUG("%d \n", args->handle);
	402	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	403	if (gobj == NULL)
bf79cb91	404	return -ENOENT;
7e4d15d9	405	robj = gem_to_radeon_bo(gobj);
4c788679	406	r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
bc9025bd	407	drm_gem_object_unreference_unlocked(gobj);
e024e110 DA	408	return r;
	409	}
	410
	411	int radeon_gem_get_tiling_ioctl(struct drm_device dev, void data,
	412	struct drm_file *filp)
	413	{
	414	struct drm_radeon_gem_get_tiling *args = data;
	415	struct drm_gem_object *gobj;
4c788679	416	struct radeon_bo *rbo;
e024e110 DA	417	int r = 0;
	418
	419	DRM_DEBUG("\n");
	420	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	421	if (gobj == NULL)
bf79cb91	422	return -ENOENT;
7e4d15d9	423	rbo = gem_to_radeon_bo(gobj);
4c788679 JG	424	r = radeon_bo_reserve(rbo, false);
4c788679 JG	425	if (unlikely(r != 0))
51f07b7e	426	goto out;
4c788679 JG	427	radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
4c788679 JG	428	radeon_bo_unreserve(rbo);
51f07b7e	429	out:
bc9025bd	430	drm_gem_object_unreference_unlocked(gobj);
721604a1 JG	431	return r;
	432	}
	433
	434	int radeon_gem_va_ioctl(struct drm_device dev, void data,
	435	struct drm_file *filp)
	436	{
	437	struct drm_radeon_gem_va *args = data;
	438	struct drm_gem_object *gobj;
	439	struct radeon_device *rdev = dev->dev_private;
	440	struct radeon_fpriv *fpriv = filp->driver_priv;
	441	struct radeon_bo *rbo;
	442	struct radeon_bo_va *bo_va;
	443	u32 invalid_flags;
	444	int r = 0;
	445
67e915e4 AD	446	if (!rdev->vm_manager.enabled) {
	447	args->operation = RADEON_VA_RESULT_ERROR;
	448	return -ENOTTY;
	449	}
	450
721604a1 JG	451	/* !! DONT REMOVE !!
	452	* We don't support vm_id yet, to be sure we don't have have broken
	453	* userspace, reject anyone trying to use non 0 value thus moving
	454	* forward we can use those fields without breaking existant userspace
	455	*/
	456	if (args->vm_id) {
	457	args->operation = RADEON_VA_RESULT_ERROR;
	458	return -EINVAL;
	459	}
	460
	461	if (args->offset < RADEON_VA_RESERVED_SIZE) {
	462	dev_err(&dev->pdev->dev,
	463	"offset 0x%lX is in reserved area 0x%X\n",
	464	(unsigned long)args->offset,
	465	RADEON_VA_RESERVED_SIZE);
	466	args->operation = RADEON_VA_RESULT_ERROR;
	467	return -EINVAL;
	468	}
	469
	470	/* don't remove, we need to enforce userspace to set the snooped flag
	471	* otherwise we will endup with broken userspace and we won't be able
	472	* to enable this feature without adding new interface
	473	*/
	474	invalid_flags = RADEON_VM_PAGE_VALID \| RADEON_VM_PAGE_SYSTEM;
	475	if ((args->flags & invalid_flags)) {
	476	dev_err(&dev->pdev->dev, "invalid flags 0x%08X vs 0x%08X\n",
	477	args->flags, invalid_flags);
	478	args->operation = RADEON_VA_RESULT_ERROR;
	479	return -EINVAL;
	480	}
	481	if (!(args->flags & RADEON_VM_PAGE_SNOOPED)) {
	482	dev_err(&dev->pdev->dev, "only supported snooped mapping for now\n");
	483	args->operation = RADEON_VA_RESULT_ERROR;
	484	return -EINVAL;
	485	}
	486
	487	switch (args->operation) {
	488	case RADEON_VA_MAP:
	489	case RADEON_VA_UNMAP:
	490	break;
	491	default:
	492	dev_err(&dev->pdev->dev, "unsupported operation %d\n",
	493	args->operation);
	494	args->operation = RADEON_VA_RESULT_ERROR;
	495	return -EINVAL;
	496	}
	497
	498	gobj = drm_gem_object_lookup(dev, filp, args->handle);
	499	if (gobj == NULL) {
	500	args->operation = RADEON_VA_RESULT_ERROR;
	501	return -ENOENT;
	502	}
	503	rbo = gem_to_radeon_bo(gobj);
	504	r = radeon_bo_reserve(rbo, false);
	505	if (r) {
	506	args->operation = RADEON_VA_RESULT_ERROR;
	507	drm_gem_object_unreference_unlocked(gobj);
	508	return r;
	509	}
e971bd5e CK	510	bo_va = radeon_vm_bo_find(&fpriv->vm, rbo);
	511	if (!bo_va) {
	512	args->operation = RADEON_VA_RESULT_ERROR;
	513	drm_gem_object_unreference_unlocked(gobj);
	514	return -ENOENT;
	515	}
	516
721604a1 JG	517	switch (args->operation) {
721604a1 JG	518	case RADEON_VA_MAP:
e971bd5e	519	if (bo_va->soffset) {
721604a1 JG	520	args->operation = RADEON_VA_RESULT_VA_EXIST;
	521	args->offset = bo_va->soffset;
	522	goto out;
	523	}
e971bd5e	524	r = radeon_vm_bo_set_addr(rdev, bo_va, args->offset, args->flags);
721604a1 JG	525	break;
721604a1 JG	526	case RADEON_VA_UNMAP:
e971bd5e	527	r = radeon_vm_bo_set_addr(rdev, bo_va, 0, 0);
721604a1 JG	528	break;
	529	default:
	530	break;
	531	}
	532	args->operation = RADEON_VA_RESULT_OK;
	533	if (r) {
	534	args->operation = RADEON_VA_RESULT_ERROR;
	535	}
	536	out:
	537	radeon_bo_unreserve(rbo);
	538	drm_gem_object_unreference_unlocked(gobj);
e024e110 DA	539	return r;
e024e110 DA	540	}
ff72145b DA	541
	542	int radeon_mode_dumb_create(struct drm_file *file_priv,
	543	struct drm_device *dev,
	544	struct drm_mode_create_dumb *args)
	545	{
	546	struct radeon_device *rdev = dev->dev_private;
	547	struct drm_gem_object *gobj;
c87a8d8d	548	uint32_t handle;
ff72145b DA	549	int r;
	550
	551	args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
	552	args->size = args->pitch * args->height;
	553	args->size = ALIGN(args->size, PAGE_SIZE);
	554
	555	r = radeon_gem_object_create(rdev, args->size, 0,
	556	RADEON_GEM_DOMAIN_VRAM,
	557	false, ttm_bo_type_device,
	558	&gobj);
	559	if (r)
	560	return -ENOMEM;
	561
c87a8d8d DA	562	r = drm_gem_handle_create(file_priv, gobj, &handle);
	563	/* drop reference from allocate - handle holds it now */
	564	drm_gem_object_unreference_unlocked(gobj);
ff72145b	565	if (r) {
ff72145b DA	566	return r;
ff72145b DA	567	}
c87a8d8d	568	args->handle = handle;
ff72145b DA	569	return 0;
	570	}
	571
	572	int radeon_mode_dumb_destroy(struct drm_file *file_priv,
	573	struct drm_device *dev,
	574	uint32_t handle)
	575	{
	576	return drm_gem_handle_delete(file_priv, handle);
	577	}