[mirror_ubuntu-artful-kernel.git] / drivers / gpu / drm / radeon / radeon_mode.h

/*
 * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
 *                VA Linux Systems Inc., Fremont, California.
 * Copyright 2008 Red Hat Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Original Authors:
 *   Kevin E. Martin, Rickard E. Faith, Alan Hourihane
 *
 * Kernel port Author: Dave Airlie
 */

#ifndef RADEON_MODE_H
#define RADEON_MODE_H

#include <drm_crtc.h>
#include <drm_mode.h>
#include <drm_edid.h>
#include <linux/i2c.h>
#include <linux/i2c-id.h>
#include <linux/i2c-algo-bit.h>
#include "radeon_fixed.h"

struct radeon_device;

#define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
#define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
#define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
#define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)

enum radeon_connector_type {
	CONNECTOR_NONE,
	CONNECTOR_VGA,
	CONNECTOR_DVI_I,
	CONNECTOR_DVI_D,
	CONNECTOR_DVI_A,
	CONNECTOR_STV,
	CONNECTOR_CTV,
	CONNECTOR_LVDS,
	CONNECTOR_DIGITAL,
	CONNECTOR_SCART,
	CONNECTOR_HDMI_TYPE_A,
	CONNECTOR_HDMI_TYPE_B,
	CONNECTOR_0XC,
	CONNECTOR_0XD,
	CONNECTOR_DIN,
	CONNECTOR_DISPLAY_PORT,
	CONNECTOR_UNSUPPORTED
};

enum radeon_dvi_type {
	DVI_AUTO,
	DVI_DIGITAL,
	DVI_ANALOG
};

enum radeon_rmx_type {
	RMX_OFF,
	RMX_FULL,
	RMX_CENTER,
	RMX_ASPECT
};

enum radeon_tv_std {
	TV_STD_NTSC,
	TV_STD_PAL,
	TV_STD_PAL_M,
	TV_STD_PAL_60,
	TV_STD_NTSC_J,
	TV_STD_SCART_PAL,
	TV_STD_SECAM,
	TV_STD_PAL_CN,
};

struct radeon_i2c_bus_rec {
	bool valid;
	uint32_t mask_clk_reg;
	uint32_t mask_data_reg;
	uint32_t a_clk_reg;
	uint32_t a_data_reg;
	uint32_t put_clk_reg;
	uint32_t put_data_reg;
	uint32_t get_clk_reg;
	uint32_t get_data_reg;
	uint32_t mask_clk_mask;
	uint32_t mask_data_mask;
	uint32_t put_clk_mask;
	uint32_t put_data_mask;
	uint32_t get_clk_mask;
	uint32_t get_data_mask;
	uint32_t a_clk_mask;
	uint32_t a_data_mask;
};

struct radeon_tmds_pll {
    uint32_t freq;
    uint32_t value;
};

#define RADEON_MAX_BIOS_CONNECTOR 16

#define RADEON_PLL_USE_BIOS_DIVS        (1 << 0)
#define RADEON_PLL_NO_ODD_POST_DIV      (1 << 1)
#define RADEON_PLL_USE_REF_DIV          (1 << 2)
#define RADEON_PLL_LEGACY               (1 << 3)
#define RADEON_PLL_PREFER_LOW_REF_DIV   (1 << 4)
#define RADEON_PLL_PREFER_HIGH_REF_DIV  (1 << 5)
#define RADEON_PLL_PREFER_LOW_FB_DIV    (1 << 6)
#define RADEON_PLL_PREFER_HIGH_FB_DIV   (1 << 7)
#define RADEON_PLL_PREFER_LOW_POST_DIV  (1 << 8)
#define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
#define RADEON_PLL_USE_FRAC_FB_DIV      (1 << 10)
#define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)

struct radeon_pll {
	uint16_t reference_freq;
	uint16_t reference_div;
	uint32_t pll_in_min;
	uint32_t pll_in_max;
	uint32_t pll_out_min;
	uint32_t pll_out_max;
	uint16_t xclk;

	uint32_t min_ref_div;
	uint32_t max_ref_div;
	uint32_t min_post_div;
	uint32_t max_post_div;
	uint32_t min_feedback_div;
	uint32_t max_feedback_div;
	uint32_t min_frac_feedback_div;
	uint32_t max_frac_feedback_div;
	uint32_t best_vco;
};

struct radeon_i2c_chan {
	struct drm_device *dev;
	struct i2c_adapter adapter;
	struct i2c_algo_bit_data algo;
	struct radeon_i2c_bus_rec rec;
};

/* mostly for macs, but really any system without connector tables */
enum radeon_connector_table {
	CT_NONE,
	CT_GENERIC,
	CT_IBOOK,
	CT_POWERBOOK_EXTERNAL,
	CT_POWERBOOK_INTERNAL,
	CT_POWERBOOK_VGA,
	CT_MINI_EXTERNAL,
	CT_MINI_INTERNAL,
	CT_IMAC_G5_ISIGHT,
	CT_EMAC,
};

struct radeon_mode_info {
	struct atom_context *atom_context;
	enum radeon_connector_table connector_table;
	bool mode_config_initialized;
	struct radeon_crtc *crtcs[2];
};

struct radeon_native_mode {
	/* preferred mode */
	uint32_t panel_xres, panel_yres;
	uint32_t hoverplus, hsync_width;
	uint32_t hblank;
	uint32_t voverplus, vsync_width;
	uint32_t vblank;
	uint32_t dotclock;
	uint32_t flags;
};

struct radeon_crtc {
	struct drm_crtc base;
	int crtc_id;
	u16 lut_r[256], lut_g[256], lut_b[256];
	bool enabled;
	bool can_tile;
	uint32_t crtc_offset;
	struct drm_gem_object *cursor_bo;
	uint64_t cursor_addr;
	int cursor_width;
	int cursor_height;
	uint32_t legacy_display_base_addr;
	uint32_t legacy_cursor_offset;
	enum radeon_rmx_type rmx_type;
	uint32_t devices;
	fixed20_12 vsc;
	fixed20_12 hsc;
	struct radeon_native_mode native_mode;
};

struct radeon_encoder_primary_dac {
	/* legacy primary dac */
	uint32_t ps2_pdac_adj;
};

struct radeon_encoder_lvds {
	/* legacy lvds */
	uint16_t panel_vcc_delay;
	uint8_t  panel_pwr_delay;
	uint8_t  panel_digon_delay;
	uint8_t  panel_blon_delay;
	uint16_t panel_ref_divider;
	uint8_t  panel_post_divider;
	uint16_t panel_fb_divider;
	bool     use_bios_dividers;
	uint32_t lvds_gen_cntl;
	/* panel mode */
	struct radeon_native_mode native_mode;
};

struct radeon_encoder_tv_dac {
	/* legacy tv dac */
	uint32_t ps2_tvdac_adj;
	uint32_t ntsc_tvdac_adj;
	uint32_t pal_tvdac_adj;

	enum radeon_tv_std tv_std;
};

struct radeon_encoder_int_tmds {
	/* legacy int tmds */
	struct radeon_tmds_pll tmds_pll[4];
};

struct radeon_encoder_atom_dig {
	/* atom dig */
	bool coherent_mode;
	int dig_block;
	/* atom lvds */
	uint32_t lvds_misc;
	uint16_t panel_pwr_delay;
	/* panel mode */
	struct radeon_native_mode native_mode;
};

struct radeon_encoder {
	struct drm_encoder base;
	uint32_t encoder_id;
	uint32_t devices;
	uint32_t flags;
	uint32_t pixel_clock;
	enum radeon_rmx_type rmx_type;
	struct radeon_native_mode native_mode;
	void *enc_priv;
};

struct radeon_connector_atom_dig {
	uint32_t igp_lane_info;
	bool linkb;
};

struct radeon_connector {
	struct drm_connector base;
	uint32_t connector_id;
	uint32_t devices;
	struct radeon_i2c_chan *ddc_bus;
	int use_digital;
	void *con_priv;
};

struct radeon_framebuffer {
	struct drm_framebuffer base;
	struct drm_gem_object *obj;
};

extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
						 struct radeon_i2c_bus_rec *rec,
						 const char *name);
extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector);
extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);

extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);

extern void radeon_compute_pll(struct radeon_pll *pll,
			       uint64_t freq,
			       uint32_t *dot_clock_p,
			       uint32_t *fb_div_p,
			       uint32_t *frac_fb_div_p,
			       uint32_t *ref_div_p,
			       uint32_t *post_div_p,
			       int flags);

struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action);
extern int atombios_get_encoder_mode(struct drm_encoder *encoder);

extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
				   struct drm_framebuffer *old_fb);
extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
				   struct drm_display_mode *mode,
				   struct drm_display_mode *adjusted_mode,
				   int x, int y,
				   struct drm_framebuffer *old_fb);
extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);

extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
				 struct drm_framebuffer *old_fb);
extern void radeon_legacy_atom_set_surface(struct drm_crtc *crtc);

extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
				  struct drm_file *file_priv,
				  uint32_t handle,
				  uint32_t width,
				  uint32_t height);
extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
				   int x, int y);

extern bool radeon_atom_get_clock_info(struct drm_device *dev);
extern bool radeon_combios_get_clock_info(struct drm_device *dev);
extern struct radeon_encoder_atom_dig *
radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
extern struct radeon_encoder_int_tmds *
radeon_atombios_get_tmds_info(struct radeon_encoder *encoder);
extern struct radeon_encoder_primary_dac *
radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
extern struct radeon_encoder_tv_dac *
radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
extern struct radeon_encoder_lvds *
radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
extern struct radeon_encoder_int_tmds *
radeon_combios_get_tmds_info(struct radeon_encoder *encoder);
extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
extern struct radeon_encoder_tv_dac *
radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
extern struct radeon_encoder_primary_dac *
radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
extern void
radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
extern void
radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
extern void
radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
extern void
radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
				     u16 blue, int regno);
struct drm_framebuffer *radeon_framebuffer_create(struct drm_device *dev,
						  struct drm_mode_fb_cmd *mode_cmd,
						  struct drm_gem_object *obj);

int radeonfb_probe(struct drm_device *dev);

int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
void radeon_atombios_init_crtc(struct drm_device *dev,
			       struct radeon_crtc *radeon_crtc);
void radeon_legacy_init_crtc(struct drm_device *dev,
			     struct radeon_crtc *radeon_crtc);
void radeon_i2c_do_lock(struct radeon_connector *radeon_connector, int lock_state);

void radeon_get_clock_info(struct drm_device *dev);

extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);

void radeon_rmx_mode_fixup(struct drm_encoder *encoder,
			   struct drm_display_mode *mode,
			   struct drm_display_mode *adjusted_mode);
void radeon_enc_destroy(struct drm_encoder *encoder);
void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
void radeon_combios_asic_init(struct drm_device *dev);
extern int radeon_static_clocks_init(struct drm_device *dev);
bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
					struct drm_display_mode *mode,
					struct drm_display_mode *adjusted_mode);
void atom_rv515_force_tv_scaler(struct radeon_device *rdev);

#endif
Commit	Line	Data
771fe6b9 JG	1	/*
	2	* Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
	3	* VA Linux Systems Inc., Fremont, California.
	4	* Copyright 2008 Red Hat Inc.
	5	*
	6	* Permission is hereby granted, free of charge, to any person obtaining a
	7	* copy of this software and associated documentation files (the "Software"),
	8	* to deal in the Software without restriction, including without limitation
	9	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	10	* and/or sell copies of the Software, and to permit persons to whom the
	11	* Software is furnished to do so, subject to the following conditions:
	12	*
	13	* The above copyright notice and this permission notice shall be included in
	14	* all copies or substantial portions of the Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	20	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	21	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	22	* OTHER DEALINGS IN THE SOFTWARE.
	23	*
	24	* Original Authors:
	25	* Kevin E. Martin, Rickard E. Faith, Alan Hourihane
	26	*
	27	* Kernel port Author: Dave Airlie
	28	*/
	29
	30	#ifndef RADEON_MODE_H
	31	#define RADEON_MODE_H
	32
	33	#include <drm_crtc.h>
	34	#include <drm_mode.h>
	35	#include <drm_edid.h>
	36	#include <linux/i2c.h>
	37	#include <linux/i2c-id.h>
	38	#include <linux/i2c-algo-bit.h>
c93bb85b JG	39	#include "radeon_fixed.h"
	40
	41	struct radeon_device;
771fe6b9 JG	42
	43	#define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
	44	#define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
	45	#define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
	46	#define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
	47
	48	enum radeon_connector_type {
	49	CONNECTOR_NONE,
	50	CONNECTOR_VGA,
	51	CONNECTOR_DVI_I,
	52	CONNECTOR_DVI_D,
	53	CONNECTOR_DVI_A,
	54	CONNECTOR_STV,
	55	CONNECTOR_CTV,
	56	CONNECTOR_LVDS,
	57	CONNECTOR_DIGITAL,
	58	CONNECTOR_SCART,
	59	CONNECTOR_HDMI_TYPE_A,
	60	CONNECTOR_HDMI_TYPE_B,
	61	CONNECTOR_0XC,
	62	CONNECTOR_0XD,
	63	CONNECTOR_DIN,
	64	CONNECTOR_DISPLAY_PORT,
	65	CONNECTOR_UNSUPPORTED
	66	};
	67
	68	enum radeon_dvi_type {
	69	DVI_AUTO,
	70	DVI_DIGITAL,
	71	DVI_ANALOG
	72	};
	73
	74	enum radeon_rmx_type {
	75	RMX_OFF,
	76	RMX_FULL,
	77	RMX_CENTER,
	78	RMX_ASPECT
	79	};
	80
	81	enum radeon_tv_std {
	82	TV_STD_NTSC,
	83	TV_STD_PAL,
	84	TV_STD_PAL_M,
	85	TV_STD_PAL_60,
	86	TV_STD_NTSC_J,
	87	TV_STD_SCART_PAL,
	88	TV_STD_SECAM,
	89	TV_STD_PAL_CN,
	90	};
	91
	92	struct radeon_i2c_bus_rec {
	93	bool valid;
	94	uint32_t mask_clk_reg;
	95	uint32_t mask_data_reg;
	96	uint32_t a_clk_reg;
	97	uint32_t a_data_reg;
	98	uint32_t put_clk_reg;
	99	uint32_t put_data_reg;
	100	uint32_t get_clk_reg;
	101	uint32_t get_data_reg;
	102	uint32_t mask_clk_mask;
	103	uint32_t mask_data_mask;
	104	uint32_t put_clk_mask;
	105	uint32_t put_data_mask;
106	uint32_t get_clk_mask;
107	uint32_t get_data_mask;
108	uint32_t a_clk_mask;
109	uint32_t a_data_mask;
110	};
111
112	struct radeon_tmds_pll {
113	uint32_t freq;
114	uint32_t value;
115	};
116
117	#define RADEON_MAX_BIOS_CONNECTOR 16
118
119	#define RADEON_PLL_USE_BIOS_DIVS (1 << 0)
120	#define RADEON_PLL_NO_ODD_POST_DIV (1 << 1)
121	#define RADEON_PLL_USE_REF_DIV (1 << 2)
122	#define RADEON_PLL_LEGACY (1 << 3)
123	#define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4)
124	#define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5)
125	#define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6)
126	#define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7)
127	#define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8)
128	#define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
129	#define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
d0e275a9	130	#define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
771fe6b9 JG	131
	132	struct radeon_pll {
	133	uint16_t reference_freq;
	134	uint16_t reference_div;
	135	uint32_t pll_in_min;
	136	uint32_t pll_in_max;
	137	uint32_t pll_out_min;
	138	uint32_t pll_out_max;
	139	uint16_t xclk;
	140
	141	uint32_t min_ref_div;
	142	uint32_t max_ref_div;
	143	uint32_t min_post_div;
	144	uint32_t max_post_div;
	145	uint32_t min_feedback_div;
	146	uint32_t max_feedback_div;
	147	uint32_t min_frac_feedback_div;
	148	uint32_t max_frac_feedback_div;
	149	uint32_t best_vco;
	150	};
	151
	152	struct radeon_i2c_chan {
	153	struct drm_device *dev;
	154	struct i2c_adapter adapter;
	155	struct i2c_algo_bit_data algo;
	156	struct radeon_i2c_bus_rec rec;
	157	};
	158
	159	/* mostly for macs, but really any system without connector tables */
	160	enum radeon_connector_table {
	161	CT_NONE,
	162	CT_GENERIC,
	163	CT_IBOOK,
	164	CT_POWERBOOK_EXTERNAL,
	165	CT_POWERBOOK_INTERNAL,
	166	CT_POWERBOOK_VGA,
	167	CT_MINI_EXTERNAL,
	168	CT_MINI_INTERNAL,
	169	CT_IMAC_G5_ISIGHT,
	170	CT_EMAC,
	171	};
	172
	173	struct radeon_mode_info {
	174	struct atom_context *atom_context;
	175	enum radeon_connector_table connector_table;
	176	bool mode_config_initialized;
c93bb85b JG	177	struct radeon_crtc *crtcs[2];
	178	};
	179
	180	struct radeon_native_mode {
	181	/* preferred mode */
	182	uint32_t panel_xres, panel_yres;
	183	uint32_t hoverplus, hsync_width;
	184	uint32_t hblank;
	185	uint32_t voverplus, vsync_width;
	186	uint32_t vblank;
	187	uint32_t dotclock;
	188	uint32_t flags;
771fe6b9 JG	189	};
	190
	191	struct radeon_crtc {
	192	struct drm_crtc base;
	193	int crtc_id;
	194	u16 lut_r[256], lut_g[256], lut_b[256];
	195	bool enabled;
	196	bool can_tile;
	197	uint32_t crtc_offset;
771fe6b9 JG	198	struct drm_gem_object *cursor_bo;
	199	uint64_t cursor_addr;
	200	int cursor_width;
	201	int cursor_height;
4162338a	202	uint32_t legacy_display_base_addr;
c836e862	203	uint32_t legacy_cursor_offset;
c93bb85b JG	204	enum radeon_rmx_type rmx_type;
	205	uint32_t devices;
	206	fixed20_12 vsc;
	207	fixed20_12 hsc;
	208	struct radeon_native_mode native_mode;
771fe6b9 JG	209	};
	210
	211	struct radeon_encoder_primary_dac {
	212	/* legacy primary dac */
	213	uint32_t ps2_pdac_adj;
	214	};
	215
	216	struct radeon_encoder_lvds {
	217	/* legacy lvds */
	218	uint16_t panel_vcc_delay;
	219	uint8_t panel_pwr_delay;
	220	uint8_t panel_digon_delay;
	221	uint8_t panel_blon_delay;
	222	uint16_t panel_ref_divider;
	223	uint8_t panel_post_divider;
	224	uint16_t panel_fb_divider;
	225	bool use_bios_dividers;
	226	uint32_t lvds_gen_cntl;
	227	/* panel mode */
	228	struct radeon_native_mode native_mode;
	229	};
	230
	231	struct radeon_encoder_tv_dac {
	232	/* legacy tv dac */
	233	uint32_t ps2_tvdac_adj;
	234	uint32_t ntsc_tvdac_adj;
	235	uint32_t pal_tvdac_adj;
	236
	237	enum radeon_tv_std tv_std;
	238	};
	239
	240	struct radeon_encoder_int_tmds {
	241	/* legacy int tmds */
	242	struct radeon_tmds_pll tmds_pll[4];
	243	};
	244
	245	struct radeon_encoder_atom_dig {
	246	/* atom dig */
	247	bool coherent_mode;
	248	int dig_block;
	249	/* atom lvds */
	250	uint32_t lvds_misc;
	251	uint16_t panel_pwr_delay;
	252	/* panel mode */
	253	struct radeon_native_mode native_mode;
	254	};
	255
	256	struct radeon_encoder {
	257	struct drm_encoder base;
	258	uint32_t encoder_id;
	259	uint32_t devices;
	260	uint32_t flags;
	261	uint32_t pixel_clock;
	262	enum radeon_rmx_type rmx_type;
	263	struct radeon_native_mode native_mode;
	264	void *enc_priv;
	265	};
	266
	267	struct radeon_connector_atom_dig {
	268	uint32_t igp_lane_info;
	269	bool linkb;
	270	};
	271
	272	struct radeon_connector {
273	struct drm_connector base;
274	uint32_t connector_id;
275	uint32_t devices;
276	struct radeon_i2c_chan *ddc_bus;
277	int use_digital;
278	void *con_priv;
279	};
280
281	struct radeon_framebuffer {
282	struct drm_framebuffer base;
283	struct drm_gem_object *obj;
284	};
285
286	extern struct radeon_i2c_chan radeon_i2c_create(struct drm_device dev,
287	struct radeon_i2c_bus_rec *rec,
288	const char *name);
289	extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
290	extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector);
291	extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
292
293	extern struct drm_encoder radeon_best_encoder(struct drm_connector connector);
294
295	extern void radeon_compute_pll(struct radeon_pll *pll,
296	uint64_t freq,
297	uint32_t *dot_clock_p,
298	uint32_t *fb_div_p,
299	uint32_t *frac_fb_div_p,
300	uint32_t *ref_div_p,
301	uint32_t *post_div_p,
302	int flags);
303
304	struct drm_encoder radeon_encoder_legacy_lvds_add(struct drm_device dev, int bios_index);
305	struct drm_encoder radeon_encoder_legacy_primary_dac_add(struct drm_device dev, int bios_index, int with_tv);
306	struct drm_encoder radeon_encoder_legacy_tv_dac_add(struct drm_device dev, int bios_index, int with_tv);
307	struct drm_encoder radeon_encoder_legacy_tmds_int_add(struct drm_device dev, int bios_index);
308	struct drm_encoder radeon_encoder_legacy_tmds_ext_add(struct drm_device dev, int bios_index);
309	extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action);
310	extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
311
312	extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
313	extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
314	struct drm_framebuffer *old_fb);
315	extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
316	struct drm_display_mode *mode,
317	struct drm_display_mode *adjusted_mode,
318	int x, int y,
319	struct drm_framebuffer *old_fb);
320	extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
321
322	extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
323	struct drm_framebuffer *old_fb);
324	extern void radeon_legacy_atom_set_surface(struct drm_crtc *crtc);
325
326	extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
327	struct drm_file *file_priv,
328	uint32_t handle,
329	uint32_t width,
330	uint32_t height);
331	extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
332	int x, int y);
333
334	extern bool radeon_atom_get_clock_info(struct drm_device *dev);
335	extern bool radeon_combios_get_clock_info(struct drm_device *dev);
336	extern struct radeon_encoder_atom_dig *
337	radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
338	extern struct radeon_encoder_int_tmds *
339	radeon_atombios_get_tmds_info(struct radeon_encoder *encoder);
6fe7ac3f AD	340	extern struct radeon_encoder_primary_dac *
	341	radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
	342	extern struct radeon_encoder_tv_dac *
	343	radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
771fe6b9 JG	344	extern struct radeon_encoder_lvds *
	345	radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
	346	extern struct radeon_encoder_int_tmds *
	347	radeon_combios_get_tmds_info(struct radeon_encoder *encoder);
	348	extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
	349	extern struct radeon_encoder_tv_dac *
	350	radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
	351	extern struct radeon_encoder_primary_dac *
	352	radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
	353	extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
	354	extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
	355	extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
	356	extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
	357	extern void
	358	radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
	359	extern void
	360	radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
	361	extern void
	362	radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
	363	extern void
	364	radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
	365	extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
	366	u16 blue, int regno);
	367	struct drm_framebuffer radeon_framebuffer_create(struct drm_device dev,
	368	struct drm_mode_fb_cmd *mode_cmd,
	369	struct drm_gem_object *obj);
	370
	371	int radeonfb_probe(struct drm_device *dev);
	372
	373	int radeonfb_remove(struct drm_device dev, struct drm_framebuffer fb);
	374	bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
	375	bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
	376	void radeon_atombios_init_crtc(struct drm_device *dev,
	377	struct radeon_crtc *radeon_crtc);
	378	void radeon_legacy_init_crtc(struct drm_device *dev,
	379	struct radeon_crtc *radeon_crtc);
	380	void radeon_i2c_do_lock(struct radeon_connector *radeon_connector, int lock_state);
	381
	382	void radeon_get_clock_info(struct drm_device *dev);
	383
	384	extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
	385	extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
	386
	387	void radeon_rmx_mode_fixup(struct drm_encoder *encoder,
	388	struct drm_display_mode *mode,
	389	struct drm_display_mode *adjusted_mode);
	390	void radeon_enc_destroy(struct drm_encoder *encoder);
	391	void radeon_copy_fb(struct drm_device dev, struct drm_gem_object dst_obj);
	392	void radeon_combios_asic_init(struct drm_device *dev);
	393	extern int radeon_static_clocks_init(struct drm_device *dev);
c93bb85b JG	394	bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
	395	struct drm_display_mode *mode,
	396	struct drm_display_mode *adjusted_mode);
	397	void atom_rv515_force_tv_scaler(struct radeon_device *rdev);
771fe6b9 JG	398
771fe6b9 JG	399	#endif