]>
Commit | Line | Data |
---|---|---|
4bf8e196 LP |
1 | /* |
2 | * rcar_du_kms.c -- R-Car Display Unit Mode Setting | |
3 | * | |
2427b303 | 4 | * Copyright (C) 2013-2015 Renesas Electronics Corporation |
4bf8e196 LP |
5 | * |
6 | * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com) | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | */ | |
13 | ||
14 | #include <drm/drmP.h> | |
8d3f9b22 | 15 | #include <drm/drm_atomic.h> |
336d04a1 | 16 | #include <drm/drm_atomic_helper.h> |
4bf8e196 LP |
17 | #include <drm/drm_crtc.h> |
18 | #include <drm/drm_crtc_helper.h> | |
19 | #include <drm/drm_fb_cma_helper.h> | |
20 | #include <drm/drm_gem_cma_helper.h> | |
365c3851 | 21 | #include <drm/drm_gem_framebuffer_helper.h> |
4bf8e196 | 22 | |
96c02691 | 23 | #include <linux/of_graph.h> |
8d3f9b22 | 24 | #include <linux/wait.h> |
96c02691 | 25 | |
4bf8e196 LP |
26 | #include "rcar_du_crtc.h" |
27 | #include "rcar_du_drv.h" | |
6978f123 | 28 | #include "rcar_du_encoder.h" |
4bf8e196 | 29 | #include "rcar_du_kms.h" |
90374b5c | 30 | #include "rcar_du_lvdsenc.h" |
4bf8e196 | 31 | #include "rcar_du_regs.h" |
6d62ef3a | 32 | #include "rcar_du_vsp.h" |
4bf8e196 LP |
33 | |
34 | /* ----------------------------------------------------------------------------- | |
35 | * Format helpers | |
36 | */ | |
37 | ||
38 | static const struct rcar_du_format_info rcar_du_format_infos[] = { | |
39 | { | |
40 | .fourcc = DRM_FORMAT_RGB565, | |
41 | .bpp = 16, | |
42 | .planes = 1, | |
43 | .pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP, | |
44 | .edf = PnDDCR4_EDF_NONE, | |
45 | }, { | |
46 | .fourcc = DRM_FORMAT_ARGB1555, | |
47 | .bpp = 16, | |
48 | .planes = 1, | |
49 | .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB, | |
50 | .edf = PnDDCR4_EDF_NONE, | |
51 | }, { | |
52 | .fourcc = DRM_FORMAT_XRGB1555, | |
53 | .bpp = 16, | |
54 | .planes = 1, | |
55 | .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB, | |
56 | .edf = PnDDCR4_EDF_NONE, | |
57 | }, { | |
58 | .fourcc = DRM_FORMAT_XRGB8888, | |
59 | .bpp = 32, | |
60 | .planes = 1, | |
61 | .pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP, | |
62 | .edf = PnDDCR4_EDF_RGB888, | |
63 | }, { | |
64 | .fourcc = DRM_FORMAT_ARGB8888, | |
65 | .bpp = 32, | |
66 | .planes = 1, | |
67 | .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_16BPP, | |
68 | .edf = PnDDCR4_EDF_ARGB8888, | |
69 | }, { | |
70 | .fourcc = DRM_FORMAT_UYVY, | |
71 | .bpp = 16, | |
72 | .planes = 1, | |
73 | .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC, | |
74 | .edf = PnDDCR4_EDF_NONE, | |
75 | }, { | |
76 | .fourcc = DRM_FORMAT_YUYV, | |
77 | .bpp = 16, | |
78 | .planes = 1, | |
79 | .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC, | |
80 | .edf = PnDDCR4_EDF_NONE, | |
81 | }, { | |
82 | .fourcc = DRM_FORMAT_NV12, | |
83 | .bpp = 12, | |
84 | .planes = 2, | |
85 | .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC, | |
86 | .edf = PnDDCR4_EDF_NONE, | |
87 | }, { | |
88 | .fourcc = DRM_FORMAT_NV21, | |
89 | .bpp = 12, | |
90 | .planes = 2, | |
91 | .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC, | |
92 | .edf = PnDDCR4_EDF_NONE, | |
93 | }, { | |
4bf8e196 LP |
94 | .fourcc = DRM_FORMAT_NV16, |
95 | .bpp = 16, | |
96 | .planes = 2, | |
97 | .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC, | |
98 | .edf = PnDDCR4_EDF_NONE, | |
99 | }, | |
f3bafc12 LP |
100 | /* |
101 | * The following formats are not supported on Gen2 and thus have no | |
7863ac50 LP |
102 | * associated .pnmr or .edf settings. |
103 | */ | |
104 | { | |
105 | .fourcc = DRM_FORMAT_NV61, | |
106 | .bpp = 16, | |
107 | .planes = 2, | |
108 | }, { | |
109 | .fourcc = DRM_FORMAT_YUV420, | |
110 | .bpp = 12, | |
111 | .planes = 3, | |
112 | }, { | |
113 | .fourcc = DRM_FORMAT_YVU420, | |
114 | .bpp = 12, | |
115 | .planes = 3, | |
116 | }, { | |
117 | .fourcc = DRM_FORMAT_YUV422, | |
118 | .bpp = 16, | |
119 | .planes = 3, | |
120 | }, { | |
121 | .fourcc = DRM_FORMAT_YVU422, | |
122 | .bpp = 16, | |
123 | .planes = 3, | |
124 | }, { | |
125 | .fourcc = DRM_FORMAT_YUV444, | |
126 | .bpp = 24, | |
127 | .planes = 3, | |
128 | }, { | |
129 | .fourcc = DRM_FORMAT_YVU444, | |
130 | .bpp = 24, | |
131 | .planes = 3, | |
132 | }, | |
4bf8e196 LP |
133 | }; |
134 | ||
135 | const struct rcar_du_format_info *rcar_du_format_info(u32 fourcc) | |
136 | { | |
137 | unsigned int i; | |
138 | ||
139 | for (i = 0; i < ARRAY_SIZE(rcar_du_format_infos); ++i) { | |
140 | if (rcar_du_format_infos[i].fourcc == fourcc) | |
141 | return &rcar_du_format_infos[i]; | |
142 | } | |
143 | ||
144 | return NULL; | |
145 | } | |
146 | ||
4bf8e196 LP |
147 | /* ----------------------------------------------------------------------------- |
148 | * Frame buffer | |
149 | */ | |
150 | ||
59e32642 LP |
151 | int rcar_du_dumb_create(struct drm_file *file, struct drm_device *dev, |
152 | struct drm_mode_create_dumb *args) | |
153 | { | |
9e2d2de9 | 154 | struct rcar_du_device *rcdu = dev->dev_private; |
59e32642 LP |
155 | unsigned int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8); |
156 | unsigned int align; | |
157 | ||
f3bafc12 LP |
158 | /* |
159 | * The R8A7779 DU requires a 16 pixels pitch alignment as documented, | |
9e2d2de9 LP |
160 | * but the R8A7790 DU seems to require a 128 bytes pitch alignment. |
161 | */ | |
e8355e0d | 162 | if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B)) |
9e2d2de9 LP |
163 | align = 128; |
164 | else | |
165 | align = 16 * args->bpp / 8; | |
166 | ||
7e295a36 | 167 | args->pitch = roundup(min_pitch, align); |
59e32642 | 168 | |
6d178291 | 169 | return drm_gem_cma_dumb_create_internal(file, dev, args); |
59e32642 LP |
170 | } |
171 | ||
4bf8e196 LP |
172 | static struct drm_framebuffer * |
173 | rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv, | |
1eb83451 | 174 | const struct drm_mode_fb_cmd2 *mode_cmd) |
4bf8e196 | 175 | { |
9e2d2de9 | 176 | struct rcar_du_device *rcdu = dev->dev_private; |
4bf8e196 | 177 | const struct rcar_du_format_info *format; |
8bed5cc7 | 178 | unsigned int max_pitch; |
59e32642 | 179 | unsigned int align; |
8bed5cc7 | 180 | unsigned int bpp; |
7863ac50 | 181 | unsigned int i; |
4bf8e196 LP |
182 | |
183 | format = rcar_du_format_info(mode_cmd->pixel_format); | |
184 | if (format == NULL) { | |
185 | dev_dbg(dev->dev, "unsupported pixel format %08x\n", | |
186 | mode_cmd->pixel_format); | |
187 | return ERR_PTR(-EINVAL); | |
188 | } | |
189 | ||
8bed5cc7 LP |
190 | /* |
191 | * The pitch and alignment constraints are expressed in pixels on the | |
192 | * hardware side and in bytes in the DRM API. | |
193 | */ | |
7863ac50 | 194 | bpp = format->planes == 1 ? format->bpp / 8 : 1; |
8bed5cc7 LP |
195 | max_pitch = 4096 * bpp; |
196 | ||
e8355e0d | 197 | if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B)) |
9e2d2de9 LP |
198 | align = 128; |
199 | else | |
8bed5cc7 | 200 | align = 16 * bpp; |
59e32642 LP |
201 | |
202 | if (mode_cmd->pitches[0] & (align - 1) || | |
8bed5cc7 | 203 | mode_cmd->pitches[0] >= max_pitch) { |
4bf8e196 LP |
204 | dev_dbg(dev->dev, "invalid pitch value %u\n", |
205 | mode_cmd->pitches[0]); | |
206 | return ERR_PTR(-EINVAL); | |
207 | } | |
208 | ||
7863ac50 LP |
209 | for (i = 1; i < format->planes; ++i) { |
210 | if (mode_cmd->pitches[i] != mode_cmd->pitches[0]) { | |
4bf8e196 LP |
211 | dev_dbg(dev->dev, |
212 | "luma and chroma pitches do not match\n"); | |
213 | return ERR_PTR(-EINVAL); | |
214 | } | |
215 | } | |
216 | ||
365c3851 | 217 | return drm_gem_fb_create(dev, file_priv, mode_cmd); |
4bf8e196 LP |
218 | } |
219 | ||
3864c6f4 LP |
220 | static void rcar_du_output_poll_changed(struct drm_device *dev) |
221 | { | |
222 | struct rcar_du_device *rcdu = dev->dev_private; | |
223 | ||
224 | drm_fbdev_cma_hotplug_event(rcdu->fbdev); | |
225 | } | |
226 | ||
8d3f9b22 | 227 | /* ----------------------------------------------------------------------------- |
5ee5a81d | 228 | * Atomic Check and Update |
8d3f9b22 LP |
229 | */ |
230 | ||
5ee5a81d LP |
231 | static int rcar_du_atomic_check(struct drm_device *dev, |
232 | struct drm_atomic_state *state) | |
233 | { | |
6d62ef3a | 234 | struct rcar_du_device *rcdu = dev->dev_private; |
5ee5a81d LP |
235 | int ret; |
236 | ||
38d868e4 VS |
237 | ret = drm_atomic_helper_check_modeset(dev, state); |
238 | if (ret) | |
239 | return ret; | |
240 | ||
241 | ret = drm_atomic_normalize_zpos(dev, state); | |
242 | if (ret) | |
243 | return ret; | |
244 | ||
245 | ret = drm_atomic_helper_check_planes(dev, state); | |
246 | if (ret) | |
5ee5a81d LP |
247 | return ret; |
248 | ||
6d62ef3a LP |
249 | if (rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE)) |
250 | return 0; | |
251 | ||
ab334e13 | 252 | return rcar_du_atomic_check_planes(dev, state); |
5ee5a81d LP |
253 | } |
254 | ||
a8fd1223 | 255 | static void rcar_du_atomic_commit_tail(struct drm_atomic_state *old_state) |
8d3f9b22 | 256 | { |
a8fd1223 | 257 | struct drm_device *dev = old_state->dev; |
8d3f9b22 LP |
258 | |
259 | /* Apply the atomic update. */ | |
260 | drm_atomic_helper_commit_modeset_disables(dev, old_state); | |
2b58e98d LY |
261 | drm_atomic_helper_commit_planes(dev, old_state, |
262 | DRM_PLANE_COMMIT_ACTIVE_ONLY); | |
f4112469 | 263 | drm_atomic_helper_commit_modeset_enables(dev, old_state); |
8d3f9b22 | 264 | |
a8fd1223 | 265 | drm_atomic_helper_commit_hw_done(old_state); |
d6160246 | 266 | drm_atomic_helper_wait_for_flip_done(dev, old_state); |
8d3f9b22 LP |
267 | |
268 | drm_atomic_helper_cleanup_planes(dev, old_state); | |
8d3f9b22 LP |
269 | } |
270 | ||
271 | /* ----------------------------------------------------------------------------- | |
272 | * Initialization | |
273 | */ | |
274 | ||
a8fd1223 LP |
275 | static const struct drm_mode_config_helper_funcs rcar_du_mode_config_helper = { |
276 | .atomic_commit_tail = rcar_du_atomic_commit_tail, | |
277 | }; | |
278 | ||
4bf8e196 LP |
279 | static const struct drm_mode_config_funcs rcar_du_mode_config_funcs = { |
280 | .fb_create = rcar_du_fb_create, | |
3864c6f4 | 281 | .output_poll_changed = rcar_du_output_poll_changed, |
5ee5a81d | 282 | .atomic_check = rcar_du_atomic_check, |
a8fd1223 | 283 | .atomic_commit = drm_atomic_helper_commit, |
4bf8e196 LP |
284 | }; |
285 | ||
2378ad12 LP |
286 | static int rcar_du_encoders_init_one(struct rcar_du_device *rcdu, |
287 | enum rcar_du_output output, | |
288 | struct of_endpoint *ep) | |
96c02691 | 289 | { |
96c02691 LP |
290 | struct device_node *connector = NULL; |
291 | struct device_node *encoder = NULL; | |
f033c0bc | 292 | struct device_node *ep_node = NULL; |
96c02691 LP |
293 | struct device_node *entity_ep_node; |
294 | struct device_node *entity; | |
295 | int ret; | |
296 | ||
297 | /* | |
298 | * Locate the connected entity and infer its type from the number of | |
299 | * endpoints. | |
300 | */ | |
301 | entity = of_graph_get_remote_port_parent(ep->local_node); | |
302 | if (!entity) { | |
4bf99144 RH |
303 | dev_dbg(rcdu->dev, "unconnected endpoint %pOF, skipping\n", |
304 | ep->local_node); | |
898a2f38 | 305 | return -ENODEV; |
96c02691 LP |
306 | } |
307 | ||
4739a0d4 LP |
308 | if (!of_device_is_available(entity)) { |
309 | dev_dbg(rcdu->dev, | |
4bf99144 RH |
310 | "connected entity %pOF is disabled, skipping\n", |
311 | entity); | |
d505f229 | 312 | of_node_put(entity); |
4739a0d4 LP |
313 | return -ENODEV; |
314 | } | |
315 | ||
51a99751 | 316 | entity_ep_node = of_graph_get_remote_endpoint(ep->local_node); |
96c02691 | 317 | |
4af642d5 | 318 | for_each_endpoint_of_node(entity, ep_node) { |
96c02691 LP |
319 | if (ep_node == entity_ep_node) |
320 | continue; | |
321 | ||
322 | /* | |
323 | * We've found one endpoint other than the input, this must | |
324 | * be an encoder. Locate the connector. | |
325 | */ | |
326 | encoder = entity; | |
327 | connector = of_graph_get_remote_port_parent(ep_node); | |
328 | of_node_put(ep_node); | |
329 | ||
330 | if (!connector) { | |
331 | dev_warn(rcdu->dev, | |
4bf99144 RH |
332 | "no connector for encoder %pOF, skipping\n", |
333 | encoder); | |
96c02691 LP |
334 | of_node_put(entity_ep_node); |
335 | of_node_put(encoder); | |
898a2f38 | 336 | return -ENODEV; |
96c02691 LP |
337 | } |
338 | ||
339 | break; | |
340 | } | |
341 | ||
342 | of_node_put(entity_ep_node); | |
343 | ||
381ddfe4 | 344 | if (!encoder) { |
96c02691 LP |
345 | /* |
346 | * If no encoder has been found the entity must be the | |
347 | * connector. | |
348 | */ | |
349 | connector = entity; | |
350 | } | |
351 | ||
381ddfe4 | 352 | ret = rcar_du_encoder_init(rcdu, output, encoder, connector); |
64549cdf LP |
353 | if (ret && ret != -EPROBE_DEFER) |
354 | dev_warn(rcdu->dev, | |
4bf99144 RH |
355 | "failed to initialize encoder %pOF on output %u (%d), skipping\n", |
356 | encoder, output, ret); | |
05ee29e9 LP |
357 | |
358 | of_node_put(encoder); | |
359 | of_node_put(connector); | |
64549cdf | 360 | |
898a2f38 | 361 | return ret; |
96c02691 LP |
362 | } |
363 | ||
2378ad12 | 364 | static int rcar_du_encoders_init(struct rcar_du_device *rcdu) |
96c02691 LP |
365 | { |
366 | struct device_node *np = rcdu->dev->of_node; | |
4af642d5 | 367 | struct device_node *ep_node; |
96c02691 LP |
368 | unsigned int num_encoders = 0; |
369 | ||
370 | /* | |
371 | * Iterate over the endpoints and create one encoder for each output | |
372 | * pipeline. | |
373 | */ | |
4af642d5 | 374 | for_each_endpoint_of_node(np, ep_node) { |
96c02691 LP |
375 | enum rcar_du_output output; |
376 | struct of_endpoint ep; | |
377 | unsigned int i; | |
378 | int ret; | |
379 | ||
96c02691 LP |
380 | ret = of_graph_parse_endpoint(ep_node, &ep); |
381 | if (ret < 0) { | |
382 | of_node_put(ep_node); | |
383 | return ret; | |
384 | } | |
385 | ||
386 | /* Find the output route corresponding to the port number. */ | |
387 | for (i = 0; i < RCAR_DU_OUTPUT_MAX; ++i) { | |
388 | if (rcdu->info->routes[i].possible_crtcs && | |
389 | rcdu->info->routes[i].port == ep.port) { | |
390 | output = i; | |
391 | break; | |
392 | } | |
393 | } | |
394 | ||
395 | if (i == RCAR_DU_OUTPUT_MAX) { | |
396 | dev_warn(rcdu->dev, | |
397 | "port %u references unexisting output, skipping\n", | |
398 | ep.port); | |
399 | continue; | |
400 | } | |
401 | ||
402 | /* Process the output pipeline. */ | |
2378ad12 | 403 | ret = rcar_du_encoders_init_one(rcdu, output, &ep); |
96c02691 | 404 | if (ret < 0) { |
347d761c LP |
405 | if (ret == -EPROBE_DEFER) { |
406 | of_node_put(ep_node); | |
407 | return ret; | |
408 | } | |
409 | ||
347d761c | 410 | continue; |
96c02691 LP |
411 | } |
412 | ||
898a2f38 | 413 | num_encoders++; |
96c02691 LP |
414 | } |
415 | ||
416 | return num_encoders; | |
417 | } | |
418 | ||
9f6aee95 LP |
419 | static int rcar_du_properties_init(struct rcar_du_device *rcdu) |
420 | { | |
421 | rcdu->props.alpha = | |
422 | drm_property_create_range(rcdu->ddev, 0, "alpha", 0, 255); | |
423 | if (rcdu->props.alpha == NULL) | |
424 | return -ENOMEM; | |
425 | ||
f3bafc12 LP |
426 | /* |
427 | * The color key is expressed as an RGB888 triplet stored in a 32-bit | |
9f6aee95 LP |
428 | * integer in XRGB8888 format. Bit 24 is used as a flag to disable (0) |
429 | * or enable source color keying (1). | |
430 | */ | |
431 | rcdu->props.colorkey = | |
432 | drm_property_create_range(rcdu->ddev, 0, "colorkey", | |
433 | 0, 0x01ffffff); | |
434 | if (rcdu->props.colorkey == NULL) | |
435 | return -ENOMEM; | |
436 | ||
9f6aee95 LP |
437 | return 0; |
438 | } | |
439 | ||
3e81374e LP |
440 | static int rcar_du_vsps_init(struct rcar_du_device *rcdu) |
441 | { | |
442 | const struct device_node *np = rcdu->dev->of_node; | |
443 | struct of_phandle_args args; | |
444 | struct { | |
445 | struct device_node *np; | |
446 | unsigned int crtcs_mask; | |
447 | } vsps[RCAR_DU_MAX_VSPS] = { { 0, }, }; | |
448 | unsigned int vsps_count = 0; | |
449 | unsigned int cells; | |
450 | unsigned int i; | |
451 | int ret; | |
452 | ||
453 | /* | |
454 | * First parse the DT vsps property to populate the list of VSPs. Each | |
455 | * entry contains a pointer to the VSP DT node and a bitmask of the | |
456 | * connected DU CRTCs. | |
457 | */ | |
458 | cells = of_property_count_u32_elems(np, "vsps") / rcdu->num_crtcs - 1; | |
459 | if (cells > 1) | |
460 | return -EINVAL; | |
461 | ||
462 | for (i = 0; i < rcdu->num_crtcs; ++i) { | |
463 | unsigned int j; | |
464 | ||
465 | ret = of_parse_phandle_with_fixed_args(np, "vsps", cells, i, | |
466 | &args); | |
467 | if (ret < 0) | |
468 | goto error; | |
469 | ||
470 | /* | |
471 | * Add the VSP to the list or update the corresponding existing | |
472 | * entry if the VSP has already been added. | |
473 | */ | |
474 | for (j = 0; j < vsps_count; ++j) { | |
475 | if (vsps[j].np == args.np) | |
476 | break; | |
477 | } | |
478 | ||
479 | if (j < vsps_count) | |
480 | of_node_put(args.np); | |
481 | else | |
482 | vsps[vsps_count++].np = args.np; | |
483 | ||
484 | vsps[j].crtcs_mask |= BIT(i); | |
485 | ||
486 | /* Store the VSP pointer and pipe index in the CRTC. */ | |
487 | rcdu->crtcs[i].vsp = &rcdu->vsps[j]; | |
488 | rcdu->crtcs[i].vsp_pipe = cells >= 1 ? args.args[0] : 0; | |
489 | } | |
490 | ||
491 | /* | |
492 | * Then initialize all the VSPs from the node pointers and CRTCs bitmask | |
493 | * computed previously. | |
494 | */ | |
495 | for (i = 0; i < vsps_count; ++i) { | |
496 | struct rcar_du_vsp *vsp = &rcdu->vsps[i]; | |
497 | ||
498 | vsp->index = i; | |
499 | vsp->dev = rcdu; | |
500 | ||
501 | ret = rcar_du_vsp_init(vsp, vsps[i].np, vsps[i].crtcs_mask); | |
502 | if (ret < 0) | |
503 | goto error; | |
504 | } | |
505 | ||
506 | return 0; | |
507 | ||
508 | error: | |
509 | for (i = 0; i < ARRAY_SIZE(vsps); ++i) | |
510 | of_node_put(vsps[i].np); | |
511 | ||
512 | return ret; | |
513 | } | |
514 | ||
4bf8e196 LP |
515 | int rcar_du_modeset_init(struct rcar_du_device *rcdu) |
516 | { | |
a5f0ef59 LP |
517 | static const unsigned int mmio_offsets[] = { |
518 | DU0_REG_OFFSET, DU2_REG_OFFSET | |
519 | }; | |
520 | ||
4bf8e196 LP |
521 | struct drm_device *dev = rcdu->ddev; |
522 | struct drm_encoder *encoder; | |
3864c6f4 | 523 | struct drm_fbdev_cma *fbdev; |
96c02691 | 524 | unsigned int num_encoders; |
a5f0ef59 | 525 | unsigned int num_groups; |
4bf8e196 LP |
526 | unsigned int i; |
527 | int ret; | |
528 | ||
3864c6f4 | 529 | drm_mode_config_init(dev); |
4bf8e196 | 530 | |
3864c6f4 LP |
531 | dev->mode_config.min_width = 0; |
532 | dev->mode_config.min_height = 0; | |
533 | dev->mode_config.max_width = 4095; | |
534 | dev->mode_config.max_height = 2047; | |
535 | dev->mode_config.funcs = &rcar_du_mode_config_funcs; | |
a8fd1223 | 536 | dev->mode_config.helper_private = &rcar_du_mode_config_helper; |
4bf8e196 | 537 | |
a5f0ef59 LP |
538 | rcdu->num_crtcs = rcdu->info->num_crtcs; |
539 | ||
9f6aee95 LP |
540 | ret = rcar_du_properties_init(rcdu); |
541 | if (ret < 0) | |
542 | return ret; | |
543 | ||
f3bafc12 LP |
544 | /* |
545 | * Initialize vertical blanking interrupts handling. Start with vblank | |
4f7b0d26 LP |
546 | * disabled for all CRTCs. |
547 | */ | |
05298ae6 | 548 | ret = drm_vblank_init(dev, rcdu->info->num_crtcs); |
4f7b0d26 LP |
549 | if (ret < 0) |
550 | return ret; | |
551 | ||
a5f0ef59 LP |
552 | /* Initialize the groups. */ |
553 | num_groups = DIV_ROUND_UP(rcdu->num_crtcs, 2); | |
554 | ||
555 | for (i = 0; i < num_groups; ++i) { | |
556 | struct rcar_du_group *rgrp = &rcdu->groups[i]; | |
cb2025d2 | 557 | |
5ee5a81d LP |
558 | mutex_init(&rgrp->lock); |
559 | ||
a5f0ef59 LP |
560 | rgrp->dev = rcdu; |
561 | rgrp->mmio_offset = mmio_offsets[i]; | |
562 | rgrp->index = i; | |
fe6fbe9a | 563 | rgrp->num_crtcs = min(rcdu->num_crtcs - 2 * i, 2U); |
4bf8e196 | 564 | |
f3bafc12 LP |
565 | /* |
566 | * If we have more than one CRTCs in this group pre-associate | |
2427b303 LP |
567 | * the low-order planes with CRTC 0 and the high-order planes |
568 | * with CRTC 1 to minimize flicker occurring when the | |
569 | * association is changed. | |
c8af99b6 | 570 | */ |
2427b303 LP |
571 | rgrp->dptsr_planes = rgrp->num_crtcs > 1 |
572 | ? (rcdu->info->gen >= 3 ? 0x04 : 0xf0) | |
573 | : 0; | |
c8af99b6 | 574 | |
6d62ef3a LP |
575 | if (!rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE)) { |
576 | ret = rcar_du_planes_init(rgrp); | |
577 | if (ret < 0) | |
578 | return ret; | |
579 | } | |
580 | } | |
581 | ||
582 | /* Initialize the compositors. */ | |
583 | if (rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE)) { | |
3e81374e LP |
584 | ret = rcar_du_vsps_init(rcdu); |
585 | if (ret < 0) | |
586 | return ret; | |
3463ff67 | 587 | } |
4bf8e196 | 588 | |
a5f0ef59 LP |
589 | /* Create the CRTCs. */ |
590 | for (i = 0; i < rcdu->num_crtcs; ++i) { | |
591 | struct rcar_du_group *rgrp = &rcdu->groups[i / 2]; | |
592 | ||
593 | ret = rcar_du_crtc_create(rgrp, i); | |
594 | if (ret < 0) | |
595 | return ret; | |
596 | } | |
4bf8e196 | 597 | |
a5f0ef59 | 598 | /* Initialize the encoders. */ |
90374b5c LP |
599 | ret = rcar_du_lvdsenc_init(rcdu); |
600 | if (ret < 0) | |
601 | return ret; | |
602 | ||
2378ad12 | 603 | ret = rcar_du_encoders_init(rcdu); |
96c02691 LP |
604 | if (ret < 0) |
605 | return ret; | |
4bf8e196 | 606 | |
347d761c LP |
607 | if (ret == 0) { |
608 | dev_err(rcdu->dev, "error: no encoder could be initialized\n"); | |
609 | return -EINVAL; | |
610 | } | |
611 | ||
96c02691 | 612 | num_encoders = ret; |
4bf8e196 | 613 | |
f3bafc12 LP |
614 | /* |
615 | * Set the possible CRTCs and possible clones. There's always at least | |
ef67a902 LP |
616 | * one way for all encoders to clone each other, set all bits in the |
617 | * possible clones field. | |
4bf8e196 LP |
618 | */ |
619 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { | |
620 | struct rcar_du_encoder *renc = to_rcar_encoder(encoder); | |
ef67a902 LP |
621 | const struct rcar_du_output_routing *route = |
622 | &rcdu->info->routes[renc->output]; | |
4bf8e196 | 623 | |
ef67a902 | 624 | encoder->possible_crtcs = route->possible_crtcs; |
96c02691 | 625 | encoder->possible_clones = (1 << num_encoders) - 1; |
4bf8e196 LP |
626 | } |
627 | ||
3e8da87d LP |
628 | drm_mode_config_reset(dev); |
629 | ||
3864c6f4 LP |
630 | drm_kms_helper_poll_init(dev); |
631 | ||
931b7336 | 632 | if (dev->mode_config.num_connector) { |
e4563f6b | 633 | fbdev = drm_fbdev_cma_init(dev, 32, |
931b7336 LP |
634 | dev->mode_config.num_connector); |
635 | if (IS_ERR(fbdev)) | |
636 | return PTR_ERR(fbdev); | |
3864c6f4 | 637 | |
931b7336 LP |
638 | rcdu->fbdev = fbdev; |
639 | } else { | |
640 | dev_info(rcdu->dev, | |
641 | "no connector found, disabling fbdev emulation\n"); | |
642 | } | |
4bf8e196 LP |
643 | |
644 | return 0; | |
645 | } |