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Commit | Line | Data |
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2048e328 MY |
1 | /* |
2 | * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd | |
3 | * Author:Mark Yao <mark.yao@rock-chips.com> | |
4 | * | |
5 | * based on exynos_drm_drv.c | |
6 | * | |
7 | * This software is licensed under the terms of the GNU General Public | |
8 | * License version 2, as published by the Free Software Foundation, and | |
9 | * may be copied, distributed, and modified under those terms. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | */ | |
16 | ||
17 | #include <asm/dma-iommu.h> | |
18 | ||
19 | #include <drm/drmP.h> | |
20 | #include <drm/drm_crtc_helper.h> | |
21 | #include <drm/drm_fb_helper.h> | |
80f67cd8 | 22 | #include <drm/drm_gem_cma_helper.h> |
2048e328 MY |
23 | #include <linux/dma-mapping.h> |
24 | #include <linux/pm_runtime.h> | |
00fe6148 | 25 | #include <linux/module.h> |
2048e328 MY |
26 | #include <linux/of_graph.h> |
27 | #include <linux/component.h> | |
5a587383 | 28 | #include <linux/console.h> |
2048e328 MY |
29 | |
30 | #include "rockchip_drm_drv.h" | |
31 | #include "rockchip_drm_fb.h" | |
32 | #include "rockchip_drm_fbdev.h" | |
33 | #include "rockchip_drm_gem.h" | |
34 | ||
35 | #define DRIVER_NAME "rockchip" | |
36 | #define DRIVER_DESC "RockChip Soc DRM" | |
37 | #define DRIVER_DATE "20140818" | |
38 | #define DRIVER_MAJOR 1 | |
39 | #define DRIVER_MINOR 0 | |
40 | ||
2d90d477 | 41 | static bool is_support_iommu = true; |
f706974a | 42 | static struct drm_driver rockchip_drm_driver; |
2d90d477 | 43 | |
2048e328 MY |
44 | /* |
45 | * Attach a (component) device to the shared drm dma mapping from master drm | |
46 | * device. This is used by the VOPs to map GEM buffers to a common DMA | |
47 | * mapping. | |
48 | */ | |
49 | int rockchip_drm_dma_attach_device(struct drm_device *drm_dev, | |
50 | struct device *dev) | |
51 | { | |
52 | struct dma_iommu_mapping *mapping = drm_dev->dev->archdata.mapping; | |
53 | int ret; | |
54 | ||
2d90d477 MY |
55 | if (!is_support_iommu) |
56 | return 0; | |
57 | ||
2048e328 MY |
58 | ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32)); |
59 | if (ret) | |
60 | return ret; | |
61 | ||
62 | dma_set_max_seg_size(dev, DMA_BIT_MASK(32)); | |
63 | ||
64 | return arm_iommu_attach_device(dev, mapping); | |
65 | } | |
2048e328 MY |
66 | |
67 | void rockchip_drm_dma_detach_device(struct drm_device *drm_dev, | |
68 | struct device *dev) | |
69 | { | |
2d90d477 MY |
70 | if (!is_support_iommu) |
71 | return; | |
72 | ||
2048e328 MY |
73 | arm_iommu_detach_device(dev); |
74 | } | |
2048e328 | 75 | |
b5f7b755 MY |
76 | int rockchip_register_crtc_funcs(struct drm_crtc *crtc, |
77 | const struct rockchip_crtc_funcs *crtc_funcs) | |
2048e328 | 78 | { |
b5f7b755 MY |
79 | int pipe = drm_crtc_index(crtc); |
80 | struct rockchip_drm_private *priv = crtc->dev->dev_private; | |
2048e328 | 81 | |
15da7808 | 82 | if (pipe >= ROCKCHIP_MAX_CRTC) |
2048e328 MY |
83 | return -EINVAL; |
84 | ||
85 | priv->crtc_funcs[pipe] = crtc_funcs; | |
86 | ||
87 | return 0; | |
88 | } | |
2048e328 | 89 | |
b5f7b755 | 90 | void rockchip_unregister_crtc_funcs(struct drm_crtc *crtc) |
2048e328 | 91 | { |
b5f7b755 MY |
92 | int pipe = drm_crtc_index(crtc); |
93 | struct rockchip_drm_private *priv = crtc->dev->dev_private; | |
2048e328 | 94 | |
15da7808 | 95 | if (pipe >= ROCKCHIP_MAX_CRTC) |
2048e328 MY |
96 | return; |
97 | ||
98 | priv->crtc_funcs[pipe] = NULL; | |
99 | } | |
2048e328 MY |
100 | |
101 | static struct drm_crtc *rockchip_crtc_from_pipe(struct drm_device *drm, | |
102 | int pipe) | |
103 | { | |
104 | struct drm_crtc *crtc; | |
105 | int i = 0; | |
106 | ||
107 | list_for_each_entry(crtc, &drm->mode_config.crtc_list, head) | |
108 | if (i++ == pipe) | |
109 | return crtc; | |
110 | ||
111 | return NULL; | |
112 | } | |
113 | ||
88e72717 TR |
114 | static int rockchip_drm_crtc_enable_vblank(struct drm_device *dev, |
115 | unsigned int pipe) | |
2048e328 MY |
116 | { |
117 | struct rockchip_drm_private *priv = dev->dev_private; | |
118 | struct drm_crtc *crtc = rockchip_crtc_from_pipe(dev, pipe); | |
119 | ||
120 | if (crtc && priv->crtc_funcs[pipe] && | |
121 | priv->crtc_funcs[pipe]->enable_vblank) | |
122 | return priv->crtc_funcs[pipe]->enable_vblank(crtc); | |
123 | ||
124 | return 0; | |
125 | } | |
126 | ||
88e72717 TR |
127 | static void rockchip_drm_crtc_disable_vblank(struct drm_device *dev, |
128 | unsigned int pipe) | |
2048e328 MY |
129 | { |
130 | struct rockchip_drm_private *priv = dev->dev_private; | |
131 | struct drm_crtc *crtc = rockchip_crtc_from_pipe(dev, pipe); | |
132 | ||
133 | if (crtc && priv->crtc_funcs[pipe] && | |
134 | priv->crtc_funcs[pipe]->enable_vblank) | |
135 | priv->crtc_funcs[pipe]->disable_vblank(crtc); | |
136 | } | |
137 | ||
f706974a | 138 | static int rockchip_drm_bind(struct device *dev) |
2048e328 | 139 | { |
f706974a | 140 | struct drm_device *drm_dev; |
2048e328 | 141 | struct rockchip_drm_private *private; |
2d90d477 | 142 | struct dma_iommu_mapping *mapping = NULL; |
2048e328 MY |
143 | int ret; |
144 | ||
f706974a | 145 | drm_dev = drm_dev_alloc(&rockchip_drm_driver, dev); |
0f288605 TG |
146 | if (IS_ERR(drm_dev)) |
147 | return PTR_ERR(drm_dev); | |
2048e328 | 148 | |
f706974a TV |
149 | dev_set_drvdata(dev, drm_dev); |
150 | ||
151 | private = devm_kzalloc(drm_dev->dev, sizeof(*private), GFP_KERNEL); | |
152 | if (!private) { | |
153 | ret = -ENOMEM; | |
9127f99c | 154 | goto err_free; |
f706974a TV |
155 | } |
156 | ||
2048e328 MY |
157 | drm_dev->dev_private = private; |
158 | ||
5182c1a5 | 159 | INIT_LIST_HEAD(&private->psr_list); |
18d8d4d2 | 160 | spin_lock_init(&private->psr_list_lock); |
5182c1a5 | 161 | |
2048e328 MY |
162 | drm_mode_config_init(drm_dev); |
163 | ||
164 | rockchip_drm_mode_config_init(drm_dev); | |
165 | ||
166 | dev->dma_parms = devm_kzalloc(dev, sizeof(*dev->dma_parms), | |
167 | GFP_KERNEL); | |
168 | if (!dev->dma_parms) { | |
169 | ret = -ENOMEM; | |
170 | goto err_config_cleanup; | |
171 | } | |
172 | ||
2d90d477 MY |
173 | if (is_support_iommu) { |
174 | /* TODO(djkurtz): fetch the mapping start/size from somewhere */ | |
175 | mapping = arm_iommu_create_mapping(&platform_bus_type, | |
176 | 0x00000000, | |
177 | SZ_2G); | |
178 | if (IS_ERR(mapping)) { | |
179 | ret = PTR_ERR(mapping); | |
180 | goto err_config_cleanup; | |
181 | } | |
2048e328 | 182 | |
2d90d477 MY |
183 | ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32)); |
184 | if (ret) | |
185 | goto err_release_mapping; | |
2048e328 | 186 | |
2d90d477 | 187 | dma_set_max_seg_size(dev, DMA_BIT_MASK(32)); |
2048e328 | 188 | |
2d90d477 MY |
189 | ret = arm_iommu_attach_device(dev, mapping); |
190 | if (ret) | |
191 | goto err_release_mapping; | |
192 | } | |
2048e328 MY |
193 | |
194 | /* Try to bind all sub drivers. */ | |
195 | ret = component_bind_all(dev, drm_dev); | |
196 | if (ret) | |
197 | goto err_detach_device; | |
198 | ||
199 | /* init kms poll for handling hpd */ | |
200 | drm_kms_helper_poll_init(drm_dev); | |
201 | ||
202 | /* | |
203 | * enable drm irq mode. | |
204 | * - with irq_enabled = true, we can use the vblank feature. | |
205 | */ | |
206 | drm_dev->irq_enabled = true; | |
207 | ||
208 | ret = drm_vblank_init(drm_dev, ROCKCHIP_MAX_CRTC); | |
209 | if (ret) | |
210 | goto err_kms_helper_poll_fini; | |
211 | ||
63ebb9fa MY |
212 | drm_mode_config_reset(drm_dev); |
213 | ||
2048e328 MY |
214 | ret = rockchip_drm_fbdev_init(drm_dev); |
215 | if (ret) | |
216 | goto err_vblank_cleanup; | |
217 | ||
9127f99c TF |
218 | ret = drm_dev_register(drm_dev, 0); |
219 | if (ret) | |
220 | goto err_fbdev_fini; | |
221 | ||
2d90d477 MY |
222 | if (is_support_iommu) |
223 | arm_iommu_release_mapping(mapping); | |
2048e328 | 224 | return 0; |
9127f99c TF |
225 | err_fbdev_fini: |
226 | rockchip_drm_fbdev_fini(drm_dev); | |
2048e328 MY |
227 | err_vblank_cleanup: |
228 | drm_vblank_cleanup(drm_dev); | |
229 | err_kms_helper_poll_fini: | |
230 | drm_kms_helper_poll_fini(drm_dev); | |
231 | component_unbind_all(dev, drm_dev); | |
232 | err_detach_device: | |
2d90d477 MY |
233 | if (is_support_iommu) |
234 | arm_iommu_detach_device(dev); | |
2048e328 | 235 | err_release_mapping: |
2d90d477 MY |
236 | if (is_support_iommu) |
237 | arm_iommu_release_mapping(mapping); | |
2048e328 MY |
238 | err_config_cleanup: |
239 | drm_mode_config_cleanup(drm_dev); | |
240 | drm_dev->dev_private = NULL; | |
f706974a TV |
241 | err_free: |
242 | drm_dev_unref(drm_dev); | |
2048e328 MY |
243 | return ret; |
244 | } | |
245 | ||
f706974a | 246 | static void rockchip_drm_unbind(struct device *dev) |
2048e328 | 247 | { |
f706974a | 248 | struct drm_device *drm_dev = dev_get_drvdata(dev); |
2048e328 MY |
249 | |
250 | rockchip_drm_fbdev_fini(drm_dev); | |
251 | drm_vblank_cleanup(drm_dev); | |
252 | drm_kms_helper_poll_fini(drm_dev); | |
253 | component_unbind_all(dev, drm_dev); | |
2d90d477 MY |
254 | if (is_support_iommu) |
255 | arm_iommu_detach_device(dev); | |
2048e328 MY |
256 | drm_mode_config_cleanup(drm_dev); |
257 | drm_dev->dev_private = NULL; | |
f706974a TV |
258 | drm_dev_unregister(drm_dev); |
259 | drm_dev_unref(drm_dev); | |
260 | dev_set_drvdata(dev, NULL); | |
2048e328 MY |
261 | } |
262 | ||
8ff490ae | 263 | static void rockchip_drm_lastclose(struct drm_device *dev) |
2048e328 MY |
264 | { |
265 | struct rockchip_drm_private *priv = dev->dev_private; | |
266 | ||
267 | drm_fb_helper_restore_fbdev_mode_unlocked(&priv->fbdev_helper); | |
268 | } | |
269 | ||
270 | static const struct file_operations rockchip_drm_driver_fops = { | |
271 | .owner = THIS_MODULE, | |
272 | .open = drm_open, | |
273 | .mmap = rockchip_gem_mmap, | |
274 | .poll = drm_poll, | |
275 | .read = drm_read, | |
276 | .unlocked_ioctl = drm_ioctl, | |
277 | #ifdef CONFIG_COMPAT | |
278 | .compat_ioctl = drm_compat_ioctl, | |
279 | #endif | |
280 | .release = drm_release, | |
281 | }; | |
282 | ||
2048e328 | 283 | static struct drm_driver rockchip_drm_driver = { |
63ebb9fa MY |
284 | .driver_features = DRIVER_MODESET | DRIVER_GEM | |
285 | DRIVER_PRIME | DRIVER_ATOMIC, | |
2048e328 | 286 | .lastclose = rockchip_drm_lastclose, |
b44f8408 | 287 | .get_vblank_counter = drm_vblank_no_hw_counter, |
2048e328 MY |
288 | .enable_vblank = rockchip_drm_crtc_enable_vblank, |
289 | .disable_vblank = rockchip_drm_crtc_disable_vblank, | |
80f67cd8 | 290 | .gem_vm_ops = &drm_gem_cma_vm_ops, |
c2466ac3 | 291 | .gem_free_object_unlocked = rockchip_gem_free_object, |
2048e328 MY |
292 | .dumb_create = rockchip_gem_dumb_create, |
293 | .dumb_map_offset = rockchip_gem_dumb_map_offset, | |
294 | .dumb_destroy = drm_gem_dumb_destroy, | |
295 | .prime_handle_to_fd = drm_gem_prime_handle_to_fd, | |
296 | .prime_fd_to_handle = drm_gem_prime_fd_to_handle, | |
297 | .gem_prime_import = drm_gem_prime_import, | |
298 | .gem_prime_export = drm_gem_prime_export, | |
299 | .gem_prime_get_sg_table = rockchip_gem_prime_get_sg_table, | |
300 | .gem_prime_vmap = rockchip_gem_prime_vmap, | |
301 | .gem_prime_vunmap = rockchip_gem_prime_vunmap, | |
302 | .gem_prime_mmap = rockchip_gem_mmap_buf, | |
303 | .fops = &rockchip_drm_driver_fops, | |
304 | .name = DRIVER_NAME, | |
305 | .desc = DRIVER_DESC, | |
306 | .date = DRIVER_DATE, | |
307 | .major = DRIVER_MAJOR, | |
308 | .minor = DRIVER_MINOR, | |
309 | }; | |
310 | ||
311 | #ifdef CONFIG_PM_SLEEP | |
62398177 | 312 | static void rockchip_drm_fb_suspend(struct drm_device *drm) |
2048e328 | 313 | { |
5a587383 | 314 | struct rockchip_drm_private *priv = drm->dev_private; |
2048e328 | 315 | |
5a587383 TV |
316 | console_lock(); |
317 | drm_fb_helper_set_suspend(&priv->fbdev_helper, 1); | |
318 | console_unlock(); | |
319 | } | |
2048e328 | 320 | |
62398177 | 321 | static void rockchip_drm_fb_resume(struct drm_device *drm) |
5a587383 TV |
322 | { |
323 | struct rockchip_drm_private *priv = drm->dev_private; | |
2048e328 | 324 | |
5a587383 TV |
325 | console_lock(); |
326 | drm_fb_helper_set_suspend(&priv->fbdev_helper, 0); | |
327 | console_unlock(); | |
328 | } | |
2048e328 | 329 | |
5a587383 TV |
330 | static int rockchip_drm_sys_suspend(struct device *dev) |
331 | { | |
332 | struct drm_device *drm = dev_get_drvdata(dev); | |
333 | struct rockchip_drm_private *priv = drm->dev_private; | |
334 | ||
335 | drm_kms_helper_poll_disable(drm); | |
336 | rockchip_drm_fb_suspend(drm); | |
337 | ||
338 | priv->state = drm_atomic_helper_suspend(drm); | |
339 | if (IS_ERR(priv->state)) { | |
340 | rockchip_drm_fb_resume(drm); | |
341 | drm_kms_helper_poll_enable(drm); | |
342 | return PTR_ERR(priv->state); | |
2048e328 | 343 | } |
2048e328 MY |
344 | |
345 | return 0; | |
346 | } | |
347 | ||
348 | static int rockchip_drm_sys_resume(struct device *dev) | |
349 | { | |
350 | struct drm_device *drm = dev_get_drvdata(dev); | |
5a587383 | 351 | struct rockchip_drm_private *priv = drm->dev_private; |
2048e328 | 352 | |
5a587383 TV |
353 | drm_atomic_helper_resume(drm, priv->state); |
354 | rockchip_drm_fb_resume(drm); | |
355 | drm_kms_helper_poll_enable(drm); | |
2048e328 MY |
356 | |
357 | return 0; | |
358 | } | |
359 | #endif | |
360 | ||
361 | static const struct dev_pm_ops rockchip_drm_pm_ops = { | |
362 | SET_SYSTEM_SLEEP_PM_OPS(rockchip_drm_sys_suspend, | |
363 | rockchip_drm_sys_resume) | |
364 | }; | |
365 | ||
2048e328 MY |
366 | static int compare_of(struct device *dev, void *data) |
367 | { | |
368 | struct device_node *np = data; | |
369 | ||
370 | return dev->of_node == np; | |
371 | } | |
372 | ||
5bad7d29 MY |
373 | static void rockchip_add_endpoints(struct device *dev, |
374 | struct component_match **match, | |
375 | struct device_node *port) | |
376 | { | |
377 | struct device_node *ep, *remote; | |
378 | ||
379 | for_each_child_of_node(port, ep) { | |
380 | remote = of_graph_get_remote_port_parent(ep); | |
381 | if (!remote || !of_device_is_available(remote)) { | |
382 | of_node_put(remote); | |
383 | continue; | |
384 | } else if (!of_device_is_available(remote->parent)) { | |
385 | dev_warn(dev, "parent device of %s is not available\n", | |
386 | remote->full_name); | |
387 | of_node_put(remote); | |
388 | continue; | |
389 | } | |
390 | ||
391 | component_match_add(dev, match, compare_of, remote); | |
392 | of_node_put(remote); | |
393 | } | |
394 | } | |
395 | ||
2048e328 MY |
396 | static const struct component_master_ops rockchip_drm_ops = { |
397 | .bind = rockchip_drm_bind, | |
398 | .unbind = rockchip_drm_unbind, | |
399 | }; | |
400 | ||
401 | static int rockchip_drm_platform_probe(struct platform_device *pdev) | |
402 | { | |
5bad7d29 MY |
403 | struct device *dev = &pdev->dev; |
404 | struct component_match *match = NULL; | |
405 | struct device_node *np = dev->of_node; | |
406 | struct device_node *port; | |
407 | int i; | |
2048e328 | 408 | |
5bad7d29 | 409 | if (!np) |
2048e328 | 410 | return -ENODEV; |
5bad7d29 MY |
411 | /* |
412 | * Bind the crtc ports first, so that | |
413 | * drm_of_find_possible_crtcs called from encoder .bind callbacks | |
414 | * works as expected. | |
415 | */ | |
416 | for (i = 0;; i++) { | |
2d90d477 MY |
417 | struct device_node *iommu; |
418 | ||
5bad7d29 MY |
419 | port = of_parse_phandle(np, "ports", i); |
420 | if (!port) | |
421 | break; | |
422 | ||
423 | if (!of_device_is_available(port->parent)) { | |
424 | of_node_put(port); | |
425 | continue; | |
426 | } | |
2048e328 | 427 | |
2d90d477 MY |
428 | iommu = of_parse_phandle(port->parent, "iommus", 0); |
429 | if (!iommu || !of_device_is_available(iommu->parent)) { | |
430 | dev_dbg(dev, "no iommu attached for %s, using non-iommu buffers\n", | |
431 | port->parent->full_name); | |
432 | /* | |
433 | * if there is a crtc not support iommu, force set all | |
434 | * crtc use non-iommu buffer. | |
435 | */ | |
436 | is_support_iommu = false; | |
437 | } | |
438 | ||
6d5fa28c | 439 | of_node_put(iommu); |
5bad7d29 MY |
440 | component_match_add(dev, &match, compare_of, port->parent); |
441 | of_node_put(port); | |
442 | } | |
443 | ||
444 | if (i == 0) { | |
445 | dev_err(dev, "missing 'ports' property\n"); | |
446 | return -ENODEV; | |
447 | } | |
448 | ||
449 | if (!match) { | |
450 | dev_err(dev, "No available vop found for display-subsystem.\n"); | |
451 | return -ENODEV; | |
452 | } | |
453 | /* | |
454 | * For each bound crtc, bind the encoders attached to its | |
455 | * remote endpoint. | |
456 | */ | |
457 | for (i = 0;; i++) { | |
458 | port = of_parse_phandle(np, "ports", i); | |
459 | if (!port) | |
460 | break; | |
461 | ||
462 | if (!of_device_is_available(port->parent)) { | |
463 | of_node_put(port); | |
464 | continue; | |
465 | } | |
466 | ||
467 | rockchip_add_endpoints(dev, &match, port); | |
468 | of_node_put(port); | |
469 | } | |
470 | ||
471 | return component_master_add_with_match(dev, &rockchip_drm_ops, match); | |
2048e328 MY |
472 | } |
473 | ||
474 | static int rockchip_drm_platform_remove(struct platform_device *pdev) | |
475 | { | |
476 | component_master_del(&pdev->dev, &rockchip_drm_ops); | |
477 | ||
478 | return 0; | |
479 | } | |
480 | ||
481 | static const struct of_device_id rockchip_drm_dt_ids[] = { | |
482 | { .compatible = "rockchip,display-subsystem", }, | |
483 | { /* sentinel */ }, | |
484 | }; | |
485 | MODULE_DEVICE_TABLE(of, rockchip_drm_dt_ids); | |
486 | ||
487 | static struct platform_driver rockchip_drm_platform_driver = { | |
488 | .probe = rockchip_drm_platform_probe, | |
489 | .remove = rockchip_drm_platform_remove, | |
490 | .driver = { | |
2048e328 MY |
491 | .name = "rockchip-drm", |
492 | .of_match_table = rockchip_drm_dt_ids, | |
493 | .pm = &rockchip_drm_pm_ops, | |
494 | }, | |
495 | }; | |
496 | ||
497 | module_platform_driver(rockchip_drm_platform_driver); | |
498 | ||
499 | MODULE_AUTHOR("Mark Yao <mark.yao@rock-chips.com>"); | |
500 | MODULE_DESCRIPTION("ROCKCHIP DRM Driver"); | |
501 | MODULE_LICENSE("GPL v2"); |