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ce65a44d | 1 | /************************************************************************** |
1da177e4 | 2 | * |
ce65a44d TH |
3 | * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA. |
4 | * All Rights Reserved. | |
1da177e4 LT |
5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | |
ce65a44d TH |
7 | * copy of this software and associated documentation files (the |
8 | * "Software"), to deal in the Software without restriction, including | |
9 | * without limitation the rights to use, copy, modify, merge, publish, | |
10 | * distribute, sub license, and/or sell copies of the Software, and to | |
11 | * permit persons to whom the Software is furnished to do so, subject to | |
12 | * the following conditions: | |
b5e89ed5 | 13 | * |
ce65a44d TH |
14 | * The above copyright notice and this permission notice (including the |
15 | * next paragraph) shall be included in all copies or substantial portions | |
16 | * of the Software. | |
b5e89ed5 | 17 | * |
1da177e4 LT |
18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
ce65a44d TH |
20 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL |
21 | * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, | |
22 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR | |
23 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE | |
24 | * USE OR OTHER DEALINGS IN THE SOFTWARE. | |
b5e89ed5 | 25 | * |
b5e89ed5 | 26 | * |
ce65a44d TH |
27 | **************************************************************************/ |
28 | ||
29 | /* | |
30 | * Authors: | |
96de0e25 | 31 | * Thomas Hellström <thomas-at-tungstengraphics-dot-com> |
1da177e4 LT |
32 | */ |
33 | ||
34 | #include "drmP.h" | |
35 | #include "sis_drm.h" | |
36 | #include "sis_drv.h" | |
ce65a44d | 37 | |
1da177e4 | 38 | #include <video/sisfb.h> |
1da177e4 | 39 | |
b5e89ed5 | 40 | #define VIDEO_TYPE 0 |
1da177e4 LT |
41 | #define AGP_TYPE 1 |
42 | ||
1da177e4 | 43 | |
6bb9e4bf | 44 | #if defined(CONFIG_FB_SIS) || defined(CONFIG_FB_SIS_MODULE) |
ce65a44d | 45 | /* fb management via fb device */ |
b5e89ed5 | 46 | |
ce65a44d TH |
47 | #define SIS_MM_ALIGN_SHIFT 0 |
48 | #define SIS_MM_ALIGN_MASK 0 | |
1da177e4 | 49 | |
ce65a44d TH |
50 | static void *sis_sman_mm_allocate(void *private, unsigned long size, |
51 | unsigned alignment) | |
b5e89ed5 | 52 | { |
ce65a44d | 53 | struct sis_memreq req; |
1da177e4 | 54 | |
ce65a44d TH |
55 | req.size = size; |
56 | sis_malloc(&req); | |
57 | if (req.size == 0) | |
58 | return NULL; | |
59 | else | |
48f185d0 | 60 | return (void *)(unsigned long)~req.offset; |
1da177e4 LT |
61 | } |
62 | ||
ce65a44d | 63 | static void sis_sman_mm_free(void *private, void *ref) |
1da177e4 | 64 | { |
ce65a44d | 65 | sis_free(~((unsigned long)ref)); |
1da177e4 LT |
66 | } |
67 | ||
ce65a44d | 68 | static void sis_sman_mm_destroy(void *private) |
1da177e4 | 69 | { |
ce65a44d | 70 | ; |
1da177e4 LT |
71 | } |
72 | ||
fb41e54b | 73 | static unsigned long sis_sman_mm_offset(void *private, void *ref) |
1da177e4 | 74 | { |
ce65a44d | 75 | return ~((unsigned long)ref); |
1da177e4 LT |
76 | } |
77 | ||
6bb9e4bf | 78 | #else /* CONFIG_FB_SIS[_MODULE] */ |
fb41e54b AB |
79 | |
80 | #define SIS_MM_ALIGN_SHIFT 4 | |
a7b98b67 | 81 | #define SIS_MM_ALIGN_MASK ((1 << SIS_MM_ALIGN_SHIFT) - 1) |
fb41e54b | 82 | |
6bb9e4bf | 83 | #endif /* CONFIG_FB_SIS[_MODULE] */ |
1da177e4 | 84 | |
c153f45f | 85 | static int sis_fb_init(struct drm_device *dev, void *data, struct drm_file *file_priv) |
1da177e4 | 86 | { |
1da177e4 | 87 | drm_sis_private_t *dev_priv = dev->dev_private; |
c153f45f | 88 | drm_sis_fb_t *fb = data; |
ce65a44d | 89 | int ret; |
1da177e4 | 90 | |
ce65a44d | 91 | mutex_lock(&dev->struct_mutex); |
6bb9e4bf | 92 | #if defined(CONFIG_FB_SIS) || defined(CONFIG_FB_SIS_MODULE) |
ce65a44d | 93 | { |
cca5307d | 94 | struct drm_sman_mm sman_mm; |
ce65a44d TH |
95 | sman_mm.private = (void *)0xFFFFFFFF; |
96 | sman_mm.allocate = sis_sman_mm_allocate; | |
97 | sman_mm.free = sis_sman_mm_free; | |
98 | sman_mm.destroy = sis_sman_mm_destroy; | |
99 | sman_mm.offset = sis_sman_mm_offset; | |
100 | ret = | |
101 | drm_sman_set_manager(&dev_priv->sman, VIDEO_TYPE, &sman_mm); | |
1da177e4 | 102 | } |
ce65a44d TH |
103 | #else |
104 | ret = drm_sman_set_range(&dev_priv->sman, VIDEO_TYPE, 0, | |
c153f45f | 105 | fb->size >> SIS_MM_ALIGN_SHIFT); |
ce65a44d | 106 | #endif |
1da177e4 | 107 | |
ce65a44d TH |
108 | if (ret) { |
109 | DRM_ERROR("VRAM memory manager initialisation error\n"); | |
110 | mutex_unlock(&dev->struct_mutex); | |
111 | return ret; | |
112 | } | |
1da177e4 | 113 | |
a1d0fcf5 | 114 | dev_priv->vram_initialized = 1; |
c153f45f | 115 | dev_priv->vram_offset = fb->offset; |
1da177e4 | 116 | |
ce65a44d | 117 | mutex_unlock(&dev->struct_mutex); |
3e684eae | 118 | DRM_DEBUG("offset = %u, size = %u\n", fb->offset, fb->size); |
1da177e4 LT |
119 | |
120 | return 0; | |
121 | } | |
122 | ||
6c340eac | 123 | static int sis_drm_alloc(struct drm_device *dev, struct drm_file *file_priv, |
c153f45f | 124 | void *data, int pool) |
1da177e4 | 125 | { |
1da177e4 | 126 | drm_sis_private_t *dev_priv = dev->dev_private; |
c153f45f | 127 | drm_sis_mem_t *mem = data; |
1da177e4 | 128 | int retval = 0; |
9698b4db | 129 | struct drm_memblock_item *item; |
1da177e4 | 130 | |
ce65a44d TH |
131 | mutex_lock(&dev->struct_mutex); |
132 | ||
a1d0fcf5 | 133 | if (0 == ((pool == 0) ? dev_priv->vram_initialized : |
ce65a44d TH |
134 | dev_priv->agp_initialized)) { |
135 | DRM_ERROR | |
136 | ("Attempt to allocate from uninitialized memory manager.\n"); | |
038477aa | 137 | mutex_unlock(&dev->struct_mutex); |
20caafa6 | 138 | return -EINVAL; |
ce65a44d | 139 | } |
b5e89ed5 | 140 | |
c153f45f EA |
141 | mem->size = (mem->size + SIS_MM_ALIGN_MASK) >> SIS_MM_ALIGN_SHIFT; |
142 | item = drm_sman_alloc(&dev_priv->sman, pool, mem->size, 0, | |
6c340eac | 143 | (unsigned long)file_priv); |
ce65a44d TH |
144 | |
145 | mutex_unlock(&dev->struct_mutex); | |
146 | if (item) { | |
c153f45f | 147 | mem->offset = ((pool == 0) ? |
ce65a44d TH |
148 | dev_priv->vram_offset : dev_priv->agp_offset) + |
149 | (item->mm-> | |
150 | offset(item->mm, item->mm_info) << SIS_MM_ALIGN_SHIFT); | |
c153f45f EA |
151 | mem->free = item->user_hash.key; |
152 | mem->size = mem->size << SIS_MM_ALIGN_SHIFT; | |
1da177e4 | 153 | } else { |
c153f45f EA |
154 | mem->offset = 0; |
155 | mem->size = 0; | |
156 | mem->free = 0; | |
20caafa6 | 157 | retval = -ENOMEM; |
1da177e4 LT |
158 | } |
159 | ||
c153f45f EA |
160 | DRM_DEBUG("alloc %d, size = %d, offset = %d\n", pool, mem->size, |
161 | mem->offset); | |
1da177e4 LT |
162 | |
163 | return retval; | |
164 | } | |
165 | ||
c153f45f | 166 | static int sis_drm_free(struct drm_device *dev, void *data, struct drm_file *file_priv) |
1da177e4 | 167 | { |
1da177e4 | 168 | drm_sis_private_t *dev_priv = dev->dev_private; |
c153f45f | 169 | drm_sis_mem_t *mem = data; |
ce65a44d | 170 | int ret; |
1da177e4 | 171 | |
ce65a44d | 172 | mutex_lock(&dev->struct_mutex); |
c153f45f | 173 | ret = drm_sman_free_key(&dev_priv->sman, mem->free); |
ce65a44d | 174 | mutex_unlock(&dev->struct_mutex); |
c153f45f | 175 | DRM_DEBUG("free = 0x%lx\n", mem->free); |
1da177e4 | 176 | |
ce65a44d | 177 | return ret; |
1da177e4 LT |
178 | } |
179 | ||
c153f45f EA |
180 | static int sis_fb_alloc(struct drm_device *dev, void *data, |
181 | struct drm_file *file_priv) | |
ce65a44d | 182 | { |
6c340eac | 183 | return sis_drm_alloc(dev, file_priv, data, VIDEO_TYPE); |
ce65a44d | 184 | } |
1da177e4 | 185 | |
c153f45f EA |
186 | static int sis_ioctl_agp_init(struct drm_device *dev, void *data, |
187 | struct drm_file *file_priv) | |
1da177e4 | 188 | { |
1da177e4 | 189 | drm_sis_private_t *dev_priv = dev->dev_private; |
c153f45f | 190 | drm_sis_agp_t *agp = data; |
ce65a44d TH |
191 | int ret; |
192 | dev_priv = dev->dev_private; | |
1da177e4 | 193 | |
ce65a44d TH |
194 | mutex_lock(&dev->struct_mutex); |
195 | ret = drm_sman_set_range(&dev_priv->sman, AGP_TYPE, 0, | |
c153f45f | 196 | agp->size >> SIS_MM_ALIGN_SHIFT); |
ce65a44d TH |
197 | |
198 | if (ret) { | |
199 | DRM_ERROR("AGP memory manager initialisation error\n"); | |
200 | mutex_unlock(&dev->struct_mutex); | |
201 | return ret; | |
202 | } | |
1da177e4 | 203 | |
a1d0fcf5 | 204 | dev_priv->agp_initialized = 1; |
c153f45f | 205 | dev_priv->agp_offset = agp->offset; |
ce65a44d | 206 | mutex_unlock(&dev->struct_mutex); |
1da177e4 | 207 | |
3e684eae | 208 | DRM_DEBUG("offset = %u, size = %u\n", agp->offset, agp->size); |
1da177e4 LT |
209 | return 0; |
210 | } | |
211 | ||
c153f45f EA |
212 | static int sis_ioctl_agp_alloc(struct drm_device *dev, void *data, |
213 | struct drm_file *file_priv) | |
1da177e4 | 214 | { |
1da177e4 | 215 | |
6c340eac | 216 | return sis_drm_alloc(dev, file_priv, data, AGP_TYPE); |
1da177e4 LT |
217 | } |
218 | ||
84b1fd10 | 219 | static drm_local_map_t *sis_reg_init(struct drm_device *dev) |
7981bf7d | 220 | { |
55910517 | 221 | struct drm_map_list *entry; |
7981bf7d TH |
222 | drm_local_map_t *map; |
223 | ||
bd1b331f | 224 | list_for_each_entry(entry, &dev->maplist, head) { |
7981bf7d TH |
225 | map = entry->map; |
226 | if (!map) | |
227 | continue; | |
a7b98b67 | 228 | if (map->type == _DRM_REGISTERS) |
7981bf7d | 229 | return map; |
7981bf7d TH |
230 | } |
231 | return NULL; | |
232 | } | |
233 | ||
84b1fd10 | 234 | int sis_idle(struct drm_device *dev) |
7981bf7d TH |
235 | { |
236 | drm_sis_private_t *dev_priv = dev->dev_private; | |
237 | uint32_t idle_reg; | |
238 | unsigned long end; | |
239 | int i; | |
240 | ||
241 | if (dev_priv->idle_fault) | |
242 | return 0; | |
243 | ||
244 | if (dev_priv->mmio == NULL) { | |
245 | dev_priv->mmio = sis_reg_init(dev); | |
246 | if (dev_priv->mmio == NULL) { | |
247 | DRM_ERROR("Could not find register map.\n"); | |
248 | return 0; | |
249 | } | |
250 | } | |
bc5f4523 | 251 | |
7981bf7d TH |
252 | /* |
253 | * Implement a device switch here if needed | |
254 | */ | |
255 | ||
256 | if (dev_priv->chipset != SIS_CHIP_315) | |
257 | return 0; | |
258 | ||
259 | /* | |
260 | * Timeout after 3 seconds. We cannot use DRM_WAIT_ON here | |
261 | * because its polling frequency is too low. | |
262 | */ | |
263 | ||
264 | end = jiffies + (DRM_HZ * 3); | |
265 | ||
a7b98b67 | 266 | for (i = 0; i < 4; ++i) { |
7981bf7d TH |
267 | do { |
268 | idle_reg = SIS_READ(0x85cc); | |
a7b98b67 | 269 | } while (!time_after_eq(jiffies, end) && |
7981bf7d TH |
270 | ((idle_reg & 0x80000000) != 0x80000000)); |
271 | } | |
272 | ||
273 | if (time_after_eq(jiffies, end)) { | |
274 | DRM_ERROR("Graphics engine idle timeout. " | |
275 | "Disabling idle check\n"); | |
a1d0fcf5 | 276 | dev_priv->idle_fault = 1; |
7981bf7d TH |
277 | } |
278 | ||
279 | /* | |
280 | * The caller never sees an error code. It gets trapped | |
281 | * in libdrm. | |
282 | */ | |
283 | ||
284 | return 0; | |
285 | } | |
286 | ||
287 | ||
ce65a44d | 288 | void sis_lastclose(struct drm_device *dev) |
1da177e4 | 289 | { |
1da177e4 | 290 | drm_sis_private_t *dev_priv = dev->dev_private; |
1da177e4 | 291 | |
ce65a44d TH |
292 | if (!dev_priv) |
293 | return; | |
1da177e4 | 294 | |
ce65a44d TH |
295 | mutex_lock(&dev->struct_mutex); |
296 | drm_sman_cleanup(&dev_priv->sman); | |
a1d0fcf5 AM |
297 | dev_priv->vram_initialized = 0; |
298 | dev_priv->agp_initialized = 0; | |
7981bf7d | 299 | dev_priv->mmio = NULL; |
ce65a44d | 300 | mutex_unlock(&dev->struct_mutex); |
1da177e4 LT |
301 | } |
302 | ||
a7b98b67 | 303 | void sis_reclaim_buffers_locked(struct drm_device *dev, |
6c340eac | 304 | struct drm_file *file_priv) |
1da177e4 | 305 | { |
ce65a44d | 306 | drm_sis_private_t *dev_priv = dev->dev_private; |
1da177e4 | 307 | |
ce65a44d | 308 | mutex_lock(&dev->struct_mutex); |
6c340eac | 309 | if (drm_sman_owner_clean(&dev_priv->sman, (unsigned long)file_priv)) { |
ce65a44d TH |
310 | mutex_unlock(&dev->struct_mutex); |
311 | return; | |
1da177e4 LT |
312 | } |
313 | ||
a7b98b67 | 314 | if (dev->driver->dma_quiescent) |
ce65a44d | 315 | dev->driver->dma_quiescent(dev); |
b5e89ed5 | 316 | |
6c340eac | 317 | drm_sman_owner_cleanup(&dev_priv->sman, (unsigned long)file_priv); |
ce65a44d TH |
318 | mutex_unlock(&dev->struct_mutex); |
319 | return; | |
1da177e4 LT |
320 | } |
321 | ||
c153f45f | 322 | struct drm_ioctl_desc sis_ioctls[] = { |
1b2f1489 DA |
323 | DRM_IOCTL_DEF_DRV(SIS_FB_ALLOC, sis_fb_alloc, DRM_AUTH), |
324 | DRM_IOCTL_DEF_DRV(SIS_FB_FREE, sis_drm_free, DRM_AUTH), | |
325 | DRM_IOCTL_DEF_DRV(SIS_AGP_INIT, sis_ioctl_agp_init, DRM_AUTH | DRM_MASTER | DRM_ROOT_ONLY), | |
326 | DRM_IOCTL_DEF_DRV(SIS_AGP_ALLOC, sis_ioctl_agp_alloc, DRM_AUTH), | |
327 | DRM_IOCTL_DEF_DRV(SIS_AGP_FREE, sis_drm_free, DRM_AUTH), | |
328 | DRM_IOCTL_DEF_DRV(SIS_FB_INIT, sis_fb_init, DRM_AUTH | DRM_MASTER | DRM_ROOT_ONLY), | |
1da177e4 LT |
329 | }; |
330 | ||
331 | int sis_max_ioctl = DRM_ARRAY_SIZE(sis_ioctls); |